On 16/1/25 07:40, Thomas Huth wrote:
On 15/01/2025 20.58, Philippe Mathieu-Daudé wrote:
On 6/1/25 06:50, Philippe Mathieu-Daudé wrote:
While I was very enthusiastic when Avocado was presented to
the QEMU community and pushed forward to have it integrated,
time passed and I lost interest. Be hon
From: David Woodhouse
Now that xs_node_read() can construct a node path, no need to open-code it.
Signed-off-by: David Woodhouse
Reviewed-by: Anthony PERARD
Acked-by: Roger Pau Monné
---
hw/net/xen_nic.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/hw/net
From: David Woodhouse
Now that xs_node_read() can construct a node path, no need to open-code it.
Signed-off-by: David Woodhouse
Reviewed-by: Anthony PERARD
Acked-by: Roger Pau Monné
---
hw/char/xen_console.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --gi
From: Roger Pau Monne
The 'm' parameter used to request auto-allocation of the destination variable
is not supported on FreeBSD, and as such leads to failures to parse.
What's more, the current usage of '%ms' with xs_node_scanf() is pointless, as
it just leads to a double allocation of the same
On 16/1/25 08:03, Thomas Huth wrote:
On 15/01/2025 18.09, Philippe Mathieu-Daudé wrote:
The VirtMachineClass::disallow_affinity_adjustment
field was only used by virt-2.6 machine, which got
removed. Remove it along with the GIC*_TARGETLIST_BITS
definitions, and simplify virt_cpu_mp_affinity().
From: Haibo Xu
Allow virt arm machine to set the interrupt ID for the KVM
GIC maintenance interrupt.
This setting must be done before the KVM_DEV_ARM_VGIC_CTRL_INIT
hence the choice to perform the setting in the GICv3 realize
instead of proceeding the same way as kvm_arm_pmu_set_irq().
Signed-o
From: David Woodhouse
When attempting to read the 'output' node, interpret any error *other*
than ENOENT as a fatal error. For ENOENT, fall back to serial_hd() to
find a character device, or create a null device.
Do not attempt to prepend to errp when serial_hd() fails; the error
isn't relevant
From: David Woodhouse
Signed-off-by: David Woodhouse
Reviewed-by: Anthony PERARD
Acked-by: Roger Pau Monné
---
hw/xen/xen_pvdev.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/hw/xen/xen_pvdev.c b/hw/xen/xen_pvdev.c
index c5ad71e8dc..c9143ba259 100644
--- a/hw/xen/
2/qemu.git tags/pull-xenfv-20250116
for you to fetch changes up to e7bc0204e57836b3df611b73d2decc56ed698c4a:
system/runstate: Fix regression, clarify BQL status of exit notifiers
(2025-01-15 18:05:19 +)
Xen regression fixes an
From: Phil Dennis-Jordan
By changing the way the main QEMU event loop is invoked, I inadvertently
changed the BQL status of exit notifiers: some of them implicitly
assumed they would be called with the BQL held; the BQL is however
not held during the exit(status) call in qemu_default_main().
Ins
From: David Woodhouse
This returns the full contents of the node, having created the node path
from the printf-style format string provided in its arguments.
This will save various callers from having to do so for themselves (and
from using xs_node_scanf() with the non-portable %ms format string
From: David Woodhouse
Reduce some duplication.
Signed-off-by: David Woodhouse
Reviewed-by: Anthony PERARD
Acked-by: Roger Pau Monné
---
hw/xen/trace-events | 1 -
hw/xen/xen-bus-helper.c | 15 ++-
2 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/hw/xen/trace-e
This patch adds an "aliases" node with a "serial0" entry for the
single UART in the riscv64 virt machine.
This was requested in Gitlab #2774. However, since the machine only
has one UART at the moment, it's not clear that this addition makes
sense.
Fixes: https://gitlab.com/qemu-project/qemu/-/is
On 16/1/25 07:46, Thomas Huth wrote:
We now have a general note about versioned machine types getting
deprecated and removed at the beginning of the deprecated.rst file,
so we should also have a general note about this in removed-features.rst
(which will also apply to versioned non-x86 machine ty
On Thu, 16 Jan 2025 15:04:53 +0900
Itaru Kitayama wrote:
> Hi Jonathan,
>
> > On Jan 14, 2025, at 19:26, Jonathan Cameron
> > wrote:
> >
> > On Tue, 14 Jan 2025 12:03:03 +0900
> > Itaru Kitayama wrote:
> >
> >> Hi Jonathan,
> >>
> >>> On Jan 10, 2025, at 21:31, Jonathan Cameron
> >>
On Thu, 16 Jan 2025 at 09:26, David Woodhouse wrote:
>
> On Thu, 2024-07-18 at 09:20 +0200, Stefano Garzarella wrote:
> > If a file imported from Linux is touched, emit a warning and suggest
> > using scripts/update-linux-headers.sh.
> >
> > Also check that updating imported files from Linux are n
On 1/14/25 4:11 AM, Nicholas Piggin wrote:
On Sat Jan 11, 2025 at 2:25 AM AEST, Richard Henderson wrote:
On 1/10/25 08:15, Philippe Mathieu-Daudé wrote:
Hi Cédric,
Cc'ing Laurent & Richard for user emulation.
...
The deprecation message (see previous patch) was about the
"ppc ``ref405ep`
On Thu, Jan 16, 2025 at 09:19:20AM +, Daniel P. Berrangé wrote:
> On Thu, Jan 16, 2025 at 09:48:50AM +0100, Philippe Mathieu-Daudé wrote:
> > On 16/1/25 07:46, Thomas Huth wrote:
> > > We now have a general note about versioned machine types getting
> > > deprecated and removed at the beginning
On Thu, 16 Jan 2025 at 10:52, Alex Bennée wrote:
>
> Ilya Leoshkevich writes:
>
> > On Wed, 2025-01-15 at 16:08 -0800, Richard Henderson wrote:
> >> On 1/15/25 15:20, Ilya Leoshkevich wrote:
> >> > Currently single-insn TBs created from I/O memory are not added to
> >> > region_trees. Therefore,
This assert was found during fuzzing and can be triggered with some qtest
commands.
So instead of assert failure I suggest to handle this error and abort the
command.
This patch is required at least to improve fuzzing process and do not spam with
this assert.
RFC.
Found by Linux Verification Ce
Add a test case which tests some corner case behaviour of
fused-multiply-add on x86:
* 0 * Inf + SNaN should raise Invalid
* 0 * Inf + QNaN shouldh not raise Invalid
* tininess should be detected after rounding
There is also one currently-disabled test case:
* flush-to-zero should be done afte
This patchset fixes a regression that I introduced in my recent
refactoring of softfloat NaN handling, in commit 8adcff4ae7
("fpu: handle raising Invalid for infzero in pick_nan_muladd").
When I wrote that code I was under the impression that all
architectures would raise Invalid for the "inf * zer
In commit 8adcff4ae7 ("fpu: handle raising Invalid for infzero in
pick_nan_muladd") we changed the handling of 0 * Inf + QNaN to always
raise the Invalid exception regardless of target architecture. (This
was a change affecting hppa, i386, sh4 and tricore.) However, this
was incorrect for i386, wh
On 2025/01/09 19:51, Philippe Mathieu-Daudé wrote:
Hi Akihiko,
On 9/1/25 07:29, Akihiko Odaki wrote:
Disable SR-IOV VF devices by reusing code to power down PCI devices
instead of removing them when the guest requests to disable VFs. This
allows to realize devices and report VF realization erro
On Thu, Jan 16, 2025 at 09:48:50AM +0100, Philippe Mathieu-Daudé wrote:
> On 16/1/25 07:46, Thomas Huth wrote:
> > We now have a general note about versioned machine types getting
> > deprecated and removed at the beginning of the deprecated.rst file,
> > so we should also have a general note about
On Thu, Jan 16, 2025 at 09:46:29AM +0100, Vasilis Liaskovitis wrote:
> This patch adds an "aliases" node with a "serial0" entry for the
> single UART in the riscv64 virt machine.
>
> This was requested in Gitlab #2774. However, since the machine only
> has one UART at the moment, it's not clear th
When present, Smdbltrp is enabled by default and MDT needs to be cleared
to avoid generating a double trap. Since not all firmwares are currently
ready to handle that, disable it for the max cpu.
Reported-by: Atish Patra
Signed-off-by: Clément Léger
---
target/riscv/tcg/tcg-cpu.c | 10
On Thu, 2024-07-18 at 09:20 +0200, Stefano Garzarella wrote:
> If a file imported from Linux is touched, emit a warning and suggest
> using scripts/update-linux-headers.sh.
>
> Also check that updating imported files from Linux are not mixed with
> other changes, in which case emit an error.
>
>
On Wed, 2025-01-15 at 16:08 -0800, Richard Henderson wrote:
> On 1/15/25 15:20, Ilya Leoshkevich wrote:
> > Currently single-insn TBs created from I/O memory are not added to
> > region_trees. Therefore, when they generate exceptions, they are
> > not
> > handled by cpu_restore_state_from_tb(). For
On Thu, Jan 16, 2025 at 12:22:28AM +0100, Philippe Mathieu-Daudé wrote:
> These machines has been supported for a period of more than 6 years.
> According to our versioned machine support policy (see commit
> ce80c4fa6ff "docs: document special exception for machine type
> deprecation & removal") t
On Thu, Jan 16, 2025 at 12:22:33AM +0100, Philippe Mathieu-Daudé wrote:
> The hw_compat_2_4[] array was only used by the pc-q35-2.4 and
> pc-i440fx-2.4 machines, which got removed. Remove it.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/boards.h | 3 ---
> hw/core/machine.c | 9
On Thu, Jan 16, 2025 at 12:22:34AM +0100, Philippe Mathieu-Daudé wrote:
> E1000_FLAG_MAC was only used by the hw_compat_2_4[] array,
> via the 'extra_mac_registers=off' property. We removed all
> machines using that array, lets remove all the code around
> E1000_FLAG_MAC.
>
> Signed-off-by: Philip
On Thu, Jan 16, 2025 at 12:22:35AM +0100, Philippe Mathieu-Daudé wrote:
> VIRTIO_PCI_FLAG_MIGRATE_EXTRA was only used by the
> hw_compat_2_4[] array, via the 'migrate-extra=true'
> property. We removed all machines using that array,
> lets remove all the code around VIRTIO_PCI_FLAG_MIGRATE_EXTRA.
>
On Thu, Jan 16, 2025 at 12:22:36AM +0100, Philippe Mathieu-Daudé wrote:
> VIRTIO_PCI_FLAG_DISABLE_PCIE was only used by the
> hw_compat_2_4[] array, via the 'x-disable-pcie=false'
> property. We removed all machines using that array,
> lets remove all the code around VIRTIO_PCI_FLAG_DISABLE_PCIE.
>
On Thu, Jan 16, 2025 at 12:22:38AM +0100, Philippe Mathieu-Daudé wrote:
> The X86MachineClass::save_tsc_khz boolean was only used
> by the pc-q35-2.5 and pc-i440fx-2.5 machines, which got
> removed. Remove it and simplify tsc_khz_needed().
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> includ
On confidential VM platform, for example, AMD-SEV, P2P doesn't work.
The underlying reason is that IOMMU driver set encryption bit on
IOMMU page table pte entry, it's reasonalbe if the pte maps iova
to system memory. However, if the pte maps iova to device's
mmio bar space, setting encryption bit o
On Thu, Jan 16, 2025 at 12:22:41AM +0100, Philippe Mathieu-Daudé wrote:
> The "fallback" property was only used by the hw_compat_2_5[] array,
> as 'fallback=144'. We removed all machines using that array, lets
> remove ISA floppy drive 'fallback' property, manually setting the
> default value in is
On Thu, Jan 16, 2025 at 12:22:42AM +0100, Philippe Mathieu-Daudé wrote:
> PVSCSI_COMPAT_OLD_PCI_CONFIGURATION was only used by the
> hw_compat_2_5[] array, via the 'x-old-pci-configuration=on'
> property. We removed all machines using that array, lets remove
> all the code around PVSCSI_COMPAT_OLD_
On Thu, Jan 16, 2025 at 12:22:46AM +0100, Philippe Mathieu-Daudé wrote:
> VMXNET3_COMPAT_FLAG_DISABLE_PCIE was only used by the
> hw_compat_2_5[] array, via the 'x-disable-pcie=on' property.
> We removed all machines using that array, lets remove all the
> code around VMXNET3_COMPAT_FLAG_DISABLE_PC
On Thu, Jan 16, 2025 at 12:22:39AM +0100, Philippe Mathieu-Daudé wrote:
> The MachineClass::legacy_fw_cfg_order boolean was only used
> by the pc-q35-2.5 and pc-i440fx-2.5 machines, which got
> removed. Remove it along with:
>
> - FW_CFG_ORDER_OVERRIDE_* definitions
> - fw_cfg_set_order_override()
On Thu, Jan 16, 2025 at 12:22:40AM +0100, Philippe Mathieu-Daudé wrote:
> The hw_compat_2_5[] array was only used by the pc-q35-2.5 and
> pc-i440fx-2.5 machines, which got removed. Remove it.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/boards.h | 3 ---
> hw/core/machine.c | 9
On Thu, Jan 16, 2025 at 12:22:43AM +0100, Philippe Mathieu-Daudé wrote:
> PVSCSI_COMPAT_DISABLE_PCIE_BIT was only used by the
> hw_compat_2_5[] array, via the 'x-disable-pcie=on' property.
> We removed all machines using that array, lets remove all the
> code around PVSCSI_COMPAT_DISABLE_PCIE_BIT.
On Thu, Jan 16, 2025 at 12:22:44AM +0100, Philippe Mathieu-Daudé wrote:
> Simplify replacing pvscsi_realize() by pvscsi_instance_init(),
> removing the need for device_class_set_parent_realize().
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/scsi/vmw_pvscsi.c | 13 +++--
> 1 file
On Thu, Jan 16, 2025 at 12:22:45AM +0100, Philippe Mathieu-Daudé wrote:
> VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS was only used by the
> hw_compat_2_5[] array, via the 'x-old-msi-offsets=on' property.
> We removed all machines using that array, lets remove all the
> code around VMXNET3_COMPAT_FLAG_OLD_
On Thu, Jan 16, 2025 at 12:22:47AM +0100, Philippe Mathieu-Daudé wrote:
> Simplify merging vmxnet3_realize() within vmxnet3_instance_init(),
> removing the need for device_class_set_parent_realize().
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/net/vmxnet3.c | 15 +--
> 1 fil
When iommufd_cdev_ram_block_discard_disable() fails for whatever reason,
errp should be set or else SIGSEV is triggered in vfio_realize() when
error_prepend() is called.
By this chance, use the same error message for both legacy and iommufd
backend.
Fixes: 5ee3dc7af785 ("vfio/iommufd: Implement t
On Thursday, January 16, 2025 6:17:46 AM CET Akihiko Odaki wrote:
> On 2025/01/16 2:10, Christian Schoenebeck wrote:
> > On Wednesday, January 15, 2025 4:37:28 PM CET Akihiko Odaki wrote:
> >> On 2025/01/16 0:14, Christian Schoenebeck wrote:
> >>> On Wednesday, January 15, 2025 1:06:55 PM CET Akihi
On Thu, Jan 16, 2025 at 12:22:28AM +0100, Philippe Mathieu-Daudé wrote:
> These machines has been supported for a period of more than 6 years.
> According to our versioned machine support policy (see commit
> ce80c4fa6ff "docs: document special exception for machine type
> deprecation & removal") t
Hi Zhenzhong,
On 1/16/25 11:23 AM, Zhenzhong Duan wrote:
> When iommufd_cdev_ram_block_discard_disable() fails for whatever reason,
> errp should be set or else SIGSEV is triggered in vfio_realize() when
> error_prepend() is called.
>
> By this chance, use the same error message for both legacy a
On Thu, Jan 16, 2025 at 12:22:37AM +0100, Philippe Mathieu-Daudé wrote:
> These machines has been supported for a period of more than 6 years.
> According to our versioned machine support policy (see commit
> ce80c4fa6ff "docs: document special exception for machine type
> deprecation & removal") t
On Wed, 15 Jan 2025 23:02:32 +
Fan Ni wrote:
> On Wed, Jan 15, 2025 at 01:06:24AM +, Zhijian Li (Fujitsu) wrote:
> > Cced QEMU,
> >
> > Hi Fan,
> >
> > I recalled we had a reboot issue[1] months ago
> > I guess your issue was caused by some registers not reset during reboot.
> >
> > [1
On Thu, 16 Jan 2025 01:18:28 +
"Zhijian Li (Fujitsu)" wrote:
> On 15/01/2025 21:51, Jonathan Cameron wrote:
> > On Wed, 15 Jan 2025 15:58:46 +0800
> > Li Zhijian wrote:
> >
> >> Introduce the `CXL_T3_MSIX_VECTOR` enumeration to specify MSIX vector
> >> assignments specific to the Type 3 (
Ilya Leoshkevich writes:
> On Wed, 2025-01-15 at 16:08 -0800, Richard Henderson wrote:
>> On 1/15/25 15:20, Ilya Leoshkevich wrote:
>> > Currently single-insn TBs created from I/O memory are not added to
>> > region_trees. Therefore, when they generate exceptions, they are
>> > not
>> > handled b
On 11/5/2024 5:59 PM, Paolo Bonzini wrote:
On 11/5/24 07:24, Xiaoyao Li wrote:
Signed-off-by: Xiaoyao Li
---
target/i386/kvm/tdx.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c
index 9cb099e160e4..05475edf72bd 100644
--- a/target/i38
Disabled means it is a disabled SR-IOV VF and hidden from the guest.
Do not create DT when starting the system and also keep the disabled PCI
device not linked to DRC, which generates DT in case of hotplug.
Signed-off-by: Akihiko Odaki
Reviewed-by: Shivaprasad G Bhat
Tested-by: Shivaprasad G Bhat
The guest cannot use VFs due to the lack of multifunction support but
can use PFs.
Signed-off-by: Akihiko Odaki
---
hw/s390x/s390-pci-bus.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 8c5eb69f7d76..c396d55c72
num_vfs is not migrated so use PCI_SRIOV_CTRL_VFE and PCI_SRIOV_NUM_VF
instead.
Signed-off-by: Akihiko Odaki
---
include/hw/pci/pcie_sriov.h | 1 -
hw/pci/pcie_sriov.c | 38 +++---
hw/pci/trace-events | 2 +-
3 files changed, 28 insertions(+), 13
Supersedes: <20240714-rombar-v2-0-af1504ef5...@daynix.com>
("[PATCH v2 0/4] hw/pci: Convert rom_bar into OnOffAuto")
I submitted a RFC series[1] to add support for SR-IOV emulation to
virtio-net-pci. During the development of the series, I fixed some
trivial bugs and made improvements that I think
The SR-IOV PFs set the multifunction bit during device realization so
check them after that. There is no functional change because we
explicitly ignore the multifunction bit for SR-IOV devices.
Signed-off-by: Akihiko Odaki
---
hw/s390x/s390-pci-bus.c | 28 +---
1 file cha
pcie_sriov doesn't have code to restore its state after migration, but
igb, which uses pcie_sriov, naively claimed its migration capability.
Add code to register VFs after migration and fix igb migration.
Fixes: 3a977deebe6b ("Intrdocue igb device emulation")
Signed-off-by: Akihiko Odaki
---
in
pci_new() aborts when creating a VF with addr >= PCI_DEVFN_MAX.
Signed-off-by: Akihiko Odaki
---
docs/pcie_sriov.txt | 8 +---
include/hw/pci/pcie_sriov.h | 5 +++--
hw/net/igb.c| 10 +++---
hw/nvme/ctrl.c | 22 ++
hw/pci/pcie_sr
Disable SR-IOV VF devices by reusing code to power down PCI devices
instead of removing them when the guest requests to disable VFs. This
allows to realize devices and report VF realization errors at PF
realization time.
Signed-off-by: Akihiko Odaki
---
include/hw/pci/pcie_sriov.h | 1 -
hw/pci
A PF may automatically create VFs and the PF may be function 0.
Signed-off-by: Akihiko Odaki
Reviewed-by: Shivaprasad G Bhat
Tested-by: Shivaprasad G Bhat
---
hw/ppc/spapr_pci.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index
VFs are automatically created by PF, and creating zpci for them will
result in unexpected usage of fids. Currently QEMU does not support
multifunction for s390x so we don't need zpci for VFs anyway.
Signed-off-by: Akihiko Odaki
---
hw/s390x/s390-pci-bus.c | 21 +++--
1 file chang
Release VFs failed to realize just as we do in unregister_vfs().
Fixes: 7c0fa8dff811 ("pcie: Add support for Single Root I/O Virtualization
(SR/IOV)")
Signed-off-by: Akihiko Odaki
---
hw/pci/pcie_sriov.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sri
A device gets automatically unrealized when being unparented.
Signed-off-by: Akihiko Odaki
---
hw/pci/pcie_sriov.c | 4
1 file changed, 4 deletions(-)
diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c
index e9b23221d713..499becd5273f 100644
--- a/hw/pci/pcie_sriov.c
+++ b/hw/pci/pcie_
On Thu, Jan 16, 2025 at 12:22:27AM +0100, Philippe Mathieu-Daudé wrote:
> We removed the implementations in commit 46a2bd52571
> ("hw/i386/pc: Remove deprecated pc-i440fx-2.3 machine")
> but forgot to remove the declarations. Do it now.
>
> Fixes: 46a2bd52571 ("hw/i386/pc: Remove deprecated pc-i44
Common source file csr.c is added here, it can be used by both
TCG mode and kvm mode. The common code is removed from file
tcg/insn_trans/trans_privileged.c.inc to csrc.c
Signed-off-by: Bibo Mao
---
target/loongarch/csr.c| 114 ++
target/loongarch/csr.h
With CSR register, dynamic function access is used for CSR register
access in TCG mode, so that csr info can be used by other modules.
Signed-off-by: Bibo Mao
---
.../tcg/insn_trans/trans_privileged.c.inc | 37 +--
target/loongarch/tcg/tcg_loongarch.h | 12 ++
ta
Since CSR function setting is done dynamically in TCG mode, remove
static CSR function setting here.
Signed-off-by: Bibo Mao
---
.../tcg/insn_trans/trans_privileged.c.inc| 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/loongarch/tcg/insn_trans/t
Am 17.12.2024 um 11:32 hat Roman Penyaev geschrieben:
> Hi Markus,
>
> Thanks for the explicit info. But I have a lot to ask :)
> Do I understand correctly that there are two ways to parse
> arguments: classic, via qemu_opts_parse_noisily() and modern, via
> qobject_input_visitor_new_str()? (for e
CSR registers is import system control registers, it had better to dump
all CSR registers when VM is running in system mode, rather than dump
part of those, since guest OS uses these CSR registers. And it is very
useful to debug guest OS.
---
v1 .. v2:
1. Fix compiling issue on user mode onl
Common header file csr.h is added here, it can be used by both
TCG mode and kvm mode.
Macro CONFIG_TCG is used for TCG specific CSR function because
of function parameter such as TCGv and TCGv_ptr.
Signed-off-by: Bibo Mao
---
target/loongarch/csr.h| 25 +
..
CSR registers is import system control registers, it had better
dump all CSR registers when VM is running in system mode.
Here is dump output example of CSR registers:
CSR000: CRMD b4 PRMD 4 EUEN 0
MISC 0
CSR004: ECFG 71c1c ESTAT 0
On LA464, some CSR registers are not used such as CSR_SAVE8 -
CSR_SAVE15, also CSR registers relative with MCE is not used now.
Flag CSRFL_UNUSED is added for these registers, so that it will
not dumped. In order to keep compatiblity, these CSR registers are
not removed since it is used in vmstate
On Thu, 16 Jan 2025 at 11:17, Artem Nasonov wrote:
>
> This assert was found during fuzzing and can be triggered with some qtest
> commands.
> So instead of assert failure I suggest to handle this error and abort the
> command.
> This patch is required at least to improve fuzzing process and do
On Thu, 2025-01-16 at 11:06 +, Peter Maydell wrote:
> On Thu, 16 Jan 2025 at 10:52, Alex Bennée
> wrote:
> >
> > Ilya Leoshkevich writes:
> >
> > > On Wed, 2025-01-15 at 16:08 -0800, Richard Henderson wrote:
> > > > On 1/15/25 15:20, Ilya Leoshkevich wrote:
> > > > > Currently single-insn T
John Snow writes:
> Makes debugging far more pleasant when you can just print(section) and
> get something reasonable to display.
>
> Signed-off-by: John Snow
> ---
> scripts/qapi/parser.py | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/scripts/qapi/parser.py b/scripts/qapi/parser.
To be able to properly silence a virtio device after using it,
we need a global function to reset the device.
Signed-off-by: Thomas Huth
---
pc-bios/s390-ccw/virtio.h | 1 +
pc-bios/s390-ccw/virtio.c | 7 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/pc-bios/s390-ccw/virt
When we are trying to boot from virtio-net devices, the
s390-ccw bios currently leaves the virtio-net device enabled
after using it. That means that the receiving virt queues will
continue to happily write incoming network packets into memory.
This can corrupt data of the following boot process. Fo
The boot can currently fail after the s390-ccw bios used a network
device since we do not properly shut down the device afterwards, so
that incoming network packets can corrupt the memory. We have to make
sure to put the virtio-net device into a sane state again afterwards.
The third patch is unre
The code in net_init_ip() currently bails out early if "rc" is less
than 0, so the if-statements that check for negative "rc" codes to
print out some specific error messages with regards to the TFTP server
are never reached. Move them earlier to bring that dead code back to
life.
Signed-off-by: Th
On Thu, 16 Jan 2025 at 11:48, Ilya Leoshkevich wrote:
>
> On Thu, 2025-01-16 at 11:06 +, Peter Maydell wrote:
> > The original reported problem here seems to me like it's a
> > problem with whatever target's frontend code this is.
> > This is a single instruction TB, so either:
> > * the gene
On 1/15/25 9:49 PM, Atish Patra wrote:
As per the ISA definition, the upper 8 bits in hpmevent are defined
by Sscofpmf for privilege mode filtering and overflow bits while the
lower 56 bits are desginated for platform specific hpmevent values.
s/desginated/designated
For the reset case, mh
Am 13.12.2024 um 16:56 hat Daniel P. Berrangé geschrieben:
> On Thu, Nov 28, 2024 at 06:51:20PM +0800, t...@chinatelecom.cn wrote:
> > From: Guoyi Tu
> >
> > Currently, disk I/O encryption and decryption operations are performed
> > sequentially
> > in the main thread or IOthread. When the numbe
On 12/15/24 9:48 PM, Jason Chien wrote:
pci_setup_iommu_downstream_mem() is called to set the downstream memory
region of the PCIe devices.
Signed-off-by: Jason Chien
---
Reviewed-by: Daniel Henrique Barboza
hw/riscv/riscv-iommu.c | 8
1 file changed, 8 insertions(+)
diff
On 12/15/24 9:48 PM, Jason Chien wrote:
When all memory transactions from a PCIe host write to the same IOMMU
memory region, we need to distinguish the source device dynamically.
Signed-off-by: Jason Chien
---
I'm not sure whether this should be squashed in patch 4 but the code LGTM,
so ei
Zhang Boyang writes:
> The upper bound of pointer position in InputMoveEvent should be 0x7fff,
> according to INPUT_EVENT_ABS_MAX.
>
> Signed-off-by: Zhang Boyang
> ---
> qapi/ui.json | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/qapi/ui.json b/qapi/ui.json
> index 46
On 16/01/2025 13:15, Daniel Henrique Barboza wrote:
>
>
> On 1/16/25 6:23 AM, Clément Léger wrote:
>> When present, Smdbltrp is enabled by default and MDT needs to be cleared
>> to avoid generating a double trap. Since not all firmwares are currently
>> ready to handle that, disable it for the
On 1/16/25 6:23 AM, Clément Léger wrote:
When present, Smdbltrp is enabled by default and MDT needs to be cleared
to avoid generating a double trap. Since not all firmwares are currently
ready to handle that, disable it for the max cpu.
Reported-by: Atish Patra
Signed-off-by: Clément Léger
Add the switch to enable the Smdbltrp ISA extension and disable it for
the max cpu. Indeed, OpenSBI when Smdbltrp is present, M-mode double
trap is enabled by default and MSTATUS.MDT needs to be cleared to avoid
taking a double trap. OpenSBI does not currently support it so disable
it for the max c
On Fri, Jan 10, 2025 at 4:16 PM Ani Sinha wrote:
>
> A new qtest is written that exercizes the fw-cfg DMA based read and write ops
> to write values into vmcoreinfo fw-cfg file and read them back and varify that
> they are the same.
>
Ping ...
> Signed-off-by: Ani Sinha
> ---
> MAINTAINERS
On Fri, Jan 10, 2025 at 4:16 PM Ani Sinha wrote:
>
> At present, the libqos/fw_cfg.c library does not support the modern DMA
> interface which is required to write to the fw_cfg files. It only uses the IO
> interface. Implement read and write methods based on DMA. This will enable
> developers to
On 1/16/25 10:15 AM, Clément Léger wrote:
Add the switch to enable the Smdbltrp ISA extension and disable it for
the max cpu. Indeed, OpenSBI when Smdbltrp is present, M-mode double
trap is enabled by default and MSTATUS.MDT needs to be cleared to avoid
taking a double trap. OpenSBI does not c
On Thu, Jan 16, 2025 at 10:23:56AM +0100, Andrew Jones wrote:
>
> s/Fixes/Resolves/ (see docs/devel/submitting-a-patch.rst)
>
[..]
> > qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", name);
> > +qemu_fdt_add_subnode(ms->fdt, "/aliases");
>
> create_fdt_uart() is called at mac
This patch adds an "aliases" node with a "serial0" entry for the
single UART in the riscv64 virt machine.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2774
Signed-off-by: Vasilis Liaskovitis
---
hw/riscv/virt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/riscv/virt.c b/h
From: David Woodhouse
Signed-off-by: David Woodhouse
---
include/standard-headers/linux/vmclock-abi.h | 182 +++
linux-headers/linux/iommufd.h| 31 ++--
linux-headers/linux/stddef.h | 13 +-
3 files changed, 212 insertions(+), 14 deletions(-)
c
(Posting one last time with the header commits split out).
The vmclock device addresses the problem of live migration with
precision clocks. The tolerances of a hardware counter (e.g. TSC) are
typically around ±50PPM. A guest will use NTP/PTP/PPS to discipline that
counter against an external sour
Am 12.12.2024 um 14:45 hat Vitaly Kuznetsov geschrieben:
> Changes since v3:
> - Split the change into two patches [Philippe Mathieu-Daude].
>
> It was found that 'qemu-nbd' is not able to work with some disk images
> exported from Azure as it uses a currently unknown 'wa\0\0' 'creator app'
> sign
From: David Woodhouse
This isn't a Linux-specific ABI but Linux does export the header file
with its definition, so import it from there instead of creating our own.
Signed-off-by: David Woodhouse
Acked-by: Michael S. Tsirkin
---
scripts/update-linux-headers.sh | 1 +
1 file changed, 1 insert
1 - 100 of 361 matches
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