On 12/13/2024 6:04 AM, Ira Weiny wrote:
On Tue, Nov 05, 2024 at 12:53:25PM +0100, Paolo Bonzini wrote:
On 11/5/24 12:38, Xiaoyao Li wrote:
On 11/5/2024 6:06 PM, Paolo Bonzini wrote:
On 11/5/24 07:23, Xiaoyao Li wrote:
+static void tdx_cpu_realizefn(X86ConfidentialGuest *cg, CPUState *cs,
+
Victor Toso writes:
> This patch handles QAPI enum types and generates its equivalent in Go.
> We sort the output based on enum's type name.
Any particular reason for sorting?
The existing backends generate output it source order, on the (bold?)
assumption that developers care to pick an order
Miao,
What is status about this patch? Will there be updated version?
Regards
Bibo Mao
On 2025/1/2 下午2:33, Miao Hao wrote:
On 2024/12/31 19:29, bibo mao wrote:
On 2024/12/30 下午3:04, Miao Hao wrote:
Hi Bibo,
Thanks for your review. I apologize for my late respond due to some
personal rea
On 14/1/25 09:20, Alex Bennée wrote:
Pierrick Bouvier writes:
For now, it was only possible to build plugins using GCC on Windows. However,
windows-aarch64 only supports Clang.
This biggest roadblock was to get rid of gcc_struct attribute, which is not
supported by Clang. After investigation,
On 2025/01/14 0:57, Peter Xu wrote:
On Sat, Jan 11, 2025 at 01:15:24PM +0900, Akihiko Odaki wrote:
On 2025/01/11 0:18, Peter Xu wrote:
On Fri, Jan 10, 2025 at 05:43:15PM +0900, Akihiko Odaki wrote:
On 2025/01/10 4:37, Peter Xu wrote:
On Thu, Jan 09, 2025 at 02:29:21PM -0500, Peter Xu wrote:
Pierrick Bouvier writes:
> For now, it was only possible to build plugins using GCC on Windows. However,
> windows-aarch64 only supports Clang.
> This biggest roadblock was to get rid of gcc_struct attribute, which is not
> supported by Clang. After investigation, we proved it was safe to drop it
John Snow writes:
> On Mon, Dec 16, 2024 at 8:15 AM Markus Armbruster wrote:
>
>> John Snow writes:
>>
>> > The code as written can't handle if a header isn't found, because `node`
>> > will be uninitialized.
>>
>> Yes, we initialize @node only if we have a heading.
>>
>> Made me wonder what ha
Stefan Weil via writes:
> Each DLL should only be checked once for dependencies, but
> several hundred (781 in my test) unneeded checks were done.
>
> Now the script is significantly faster (16 s in my build).
>
> Signed-off-by: Stefan Weil
Queued to maintainer/jan-2025, thanks.
--
Alex Benné
Pierrick Bouvier writes:
> This series extends our documentation with new pages to help developers
> onboarding on QEMU. It focuses on providing a big picture of QEMU (to a
> modest extend).
>
>
> Pierrick Bouvier (6):
> docs/devel: remove dead video link for sourcehut submit process
This was
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-4-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
tests/tcg/plugins/syscall.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/t
From: Philippe Mathieu-Daudé
ARM semihosting implementations in "common-semi-target.h"
must de-reference the target CPUArchState, which is declared
in each target "cpu.h" header. Include it in order to avoid
when refactoring:
In file included from ../../semihosting/arm-compat-semi.c:169:
../
This started as a clean-up to properly pass a Error handler to the
gdbserver_start so we could do the right thing for command line and
HMP invocations.
Now that we have cleaned up foreach_device_config_or_exit() in earlier
patches we can further simplify by it by passing &error_fatal instead
of ch
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-3-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/howvec.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/contrib/p
From: Pierrick Bouvier
MacOS and Linux are straightforward, but Windows needs a bit more
details.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241209183104.365796-5-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
docs/about/build-platforms.rst |
This covers my remaining trees outside of testing/next and is mostly a
consolidation of patches I've pulled from other people.
For semihosting:
- a bunch of cleanups from Philippe to aide single binary builds
For gdbstub (touches system/vl.c as well):
- propagate *Error to setup functions
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-9-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/cflow.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git
From: Philippe Mathieu-Daudé
config.c and console.c don't use any target specific
headers anymore, move them from specific_ss[] to
system_ss[] so they are built once, but will also be
linked once, removing global symbol clash in a single
QEMU binary.
Signed-off-by: Philippe Mathieu-Daudé
Review
From: Stefan Weil via
Each DLL should only be checked once for dependencies, but
several hundred (781 in my test) unneeded checks were done.
Now the script is significantly faster (16 s in my build).
Signed-off-by: Stefan Weil
Reviewed-by: Pierrick Bouvier
Reviewed-by: Philippe Mathieu-Daudé
From: Pierrick Bouvier
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-2-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
tests/tcg/plugins/insn.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
From: Pierrick Bouvier
Signed-off-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
Message-Id: <20241217224306.2900490-7-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/cache.c | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241209183104.365796-7-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
docs/devel/control-flow-integrity.rst | 2 +
docs/devel/multi-thread-tcg.rst | 2 +
docs/glossary.rs
From: Philippe Mathieu-Daudé
The CPUState structure is declared in "hw/core/cpu.h",
the EXCP_HALTED definition in "exec/cpu-common.h".
Both headers are indirectly include by "cpu.h". In
order to remove "cpu.h" from "semihosting/console.h",
explicitly include them in console.c, otherwise we'd
get:
From: Philippe Mathieu-Daudé
Since it is not obvious the get/put_user*() methods
can return an error, add brief docstrings about it.
Also remind to use *unlock_user() when appropriate.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20241212115413.42109-1-phi.
The function is qemu_plugin_mem_get_value()
Signed-off-by: Alex Bennée
---
include/qemu/qemu-plugin.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h
index 0fba36ae02..3a850aa216 100644
--- a/include/qemu/qemu-plugin.h
+
From: Pierrick Bouvier
Signed-off-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
Message-Id: <20241217224306.2900490-6-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/stoptrigger.c | 48 ---
1 file changed, 27 insertions(+), 21
On Tue, Jan 14, 2025 at 2:50 PM wrote:
>
> From: Marc-André Lureau
>
> GLib doesn't implement EXTERNAL on win32 at the moment, and disables
> ANONYMOUS by default. zbus dropped support for COOKIE_SHA1 in 5.0,
> making it no longer possible to connect to qemu -display dbus.
>
> Since p2p connectio
Since d197063fcf9 (memory: move unassigned_mem_ops to memory.c) this
field is unused.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Xu
---
include/exec/memory.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/m
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-10-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/hwprofile.c | 27 ---
1 file changed, 16 insertions(+), 11 deletions
From: Pierrick Bouvier
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Tested-by: Stefan Weil
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20250110203401.178532-3-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
docs/devel/sty
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-12-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
configure | 21 +
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git a/configur
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241209183104.365796-3-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
docs/devel/submitting-a-patch.rst | 25 +
1 file changed, 25 insertions(+)
diff --git
We have two types of perl scripts in the tree. The ones from the
kernel are mostly tab based where as scripts we have written ourselves
use 4 space indentation.
Attempt to codify that in our .editorconfig
Signed-off-by: Alex Bennée
---
.editorconfig | 13 +
1 file changed, 13 insert
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-11-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/hotpages.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/contrib
A number of copy and paste kdoc comments are referring to the wrong
definition. Fix those cases.
Signed-off-by: Alex Bennée
---
tests/qtest/libqos/qgraph.h | 2 +-
tests/qtest/libqtest.h | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/qtest/libqos/qgraph.h b
A number of copy and paste kdoc comments are referring to the wrong
definition. Fix those cases.
Signed-off-by: Alex Bennée
---
include/exec/memory.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 9458e2801d..605687befa
When we update the script we should rebuild the docs. Otherwise
breaking changes made to the kdoc script don't become apparent until
later.
Signed-off-by: Alex Bennée
---
docs/sphinx/depfile.py | 3 +++
1 file changed, 3 insertions(+)
diff --git a/docs/sphinx/depfile.py b/docs/sphinx/depfile.py
While it would be technically correct to allow an IRQ to happen (as
the offending instruction never really completed) it messes up
instrumentation. We already take care to only use memory
instrumentation on the block, we should also suppress IRQs.
Message-Id: <20250109170619.2271193-23-alex.ben...
From: Pierrick Bouvier
This attribute is not recognized by clang.
An investigation has been performed to ensure this attribute has no
effect on layout of structures we use in QEMU [1], so it's safe to
remove now.
In the future, we'll forbid introducing new bitfields in packed struct,
as they ar
On 1/14/25 01:00, Alex Bennée wrote:
...
> This needs to be gated on support from virglrenderer:
>
> /display/virtio-gpu-virgl.c
> ../../hw/display/virtio-gpu-virgl.c: In function
> ‘virtio_gpu_virgl_process_cmd’:
> ../../hw/display/virtio-gpu-virgl.c:980:15: error: implicit declaration of
ping
On Tue, Jul 30, 2024 at 04:15:52PM +0200, Alberto Garcia wrote:
> This tool converts a disk image to qcow2, writing the result directly
> to stdout. This can be used for example to send the generated file
> over the network.
Igor Mammedov writes:
> On Mon, 13 Jan 2025 17:00:55 +0100
> Philippe Mathieu-Daudé wrote:
>
>> On 13/1/25 13:28, Igor Mammedov wrote:
>> > On Sun, 12 Jan 2025 23:16:40 +0100
>> > Philippe Mathieu-Daudé wrote:
>> >
>> >> QDev objects created with object_new() need to manually add
>> >> their
On 12/17/2024 9:10 PM, Tony Lindgren wrote:
On Thu, Dec 12, 2024 at 11:24:03AM -0600, Ira Weiny wrote:
On Wed, Nov 06, 2024 at 07:13:56AM +0200, Tony Lindgren wrote:
On Wed, Nov 06, 2024 at 10:01:04AM +0800, Xiaoyao Li wrote:
On 11/6/2024 4:51 AM, Edgecombe, Rick P wrote:
+Tony
On Tue, 2024-
On Sat, 7 Dec 2024 09:54:15 +0100
Mauro Carvalho Chehab wrote:
> Split the code into separate functions to allow using the
> common CPER filling code by different error sources.
>
> The generic code was moved to ghes_record_cper_errors(),
> and ghes_gen_err_data_uncorrectable_recoverable() now
On Tue, 14 Jan 2025 12:03:03 +0900
Itaru Kitayama wrote:
> Hi Jonathan,
>
> > On Jan 10, 2025, at 21:31, Jonathan Cameron
> > wrote:
> >
> > On Fri, 10 Jan 2025 09:20:54 +
> > "Zhijian Li (Fujitsu)" via wrote:
> >
> >> On 10/01/2025 13:29, Itaru Kitayama wrote:
> >>> Hi,
> >>> Is a
On Tue, Jan 14, 2025 at 11:20:54AM +0100, Igor Mammedov wrote:
> On Tue, 10 Dec 2024 17:39:42 +0100
> Igor Mammedov wrote:
>
> > CPU hotremove event is not delivered to OSPM if the CPU
> > has been hotplugged before OS has booted.
> > For details see [2/3].
>
> Michael,
> can you pick it up plea
On Tue, Jan 14, 2025 at 09:52:23AM +0100, Markus Armbruster wrote:
> Victor Toso writes:
>
> > This patch handles QAPI enum types and generates its equivalent in Go.
> > We sort the output based on enum's type name.
>
> Any particular reason for sorting?
>
> The existing backends generate outpu
On 1/14/25 11:14, Peter Maydell wrote:
So, to my opinion, explicit cast to "long long" is necessary
here to get the expected behavior.
I wasn't saying the existing code was necessarily correct,
or that your proposed change was necessarily wrong.
I was saying your patch didn't come with any anal
On 12/13/2024 6:16 AM, Ira Weiny wrote:
On Tue, Nov 05, 2024 at 01:23:43AM -0500, Xiaoyao Li wrote:
Currently, QEMU exposes CPUID 0x1f to guest only when necessary, i.e.,
when topology level that cannot be enumerated by leaf 0xB, e.g., die or
module level, are configured for the guest, e.g., -sm
On 12/13/2024 6:17 AM, Ira Weiny wrote:
On Tue, Nov 05, 2024 at 01:23:44AM -0500, Xiaoyao Li wrote:
TDX uses CPUID 0x1f to configure TD guest's CPU topology. So set
enable_cpuid_0x1f for TDs.
If you squashed this into patch 35 I think it might make more sense overall
after some commit message
Am 11. Januar 2025 18:36:58 UTC schrieb Bernhard Beschow :
>This series fixes some details in i.MX platform devices, improves SDHCI
>
>compatibility with U-Boot and modernizes some code.
>
>
>
>The first 5 patches are bugfixes 1/ resolving infinite loop in U-Boot esdhc
>
>driver, 2/ fixing a cha
On 12/13/2024 6:39 AM, Ira Weiny wrote:
On Tue, Nov 05, 2024 at 01:23:49AM -0500, Xiaoyao Li wrote:
From: Isaku Yamahata
When level trigger isn't supported on x86 platform,
forcibly report edge trigger in acpi tables.
This commit message is pretty sparse. I was thinking of suggesting to squ
On 1/14/25 6:20 AM, Evgenii Prokopiev wrote:
A behavior of misa.v must be similar as misa.f.
So when this bit's field is turned off, mstatus.vs must be turned off
too. It follows from the privileged manual of RISC-V, paragraph 3.1.1.
"Machine ISA (misa) Register".
Signed-off-by: Evgenii Proko
On 12/13/2024 1:52 AM, Ira Weiny wrote:
On Tue, Nov 05, 2024 at 01:24:03AM -0500, Xiaoyao Li wrote:
Use KVM_TDX_GET_CPUID to get the CPUIDs that are managed and enfored
by TDX module for TD guest. Check QEMU's configuration against the
fetched data.
Print wanring message when 1. a feature is n
Hi,
On Mon, Jan 13, 2025 at 01:52:25PM +0100, Markus Armbruster wrote:
> Victor Toso writes:
>
> > This patch series intent is to introduce a generator that produces a Go
> > module for Go applications to interact over QMP with QEMU.
> >
> > The initial Goal is to have a Go module that works as
From: Marc-André Lureau
"-display dbus" hands over a file mapping handle to the peer
process (not a file handle).
Signed-off-by: Marc-André Lureau
---
ui/dbus-display1.xml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/ui/dbus-display1.xml b/ui/dbus-display1.xml
index
From: Marc-André Lureau
GLib doesn't implement EXTERNAL on win32 at the moment, and disables
ANONYMOUS by default. zbus dropped support for COOKIE_SHA1 in 5.0,
making it no longer possible to connect to qemu -display dbus.
Since p2p connections are gated by existing QMP (or a D-Bus connection),
From: Marc-André Lureau
../contrib/plugins/cache.c:638:9: error: ‘l2_cache’ may be used uninitialized
[-Werror=maybe-uninitialized]
638 | append_stats_line(rep, l1_dmem_accesses, l1_dmisses,
| ^~~~
Is a false-positive, sinc
From: Marc-André Lureau
../migration/savevm.c: In function
‘qemu_savevm_state_complete_precopy_non_iterable’:
../migration/savevm.c:1560:20: error: ‘ret’ may be used uninitialized
[-Werror=maybe-uninitialized]
1560 | return ret;
|^~~
Cc: Peter Xu
Signed-
On Tue, 14 Jan 2025 at 10:40, Paolo Bonzini wrote:
>
> On 1/14/25 11:14, Peter Maydell wrote:
> >> So, to my opinion, explicit cast to "long long" is necessary
> >> here to get the expected behavior.
> >
> > I wasn't saying the existing code was necessarily correct,
> > or that your proposed chang
John Snow writes:
> On Fri, Jan 10, 2025 at 7:19 AM Markus Armbruster wrote:
>
>> John Snow writes:
>>
>> > On Thu, Jan 9, 2025, 5:34 AM Markus Armbruster wrote:
>> >
>> >> John Snow writes:
>> >>
>> >> > On Fri, Dec 20, 2024 at 9:15 AM Markus Armbruster
>> >> > wrote:
>> >> >
>> >> >> John
Signed-off-by: Miao Hao
---
v1 -> v2:
1. Addressed review comments.
2. Fix the assignment of variable shift.
v2 -> v3:
1. Remove variable shift.
target/loongarch/cpu_helper.c | 94 +--
target/loongarch/internals.h | 4 +-
target/loongarch/tcg
On 2025/1/14 17:00, bibo mao wrote:
Miao,
What is status about this patch? Will there be updated version?
Regards
Bibo Mao
Sorry, I'm waiting for your reply. I have just updated the patch for
version 3.
Regards
Miao Hao
On 2025/1/2 下午2:33, Miao Hao wrote:
On 2024/12/31 19:29, bibo
On Tue, 14 Jan 2025 at 06:41, Дмитрий Фролов wrote:
>
> Hello, Peter.
> I beg a pardon, but I guess, we have a misunderstanding here.
>
> The problem is that comparison "if (limit < 0)" will never
> be true. Thus, "true" branch is unreachable. According to
> the comment below, it was assumed that
On 2025/1/14 下午5:55, Miao Hao wrote:
On 2025/1/14 17:00, bibo mao wrote:
Miao,
What is status about this patch? Will there be updated version?
Regards
Bibo Mao
Sorry, I'm waiting for your reply. I have just updated the patch for
version 3.
That is fine :)
PTE width is only 64 bit now,
A behavior of misa.v must be similar as misa.f.
So when this bit's field is turned off, mstatus.vs must be turned off
too. It follows from the privileged manual of RISC-V, paragraph 3.1.1.
"Machine ISA (misa) Register".
Signed-off-by: Evgenii Prokopiev
---
target/riscv/csr.c | 4
1 file cha
Hi,
On Tue, Jan 14, 2025 at 09:52:23AM +0100, Markus Armbruster wrote:
> Victor Toso writes:
>
> > This patch handles QAPI enum types and generates its equivalent in Go.
> > We sort the output based on enum's type name.
>
> Any particular reason for sorting?
It was a request from Daniel that I
Signed-off-by: Jason Chien
---
hw/riscv/riscv-iommu.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/hw/riscv/riscv-iommu.h b/hw/riscv/riscv-iommu.h
index 9424989df4..fa8a50fa24 100644
--- a/hw/riscv/riscv-iommu.h
+++ b/hw/riscv/riscv-iommu.h
@@ -58,11 +58,6 @@ struct RISCVIOMMUState {
Signed-off-by: Jason Chien
---
hw/riscv/riscv-iommu-bits.h | 22 ++
1 file changed, 6 insertions(+), 16 deletions(-)
diff --git a/hw/riscv/riscv-iommu-bits.h b/hw/riscv/riscv-iommu-bits.h
index 485f36b9c9..de599b80d6 100644
--- a/hw/riscv/riscv-iommu-bits.h
+++ b/hw/riscv/ris
On Mon, 13 Jan 2025 17:00:55 +0100
Philippe Mathieu-Daudé wrote:
> On 13/1/25 13:28, Igor Mammedov wrote:
> > On Sun, 12 Jan 2025 23:16:40 +0100
> > Philippe Mathieu-Daudé wrote:
> >
> >> QDev objects created with object_new() need to manually add
> >> their parent relationship with object_pr
On Tue, 10 Dec 2024 17:39:42 +0100
Igor Mammedov wrote:
> CPU hotremove event is not delivered to OSPM if the CPU
> has been hotplugged before OS has booted.
> For details see [2/3].
Michael,
can you pick it up please?
>
> Igor Mammedov (3):
> tests: acpi: whitelist expected blobs
> cpuhp:
All of the failures to configure devices will result in QEMU exiting
with an error code. In preparation for passing Error * down the chain
re-name the iterator to foreach_device_config_or_exit and exit using
&error_fatal instead of returning a failure indication.
Message-Id: <20250109170619.227119
From: Pierrick Bouvier
Present the various parts of QEMU and organization of codebase.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241209183104.365796-6-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
docs/about/emulation.rst | 2
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241217224306.2900490-5-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
tests/tcg/plugins/mem.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/tcg/p
From: Philippe Mathieu-Daudé
target_ulong is defined in each target "cpu-param.h",
itself included by "exec/cpu-defs.h".
Include the latter in order to avoid when refactoring:
include/semihosting/syscalls.h:26:24: error: unknown type name 'target_ulong'
26 |target_
From: Pierrick Bouvier
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20241209183104.365796-4-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
docs/devel/submitting-a-patch.rst | 14 ++
1 file changed, 14 insertions(+)
diff --git a/docs/dev
This usually indicates the semihosting call was expecting to find
something but didn't.
Message-Id: <20250109170619.2271193-2-alex.ben...@linaro.org>
Reviewed-by: Pierrick Bouvier
Signed-off-by: Alex Bennée
---
semihosting/syscalls.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/semihos
We don't need to wrap usb_device_add as usb_parse is already gated
with an if (machine_usb(current_machine)) check. Instead just assert
and directly fail if usbdevice_create returns NULL.
Message-Id: <20250109170619.2271193-10-alex.ben...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off
From: Pierrick Bouvier
Windows uses a special mechanism to enable plugins to work (DLL delay
loading). Option for lld is different than ld.
MSYS2 clang based environment use lld by default, so restricting to this
config on Windows is safe, and will avoid false bug reports.
Reviewed-by: Philippe
From: Pierrick Bouvier
Signed-off-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
Message-Id: <20241217224306.2900490-8-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
contrib/plugins/hotblocks.c | 29 -
1 file changed, 24 insertions(+), 5 deletions
From: Philippe Mathieu-Daudé
TLB_INVALID_MASK is defined in "exec/cpu-all.h".
Include it in order to avoid when refactoring:
../semihosting/uaccess.c:41:21: error: use of undeclared identifier
'TLB_INVALID_MASK'
41 | if (flags & TLB_INVALID_MASK) {
| ^
On 1/13/25 11:53 PM, Huang Borong wrote:
The line "hart_idx &= APLIC_xMSICFGADDR_PPN_LHX_MASK(lhxw);" was removed
because the same operation is performed later in the address calculation.
This change improves code clarity and avoids unnecessary operations.
Signed-off-by: Huang Borong
---
h
On Tue, Jan 14, 2025 at 04:52:07PM +0800, Xiaoyao Li wrote:
> On 12/13/2024 6:04 AM, Ira Weiny wrote:
> > On Tue, Nov 05, 2024 at 12:53:25PM +0100, Paolo Bonzini wrote:
> > > On 11/5/24 12:38, Xiaoyao Li wrote:
> > > > On 11/5/2024 6:06 PM, Paolo Bonzini wrote:
> > > > > On 11/5/24 07:23, Xiaoyao L
On 1/14/25 6:36 AM, Jason Chien wrote:
Signed-off-by: Jason Chien
---
Reviewed-by: Daniel Henrique Barboza
hw/riscv/riscv-iommu-bits.h | 22 ++
1 file changed, 6 insertions(+), 16 deletions(-)
diff --git a/hw/riscv/riscv-iommu-bits.h b/hw/riscv/riscv-iommu-bits.h
ssu64xl is defined in RVA22 as:
"sstatus.UXL must be capable of holding the value 2 (i.e., UXLEN=64 must
be supported)."
This is always true in TCG and it's mandatory for RVA23, so claim
support for it.
Signed-off-by: Daniel Henrique Barboza
---
target/riscv/cpu.c| 1 +
tests
On Sat, Jan 11, 2025 at 07:37:09PM +0100, Bernhard Beschow wrote:
> Also print the QOM canonical path when tracing which allows for distinguishing
> the many instances a typical i.MX SoC has.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Tested-by: Philippe Mathieu-Daudé
> Signed-off-by: Bernhard Be
On 1/14/25 6:36 AM, Jason Chien wrote:
Signed-off-by: Jason Chien
---
Reviewed-by: Daniel Henrique Barboza
hw/riscv/riscv-iommu.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/hw/riscv/riscv-iommu.h b/hw/riscv/riscv-iommu.h
index 9424989df4..fa8a50fa24 100644
--- a/hw/riscv/
>From the time we added RVA22U64 until now the spec didn't declare 'RVB'
as a dependency, using zba/zbb/zbs instead. Since then the RVA22 spec
[1] added the following in the 'RVA22U64 Mandatory Extensions' section:
"B Bit-manipulation instructions
Note: The B extension comprises the Zba, Zbb, and
Add RVA23S64 as described in [1]. This profile inherits all mandatory
extensions of RVA23U64, making it a child of the U64 profile.
A new "rva23s64" profile CPU is also added. This is the generated
riscv,isa for it (taken via -M dumpdtb):
rv64imafdcbvh_zic64b_zicbom_zicbop_zicboz_ziccamoa_ziccif_
On 10.01.25 21:56, William Roche wrote:
On 1/8/25 22:34, David Hildenbrand wrote:
On 14.12.24 14:45, “William Roche wrote:
From: William Roche
Subject should likely start with "system/physmem:".
Maybe
"system/physmem: handle hugetlb correctly in qemu_ram_remap()"
I updated the commit tit
On Tue, Jan 14, 2025 at 01:45:03PM +, Peter Dave Hello wrote:
> On Tuesday, June 25th, 2024 at AM 1:06, Daniel P. Berrangé
> wrote:
> > > We can't give legal advice, but the QEMU project doesn't do
> > > copyright assignment. Copyright remains with the original author
> > > (or with their emp
Hi Paolo,
Thanks for your FnCall and the guidance below...
> This gets tricky when you have more than one timer per device. With the right
> infrastructure we can make this something like
>
> fn timer_init_full<'a, 'b: 'a, T, F: 'b Fn(&'b T)>(
> &'a mut self,
> timer_list_gr
On Tue, Jan 14, 2025 at 11:36:48PM +0800, Zhao Liu wrote:
> Date: Tue, 14 Jan 2025 23:36:48 +0800
> From: Zhao Liu
> Subject: Re: [RFC 07/13] rust: add bindings for timer
>
> Hi Paolo,
>
> Thanks for your FnCall and the guidance below...
>
> > This gets tricky when you have more than one timer
On Tue, Jan 14, 2025 at 10:20:12AM -0300, Daniel Henrique Barboza wrote:
> Add RVA23S64 as described in [1]. This profile inherits all mandatory
> extensions of RVA23U64, making it a child of the U64 profile.
>
> A new "rva23s64" profile CPU is also added. This is the generated
> riscv,isa for it
On Tue, Jan 14, 2025 at 05:36:46PM +0800, Jason Chien wrote:
> Signed-off-by: Jason Chien
> ---
> hw/riscv/riscv-iommu-bits.h | 22 ++
> 1 file changed, 6 insertions(+), 16 deletions(-)
>
> diff --git a/hw/riscv/riscv-iommu-bits.h b/hw/riscv/riscv-iommu-bits.h
> index 485f36b
s/redundant/unused/ <<<$SUBJECT
s/variables/struct members/ <<<$SUBJECT
Both this and the previous patch should get some sort of commit message
explaining how the unused and redundant elements where found.
On Tue, Jan 14, 2025 at 05:36:45PM +0800, Jason Chien wrote:
> Signed-off-by: Jason Chien
On Tue, Jan 14, 2025 at 4:18 PM Zhao Liu wrote:
> ...Now I have a draft for timer binding:
>
> * timer binding:
>
> impl QEMUTimer {
> pub fn new() -> Self {
> Zeroable::ZERO
> }
Maybe Default too (not sure if you even need new())?
> pub fn timer_init_full<'a, 'b: 'a, T, F>(
On 1/14/25 11:52 AM, Andrew Jones wrote:
On Tue, Jan 14, 2025 at 10:20:10AM -0300, Daniel Henrique Barboza wrote:
From the time we added RVA22U64 until now the spec didn't declare 'RVB'
as a dependency, using zba/zbb/zbs instead. Since then the RVA22 spec
[1] added the following in the 'RVA2
On 1/14/25 12:25 PM, Andrew Jones wrote:
On Tue, Jan 14, 2025 at 10:20:12AM -0300, Daniel Henrique Barboza wrote:
Add RVA23S64 as described in [1]. This profile inherits all mandatory
extensions of RVA23U64, making it a child of the U64 profile.
A new "rva23s64" profile CPU is also added. Th
On 1/7/25 2:06 PM, Alex Williamson wrote:
Why are configuration changes to the device allowed while the device is
in use?
Would a uevent be considered an inefficient mechanism? Why?
Thanks,
Alex
I believe a vfio device is typically used to pass through a single I/O
device, like a VGPU or P
On Tue, Jan 14, 2025 at 01:08:46PM -0300, Daniel Henrique Barboza wrote:
>
>
> On 1/14/25 11:52 AM, Andrew Jones wrote:
> > On Tue, Jan 14, 2025 at 10:20:10AM -0300, Daniel Henrique Barboza wrote:
> > > From the time we added RVA22U64 until now the spec didn't declare 'RVB'
> > > as a dependency
1 - 100 of 298 matches
Mail list logo
