Philippe Mathieu-Daudé writes:
> Re-indent ASM comments adding the 'loop:' label.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Fabiano Rosas
On 1/2/25 13:17, Philippe Mathieu-Daudé wrote:
When a QDev instance is realized, qdev_get_machine() ends up called.
In the next commit, qdev_get_machine() will require a "machine"
container to be always present. To satisfy this QOM containers design,
Implement qdev_create_fake_machine() which cre
Philippe Mathieu-Daudé writes:
> Since registers are not modified, we don't need
> to refill their values. Directly jump to the previous
> store instruction to keep filling the TXDAT register.
>
> The equivalent C code remains:
>
> while (true) {
> *UART_DATA = 'T';
> }
>
> Signed-off-b
Philippe Mathieu-Daudé writes:
> In the next commit we are going to use a different value
> for the $w1 register, maintaining the same $x2 value. In
> order to keep the next commit trivial to review, set $x2
> before $w1.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Fabiano Rosas
On 1/2/25 13:17, Philippe Mathieu-Daudé wrote:
From: Peter Xu
Currently, qdev_get_machine() has a slight misuse on container_get(), as
the helper says "get a container" but in reality the goal is to get the
machine object. It is still a "container" but not strictly.
Note that it _may_ get a c
On 1/2/25 13:17, Philippe Mathieu-Daudé wrote:
From: Peter Xu
Add a helper to fetch machine containers. Add some sanity check around.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Peter Xu
Message-ID: <20241121192202.4155849-10-pet...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé
On 3/1/25 15:24, Richard Henderson wrote:
On 1/2/25 13:17, Philippe Mathieu-Daudé wrote:
When a QDev instance is realized, qdev_get_machine() ends up called.
In the next commit, qdev_get_machine() will require a "machine"
container to be always present. To satisfy this QOM containers design,
Imp
Now that the s390-ccw-virtio-2.6 and older machine types have been
removed, the "css_dev_path" property of the css-bridge is also not
used anymore and thus can be removed.
This way we finally get rid of the problem that has been described
in: https://gitlab.com/qemu-project/qemu/-/issues/2213
Sig
Now that the old machine types that used this property have been
removed, we can remove the property and the corresponding code.
Signed-off-by: Thomas Huth
---
hw/s390x/ipl.h | 1 -
hw/s390x/ipl.c | 10 --
2 files changed, 11 deletions(-)
diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h
in
Only s390-ccw-virtio-2.6 and older used to set this switch to "off",
for newer machine types it is always enabled. Since we removed the
old machine types now, we can also remove the switch in the code and
assume that it is always enabled now.
Signed-off-by: Thomas Huth
---
include/hw/s390x/s390-
On 1/2/25 13:18, Philippe Mathieu-Daudé wrote:
Only qemu_create_machine_containers() uses the
machine_containers[] array, restrict the scope
to this single user.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Peter Xu
---
system/vl.c | 16 +++-
1 file changed, 7 insertions(+),
Now that the last machine type that disabled cpu_model_allowed has
been removed, we can also remove the cpu_model_allowed flag itself
and all the related conditional code.
Signed-off-by: Thomas Huth
---
include/hw/s390x/s390-virtio-ccw.h | 3 ---
hw/s390x/s390-virtio-ccw.c | 9 +---
This property was only set to "off" by the old s390-ccw-virtio-2.4
machine type which has now been removed. So we can now remove the
property and the related code, too.
Signed-off-by: Thomas Huth
---
include/hw/s390x/storage-keys.h | 2 --
hw/s390x/s390-skeys.c | 10 +-
2 file
Now that the s390-ccw-virtio-2.8 machine has been removed, we don't
need the "adapter_routes_max_batch" property anymore and can remove it.
Signed-off-by: Thomas Huth
---
include/hw/s390x/s390_flic.h | 2 --
hw/intc/s390_flic.c | 9 -
hw/s390x/virtio-ccw.c| 5 ++---
3 fi
According to our support policy, we don't support machine types anymore
that are older than 6 years, so we can remove the very old 2.x machine
types now. Let's start by removing all s390-virtio-ccw machines up to
version 2.8. (This also helps to get rid of the problem that has been
described in: ht
The s390-ccw-virtio-2.6 machine is older than 6 years, so according to
our machine support policy, it can be removed now.
Signed-off-by: Thomas Huth
---
hw/s390x/s390-virtio-ccw.c | 20
1 file changed, 20 deletions(-)
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-
The s390-ccw-virtio-2.7 machine is older than 6 years, so according to
our machine support policy, it can be removed now.
Signed-off-by: Thomas Huth
---
hw/s390x/s390-virtio-ccw.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virti
The s390-ccw-virtio-2.8 machine is older than 6 years, so according to
our machine support policy, it can be removed now.
Signed-off-by: Thomas Huth
---
hw/s390x/s390-virtio-ccw.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-vir
They are older than 6 years, so according to our machine support
policy, they can be removed now.
This removes the requirements for the storage keys "migration-enabled"
property which will be removed in the next patch. It also removes
the code that sets "max_revision" to 0 for some CCW devices, bu
On 1/2/25 13:17, Philippe Mathieu-Daudé wrote:
From: Peter Xu
Now there's no user of container_get(), remove it.
Signed-off-by: Peter Xu
Reviewed-by: Philippe Mathieu-Daudé
Message-ID:<20241121192202.4155849-14-pet...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé
---
include/qom/object.h
When we introduced the deprecation rule of keeping deprecated features
for two more releases, we had to state that we would not remove features
by surprise that had already been marked as deprecated before. Nowadays,
this paragraph is not needed anymore, so we can remove it now.
Signed-off-by: Tho
On Monday, December 30, 2024 10:50:59 AM CET Christian Schoenebeck wrote:
> On Monday, December 16, 2024 11:30:09 AM CET Christian Schoenebeck wrote:
> > Improve tracing of 9p 'Topen' request type by showing open() flags as
> > human-readable text.
> >
> > E.g. trace output:
> >
> > v9fs_open t
Am 02.01.25 um 08:23 schrieb Thomas Huth:
> On 02/01/2025 08.06, Philippe Mathieu-Daudé wrote:
>> Hi Volker,
>>
>> On 31/12/24 12:59, Volker Rümelin wrote:
>>> Windows only:
>>>
>>> The libSDL2 Windows message loop needs the libSDL2 Windows low
>>> level keyboard hook procedure to grab the left and
Hi,
On 12/20/24 12:28 PM, Eugenio Perez Martin wrote:
On Thu, Dec 19, 2024 at 8:37 PM Sahil Siddiq wrote:
Hi,
On 12/17/24 1:20 PM, Eugenio Perez Martin wrote:
On Tue, Dec 17, 2024 at 6:45 AM Sahil Siddiq wrote:
On 12/16/24 2:09 PM, Eugenio Perez Martin wrote:
On Sun, Dec 15, 2024 at 6:27
On Fri, 3 Jan 2025 at 13:32, Fabiano Rosas wrote:
>
> Thomas Huth writes:
>
> > On 20/12/2024 17.28, Peter Xu wrote:
> >> On Thu, Dec 19, 2024 at 03:53:22PM -0300, Fabiano Rosas wrote:
> >>> Stefan Hajnoczi writes:
> >>>
> Hi Fabiano,
> Please take a look at this CI failure:
>
> >
On Tue, 31 Dec 2024 23:19:53 +0800
Tomita Moeko wrote:
> With the introduction of config_offset field, VFIOConfigMirrorQuirk can
> now be used for those mirrored register in igd bar0. This eliminates
> the need for the macro intoduced in 1a2623b5c9e7 ("vfio/igd: add macro
> for declaring mirrored
From: Wainer dos Santos Moschetta
The time I spent contributing to QEMU was great, but I've not been active
for a long time now. So removing myself from the reviewers list of
"Integration Testing with the Avocado framework" and
"Build and test automation" subsystems.
Signed-off-by: Wainer dos Sa
Stefan Hajnoczi writes:
> On Fri, 3 Jan 2025 at 13:32, Fabiano Rosas wrote:
>>
>> Thomas Huth writes:
>>
>> > On 20/12/2024 17.28, Peter Xu wrote:
>> >> On Thu, Dec 19, 2024 at 03:53:22PM -0300, Fabiano Rosas wrote:
>> >>> Stefan Hajnoczi writes:
>> >>>
>> Hi Fabiano,
>> Please take
Yichen Wang writes:
> From: Hao Xiang
>
> Multifd sender path gets an array of pages queued by the migration
> thread. It performs zero page checking on every page in the array.
> The pages are classfied as either a zero page or a normal page. This
> change uses Intel DSA to offload the zero pag
Hi,
This series is an experiment to link multiple disassembler
in the same system binary. At least in my prototype I wanted
to get 3: x86 host and microblaze/xtensa targets.
Instead of having meson.build select one pair of host+target,
we let targets to be selected by Kconfig. By default each
tar
When capstone is available, we get ARM/X86/PPC/S390X
disassemblers in common_ss[] for free.
Signed-off-by: Philippe Mathieu-Daudé
---
disas/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/disas/Kconfig b/disas/Kconfig
index 1d2c397c953..8af8ecd5c81 100644
--- a/disas/Kconfig
+++
The Xtensa disassembler (selected with CONFIG_XTENSA_DIS=y)
uses methods defined in xtensa-isa.c, so this file has to be
compiled when the disassembler is linked.
Signed-off-by: Philippe Mathieu-Daudé
---
target/xtensa/meson.build | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --g
No change for host or user emulation.
For system emulation, each target explicitly selects
its disassembler.
This change allows selecting more than two (host + target)
disassemblers in a binary supporting multiple targets.
Signed-off-by: Philippe Mathieu-Daudé
---
meson.build |
No need to link capstone to targets which don't use it.
Signed-off-by: Philippe Mathieu-Daudé
---
disas/meson.build| 1 -
target/arm/meson.build | 1 +
target/i386/meson.build | 1 +
target/ppc/meson.build | 1 +
target/s390x/meson.build | 1 +
5 files changed, 4 insertions(+), 1 de
Signed-off-by: Philippe Mathieu-Daudé
---
meson.build | 1 +
Kconfig.host | 3 +++
2 files changed, 4 insertions(+)
diff --git a/meson.build b/meson.build
index a35ef579c28..28f9120a781 100644
--- a/meson.build
+++ b/meson.build
@@ -3224,6 +3224,7 @@ host_kconfig = \
(have_ivshmem ? ['CONFIG
Keep the Hexagon target in line with others.
Signed-off-by: Philippe Mathieu-Daudé
---
target/Kconfig | 1 +
target/hexagon/Kconfig | 2 ++
2 files changed, 3 insertions(+)
create mode 100644 target/hexagon/Kconfig
diff --git a/target/Kconfig b/target/Kconfig
index d0c7b59d9c7..17cfb46
> > -/// # Safety
> > -///
> > -/// We expect the FFI user of this function to pass a valid pointer that
> > -/// can be downcasted to type `DeviceClass`, because `T` implements
> > -/// `DeviceImpl`.
> > -pub unsafe extern "C" fn rust_device_class_init(
> > -klass: *mut ObjectClass,
> > -_
Hi Fabiano,
On 12/12/24 00:37, Philippe Mathieu-Daudé wrote:
Replace first_cpu->as by address_space_memory.
Philippe Mathieu-Daudé (2):
system/qtest: Remove uses of 'first_cpu'
qtest/fuzz: Remove uses of 'first_cpu'
system/qtest.c| 53 ---
On 1/3/2025 5:17 PM, Philippe Mathieu-Daudé wrote:
Keep the Hexagon target in line with others.
Signed-off-by: Philippe Mathieu-Daudé
---
Reviewed-by: Brian Cain
target/Kconfig | 1 +
target/hexagon/Kconfig | 2 ++
2 files changed, 3 insertions(+)
create mode 100644 target
While I was very enthusiast when Avocado was presented to
the QEMU community and pushed forward to have it integrated,
time passed and I lost interest. Be honest, remove my R: tag
to not give fake expectation I'd review patches related to
Avocado anymore.
Signed-off-by: Philippe Mathieu-Daudé
---
On 3/1/25 13:26, Fabiano Rosas wrote:
Philippe Mathieu-Daudé writes:
Hi Fabiano,
On 12/12/24 00:37, Philippe Mathieu-Daudé wrote:
Replace first_cpu->as by address_space_memory.
Philippe Mathieu-Daudé (2):
system/qtest: Remove uses of 'first_cpu'
qtest/fuzz: Remove uses of 'first_cpu
On Sat, 4 Jan 2025, Philippe Mathieu-Daudé wrote:
While I was very enthusiast when Avocado was presented to
I think 'enthusiastic' would be correct here.
Regards,
BALATON Zoltan
the QEMU community and pushed forward to have it integrated,
time passed and I lost interest. Be honest, remove my
Yichen Wang writes:
> From: Hao Xiang
>
> * Test DSA start and stop path.
> * Test DSA configure and cleanup path.
> * Test DSA task submission and completion path.
>
> Signed-off-by: Bryan Zhang
> Signed-off-by: Hao Xiang
> Signed-off-by: Yichen Wang
Reviewed-by: Fabiano Rosas
On Tue, 31 Dec 2024 23:19:52 +0800
Tomita Moeko wrote:
> Device may only expose a specific portion of PCI config space through a
> region in a BAR, such behavior is seen in igd GGC and BDSM mirrors in
> BAR0. To handle these, config_offset is introduced to allow mirroring
> arbitrary region in PC
Fabiano Rosas writes:
> Stefan Hajnoczi writes:
>
>> On Fri, 3 Jan 2025 at 13:32, Fabiano Rosas wrote:
>>>
>>> Thomas Huth writes:
>>>
>>> > On 20/12/2024 17.28, Peter Xu wrote:
>>> >> On Thu, Dec 19, 2024 at 03:53:22PM -0300, Fabiano Rosas wrote:
>>> >>> Stefan Hajnoczi writes:
>>> >>>
>>> >
On Thu, Jan 02, 2025 at 06:01:41PM +, Alireza Sanaee wrote:
> Date: Thu, 2 Jan 2025 18:01:41 +
> From: Alireza Sanaee
> Subject: Re: [PATCH v6 0/4] i386: Support SMP Cache Topology
> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.42; x86_64-w64-mingw32)
>
> On Thu, 2 Jan 2025 11:09:51 -0600
> Rob H
Hi Cédric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Friday, December 27, 2024 5:53 PM
> To: Steven Lee ; Peter Maydell
> ; Troy Lee ; Jamin Lin
> ; Andrew Jeffery
> ; Joel Stanley ; open
> list:ASPEED BMCs ; open list:All patches CC here
>
> Cc: Troy Lee ; Yunlin Tang
>
> S
On 28/12/24 18:37, Philippe Mathieu-Daudé wrote:
On 19/12/24 12:01, Xiaoyao Li wrote:
There are duplicated code to setup the value of MSR_CORE_THREAD_COUNT.
Extract a common function for it.
Signed-off-by: Xiaoyao Li
---
Changes in v2:
- move the implementation of cpu_x86_get_msr_core_thread_c
On 3/1/25 07:45, Bibo Mao wrote:
Code cleanup with directory hw/loongarch/, removing errors from
command "scripts/checkpatch.pl hw/loongarch/*"
Signed-off-by: Bibo Mao
---
hw/loongarch/acpi-build.c | 3 ++-
hw/loongarch/boot.c | 4 ++--
hw/loongarch/virt.c | 10 ++
3
The immediate form of MSR access instructions will use this new CPU
feature word.
Signed-off-by: Xin Li (Intel)
---
target/i386/cpu.c | 23 ++-
target/i386/cpu.h | 1 +
2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index
The immediate form of MSR access instructions are primarily motivated by
performance, not code size: by having the MSR number in an immediate, it
is available *much* earlier in the pipeline, which allows the hardware
much more leeway about how a particular MSR is handled.
Signed-off-by: Xin Li (In
WRMSRNS doesn't become a required feature for FERD, and Linux has
removed the dependency, as such remove it from Qemu.
Signed-off-by: Xin Li (Intel)
---
target/i386/cpu.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 0b639848cd..8a1223acb3 100
+Markus, Daniel & Peter
On 3/1/25 10:02, Zhao Liu wrote:
-/// # Safety
-///
-/// We expect the FFI user of this function to pass a valid pointer that
-/// can be downcasted to type `DeviceClass`, because `T` implements
-/// `DeviceImpl`.
-pub unsafe extern "C" fn rust_device_class_init(
-kla
The immediate form of MSR access instructions are primarily motivated by
performance, not code size: by having the MSR number in an immediate, it
is available *much* earlier in the pipeline, which allows the hardware
much more leeway about how a particular MSR is handled.
This new CPU feature is a
On 1/3/25 09:14, Steven Lee wrote:
Hi Cédric,
-Original Message-
From: Cédric Le Goater
Sent: Friday, December 27, 2024 5:53 PM
To: Steven Lee ; Peter Maydell
; Troy Lee ; Jamin Lin
; Andrew Jeffery
; Joel Stanley ; open
list:ASPEED BMCs ; open list:All patches CC here
Cc: Troy Lee ;
Hi Cédric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Friday, January 3, 2025 5:44 PM
> To: Steven Lee ; Peter Maydell
> ; Troy Lee ; Jamin Lin
> ; Andrew Jeffery
> ; Joel Stanley ; open
> list:ASPEED BMCs ; open list:All patches CC here
>
> Cc: Troy Lee ; Yunlin Tang
>
> Sub
Hi Cédric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Thursday, January 2, 2025 4:29 PM
> To: Steven Lee ; Peter Maydell
> ; Troy Lee ; Jamin Lin
> ; Andrew Jeffery
> ; Joel Stanley ; open
> list:ASPEED BMCs ; open list:All patches CC here
>
> Cc: Troy Lee ; Yunlin Tang
>
>
On 1/2/25 13:17, Philippe Mathieu-Daudé wrote:
From: Peter Xu
Use machine_get_container() whenever applicable across the tree.
Signed-off-by: Peter Xu
Reviewed-by: Philippe Mathieu-Daudé
Message-ID:<20241121192202.4155849-11-pet...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core
On 1/2/25 13:17, Philippe Mathieu-Daudé wrote:
From: Peter Xu
Use object_get_container() whenever applicable across the tree.
Signed-off-by: Peter Xu
Reviewed-by: Philippe Mathieu-Daudé
Message-ID:<20241121192202.4155849-13-pet...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé
---
backends
On 1/2/25 13:17, Philippe Mathieu-Daudé wrote:
From: Peter Xu
Add a helper to fetch a root container (under object_get_root()). Sanity
check on the type of the object.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Peter Xu
Message-ID:<20241121192202.4155849
On 3/1/25 16:15, Daniel P. Berrangé wrote:
On Fri, Jan 03, 2025 at 04:05:58PM +0100, Philippe Mathieu-Daudé wrote:
As Daniel suggested [*]:
We should consider to rank HVF above TCG, on the basis
that HW acceleration is faster and should provide a
host<->guest security boundary that we don't cl
On 30/12/2024 18.02, Philippe Mathieu-Daudé wrote:
ping for this single cleanup patch?
On 20/11/24 09:52, Philippe Mathieu-Daudé wrote:
"hw/s390x/ipl/qipl.h" defines loadparm[] length as LOADPARM_LEN,
use that instead of the magic '8' value. Use a char type for
char buffer.
Signed-off-by: Phil
target_ulong is defined in each target "cpu-param.h",
itself included by "exec/cpu-defs.h".
Include the latter in order to avoid when refactoring:
include/semihosting/syscalls.h:26:24: error: unknown type name 'target_ulong'
26 |target_ulong fname, target_ulong fname
This series makes semihosting config.c and console.c
target agnostic, building them once, removing symbol
collision of the following functions in the single
binary:
- qemu_semihosting_chardev_init
- qemu_semihosting_config_options
- qemu_semihosting_config_opts
- qemu_semihosting_enable
- sem
TLB_INVALID_MASK is defined in "exec/cpu-all.h".
Include it in order to avoid when refactoring:
../semihosting/uaccess.c:41:21: error: use of undeclared identifier
'TLB_INVALID_MASK'
41 | if (flags & TLB_INVALID_MASK) {
| ^
Signed-off-by: Philippe Mathi
ARM semihosting implementations in "common-semi-target.h"
must de-reference the target CPUArchState, which is declared
in each target "cpu.h" header. Include it in order to avoid
when refactoring:
In file included from ../../semihosting/arm-compat-semi.c:169:
../target/riscv/common-semi-target
The CPUState structure is declared in "hw/core/cpu.h",
the EXCP_HALTED definition in "exec/cpu-common.h".
Both headers are indirectly include by "cpu.h". In
order to remove "cpu.h" from "semihosting/console.h",
explicitly include them in console.c, otherwise we'd
get:
../semihosting/console.c:88
config.c and console.c don't use any target specific
headers anymore, move them from specific_ss[] to
system_ss[] so they are built once, but will also be
linked once, removing global symbol clash in a single
QEMU binary.
Signed-off-by: Philippe Mathieu-Daudé
---
semihosting/meson.build | 9
In the next commit we are going to use a different value
for the $w1 register, maintaining the same $x2 value. In
order to keep the next commit trivial to review, set $x2
before $w1.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Fabiano Rosas
---
tests/qtest
(Series fully reviewed)
Since v6:
- Corrected ASM comment (Fabiano)
This series split a patch [*] which was previously posted
too compact in multiple trivial steps. The last patch
initializes the PL011 Control register, enabling the
UART and its transmit channel, before using it to send
the 'T' c
The tests using the PL011 UART of the virt and raspi machines
weren't properly enabling the UART and its transmitter previous
to sending characters. Follow the PL011 manual initialization
recommendation by setting the proper bits of the control register.
Update the ASM code prefixing:
*UART_CTR
Re-indent ASM comments adding the 'loop:' label.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Fabiano Rosas
---
tests/qtest/boot-serial-test.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/tests/qtest/boot-serial-tes
Since registers are not modified, we don't need
to refill their values. Directly jump to the previous
store instruction to keep filling the TXDAT register.
The equivalent C code remains:
while (true) {
*UART_DATA = 'T';
}
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Hend
On 3/1/25 18:17, Thomas Huth wrote:
On 30/12/2024 18.02, Philippe Mathieu-Daudé wrote:
ping for this single cleanup patch?
On 20/11/24 09:52, Philippe Mathieu-Daudé wrote:
"hw/s390x/ipl/qipl.h" defines loadparm[] length as LOADPARM_LEN,
use that instead of the magic '8' value. Use a char type
On 1/3/25 10:57, Steven Lee wrote:
Hi Cédric,
-Original Message-
From: Cédric Le Goater
Sent: Friday, January 3, 2025 5:44 PM
To: Steven Lee ; Peter Maydell
; Troy Lee ; Jamin Lin
; Andrew Jeffery
; Joel Stanley ; open
list:ASPEED BMCs ; open list:All patches CC here
Cc: Troy Lee ; Yu
Hello Steven,
[ ... ]
+struct Aspeed27x0CM4SoCState {
+AspeedSoCState parent;
+
+ARMv7MState armv7m;
Why not use Aspeed10x0SoCState instead ?
The AST2700's CM4 is not part of the AST10x0 series SoC.
ok. These are different HW designs.
However, since the structure is identical, I
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any
user-visible changes.
signature.asc
Description: PGP signature
On Fri, Jan 03, 2025 at 06:16:38PM +0100, Philippe Mathieu-Daudé wrote:
> On 3/1/25 16:15, Daniel P. Berrangé wrote:
> > On Fri, Jan 03, 2025 at 04:05:58PM +0100, Philippe Mathieu-Daudé wrote:
> > > As Daniel suggested [*]:
> > >
> > > > We should consider to rank HVF above TCG, on the basis
> > >
On Wed, Jan 01, 2025 at 01:31:16PM +0530, Ani Sinha wrote:
> We are already in January 2025! Update copyright notices.
>
> Cc: peter.mayd...@linaro.org
> Cc: qemu-triv...@nongnu.org
> Signed-off-by: Ani Sinha
> ---
> docs/conf.py | 2 +-
> include/qemu/help-texts.h | 2 +-
> 2 files
On Thu, Jan 02, 2025 at 05:05:10PM +0100, Philippe Mathieu-Daudé wrote:
> Per [*]:
>
> "we're only interested in adopting SPDX for recording the
> licensing info, [not] any other SPDX metadata."
>
> Replace the 'SPDX-FileCopyrightText' and 'SPDX-FileContributor'
> tags added by Linaro by 'Cop
On 2/1/25 20:49, Alex Bennée wrote:
Philippe Mathieu-Daudé writes:
From: Philippe Mathieu-Daudé
AMSAT closed its email service [*] so my personal email
address is now defunct. Remove it to avoid bouncing emails.
[*]
https://forum.amsat-dl.org/index.php?thread/4581-amsat-mail-alias-service-
As Daniel suggested [*]:
> We should consider to rank HVF above TCG, on the basis
> that HW acceleration is faster and should provide a
> host<->guest security boundary that we don't claim for TCG
[*] https://lore.kernel.org/qemu-devel/z07yasl2pd3cp...@redhat.com/
Suggested-by: Daniel P. Berrangé
Philippe Mathieu-Daudé writes:
> The tests using the PL011 UART of the virt and raspi machines
> weren't properly enabling the UART and its transmitter previous
> to sending characters. Follow the PL011 manual initialization
> recommendation by setting the proper bits of the control register.
>
>
On Fri, Jan 03, 2025 at 03:57:02PM +0100, Thomas Huth wrote:
> When we introduced the deprecation rule of keeping deprecated features
> for two more releases, we had to state that we would not remove features
> by surprise that had already been marked as deprecated before. Nowadays,
> this paragrap
On 3/1/25 16:00, Fabiano Rosas wrote:
Philippe Mathieu-Daudé writes:
The tests using the PL011 UART of the virt and raspi machines
weren't properly enabling the UART and its transmitter previous
to sending characters. Follow the PL011 manual initialization
recommendation by setting the proper
On Fri, Jan 03, 2025 at 04:05:58PM +0100, Philippe Mathieu-Daudé wrote:
> As Daniel suggested [*]:
>
> > We should consider to rank HVF above TCG, on the basis
> > that HW acceleration is faster and should provide a
> > host<->guest security boundary that we don't claim for TCG
>
> [*] https://lo
Thomas Huth writes:
> On 20/12/2024 17.28, Peter Xu wrote:
>> On Thu, Dec 19, 2024 at 03:53:22PM -0300, Fabiano Rosas wrote:
>>> Stefan Hajnoczi writes:
>>>
Hi Fabiano,
Please take a look at this CI failure:
>>> MALLOC_PERTURB_=61 QTEST_QEMU_BINARY=./qemu-system-s390x
>>>
Philippe Mathieu-Daudé writes:
> Hi Fabiano,
>
> On 12/12/24 00:37, Philippe Mathieu-Daudé wrote:
>> Replace first_cpu->as by address_space_memory.
>>
>> Philippe Mathieu-Daudé (2):
>>system/qtest: Remove uses of 'first_cpu'
>>qtest/fuzz: Remove uses of 'first_cpu'
>>
>> system/qtest.
Thomas Huth writes:
> Now that we've got a find_free_port() function in the functional
> test framework, we can convert the migration test, too.
> While the original avocado test was only meant to run on aarch64,
> ppc64 and x86, we can turn this into a more generic test by now
> and run it on al
On Fri, 3 Jan 2025 16:25:58 +0800
Zhao Liu wrote:
> On Thu, Jan 02, 2025 at 06:01:41PM +, Alireza Sanaee wrote:
> > Date: Thu, 2 Jan 2025 18:01:41 +
> > From: Alireza Sanaee
> > Subject: Re: [PATCH v6 0/4] i386: Support SMP Cache Topology
> > X-Mailer: Claws Mail 4.3.0 (GTK 3.24.42; x86_
The analyze-migration script was seen failing in s390x in misterious
ways. It seems we're reaching the VMSDFieldStruct constructor without
any fields, which would indicate an empty .subsection entry, a
VMSTATE_STRUCT with no fields or a vmsd with no fields. We don't have
any of those, at least not
On 16/12/2024 14.37, Ilya Leoshkevich wrote:
Compiling the s390x tests on Fedora, which has the s390x cross-compiler
installed, fails with:
In file included from qemu/tests/tcg/s390x/console.c:8:
qemu/tests/tcg/s390x/../../../pc-bios/s390-ccw/sclp.c:11:10: fatal error:
string.h: No su
It has been marked as deprecated two releases ago, so it should
be fine now to remove this command line option.
Signed-off-by: Thomas Huth
---
docs/about/deprecated.rst | 6 --
docs/about/removed-features.rst | 6 ++
system/vl.c | 9 -
qemu-options.hx
Hi Cédric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Thursday, January 2, 2025 4:42 PM
> To: Steven Lee ; Peter Maydell
> ; Troy Lee ; Jamin Lin
> ; Andrew Jeffery
> ; Joel Stanley ; open
> list:ASPEED BMCs ; open list:All patches CC here
>
> Cc: Troy Lee ; Yunlin Tang
>
> S
Hi Cédric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Thursday, January 2, 2025 4:44 PM
> To: Steven Lee ; Peter Maydell
> ; Troy Lee ; Jamin Lin
> ; Andrew Jeffery
> ; Joel Stanley ; open
> list:ASPEED BMCs ; open list:All patches CC here
>
> Cc: Troy Lee ; Yunlin Tang
>
> S
Improve tracing of 9p 'Topen' request type by showing open() flags as
human-readable text.
E.g. trace output:
v9fs_open tag 0 id 12 fid 2 mode 100352
would become:
v9fs_open tag=0 id=12 fid=2 mode=100352(RDONLY|NONBLOCK|DIRECTORY|
TMPFILE|NDELAY)
Therefor add a new utility function qemu_
> > > > You asked me for the opposite though, and I described how you can
> > > > share the cache. If you want a cache per thread, then you probably
> > > > want a node per thread.
> > > >
> > > > Rob
> > > >
> > >
> > > Hi Rob,
> > >
> > > That's right, I made the mistake in my prior message
On Fri, Jan 03, 2025 at 11:13:05AM -0300, Fabiano Rosas wrote:
> The analyze-migration script was seen failing in s390x in misterious
> ways. It seems we're reaching the VMSDFieldStruct constructor without
> any fields, which would indicate an empty .subsection entry, a
> VMSTATE_STRUCT with no fie
There is a possibility that SPI controller can get into loop due to indefinite
RDR match failures. Hence put a limit to failures and stop the sequencer.
Signed-off-by: Chalapathi V
---
hw/ssi/pnv_spi.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/hw/ssi/pnv_spi.c b/hw/ssi/pnv
In PnvXferBuffer dynamically allocating and freeing is a
process overhead. Hence used an existing Fifo8 buffer with
capacity of 16 bytes.
Signed-off-by: Chalapathi V
---
include/hw/ssi/pnv_spi.h | 3 +
hw/ssi/pnv_spi.c | 237 +--
2 files changed, 81
1 - 100 of 131 matches
Mail list logo
