[PATCH 1/3] vfio/pci: declare generic quirks in a new header file

2024-12-31 Thread Tomita Moeko
Declare generic vfio_generic_{window_address,window_data,mirror}_quirk in newly created pci_quirks.h so that they can be used elsewhere, like igd.c. Signed-off-by: Tomita Moeko --- hw/vfio/pci-quirks.c | 59 hw/vfio/pci-quirks.h | 71 +

[PATCH 3/3] vfio/igd: use VFIOConfigMirrorQuirk for mirrored registers

2024-12-31 Thread Tomita Moeko
With the introduction of config_offset field, VFIOConfigMirrorQuirk can now be used for those mirrored register in igd bar0. This eliminates the need for the macro intoduced in 1a2623b5c9e7 ("vfio/igd: add macro for declaring mirrored registers"). Signed-off-by: Tomita Moeko --- hw/vfio/igd.c |

[PATCH 2/3] vfio/pci: introduce config_offset field in VFIOConfigMirrorQuirk

2024-12-31 Thread Tomita Moeko
Device may only expose a specific portion of PCI config space through a region in a BAR, such behavior is seen in igd GGC and BDSM mirrors in BAR0. To handle these, config_offset is introduced to allow mirroring arbitrary region in PCI config space. Signed-off-by: Tomita Moeko --- hw/vfio/pci-qu

[PATCH 0/3] vfio/igd: VFIOConfigMirrorQuirk for igd mirrored registers

2024-12-31 Thread Tomita Moeko
In commit 1a2623b5c9e7 ("vfio/igd: add macro for declaring mirrored registers"), I introduced a macro to handle mirrored registers in igd bar0. However, using the existing VFIOConfigMirrorQuirk should be a better approach I think after going through the vfio code. This patch set introduces a new h

[PULL 1/1] Revert "vvfat: fix ubsan issue in create_long_filename"

2024-12-31 Thread Michael Tokarev
This reverts commit 0cb3ff7c22671aa1e1e227318799ccf6762c3bea. The original code was right in that long name in LFN directory entry uses other parts of the entry for the name too, not just the original "name" field. So it is wrong to limit the offset to be within the name field. Some other mechan

[PULL 0/1] Trivial patches for 2024-12-31

2024-12-31 Thread Michael Tokarev
The following changes since commit 7c89e226f878539b633dde3fd9c9f061c34094e3: Merge tag 'pull-request-2024-12-29' of https://gitlab.com/huth/qemu into staging (2024-12-29 03:25:41 -0500) are available in the Git repository at: https://gitlab.com/mjt0k/qemu.git tags/pull-trivial-patches for

Re: [PATCH v3 0/5] hppa CPU reset and speedup

2024-12-31 Thread Philippe Mathieu-Daudé
On 30/12/24 22:30, Helge Deller wrote: On 12/30/24 21:47, Philippe Mathieu-Daudé wrote: On 30/12/24 21:24, Helge Deller wrote: Hi Philippe, On 12/30/24 16:25, Philippe Mathieu-Daudé wrote: Respin of: https://lore.kernel.org/qemu-devel/20241229234154.32250-1- del...@kernel.org/ "Add CPU rese

[PATCH] target/loongarch: Only support 64bit pte width

2024-12-31 Thread Bibo Mao
With manual pte width can be 64bit, 128bit or more. Instead real hardware only supports 64bit pte width. For 12bit pte, there is no detail definition for all 128bit from manual. Here only 64bit pte width is supported for simplicity, will add this in later if real hw support it and there is definit

Re: [PATCH] feat: add loongarch page table walker support for debugger memory access

2024-12-31 Thread bibo mao
On 2024/12/30 下午3:04, Miao Hao wrote: Hi Bibo, Thanks for your review. I apologize for my late respond due to some personal reasons. On 2024/12/19 17:57, bibo mao wrote: Hi Miao, Thanks for doing this. It is useful to debug VM. On 2024/12/19 上午11:24, Miao Hao wrote: Signed-off-by: Miao

[PATCH v3] ui/sdl2: reenable the SDL2 Windows keyboard hook procedure

2024-12-31 Thread Volker Rümelin
Windows only: The libSDL2 Windows message loop needs the libSDL2 Windows low level keyboard hook procedure to grab the left and right Windows keys correctly. Reenable the SDL2 Windows keyboard hook procedure. Since SDL2 2.30.4 the SDL2 keyboard hook procedure also filters out the special left Con

Re: or1k -M virt -hda and net.

2024-12-31 Thread Rob Landley
On 12/23/24 07:05, Stafford Horne wrote: The kernel config looks like it should have virt block device support, but nether -hda README nor "-drive file=README,format=raw,id=hd0 -device virtio-blk-device,drive=hd0" seem to be wiring it up in qemu where the kernel can find it? The default virt_de

Re: [PATCH v10 3/7] target/riscv: Handle Smrnmi interrupt and exception

2024-12-31 Thread Daniel Henrique Barboza
On 12/31/24 12:11 AM, Frank Chang wrote: On Thu, Dec 26, 2024 at 8:42 PM Daniel Henrique Barboza mailto:dbarb...@ventanamicro.com>> wrote: On 12/17/24 3:24 AM, frank.ch...@sifive.com wrote: > From: Tommy Wu mailto:tommy...@sifive.com>> > >

Re: [PATCH] tests/functional/test_rx_gdbsim: Use stable URL for test_linux_sash

2024-12-31 Thread Yoshinori Sato
On Sun, 29 Dec 2024 17:34:19 +0900, Thomas Huth wrote: > > From: Philippe Mathieu-Daudé > > Yoshinori said [*] URL references on OSDN were stable, but they > appear not to be. Mirror the artifacts on GitHub to avoid failures > while testing on CI. Thanks. OSDN's service seems to have been unsta

Re: [PULL 0/6] Linux user fix gupnp patches

2024-12-31 Thread Stefan Hajnoczi
On Thu, 19 Dec 2024 at 16:48, Helge Deller wrote: > > Hi Stefan, > > On 12/19/24 21:01, Stefan Hajnoczi wrote: > > Will this go through Laurent or did you send a pull request to have it > > merged into qemu.git/master directly? > > Actually, I'm fine with either one. > I do understand that reviewi

[PULL 02/29] hw/misc/ivshmem-flat: Add ivshmem-flat device

2024-12-31 Thread Philippe Mathieu-Daudé
From: Gustavo Romero Add a new device, ivshmem-flat, which is similar to the ivshmem PCI but does not require a PCI bus. It's meant to be used on machines like those with Cortex-M MCUs, which usually lack a PCI/PCIe bus, e.g. lm3s6965evb and mps2-an385. The device currently only supports the sys

[PULL 05/29] hw/usb/uhci: Introduce and use register defines

2024-12-31 Thread Philippe Mathieu-Daudé
From: Guenter Roeck Introduce defines for UHCI registers to simplify adding register access in subsequent patches of the series. No functional change. Signed-off-by: Guenter Roeck Reviewed-by: Cédric Le Goater Message-ID: <20240906122542.3808997-3-li...@roeck-us.net> Signed-off-by: Philippe M

[PULL 01/29] hw/pci-host/gpex: Allow more than 4 legacy IRQs

2024-12-31 Thread Philippe Mathieu-Daudé
From: Alexander Graf Some boards such as vmapple don't do real legacy PCI IRQ swizzling. Instead, they just keep allocating more board IRQ lines for each new legacy IRQ. Let's support that mode by giving instantiators a new "nr_irqs" property they can use to support more than 4 legacy IRQ lines.

[PULL 11/29] hw/net/xilinx_ethlite: Convert some debug logs to trace events

2024-12-31 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias Message-Id: <20241112181044.92193-3-phi...@linaro.org> --- hw/net/xilinx_ethlite.c | 5 +++-- hw/net/trace-events | 4 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xil

[PULL 13/29] hw/net/xilinx_ethlite: Update QOM style

2024-12-31 Thread Philippe Mathieu-Daudé
Use XlnxXpsEthLite typedef, OBJECT_DECLARE_SIMPLE_TYPE macro; convert type_init() to DEFINE_TYPES(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias Message-Id: <20241112181044.92193-5-phi...@linaro.org> --- hw/net/xilinx_ethlite.c | 48 +++--

[PULL 06/29] hw/microblaze: Propagate CPU endianness to microblaze_load_kernel()

2024-12-31 Thread Philippe Mathieu-Daudé
Pass vCPU endianness as argument so we can load kernels with different endianness (different from the qemu-system-binary builtin one). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Reviewed-by: Alistair Francis Reviewed-by: Edgar E. Iglesias Reviewed-by: Richard Henderson

[PULL 15/29] hw/net/xilinx_ethlite: Rename rxbuf -> port_index

2024-12-31 Thread Philippe Mathieu-Daudé
'rxbuf' is the index of the dual port RAM used. Rename it as 'port_index'. Reviewed-by: Edgar E. Iglesias Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20241112181044.92193-8-phi...@linaro.org> --- hw/net/xilinx_ethlite.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) d

[PULL 03/29] hw/misc/ivshmem: Rename ivshmem to ivshmem-pci

2024-12-31 Thread Philippe Mathieu-Daudé
From: Gustavo Romero Because now there is also an MMIO ivshmem device (ivshmem-flat.c), and ivshmem.c is a PCI specific implementation, rename it to ivshmem-pci.c. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Gustavo Romero Message-ID: <20241216141818.111255-5-gustavo.rom...@linaro.org>

[PULL 16/29] fw_cfg: Don't set callback_opaque NULL in fw_cfg_modify_bytes_read()

2024-12-31 Thread Philippe Mathieu-Daudé
From: Shameer Kolothum On arm/virt platform, Chen Xiang reported a Guest crash while attempting the below steps, 1. Launch the Guest with nvdimm=on 2. Hot-add a NVDIMM dev 3. Reboot 4. Guest boots fine. 5. Reboot again. 6. Guest boot fails. QEMU_EFI reports the below error: ProcessCmdAddPointer

[PULL 09/29] hw/openrisc: Mark devices as big-endian

2024-12-31 Thread Philippe Mathieu-Daudé
The openrisc little-endian control is in a control register: SR[LEE] (which we do not implement at present). These devices are only used by the OpenRISC target, which is only built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN definition expand to DEVICE_BIG_ENDIAN (besides, the DEVICE_LITTLE_

[PULL 24/29] hw/display/apple-gfx: Introduce ParavirtualizedGraphics.Framework support

2024-12-31 Thread Philippe Mathieu-Daudé
From: Phil Dennis-Jordan MacOS provides a framework (library) that allows any vmm to implement a paravirtualized 3d graphics passthrough to the host metal stack called ParavirtualizedGraphics.Framework (PVG). The library abstracts away almost every aspect of the paravirtualized device model and o

[PULL 10/29] hw/sparc: Mark devices as big-endian

2024-12-31 Thread Philippe Mathieu-Daudé
These devices are only used by the SPARC targets, which are only built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN definition expand to DEVICE_BIG_ENDIAN (besides, the DEVICE_LITTLE_ENDIAN case isn't tested). Simplify directly using DEVICE_BIG_ENDIAN. Signed-off-by: Philippe Mathieu-Daudé R

[PULL 19/29] hw/i386/amd_iommu: Simplify non-KVM checks on XTSup feature

2024-12-31 Thread Philippe Mathieu-Daudé
Generic code wanting to access KVM specific methods should do so being protected by the 'kvm_enabled()' helper. Doing so avoid link failures when optimization is disabled (using --enable-debug), see for example commits c04cfb4596a ("hw/i386: fix short-circuit logic with non-optimizing builds") and

[PULL 04/29] hw/usb/uhci: checkpatch cleanup

2024-12-31 Thread Philippe Mathieu-Daudé
From: Guenter Roeck Fix reported checkpatch issues to prepare for next patches in the series. No functional change. Signed-off-by: Guenter Roeck Reviewed-by: Cédric Le Goater Message-ID: <20240906122542.3808997-2-li...@roeck-us.net> Signed-off-by: Philippe Mathieu-Daudé --- hw/usb/hcd-uhci.

[PULL 27/29] MAINTAINERS: Add myself as maintainer for apple-gfx, reviewer for HVF

2024-12-31 Thread Philippe Mathieu-Daudé
From: Phil Dennis-Jordan I'm happy to take responsibility for the macOS PV graphics code. As HVF patches don't seem to get much attention at the moment, I'm also adding myself as designated reviewer for HVF and x86 HVF to try and improve that. Signed-off-by: Phil Dennis-Jordan Reviewed-by: Roma

[PULL 26/29] hw/display/apple-gfx: Adds configurable mode list

2024-12-31 Thread Philippe Mathieu-Daudé
From: Phil Dennis-Jordan This change adds a property 'display_modes' on the graphics device which permits specifying a list of display modes. (screen resolution and refresh rate) The property is an array of a custom type to make the syntax slightly less awkward to use, for example: -device '{"d

[PULL 14/29] hw/net/xilinx_ethlite: Correct maximum RX buffer size

2024-12-31 Thread Philippe Mathieu-Daudé
The current max RX bufsize is set to 0x800. This is invalid, since it contains the MMIO registers region. Add the correct definition (valid for both TX & RX, see datasheet p. 20, Table 11 "XPS Ethernet Lite MAC Memory Map") and use it. Reviewed-by: Edgar E. Iglesias Signed-off-by: Philippe Mathie

[PULL 23/29] ui & main loop: Redesign of system-specific main thread event handling

2024-12-31 Thread Philippe Mathieu-Daudé
From: Phil Dennis-Jordan macOS's Cocoa event handling must be done on the initial (main) thread of the process. Furthermore, if library or application code uses libdispatch, the main dispatch queue must be handling events on the main thread as well. So far, this has affected Qemu in both the Coc

[PULL 07/29] hw/i386: Mark devices as little-endian

2024-12-31 Thread Philippe Mathieu-Daudé
These devices are only used by the X86 targets, which are only built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN definition expand to DEVICE_LITTLE_ENDIAN (besides, the DEVICE_BIG_ENDIAN case isn't tested). Simplify directly using DEVICE_LITTLE_ENDIAN. Signed-off-by: Philippe Mathieu-Daud

[PULL 25/29] hw/display/apple-gfx: Adds PCI implementation

2024-12-31 Thread Philippe Mathieu-Daudé
From: Phil Dennis-Jordan This change wires up the PCI variant of the paravirtualised graphics device, mainly useful for x86-64 macOS guests, implemented by macOS's ParavirtualizedGraphics.framework. It builds on code shared with the vmapple/mmio variant of the PVG device. Signed-off-by: Phil Den

[PULL 21/29] hw/usb/hcd-xhci-pci: Move msi/msix properties from NEC to superclass

2024-12-31 Thread Philippe Mathieu-Daudé
From: Phil Dennis-Jordan The NEC XHCI controller exposes the underlying PCI device's msi and msix properties, but the superclass and thus the qemu-xhci device do not. There does not seem to be any obvious reason for this limitation. This change moves these properties to the superclass so they are

[PULL 18/29] hw/misc/vmcoreinfo: Rename opaque pointer as 'opaque'

2024-12-31 Thread Philippe Mathieu-Daudé
Both QEMUResetHandler and FWCfgWriteCallback take an opaque pointer argument, no need to cast. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Message-Id: <20241219153857.57450-3-phi...@linaro.org> --- hw/misc/vmcoreinfo.c | 10 +- 1 file changed, 5 insertions(+),

[PULL 20/29] hw/block/virtio-blk: Replaces request free function with g_free

2024-12-31 Thread Philippe Mathieu-Daudé
From: Phil Dennis-Jordan The virtio_blk_free_request() function has been a 1-liner forwarding to g_free() for a while now. We may as well call g_free on the request pointer directly. Signed-off-by: Phil Dennis-Jordan Reviewed-by: Akihiko Odaki Tested-by: Akihiko Odaki Message-ID: <20241223221

[PULL 28/29] net/vmnet: Pad short Ethernet frames

2024-12-31 Thread Philippe Mathieu-Daudé
From: William Hooper At least on macOS 12.7.2, vmnet doesn't pad Ethernet frames, such as the host's ARP replies, to the minimum size (60 bytes before the frame check sequence) defined in IEEE Std 802.3-2022, so guests' Ethernet device drivers may drop them with "frame too short" errors. This pa

[PULL 22/29] hw/usb/hcd-xhci: Unimplemented/guest error logging for port MMIO

2024-12-31 Thread Philippe Mathieu-Daudé
From: Phil Dennis-Jordan The XHCI device code uses tracing rather than logging on various code paths that are so far unimplemented. In some cases, these code paths actually indicate faulty guest software. This patch switches instances in the read and write handlers for the port MMIO region to use

[PULL 12/29] hw/net/xilinx_ethlite: Remove unuseful debug logs

2024-12-31 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias Message-Id: <20241112181044.92193-4-phi...@linaro.org> --- hw/net/xilinx_ethlite.c | 8 1 file changed, 8 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index c38a71c71be..4626a55b069 1006

[PULL 17/29] hw/misc/vmcoreinfo: Declare QOM type using DEFINE_TYPES macro

2024-12-31 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Message-Id: <20241219153857.57450-2-phi...@linaro.org> --- hw/misc/vmcoreinfo.c | 19 --- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/hw/misc/vmcoreinfo.c b/hw/misc/vmcoreinfo.c index 0910c64

[PULL 08/29] hw/tricore: Mark devices as little-endian

2024-12-31 Thread Philippe Mathieu-Daudé
These devices are only used by the TriCore target, which is only built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN definition expand to DEVICE_LITTLE_ENDIAN (besides, the DEVICE_BIG_ENDIAN case isn't tested). Simplify directly using DEVICE_LITTLE_ENDIAN. Signed-off-by: Philippe Mathieu-Da

[PULL 00/29] Misc HW patches for 2024-12-31

2024-12-31 Thread Philippe Mathieu-Daudé
The following changes since commit 7c89e226f878539b633dde3fd9c9f061c34094e3: Merge tag 'pull-request-2024-12-29' of https://gitlab.com/huth/qemu into staging (2024-12-29 03:25:41 -0500) are available in the Git repository at: https://github.com/philmd/qemu.git tags/hw-misc-202

[PULL 29/29] hw/display/qxl: Do not use C99 // comments

2024-12-31 Thread Philippe Mathieu-Daudé
From: Hyman Huang Do not use C99 // comments to fix the checkpatch.pl error Signed-off-by: Hyman Huang Reviewed-by: Philippe Mathieu-Daudé Message-ID: <7d287eaf00e0b52b600431efd350b15a0b5b3544.1734633496.git.yong.hu...@smartx.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/display/qxl.c |

problems with virtio and microvm in ACPI mode

2024-12-31 Thread Mark Harmstone
Hi all, I've encountered a really weird bug when trying to run the fstest generic/476 in a loop on a microvm VM. The block device is a virtio-blk-device, formatted as btrfs. With acpi=on, it eventually grinds to a halt, and prints a hang message. I tracked the problem down to be within wait_dev

[PATCH v4 0/6] hppa CPU reset and speedup

2024-12-31 Thread Philippe Mathieu-Daudé
Respin of: https://lore.kernel.org/qemu-devel/20241229234154.32250-1-del...@kernel.org/ "Add CPU reset function and speed up runtime and translation." Since v3: - Added tests, dropped R-b tags Helge Deller (4): target/hppa: Convert hppa_cpu_init() to ResetHold handler hw/hppa: Reset vCPUs cal

[PATCH v4 2/6] target/hppa: Convert hppa_cpu_init() to ResetHold handler

2024-12-31 Thread Philippe Mathieu-Daudé
From: Helge Deller hppa_cpu_initfn() is called once when a HPPA CPU instance is initialized, but it sets fields which should be set each time a CPU resets. Rename it as a reset handler, having it matching the ResettablePhases::hold() signature, and register it as ResettableClass handler. Since o

[PATCH v4 1/6] tests: Add functional tests for HPPA machines

2024-12-31 Thread Philippe Mathieu-Daudé
Add quick firmware boot tests (less than 1sec) for the B160L (32-bit) and C3700 (64-bit) HPPA machines: $ make check-functional-hppa 1/4 qemu:func-quick+func-hppa / func-hppa-empty_cpu_model OK 0.13s 1 subtests passed 2/4 qemu:func-quick+func-hppa / func-hppa-version OK 0.14s 1 subt

[PATCH v4 3/6] hw/hppa: Reset vCPUs calling resettable_reset()

2024-12-31 Thread Philippe Mathieu-Daudé
From: Helge Deller Rather than manually (and incompletely) resetting vCPUs, call resettable_reset() which will fully reset the vCPUs. Remove redundant assignations. Signed-off-by: Helge Deller Co-developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé --- hw/hppa/machine.c

[PATCH v4 4/6] target/hppa: Only set PSW 'M' bit on reset

2024-12-31 Thread Philippe Mathieu-Daudé
On reset: "All PSW bits except the M bit is reset. The M bit is set." Commit 1a19da0da44 ("target/hppa: Fill in hppa_cpu_do_interrupt / hppa_cpu_exec_interrupt") inadvertently set the W bit at RESET, remove it and set the M bit. Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.c | 2

[PATCH v4 5/6] target/hppa: Set PC on vCPU reset

2024-12-31 Thread Philippe Mathieu-Daudé
From: Helge Deller On reset: "The CPU begins fetching instructions from address 0xf004. This address is in PDC space." Switch vCPUs to 32-bit mode (PSW_W bit is not set) and start execution at address 0xf004. Signed-off-by: Helge Deller Co-developed-by: Philippe Mathieu-Daudé Si

Re: [PATCH v3 1/7] hw/misc/ivshmem-flat: Add ivshmem-flat device

2024-12-31 Thread Philippe Mathieu-Daudé
On 16/12/24 15:18, Gustavo Romero wrote: Add a new device, ivshmem-flat, which is similar to the ivshmem PCI but does not require a PCI bus. It's meant to be used on machines like those with Cortex-M MCUs, which usually lack a PCI/PCIe bus, e.g. lm3s6965evb and mps2-an385. The device currently o

[PATCH v4 6/6] target/hppa: Speed up hppa_is_pa20()

2024-12-31 Thread Philippe Mathieu-Daudé
From: Helge Deller Although the hppa_is_pa20() helper is costly due to string comparisons in object_dynamic_cast(), it is called quite often during memory lookups and at each start of a block of instruction translations. Speed hppa_is_pa20() up by calling object_dynamic_cast() only once at CPU cr

Re: [PATCH-for-10.0 v2] hw/i386/amd_iommu: Simplify non-KVM checks on XTSup feature

2024-12-31 Thread Philippe Mathieu-Daudé
On 29/11/24 16:58, Philippe Mathieu-Daudé wrote: Generic code wanting to access KVM specific methods should do so being protected by the 'kvm_enabled()' helper. Doing so avoid link failures when optimization is disabled (using --enable-debug), see for example commits c04cfb4596a ("hw/i386: fix s

Re: [PATCH v3] fw_cfg: Don't set callback_opaque NULL in fw_cfg_modify_bytes_read()

2024-12-31 Thread Philippe Mathieu-Daudé
On 3/12/24 14:18, Shameer Kolothum wrote: On arm/virt platform, Chen Xiang reported a Guest crash while attempting the below steps, 1. Launch the Guest with nvdimm=on 2. Hot-add a NVDIMM dev 3. Reboot 4. Guest boots fine. 5. Reboot again. 6. Guest boot fails. QEMU_EFI reports the below error: P

Re: Ping (2): [PATCH v3] net/vmnet: Pad short Ethernet frames

2024-12-31 Thread Philippe Mathieu-Daudé
Hi William, On 30/12/24 22:05, William Hooper wrote: On Sat, Nov 2, 2024 at 1:56 PM William Hooper wrote: At least on macOS 12.7.2, vmnet doesn't pad Ethernet frames, such as the host's ARP replies, to the minimum size (60 bytes before the frame check sequence) defined in IEEE Std 802.3-2022,

Re: [PATCH v3 1/7] hw/misc/ivshmem-flat: Add ivshmem-flat device

2024-12-31 Thread Philippe Mathieu-Daudé
On 16/12/24 15:18, Gustavo Romero wrote: Add a new device, ivshmem-flat, which is similar to the ivshmem PCI but does not require a PCI bus. It's meant to be used on machines like those with Cortex-M MCUs, which usually lack a PCI/PCIe bus, e.g. lm3s6965evb and mps2-an385. The device currently o