Re: [PATCH 1/1] pc-bios: add missing riscv64 descriptor

On Thu, Dec 12, 2024 at 7:01 PM Heinrich Schuchardt wrote: > > Without descriptor libvirt cannot discover the EDK II binaries via > the qemu:///system connection. > > Signed-off-by: Heinrich Schuchardt Reviewed-by: Alistair Francis Alistair > --- > pc-bios/descriptors/60-edk2-riscv64.json |

[PATCH 24/24] Constify all opaque Property pointers

s/ Property [*]/ const Property */ Basically all of these only feed object_field_prop_ptr, which now takes a const pointer itself. Signed-off-by: Richard Henderson --- backends/tpm/tpm_util.c | 4 +- hw/block/xen-block.c | 4 +- hw/core/qdev-properties-system.c | 48 +

Re: [PATCH 1/3] target/riscv: add a trap-misaligned-access property

On Thu, Dec 12, 2024 at 7:21 AM Frederic Konrad wrote: > > On riscv target, misaligned accesses are either authorized and implemented in > hardware, or unimplemented and generate a trap to be implemented in software. > > At the moment misaligned accesses for rvi just succeed, the intention of this

Re: [PATCH 07/71] target/ppc: Remove empty property list

On 12/14/24 00:36, Richard Henderson wrote: Signed-off-by: Richard Henderson Reviewed-by: Harsh Prateek Bora --- target/ppc/cpu_init.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 1253dbf622..5e95790def 100644 --- a/targe

Re: [PATCH 1/1] pc-bios: add missing riscv64 descriptor

On Thu, Dec 12, 2024 at 7:01 PM Heinrich Schuchardt wrote: > > Without descriptor libvirt cannot discover the EDK II binaries via > the qemu:///system connection. > > Signed-off-by: Heinrich Schuchardt Thanks! Applied to riscv-to-apply.next Alistair > --- > pc-bios/descriptors/60-edk2-riscv6

Re: [PATCH 29/71] hw/i386: Constify all Property

Hi Rihard. Good idea, LGTM. Just out of curiosity, what was the motivation for such a patch? It it simply about cleaning the code or is it intended to solve a deeper problem. Thanks, cmd On 13/12/2024 20:07, Richard Henderson wrote: > Caution: External email. Do not open attachments or click

Re: [PATCH v6 1/9] target/riscv: fix henvcfg potentially containing stale bits

On Fri, Nov 29, 2024 at 12:15 AM Clément Léger wrote: > > With the current implementation, if we had the following scenario: > - Set bit x in menvcfg > - Set bit x in henvcfg > - Clear bit x in menvcfg > then, the internal variable env->henvcfg would still contain bit x due > to both a wrong menvc

[PATCH 19/24] target/riscv: Do not abuse DEFINE_PROP_END_OF_LIST

These are not arrays of Property and had no business using DEFINE_PROP_END_OF_LIST. Use plain { } instead. Signed-off-by: Richard Henderson --- target/riscv/cpu.c | 13 ++--- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4329

[PATCH 11/24] hw/virtio: Remove empty Property lists

Signed-off-by: Richard Henderson --- hw/virtio/vdpa-dev-pci.c | 5 - hw/virtio/vhost-user-snd-pci.c | 5 - 2 files changed, 10 deletions(-) diff --git a/hw/virtio/vdpa-dev-pci.c b/hw/virtio/vdpa-dev-pci.c index 5446e6b393..787926801a 100644 --- a/hw/virtio/vdpa-dev-pci.c +++ b/hw/v

[PATCH 00/24] More Property cleanups

Based-on: 20241215190533.3222854-1-richard.hender...@linaro.org [PULL 00/67] Constify almost all Property - Missed constifying two arrays. - Eliminate all empty Property lists. - Detect both of these cases during the build. - Count the elements in the property list and eliminate DEFINE_PROP_END_

[PATCH 21/24] include/hw/qdev-properties: Shrink struct Property

Before, via pahole: arm32, a 32-bit host which aligns uint64_t: struct Property { const char * name; /* 0 4 */ const PropertyInfo * info; /* 4 4 */ ptrdiff_t offset; /* 8

[PATCH 16/24] hw/arm/armsse: Use device_class_set_props_n

We must remove DEFINE_PROP_END_OF_LIST so the count is correct. Signed-off-by: Richard Henderson --- hw/arm/armsse.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 1cd6b4a4b2..ffd732f806 100644 --- a/hw/arm/armsse.c +++ b/hw/a

[PATCH 13/24] hw/core: Introduce device_class_set_props_n

Record the size of the array in DeviceClass.props_count_. Iterate with known count in qdev_prop_walk. Signed-off-by: Richard Henderson --- include/hw/qdev-core.h| 18 ++ hw/core/qdev-properties.c | 39 +-- hw/core/qdev.c| 1 +

[PATCH 04/24] target/s390x: Use s390x_cpu_properties for system mode only

Avoid the empty property list for user-only mode. Signed-off-by: Richard Henderson --- target/s390x/cpu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 4702761ca3..263f9e84ed 100644 --- a/target/s390x/cpu.c +++ b/target/s3

[PATCH 09/24] hw/xen: Remove empty Property lists

There is no point in registering no properties. Remove xen_sysdev_class_init entirely, as it did nothing else. Signed-off-by: Richard Henderson --- hw/xen/xen-legacy-backend.c | 17 - 1 file changed, 17 deletions(-) diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-ba

[PATCH 03/24] target/ppc: Remove empty property list

Signed-off-by: Richard Henderson --- target/ppc/cpu_init.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 1253dbf622..5e95790def 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7414,11 +7414,6 @@ static void ppc_disa

[PATCH 06/24] hw/ppc: Only register spapr_nvdimm_properties if CONFIG_LIBPMEM

Do not register an empty set of properties. Signed-off-by: Richard Henderson --- hw/ppc/spapr_nvdimm.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c index 2ef6f29f3d..6f875d73b2 100644 --- a/hw/ppc/spapr_nvdimm.c +++

[PATCH 07/24] hw/tricore: Remove empty Property lists

Signed-off-by: Richard Henderson --- hw/tricore/tc27x_soc.c | 5 - hw/tricore/tricore_testdevice.c | 5 - 2 files changed, 10 deletions(-) diff --git a/hw/tricore/tc27x_soc.c b/hw/tricore/tc27x_soc.c index ecd92717b5..81bb16d89b 100644 --- a/hw/tricore/tc27x_soc.c +++ b/hw/trico

[PATCH 12/24] include/hw/qdev-core: Detect most empty Property lists at compile time

Signed-off-by: Richard Henderson --- include/hw/qdev-core.h| 8 hw/core/qdev-properties.c | 2 +- migration/migration.c | 2 +- 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index 5be9844412..b2859d1e39 100644 ---

[PATCH 05/24] hw/pci-host/astro: Remove empty Property list

Signed-off-by: Richard Henderson --- hw/pci-host/astro.c | 5 - 1 file changed, 5 deletions(-) diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c index 379095b356..62e9c8acbf 100644 --- a/hw/pci-host/astro.c +++ b/hw/pci-host/astro.c @@ -461,10 +461,6 @@ static void elroy_pcihost_init(Ob

[PATCH 17/24] rust/qemu-api: Use device_class_set_props_n

This means we can update declare_properties to drop the zero terminator at the end of the array as well. Cc: qemu-r...@nongnu.org Signed-off-by: Richard Henderson --- rust/qemu-api/src/device_class.rs | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/rust/qemu-api/s

[PATCH 01/24] migration: Constify migration_properties

Signed-off-by: Richard Henderson --- migration/options.h | 2 +- migration/options.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/migration/options.h b/migration/options.h index 79084eed0d..a360f93a44 100644 --- a/migration/options.h +++ b/migration/options.h @@ -20,7 +2

[PATCH 23/24] hw/core/qdev-properties: Constify Property argument to PropertyInfo.print

There is exactly one instance of this method: print_pci_devfn. Signed-off-by: Richard Henderson --- include/hw/qdev-properties.h | 2 +- hw/core/qdev-properties-system.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-prop

[PATCH 10/24] hw/sparc: Remove empty Property lists

Signed-off-by: Richard Henderson --- hw/sparc/sun4m.c | 5 - hw/sparc64/sun4u.c | 5 - 2 files changed, 10 deletions(-) diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index d52e6a7213..7ec346533e 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -732,15 +732,10 @@ static void p

[PATCH 22/24] hw/core/qdev-properties: Constify Property argument to object_field_prop_ptr

Signed-off-by: Richard Henderson --- include/hw/qdev-properties.h | 2 +- hw/core/qdev-properties.c| 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h index 3680cd239f..447767688b 100644 --- a/include/hw/qdev-prope

[PATCH 02/24] hw/ide: Constify sysbus_ahci_properties

Signed-off-by: Richard Henderson --- hw/ide/ahci-sysbus.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ide/ahci-sysbus.c b/hw/ide/ahci-sysbus.c index d43db0923f..2432039290 100644 --- a/hw/ide/ahci-sysbus.c +++ b/hw/ide/ahci-sysbus.c @@ -62,7 +62,7 @@ static void sysbus_

[PATCH 08/24] hw/s390x: Remove empty Property lists

Signed-off-by: Richard Henderson --- hw/s390x/3270-ccw.c | 5 - 1 file changed, 5 deletions(-) diff --git a/hw/s390x/3270-ccw.c b/hw/s390x/3270-ccw.c index 69e6783ade..3a8930dfd1 100644 --- a/hw/s390x/3270-ccw.c +++ b/hw/s390x/3270-ccw.c @@ -150,15 +150,10 @@ out_err: g_free(sch); }

[PATCH 15/24] hw/scsi/megasas: Use device_class_set_props_n

We must remove DEFINE_PROP_END_OF_LIST so the count is correct. Signed-off-by: Richard Henderson --- hw/scsi/megasas.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 8323cd18e3..7f012c218b 100644 --- a/hw/scsi/megasas.c +++

[PATCH 14/24] migration: Use device_class_set_props_n

Export the migration_properties array size from options.c; use that to feed device_class_set_props_n. We must remove DEFINE_PROP_END_OF_LIST so the count is correct. Signed-off-by: Richard Henderson --- migration/options.h | 1 + migration/migration.c | 3 ++- migration/options.c | 2 +- 3

[PATCH 18/24] hw/core: Replace device_class_set_props with a macro

Use ARRAY_SIZE to implement as device_class_set_props_n. Remove any DEFINE_PROP_END_OF_LIST terminator from the count. Signed-off-by: Richard Henderson --- include/hw/qdev-core.h| 21 + hw/core/qdev-properties.c | 16 2 files changed, 13 insertions(+), 24

[PATCH v1 3/3] aspeed/soc: Support Timer for AST2700

Add Timer model for AST2700 Timer support. The Timer controller include 8 sets of 32-bit decrement counters. The base address of TIMER0 to TIMER7 as following. Base Address of Timer 0 = 0x12C1_ Base Address of Timer 1 = 0x12C1_0040 Base Address of Timer 2 = 0x12C1_0080 Base Address of Timer 3

[PATCH v1 2/3] hw/timer/aspeed: Add AST2700 Support

The timer controller include 8 sets of 32-bit decrement counters, based on either PCLK or 1MHZ clock and the design of timer controller between AST2600 and AST2700 are almost the same. The different is that the register set have a significant change in AST2700. TIMER0 – TIMER7 has their own indivi

[PATCH v1 1/3] hw/timer/aspeed: Support different memory region ops

It set "aspeed_timer_ops" struct which containing read and write callbacks to be used when I/O is performed on the TIMER region. Besides, in the previous design of ASPEED SOCs, the timer registers address space are contiguous. ex: TMC00-TMC0C are used for TIMER0. ex: TMC10-TMC1C are used for TIME

[PATCH v1 0/3] Support timer for AST2700

v1: - Support timer for AST2700 - Introduce new "aspeed_2700_timer_read" and "aspeed_2700_timer_write" callback functions and "aspeed_2700_timer_ops" memory region operation for AST2700. Introduce a new ast2700 class to support AST2700. Jamin Lin (3): hw/timer/aspeed: Support dif

Re: [PATCH 2/2] s390x: Fix CSS migration

On 13/12/2024 17.01, Fabiano Rosas wrote: Commit a55ae46683 ("s390: move css_migration_enabled from machine to css.c") disabled CSS migration globally instead of doing it per-instance. CC: Paolo Bonzini CC: qemu-sta...@nongnu.org #9.1 Fixes: a55ae46683 ("s390: move css_migration_enabled from ma

Re: [PATCH 01/13] target/i386: inline gen_jcc into sole caller

On 12/15/24 03:06, Paolo Bonzini wrote: The code of gen_Jcc is very similar to gen_LOOP* and gen_JCXZ, but this is hidden by gen_jcc. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 8 target/i386/tcg/emit.c.inc | 6 +- 2 files changed, 5 insertions(+), 9 deleti

Re: [PATCH 02/13] target/i386: remove trailing 1 from gen_{j,cmov,set}cc1

On 12/15/24 03:06, Paolo Bonzini wrote: This is not needed anymore now that gen_jcc has been eliminated (merged into the similarly-named gen_Jcc, where the uppercase letter gives away that it is an emission function). Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 14 +++--

Re: [PATCH 03/13] target/i386: unify REP and REPZ/REPNZ generation

On 12/15/24 03:06, Paolo Bonzini wrote: It only differs in a single call to gen_jcc, so use a "bool" argument to distinguish the two cases; do not duplicate code. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 39 +++-- 1 file changed, 20 inser

Re: [PATCH 04/13] target/i386: unify choice between single and repeated string instructions

On 12/15/24 03:06, Paolo Bonzini wrote: The same "if" is present in all generator functions for string instructions. Push it inside gen_repz() and gen_repz_nz() instead. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 12 +-- target/i386/tcg/emit.c.inc | 42 +++---

Re: [PATCH 05/13] target/i386: reorganize ops emitted by do_gen_rep, drop repz_opt

On 12/15/24 03:06, Paolo Bonzini wrote: The condition for optimizing repeat instruction is more or less the opposite of what you imagine: almost always the string instruction was_not_ optimized and optimizing the loop relied on goto_tb. This is obviously not great for performance, due to the cost

Re: [PATCH 06/13] target/i386: tcg: move gen_set/reset_* earlier in the file

On 12/15/24 03:06, Paolo Bonzini wrote: Allow using them in the code that translates REP/REPZ, without forward declarations. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 80 ++--- 1 file changed, 40 insertions(+), 40 deletions(-) Reviewed-by

Re: [PATCH 07/13] target/i386: fix RF handling for string instructions

On 12/15/24 03:06, Paolo Bonzini wrote: RF must be set on traps and interrupts from a string instruction, except if they occur after the last iteration. Ensure it is set before giving the main loop a chance to execute. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 22

Re: [PATCH 08/13] target/i386: make cc_op handling more explicit for repeated string instructions.

On 12/15/24 03:06, Paolo Bonzini wrote: fn(s, ot); gen_op_add_reg_im(s, s->aflag, R_ECX, -1); +gen_update_cc_op(s); + +/* Leave if REP condition fails. */ if (is_repz_nz) { int nz = (s->prefix & PREFIX_REPNZ) ? 1 : 0; -gen_jcc(s, (JCC_Z << 1) | (nz ^ 1

Re: [PATCH 04/13] target/i386: unify choice between single and repeated string instructions

Il dom 15 dic 2024, 15:10 Richard Henderson ha scritto: > On 12/15/24 03:06, Paolo Bonzini wrote: > > The same "if" is present in all generator functions for string > instructions. > > Push it inside gen_repz() and gen_repz_nz() instead. > > > > Signed-off-by: Paolo Bonzini > > --- > > target/

Re: [PATCH 09/13] target/i386: do not use gen_op_jz_ecx for repeated string operations

On 12/15/24 03:06, Paolo Bonzini wrote: Explicitly generate a TSTEQ branch (which is optimized to NE x,0 if possible). This does not make much sense yet, but later we will add more checks and some will use a temporary to check on the decremented value of CX/ECX/RCX; it will be clearer for all che

Re: [PATCH 10/13] target/i386: optimize CX handling in repeated string operations

On 12/15/24 03:06, Paolo Bonzini wrote: In a repeated string operation, CX/ECX will be decremented until it is 0 but never underflow. Use this observation to avoid a deposit or zero-extend operation if the address size of the operation is smaller than MO_TL. As in the previous patch, the patch

Re: [PATCH 11/13] target/i386: execute multiple REP/REPZ iterations without leaving TB

On 12/15/24 03:06, Paolo Bonzini wrote: + +/* + * The last iteration is handled outside the loop, so that cx_next + * can never underflow. + */ +if (can_loop) { +tcg_gen_brcondi_tl(TCG_COND_TSTEQ, cx_next, cx_mask, last); +} + +gen_set_label(loop); I know unu

Re: [PATCH 12/13] target/i386: pull computation of string update value out of loop

On 12/15/24 03:06, Paolo Bonzini wrote: This is a common operation that is executed many times in rep movs or rep stos loops. It can improve performance by several percentage points. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 54 ++--- 1 f

Re: [PATCH 08/13] target/i386: make cc_op handling more explicit for repeated string instructions.

Il dom 15 dic 2024, 15:45 Richard Henderson ha scritto: > On 12/15/24 03:06, Paolo Bonzini wrote: > > fn(s, ot); > > gen_op_add_reg_im(s, s->aflag, R_ECX, -1); > > +gen_update_cc_op(s); > > + > > +/* Leave if REP condition fails. */ > > if (is_repz_nz) { > > i

Re: [PATCH 09/13] target/i386: do not use gen_op_jz_ecx for repeated string operations

Il dom 15 dic 2024, 15:50 Richard Henderson ha scritto: > gen_op_jz_ecx should become unused now. > > And maybe gen_op_jnz_ecx went unused a few patches ago, when > gen_jz_ecx_string got merged? > IIRC LOOP{,Z,NZ} use both of them. I can inline them as a follow-up. Paolo Anyway, I think there

Re: [PATCH 11/13] target/i386: execute multiple REP/REPZ iterations without leaving TB

Il dom 15 dic 2024, 16:07 Richard Henderson ha scritto: > > @@ -1384,6 +1409,12 @@ static void do_gen_rep(DisasContext *s, MemOp ot, > gen_jcc_noeob(s, (JCC_Z << 1) | (nz ^ 1), done); > > } > > > > +if (can_loop) { > > +tcg_gen_subi_tl(cx_next, cpu_regs[R_ECX], 1); >

Re: [PATCH 08/13] target/i386: make cc_op handling more explicit for repeated string instructions.

On 12/15/24 09:13, Paolo Bonzini wrote: Il dom 15 dic 2024, 15:45 Richard Henderson > ha scritto: On 12/15/24 03:06, Paolo Bonzini wrote: >       fn(s, ot); >       gen_op_add_reg_im(s, s->aflag, R_ECX, -1); > +    gen_update_cc_op(s);

Re: [PATCH 00/71] whole-tree: Constify Property structures

On 12/13/24 20:06, Richard Henderson wrote: Since d36f165d952 (qdev: make properties array "const"), we can define our Property structure const. Do this across the entire tree. There are a few other minor changes: - Two instances where it was obvious that an empty property list could be

Re: [PATCH 11/13] target/i386: execute multiple REP/REPZ iterations without leaving TB

On 12/15/24 09:17, Paolo Bonzini wrote: Il dom 15 dic 2024, 16:07 Richard Henderson > ha scritto: > @@ -1384,6 +1409,12 @@ static void do_gen_rep(DisasContext *s, MemOp ot, >           gen_jcc_noeob(s, (JCC_Z << 1) | (nz ^ 1), done); >     

Re: [PATCH 13/13] target/i386: avoid using s->tmp0 for add to implicit registers

On 12/15/24 03:06, Paolo Bonzini wrote: For updates to implicit registers (RCX in LOOP instructions, RSI or RDI in string instructions, or the stack pointer) do the add directly using the registers (with no temporary) if 32-bit or 64-bit, or use a temporary created for the occasion if 16-bit. Th

[PATCH 06/13] target/i386: tcg: move gen_set/reset_* earlier in the file

Allow using them in the code that translates REP/REPZ, without forward declarations. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 80 ++--- 1 file changed, 40 insertions(+), 40 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/

[PATCH 04/13] target/i386: unify choice between single and repeated string instructions

The same "if" is present in all generator functions for string instructions. Push it inside gen_repz() and gen_repz_nz() instead. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 12 +-- target/i386/tcg/emit.c.inc | 42 +++-- 2 files changed

[PATCH 03/13] target/i386: unify REP and REPZ/REPNZ generation

It only differs in a single call to gen_jcc, so use a "bool" argument to distinguish the two cases; do not duplicate code. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 39 +++-- 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/targ

[PATCH 12/13] target/i386: pull computation of string update value out of loop

This is a common operation that is executed many times in rep movs or rep stos loops. It can improve performance by several percentage points. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 54 ++--- 1 file changed, 26 insertions(+), 28 deletions(

[PATCH 10/13] target/i386: optimize CX handling in repeated string operations

In a repeated string operation, CX/ECX will be decremented until it is 0 but never underflow. Use this observation to avoid a deposit or zero-extend operation if the address size of the operation is smaller than MO_TL. As in the previous patch, the patch is structured to include some preparatory

[PATCH 13/13] target/i386: avoid using s->tmp0 for add to implicit registers

For updates to implicit registers (RCX in LOOP instructions, RSI or RDI in string instructions, or the stack pointer) do the add directly using the registers (with no temporary) if 32-bit or 64-bit, or use a temporary created for the occasion if 16-bit. This is more efficient and removes move inst

[PATCH 05/13] target/i386: reorganize ops emitted by do_gen_rep, drop repz_opt

The condition for optimizing repeat instruction is more or less the opposite of what you imagine: almost always the string instruction was _not_ optimized and optimizing the loop relied on goto_tb. This is obviously not great for performance, due to the cost of the exit-to-main-loop check, but also

[PATCH 02/13] target/i386: remove trailing 1 from gen_{j, cmov, set}cc1

This is not needed anymore now that gen_jcc has been eliminated (merged into the similarly-named gen_Jcc, where the uppercase letter gives away that it is an emission function). Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 14 +++--- target/i386/tcg/emit.c.inc | 10 +++

[PATCH 07/13] target/i386: fix RF handling for string instructions

RF must be set on traps and interrupts from a string instruction, except if they occur after the last iteration. Ensure it is set before giving the main loop a chance to execute. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 22 +- 1 file changed, 21 inserti

[PATCH 11/13] target/i386: execute multiple REP/REPZ iterations without leaving TB

Use a TCG loop so that it is not necessary to go through the setup steps of REP and through the I/O check on every iteration. Interestingly, this is not a particularly effective optimization on its own, though it avoids the cost of correct RF emulation that was added in the previous patch. The mai

[PATCH 01/13] target/i386: inline gen_jcc into sole caller

The code of gen_Jcc is very similar to gen_LOOP* and gen_JCXZ, but this is hidden by gen_jcc. Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 8 target/i386/tcg/emit.c.inc | 6 +- 2 files changed, 5 insertions(+), 9 deletions(-) diff --git a/target/i386/tcg/translat

[PATCH 00/13] target/i386: optimize string operations

This started as an "easy" fix for RF handling in string instructions. I then realized how broken repz_opt is (patch 5) in that it was optimizing for the wrong case; and that redoing the optimization would make the RF handling basically free. On a microbenchmark running x86-on-x86 user-mode emulati

[PATCH 08/13] target/i386: make cc_op handling more explicit for repeated string instructions.

Since the cost of gen_update_cc_op() must be paid anyway, it's easier to place them manually and not rely on spilling that is buried under multiple levels of function calls. And since cc_op will have been spilled at the point of a fault, just make the whole insn CC_OP_DYNAMIC. Once repz_opt is re

[PATCH 09/13] target/i386: do not use gen_op_jz_ecx for repeated string operations

Explicitly generate a TSTEQ branch (which is optimized to NE x,0 if possible). This does not make much sense yet, but later we will add more checks and some will use a temporary to check on the decremented value of CX/ECX/RCX; it will be clearer for all checks to share the same logic using TSTEQ(re

[PATCH v4] riscv/gdbstub: add V bit to priv reg

This adds virtualization mode (V bit) as bit(2) of register `priv` per RiscV debug spec v1.0.0-rc4. Checked with gdb-multiarch v12.1. Note that GDB may display `INVALID` tag for `priv` reg when V bit is set, this doesn't affect actual access to the bit though. Signed-off-by: Yanfeng Liu --- tar

[PULL 00/67] Constify almost all Property

The following changes since commit ca80a5d026a280762e0772615f1988db542b3ade: Merge tag 'hw-misc-20241214' of https://github.com/philmd/qemu into staging (2024-12-14 08:42:53 -0500) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-prop-2024121

[PULL 16/67] hw/avr: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/avr/atmega.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index 31c8992d75..ce630ec572 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -355,7 +355,7 @@ stati

[PULL 24/67] hw/dma: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/dma/i82374.c| 2 +- hw/dma/i8257.c | 2 +- hw/dma/pl080.c | 2 +- hw/dma/pl330.c | 2 +- hw/dma/xilinx_axidma.c | 2 +- hw/dma/xlnx-zdma.c | 2 +- hw/dma/xlnx_csu_dma.c | 2 +- 7 file

[PULL 05/67] target/microblaze: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/microblaze/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 0e1e22d1e8..0e41e39c0e 100644 --- a/target/microblaze/cpu.c +++ b/target/mi

[PULL 08/67] target/s390x: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/s390x/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index adb27504ad..4702761ca3 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -309,7

[PULL 06/67] target/mips: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/mips/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 4feacc88c0..02c0e1b0f9 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -539,7 +539,

[PULL 38/67] hw/misc/xlnx-versal-trng: Constify trng_props

Use DEFINE_PROP_UNSIGNED instead of DEFINE_PROP_UINT64 so that we can set the PropertyInfo during initialization, instead of updating within trng_class_init. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/misc/xlnx-versal-trng.c | 6 +++--- 1 file changed, 3 inserti

[PULL 17/67] hw/block/xen-block: Unexport PropertyInfo

xen_block_prop_vdev is not used outside the file. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Jason Andryuk Signed-off-by: Richard Henderson --- hw/block/xen-block.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/block/xen-block.c b/hw/block/xen-block.c index aed1d

[PULL 07/67] target/riscv: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- target/riscv/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 80b09952e7..4329015076 100644 --- a/target/riscv/cpu

[PULL 63/67] hw/virtio: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/virtio/vdpa-dev.c | 2 +- hw/virtio/vhost-scsi-pci.c | 2 +- hw/virtio/vhost-user-blk-pci.c | 2 +- hw/virtio/vhost-user-device.c| 2 +- hw/virtio/vhost-user-fs-pci.c| 2 +- hw/virtio/vhost-us

[PULL 56/67] hw/sparc64: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/sparc64/sun4u.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 541c7f74fa..7088ac273e 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -37

[PULL 61/67] hw/usb: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/usb/bus.c | 2 +- hw/usb/canokey.c | 2 +- hw/usb/ccid-card-emulated.c | 2 +- hw/usb/ccid-card-passthru.c | 2 +- hw/usb/dev-audio.c| 2 +- hw/usb/dev-hid.c | 6

[PULL 51/67] hw/rx: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/rx/rx62n.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c index 560f53a58a..dfa27bc94e 100644 --- a/hw/rx/rx62n.c +++ b/hw/rx/rx62n.c @@ -257,7 +257,7 @@ static void rx6

[PULL 43/67] hw/nvram: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/nvram/ds1225y.c | 2 +- hw/nvram/eeprom_at24c.c| 2 +- hw/nvram/fw_cfg.c | 6 +++--- hw/nvram/mac_nvram.c | 2 +- hw/nvram/nrf51_nvm.c | 2 +- hw/n

[PULL 52/67] hw/s390x: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/s390x/ccw-device.c | 2 +- hw/s390x/css-bridge.c | 2 +- hw/s390x/ipl.c| 2 +- hw/s390x/s390-pci-bus.c | 2 +- hw/s390x/s390-skeys.c | 2 +- hw/s390x/s390-stattrib.c | 2

[PULL 46/67] hw/pci: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/pci/pci.c| 2 +- hw/pci/pci_bridge.c | 2 +- hw/pci/pci_host.c | 2 +- hw/pci/pcie_port.c | 4 ++-- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index bf0a1840db..

[PULL 50/67] hw/rtc: Constify all Property

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/rtc/allwinner-rtc.c | 2 +- hw/rtc/goldfish_rtc.c | 2 +- hw/rtc/m48t59-isa.c| 2 +- hw/rtc/m48t59.c| 2 +- hw/rtc/mc146818rtc.c | 2 +- hw/rtc/pl031.c | 2 +- 6 files changed, 6 insertions(+), 6 d

[PULL 34/67] hw/isa: Constify all Property

Reviewed-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/isa/lpc_ich9.c | 2 +- hw/isa/pc87312.c | 2 +- hw/isa/piix.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index dabd121

[PULL 05/18] hw/intc/loongarch_pch: Move some functions to file loongarch_pic_common

Move some common functions to file loongarch_pic_common.c, the common functions include loongarch_pic_common_realize(), property structure loongarch_pic_common_properties and vmstate structure vmstate_loongarch_pic_common. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/intc/loongarch_pch_

[PULL 08/18] hw/intc/loongarch_pch: Code cleanup about loongarch_pch_pic

Remove definition about LoongArchPCHPIC and LOONGARCH_PCH_PIC, and replace them with LoongArchPICCommonState and LOONGARCH_PIC_COMMON separately. Also remove unnecessary header files. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/intc/loongarch_pch_pic.c | 24 ++--

[PULL 04/18] hw/intc/loongarch_pch: Rename LoongArchPCHPIC with LoongArchPICCommonState

With pic vmstate, rename structure name vmstate_loongarch_pch_pic with vmstate_loongarch_pic_common, and with pic property rename loongarch_pch_pic_properties with loongarch_pic_common_properties. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/intc/loongarch_pch_pic.c | 52 +++

[PULL 02/18] include: Move struct LoongArchPCHPIC to loongarch_pic_common header file

Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h to file loongarch_pic_common.h, and rename structure name with LoongArchPICCommonState. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- include/hw/intc/loongarch_pch_pic.h| 27 + include/hw/intc/lo

[PULL 07/18] hw/intc/loongarch_pch: Add pre_save and post_load interfaces

Add vmstate pre_save and post_load interfaces, which can be used by pic kvm driver in future. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/intc/loongarch_pic_common.c | 26 ++ include/hw/intc/loongarch_pic_common.h | 2 ++ 2 files changed, 28 insertions(

[PULL 10/18] include: Move struct LoongArchExtIOI to header file loongarch_extioi_common

Move definiton of structure LoongArchExtIOI from header file loongarch_extioi.h to file loongarch_extioi_common.h. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- include/hw/intc/loongarch_extioi.h| 26 -- include/hw/intc/loongarch_extioi_common.h | 27

[PULL 13/18] hw/intc/loongarch_extioi: Add common realize interface

Add common realize function, it is only to check validity of property. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/intc/loongarch_extioi.c | 16 ++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c index

[PULL 14/18] hw/intc/loongarch_extioi: Add unrealize interface

For loongarch extioi emulation driver, add unrealize interface and remove instance_finalize interface and move the code to unrealize interface. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/intc/loongarch_extioi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/

[PULL 03/18] hw/intc/loongarch_pch: Merge instance_init() into realize()

Memory region is created in instance_init(), merge it into function realize(). There is no special class_init() for loongarch_pch object. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/intc/loongarch_pch_pic.c | 15 --- 1 file changed, 4 insertions(+), 11 deletions(-) diff --

[PULL 11/18] include: Rename LoongArchExtIOI with LoongArchExtIOICommonState

Rename structure LoongArchExtIOI with LoongArchExtIOICommonState, since it is defined in file loongarch_extioi_common.h Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- include/hw/intc/loongarch_extioi.h| 1 + include/hw/intc/loongarch_extioi_common.h | 2 +- 2 files changed, 2 inserti

[PULL 09/18] include: Add loongarch_extioi_common header file

Add common header file include/hw/intc/loongarch_extioi_common.h, and move some macro definition from include/hw/intc/loongarch_extioi.h to the common header file. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- include/hw/intc/loongarch_extioi.h| 50 +-- include/hw/in

[PULL 06/18] hw/intc/loongarch_pch: Inherit from loongarch_pic_common

Set TYPE_LOONGARCH_PIC inherit from TYPE_LOONGARCH_PIC_COMMON object, it shares vmsate and property of TYPE_LOONGARCH_PIC_COMMON, and has its own realize() function. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/intc/loongarch_pch_pic.c| 38 -- hw/intc

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