[PATCH v3] rust/pl011: Fix DeviceID reads

DeviceId, which maps the peripheral and PCell registers of a PL011 device, was not treating each register value as a 32 bit value. Change DeviceId enum to return register values via constified getter functions instead of leveraging the std::ops::Index<_> trait. While at it, print errors when gues

Re: [PATCH v2] rust/pl011: Fix DeviceID reads

On Sun, Nov 17, 2024 at 1:16 PM Paolo Bonzini wrote: > > > > Il dom 17 nov 2024, 11:21 Manos Pitsidianakis > ha scritto: >>> >>> This seems extremely verbose and rather obscures the fact that these >>> registers are a set of adjacent simple ID registers, compared to >>> the previous code which d

[PATCH v3 11/24] migration/multifd: Make multifd_send() thread safe

From: "Maciej S. Szmigiero" multifd_send() function is currently not thread safe, make it thread safe by holding a lock during its execution. This way it will be possible to safely call it concurrently from multiple threads. Signed-off-by: Maciej S. Szmigiero --- migration/multifd.c | 7 +

[PATCH v3 07/11] target/riscv: Add select value range check for counter delegation

From: Kaiwen Xue This adds checks in ops performed on xireg and xireg2-xireg6 so that the counter delegation function will receive a valid xiselect value with the proper extensions enabled. Co-developed-by: Atish Patra Signed-off-by: Kaiwen Xue Reviewed-by: Alistair Francis Signed-off-by: Ati

Re: [PATCH] hw/aspeed: Correct minimum access size for all models

On Mon, Nov 18, 2024 at 10:18 AM Joel Stanley wrote: > > Guest code was performing a byte load to the SCU MMIO region, leading to > the guest code crashing (it should be using proper accessors, but > that is not Qemu's bug). Hardware and the documentation[1] both agree that > byte loads are okay,

Re: [PATCH v3 1/2] target/i386: fix hang when using slow path for ptw_setl

Hi Michael, On 11/16/24 19:49, Michael Tokarev wrote: 25.10.2024 20:58, Pierrick Bouvier wrote: When instrumenting memory accesses for plugin, we force memory accesses to use the slow path for mmu [1]. This create a situation where we end up calling ptw_setl_slow. This was fixed recently in [2]

[PATCH 5/7] [BCM2835 AUX 5/7] Suffix constants

The constants defined through the preprocessor must be unsigned. Also, unsigned integer constants are consistent across different bases (see section 6.4.4.1 of the C99 standard draft). Signed-off-by: Ioan-Cristian CÎRSTEA --- hw/char/bcm2835_aux.c | 52 +--

Re: [PATCH 5/8] hw/riscv/virt.c, riscv_aplic.c: add 'emulated_aplic' helpers

On Fri, Oct 11, 2024 at 5:05 AM Daniel Henrique Barboza wrote: > > The current logic to determine if we don't need an emulated APLIC > controller, i.e. KVM will provide for us, is to determine if we're > running KVM, with in-kernel irqchip support, and running > aia=aplic-imsic. This is modelled b

[PATCH] hw/aspeed: Correct minimum access size for all models

Guest code was performing a byte load to the SCU MMIO region, leading to the guest code crashing (it should be using proper accessors, but that is not Qemu's bug). Hardware and the documentation[1] both agree that byte loads are okay, so change all of the aspeed devices to accept a minimum access s

Re: [PATCH 3/8] hw/riscv/virt.c: rename helper to virt_use_kvm_aia_aplic_imsic()

On Fri, Oct 11, 2024 at 5:04 AM Daniel Henrique Barboza wrote: > > Similar to the riscv_is_kvm_aia_aplic_imsic() helper from riscv_aplic.c, > the existing virt_use_kvm_aia() is testing for KVM aia=aplic-imsic with > in-kernel irqchip enabled. It is not checking for a generic AIA support. > > Renam

[PATCH v3 17/24] migration: Add save_live_complete_precopy_thread handler

From: "Maciej S. Szmigiero" This SaveVMHandler helps device provide its own asynchronous transmission of the remaining data at the end of a precopy phase via multifd channels, in parallel with the transfer done by save_live_complete_precopy handlers. These threads are launched only when multifd

[PATCH v3 03/11] target/riscv: Enable S*stateen bits for AIA

As per the ratified AIA spec v1.0, three stateen bits control AIA CSR access. Bit 60 controls the indirect CSRs Bit 59 controls the most AIA CSR state Bit 58 controls the IMSIC state such as stopei and vstopei Enable the corresponding bits in [m|h]stateen and enable corresponding checks in the CS

[PATCH v3 11/11] target/riscv: Add configuration for S[m|s]csrind, Smcdeleg/Ssccfg

Add configuration options so that they can be enabled/disabld from qemu commandline. Acked-by: Alistair Francis Signed-off-by: Atish Patra --- target/riscv/cpu.c | 4 1 file changed, 4 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 410ca2e3a666..2a4f285a974f 1006

[PATCH v3 04/11] target/riscv: Support generic CSR indirect access

From: Kaiwen Xue This adds the indirect access registers required by sscsrind/smcsrind and the operations on them. Note that xiselect and xireg are used for both AIA and sxcsrind, and the behavior of accessing them depends on whether each extension is enabled and the value stored in xiselect. Co

[PATCH v3 01/11] target/riscv: Add properties for Indirect CSR Access extension

From: Kaiwen Xue This adds the properties for sxcsrind. Definitions of new registers and implementations will come with future patches. Signed-off-by: Atish Patra Signed-off-by: Kaiwen Xue --- target/riscv/cpu.c | 2 ++ target/riscv/cpu_cfg.h | 2 ++ 2 files changed, 4 insertions(+) diff

[PATCH v3 00/11] Add RISC-V Counter delegation ISA extension support

This series adds the counter delegation extension support. The counter delegation ISA extension(Smcdeleg/Ssccfg) actually depends on multiple ISA extensions. 1. S[m|s]csrind : The indirect CSR extension[1] which defines additional 5 ([M|S|VS]IREG2-[M|S|VS]IREG6) register to address size limitat

[PATCH v3 06/11] target/riscv: Add counter delegation definitions

From: Kaiwen Xue This adds definitions for counter delegation, including the new scountinhibit register and the mstateen.CD bit. Signed-off-by: Kaiwen Xue Reviewed-by: Alistair Francis Signed-off-by: Atish Patra --- target/riscv/cpu.h | 1 + target/riscv/cpu_bits.h | 8 +++- target/

[PATCH v3 05/11] target/riscv: Add properties for counter delegation ISA extensions

This adds the properties for counter delegation ISA extensions (Smcdeleg/Ssccfg). Definitions of new registers and and implementation will come in the next set of patches. Signed-off-by: Atish Patra --- target/riscv/cpu.c | 2 ++ target/riscv/cpu_cfg.h | 2 ++ 2 files changed, 4 insertions(+

[PATCH v3 13/24] migration/multifd: Device state transfer support - send side

From: "Maciej S. Szmigiero" A new function multifd_queue_device_state() is provided for device to queue its state for transmission via a multifd channel. Signed-off-by: Maciej S. Szmigiero --- include/migration/misc.h | 4 ++ migration/meson.build| 1 + migration/multif

Re: [PATCH 1/8] hw/intc/riscv_aplic: rename is_kvm_aia()

On Fri, Oct 11, 2024 at 5:05 AM Daniel Henrique Barboza wrote: > > The helper is_kvm_aia() is checking not only for AIA, but for > aplic-imsic (i.e. "aia=aplic-imsic" in 'virt' RISC-V machine) with an > in-kernel chip present. > > Rename it to be a bit clear what the helper is doing since we'll ad

Re: [PATCH 2/8] hw/riscv/virt.c: reduce virt_use_kvm_aia() usage

On Fri, Oct 11, 2024 at 5:04 AM Daniel Henrique Barboza wrote: > > In create_fdt_sockets() we have the following pattern: > > if (kvm_enabled() && virt_use_kvm_aia(s)) { > (... do stuff ...) > } else { > (... do other stuff ...) > } > if (kvm_enabled() && virt_use_k

Re: [PATCH 4/8] target/riscv/kvm: consider irqchip_split() in aia_create()

On Fri, Oct 11, 2024 at 5:05 AM Daniel Henrique Barboza wrote: > > Before adding support to kernel-irqchip=split when using KVM AIA we need > to change how we create the in-kernel AIA device. > > In the use case we have so far, i.e. in-kernel irqchip without split > mode, both the s-mode APLIC and

[PATCH v2 1/2] arm/ptw: make get_S1prot accept decoded AP

AP in armv7 short descriptor mode has 3 bits and also domain, which makes it incompatible with other arm schemas. To make it possible to share get_S1prot between armv8, armv7 long format, armv7 short format and armv6 it's easier to make caller decode AP. Signed-off-by: Pavel Skripkin --- target

[PATCH 1/1] pcie-root-port: Fast PCIe root ports for new machine

Some hardware devices now support PCIe 5.0, so change the default speed of the PCIe root port on new machine types. For passthrough Nvidia H20, this will be able to increase the h2d/d2h bandwidth ~17%. Origin: [CUDA Bandwidth Test] - Starting... Running on... Device 0: NVIDIA H20 Quick Mode

[PATCH v3 09/11] target/riscv: Invoke pmu init after feature enable

The dependant ISA features are enabled at the end of cpu_realize in finalize_features. Thus, PMU init should be invoked after that only. Move the init invocation to riscv_tcg_cpu_finalize_features. Reviewed-by: Alistair Francis Signed-off-by: Atish Patra --- target/riscv/tcg/tcg-cpu.c | 28

Re: [PATCH 6/8] hw/intc/riscv_aplic: add kvm_msicfgaddr for split mode aplic-imsic

On Fri, Oct 11, 2024 at 5:07 AM Daniel Henrique Barboza wrote: > > The last step to enable KVM AIA aplic-imsic with irqchip in split mode > is to deal with how MSIs are going to be sent. In our current design we > don't allow an APLIC controller to send MSIs unless it's on m-mode. And > we also do

Re: [PATCH 7/8] target/riscv/kvm: remove irqchip_split() restriction

On Fri, Oct 11, 2024 at 5:05 AM Daniel Henrique Barboza wrote: > > Remove the 'irqchip_split()' restriction in kvm_arch_init() now that > we have support for "-accel kvm,kernel-irqchip=split". > > Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Alistair > --- > target/ri

Re: [PATCH 8/8] docs: update riscv/virt.rst with kernel-irqchip=split support

On Fri, Oct 11, 2024 at 5:05 AM Daniel Henrique Barboza wrote: > > Also add a new page, docs/specs/riscv-aia.rst, where we're documenting > the state of AIA support in QEMU w.r.t the controllers being emulated or > not depending on the AIA and accelerator settings. > > Signed-off-by: Daniel Henriq

Re: [PATCH 0/8] riscv: AIA userspace irqchip_split support

On Fri, Oct 11, 2024 at 5:04 AM Daniel Henrique Barboza wrote: > > Hi, > > This series adds AIA irqchip_split support, effective when using AIA > with aia=aplic-imsic and -accel kvm,kernel-irqchip=split. > > The main difference between what we currently have and irqchip_split() > mode is that, whe

Re: [PATCH v8 2/5] target/riscv: Handle Smrnmi interrupt and exception

On Mon, Oct 21, 2024 at 1:06 PM wrote: > > From: Tommy Wu > > Because the RNMI interrupt trap handler address is implementation defined. > We add the 'rnmi-interrupt-vector' and 'rnmi-exception-vector' as the property > of the harts. It’s very easy for users to set the address based on their > ex

Re: [PATCH v8 4/5] target/riscv: Add Smrnmi mnret instruction

On Mon, Oct 21, 2024 at 1:05 PM wrote: > > From: Tommy Wu > > This patch adds a new instruction 'mnret'. 'mnret' is an M-mode-only > instruction that uses the values in `mnepc` and `mnstatus` to return to the > program counter, privilege mode, and virtualization mode of the > interrupted context.

[PATCH v3 10/11] target/riscv: Add implied rule for counter delegation extensions

The counter delegation/configuration extensions depend on the following extensions. 1. Smcdeleg - To enable counter delegation from M to S 2. S[m|s]csrind - To enable indirect access CSRs Add an implied rule so that these extensions are enabled by default if the sscfg extension is enabled. Signe

Re: [PATCH] nbd-server: Silence server warnings on port probes

On 15.11.24 22:55, Eric Blake wrote: While testing the use of qemu-nbd in a Pod of a Kubernetes cluster, I got LOTS of log messages of the forms: qemu-nbd: option negotiation failed: Failed to read flags: Unexpected end-of-file before all data were read qemu-nbd: option negotiation failed: Fail

Re: [PATCH v4 3/5] block: refactor error handling of commit_iteration

On 26.10.24 19:30, Vincent Vanlaer wrote: Signed-off-by: Vincent Vanlaer --- block/commit.c | 61 -- 1 file changed, 34 insertions(+), 27 deletions(-) diff --git a/block/commit.c b/block/commit.c index 078e54f51f..5c24c8b80a 100644 --- a/block/

Re: [PATCH v2] rust/pl011: Fix DeviceID reads

On Sun, Nov 17, 2024, 12:14 PM Peter Maydell wrote: > On Sat, 16 Nov 2024 at 22:18, Manos Pitsidianakis > wrote: > > > > DeviceId, which maps the peripheral and PCell registers of a PL011 > > device, was not treating each register value as a 32 bit value. > > > > Change DeviceId enum to return r

Re: [PATCH v2] rust/pl011: Fix DeviceID reads

Il dom 17 nov 2024, 11:21 Manos Pitsidianakis < manos.pitsidiana...@linaro.org> ha scritto: > This seems extremely verbose and rather obscures the fact that these >> registers are a set of adjacent simple ID registers, compared to >> the previous code which defined them as an array of values. > >

Re: [PATCH 1/6] linux-user: Honor elf alignment when placing images

On 11/16/24 19:41, Michael Tokarev wrote: 12.11.2024 23:37, Richard Henderson wrote: Most binaries don't actually depend on more than page alignment, but any binary can request it.  Not honoring this was a bug. This became obvious when gdb reported Failed to read a valid object file image

[PATCH 2/7] [BCM2835 AUX 2/7] Add basic support for CNTL register

This commit allows software to enable/disable both the receiver and the transmitter through the CNTL register. Signed-off-by: Ioan-Cristian CÎRSTEA --- hw/char/bcm2835_aux.c | 50 +-- include/hw/char/bcm2835_aux.h | 3 ++- 2 files changed, 44 insertions(+

[PATCH 6/7] [BCM2835 AUX 6/7] Add LSR register

This commit implements the LSR register found in standard UART 16550. Signed-off-by: Ioan-Cristian CÎRSTEA --- hw/char/bcm2835_aux.c | 64 --- include/hw/char/bcm2835_aux.h | 2 +- 2 files changed, 60 insertions(+), 6 deletions(-) diff --git a/hw/char/bc

[PATCH 4/7] [BCM2835 AUX 4/7] STAT & IIR registers

This commits implements the required logic for STAT & IIR registers. The STAT register is an extension of the UART 16550 that provides useful (more helpful than the base state register) insights of the peripheral state. The STAT register is intrinsically related to the IIR register, so this commit

[PATCH 7/7] [BCM2835 AUX 7/7] STAT OVERRUN & IDLE

This commit implements the required logic for receiver overrun and idle bitfields in the STAT register. Currently, the receiver is always reported as idle. Signed-off-by: Ioan-Cristian CÎRSTEA --- hw/char/bcm2835_aux.c | 26 -- 1 file changed, 16 insertions(+), 10 deletio

[PATCH 1/7] [BCM2835 AUX 1/7] Replace hard-coded FIFO

The previous BCM2835 mini UART implementation used a hard-coded FIFO. This commit changes the implementation by making use of the provided Fifo8. Signed-off-by: Ioan-Cristian CÎRSTEA --- hw/char/bcm2835_aux.c | 61 ++- include/hw/char/bcm2835_aux.h | 10 ++

[PATCH 3/7] [BCM2835 AUX 3/7] Asynchronous transmit

This commit changes data transmission: instead of using the blocking function `qemu_chr_fe_write_all()`, the transmit logic using the asynchronous counterpart `qemu_chr_fe_write()`. Signed-off-by: Ioan-Cristian CÎRSTEA --- hw/char/bcm2835_aux.c | 110 ++ i

[PATCH v3 01/24] migration: Clarify that {load, save}_cleanup handlers can run without setup

From: "Maciej S. Szmigiero" It's possible for {load,save}_cleanup SaveVMHandlers to get called without the corresponding {load,save}_setup handler being called first. One such example is if {load,save}_setup handler of a proceeding device returns error. In this case the migration core cleanup co

[PATCH v3 05/24] migration: Add MIG_CMD_SWITCHOVER_START and its load handler

From: "Maciej S. Szmigiero" This QEMU_VM_COMMAND sub-command and its switchover_start SaveVMHandler is used to mark the switchover point in main migration stream. It can be used to inform the destination that all pre-switchover main migration stream data has been sent/received so it can start to

[PATCH v3 24/24] vfio/migration: Multifd device state transfer support - send side

From: "Maciej S. Szmigiero" Implement the multifd device state transfer via additional per-device thread inside save_live_complete_precopy_thread handler. Switch between doing the data transfer in the new handler and doing it in the old save_state handler depending on the x-migration-multifd-tra

Re: [PATCH v2] rust/pl011: Fix DeviceID reads

On Sat, 16 Nov 2024 at 22:18, Manos Pitsidianakis wrote: > > DeviceId, which maps the peripheral and PCell registers of a PL011 > device, was not treating each register value as a 32 bit value. > > Change DeviceId enum to return register values via constified getter > functions instead of leveragi

[PATCH v3 14/24] migration/multifd: Make MultiFDSendData a struct

From: Peter Xu The newly introduced device state buffer can be used for either storing VFIO's read() raw data, but already also possible to store generic device states. After noticing that device states may not easily provide a max buffer size (also the fact that RAM MultiFDPages_t after all als

[PATCH v3 22/24] vfio/migration: Multifd device state transfer support - receive side

From: "Maciej S. Szmigiero" The multifd received data needs to be reassembled since device state packets sent via different multifd channels can arrive out-of-order. Therefore, each VFIO device state packet carries a header indicating its position in the stream. The last such VFIO device state

[PATCH v3 08/24] migration: Add thread pool of optional load threads

From: "Maciej S. Szmigiero" Some drivers might want to make use of auxiliary helper threads during VM state loading, for example to make sure that their blocking (sync) I/O operations don't block the rest of the migration process. Add a migration core managed thread pool to facilitate this use c

[PATCH v3 18/24] vfio/migration: Don't run load cleanup if load setup didn't run

From: "Maciej S. Szmigiero" It's possible for load_cleanup SaveVMHandler to get called without load_setup handler being called first. Since we'll be soon running cleanup operations there that access objects that need earlier initialization in load_setup let's make sure these cleanups only run wh

[PATCH v3 07/24] migration: Document the BQL behavior of load SaveVMHandlers

From: "Maciej S. Szmigiero" Some of these SaveVMHandlers were missing the BQL behavior annotation, making people wonder what it exactly is. Signed-off-by: Maciej S. Szmigiero --- include/migration/register.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/migration/registe

[PATCH v3 04/24] thread-pool: Implement generic (non-AIO) pool support

From: "Maciej S. Szmigiero" Migration code wants to manage device data sending threads in one place. QEMU has an existing thread pool implementation, however it is limited to queuing AIO operations only and essentially has a 1:1 mapping between the current AioContext and the AIO ThreadPool in us

[PATCH v3 02/24] thread-pool: Remove thread_pool_submit() function

From: "Maciej S. Szmigiero" This function name conflicts with one used by a future generic thread pool function and it was only used by one test anyway. Update the trace event name in thread_pool_submit_aio() accordingly. Signed-off-by: Maciej S. Szmigiero --- include/block/thread-pool.h |

[PATCH v3 21/24] vfio/migration: Convert bytes_transferred counter to atomic

From: "Maciej S. Szmigiero" So it can be safety accessed from multiple threads. Signed-off-by: Maciej S. Szmigiero --- hw/vfio/migration.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/vfio/migration.c b/hw/vfio/migration.c index 4b2b06b45195..683f2ae98d5e 100644

Re: [PATCH v2] rust/pl011: Fix DeviceID reads

On Sun, Nov 17, 2024 at 9:40 AM Paolo Bonzini wrote: > > > > Il sab 16 nov 2024, 23:18 Manos Pitsidianakis > ha scritto: >> >> -const PL011_ID_ARM: [c_uchar; 8] = [0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0, >> 0x05, 0xb1]; >> -const PL011_ID_LUMINARY: [c_uchar; 8] = [0x11, 0x00, 0x18, 0x01, 0x

[PATCH v2 0/2] arm/ptw: fix missing sctlr.{u}wxn

We observed failing WXN tests in our OS which we tracked down to missing WXN handling in qemu. The problem was in that short descriptor format walker did not respect WXN bit. To fix it, make it possible to call get_S1prot() from get_phys_addr_v6(). Tested localy that all permission-related tests

[PATCH v2 2/2] arm/ptw: use get_S1prot in get_phys_addr_v6

To share missing SCTRL.{U}WXN and SCR.SIF in short format walker, use get_S1prot instead of open-coded checks. Signed-off-by: Pavel Skripkin --- target/arm/ptw.c | 41 ++--- 1 file changed, 18 insertions(+), 23 deletions(-) diff --git a/target/arm/ptw.c b/tar

[PATCH v3 20/24] vfio/migration: Add load_device_config_state_start trace event

From: "Maciej S. Szmigiero" And rename existing load_device_config_state trace event to load_device_config_state_end for consistency since it is triggered at the end of loading of the VFIO device config state. This way both the start and end points of particular device config loading operation (

[PATCH v3 09/24] migration/multifd: Split packet into header and RAM data

From: "Maciej S. Szmigiero" Read packet header first so in the future we will be able to differentiate between a RAM multifd packet and a device state multifd packet. Since these two are of different size we can't read the packet body until we know which packet type it is. Signed-off-by: Maciej

[PATCH v3 10/24] migration/multifd: Device state transfer support - receive side

From: "Maciej S. Szmigiero" Add a basic support for receiving device state via multifd channels - channels that are shared with RAM transfers. Depending whether MULTIFD_FLAG_DEVICE_STATE flag is present or not in the packet header either device state (MultiFDPacketDeviceState_t) or RAM data (exi

[PATCH v3 23/24] migration/qemu-file: Define g_autoptr() cleanup function for QEMUFile

From: "Maciej S. Szmigiero" Automatic memory management helps avoid memory safety issues. Signed-off-by: Maciej S. Szmigiero --- migration/qemu-file.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/migration/qemu-file.h b/migration/qemu-file.h index 11c2120edd72..fdf21324df07 100644 ---

[PATCH v3 03/24] thread-pool: Rename AIO pool functions to *_aio() and data types to *Aio

From: "Maciej S. Szmigiero" These names conflict with ones used by future generic thread pool equivalents. Generic names should belong to the generic pool type, not specific (AIO) type. Signed-off-by: Maciej S. Szmigiero --- include/block/aio.h | 8 ++--- include/block/thread-pool.h |

[PATCH v3 15/24] migration/multifd: Add migration_has_device_state_support()

From: "Maciej S. Szmigiero" Since device state transfer via multifd channels requires multifd channels with packets and is currently not compatible with multifd compression add an appropriate query function so device can learn whether it can actually make use of it. Signed-off-by: Maciej S. Szmi

[PATCH v3 12/24] migration/multifd: Add an explicit MultiFDSendData destructor

From: "Maciej S. Szmigiero" This way if there are fields there that needs explicit disposal (like, for example, some attached buffers) they will be handled appropriately. Add a related assert to multifd_set_payload_type() in order to make sure that this function is only used to fill a previously