Re: [RFC v3 3/3] vhost: Allocate memory for packed vring

2024-11-13 Thread Eugenio Perez Martin
On Wed, Nov 13, 2024 at 6:11 AM Sahil Siddiq wrote: > > Hi, > > On 10/28/24 11:07 AM, Sahil Siddiq wrote: > > [...] > > The payload that VHOST_SET_VRING_BASE accepts depends on whether > > split virtqueues or packed virtqueues are used [6]. In hw/virtio/vhost- > > vdpa.c:vhost_vdpa_svq_setup() [7

[PATCH ssh] ssh: Do not switch session to non-blocking mode

2024-11-13 Thread Richard W.M. Jones
From: Jakub Jelen The libssh does not handle non-blocking mode in SFTP correctly. The driver code already changes the mode to blocking for the SFTP initialization, but for some reason changes to non-blocking mode. This used to work accidentally until libssh in 0.11 branch merged the patch to avoi

[PATCH ssh v2] ssh: Do not switch session to non-blocking mode

2024-11-13 Thread Richard W.M. Jones
From: Jakub Jelen The libssh does not handle non-blocking mode in SFTP correctly. The driver code already changes the mode to blocking for the SFTP initialization, but for some reason changes to non-blocking mode. This used to work accidentally until libssh in 0.11 branch merged the patch to avoi

Re: [PATCH ssh] ssh: Do not switch session to non-blocking mode

2024-11-13 Thread Richard W.M. Jones
On Wed, Nov 13, 2024 at 03:02:59PM +0300, Michael Tokarev wrote: > Heh. I was creating a qemu bug report on gitlab when this email arrived :) > > 13.11.2024 14:49, Richard W.M. Jones wrote: > >From: Jakub Jelen > > > >The libssh does not handle non-blocking mode in SFTP correctly. The > >driver c

[PATCH 1/6] acpi/ghes: Prepare to support multiple sources on ghes

2024-11-13 Thread Mauro Carvalho Chehab
The current code is actually dependent on having just one error structure with a single source. As the number of sources should be arch-dependent, as it will depend on what kind of synchronous/assynchronous notifications will exist, change the logic to dynamically build the table. Yet, for a prop

[PATCH] hw/s390x: Restrict "loadparm" property to devices that can be used for booting

2024-11-13 Thread Thomas Huth
Commit bb185de423 ("s390x: Add individual loadparm assignment to CCW device") added a "loadparm" property to all CCW devices. This was a little bit unfortunate, since this property is only useful for devices that can be used for booting, but certainly it is not useful for devices like virtio-gpu or

Re: [PATCH] hw/s390x: Restrict "loadparm" property to devices that can be used for booting

2024-11-13 Thread Philippe Mathieu-Daudé
On 13/11/24 11:47, Thomas Huth wrote: Commit bb185de423 ("s390x: Add individual loadparm assignment to CCW device") added a "loadparm" property to all CCW devices. This was a little bit unfortunate, since this property is only useful for devices that can be used for booting, but certainly it is n

Re: [PATCH ssh] ssh: Do not switch session to non-blocking mode

2024-11-13 Thread Michael Tokarev
Heh. I was creating a qemu bug report on gitlab when this email arrived :) 13.11.2024 14:49, Richard W.M. Jones wrote: From: Jakub Jelen The libssh does not handle non-blocking mode in SFTP correctly. The driver code already changes the mode to blocking for the SFTP initialization, but for som

Re: [PATCH v2] target/riscv: Add Tenstorrent Ascalon CPU

2024-11-13 Thread Prasad Pandit
On Wed, 13 Nov 2024 at 16:36, Anton Blanchard wrote: > Add a CPU entry for the Tenstorrent Ascalon CPU, a series of 2 wide to > 8 wide RV64 cores. More details can be found at > https://tenstorrent.com/ip/tt-ascalon > > Signed-off-by: Anton Blanchard > --- > target/riscv/cpu-qom.h | 1 + > targ

Re: [PATCH v5 08/20] intel_iommu: Check stage-1 translation result with interrupt range

2024-11-13 Thread CLEMENT MATHIEU--DRIF
On 11/11/2024 09:34, Zhenzhong Duan wrote: > Caution: External email. Do not open attachments or click links, unless this > email comes from a known sender and you know the content is safe. > > > Per VT-d spec 4.1 section 3.15, "Untranslated requests and translation > requests that result in an a

Re: [PATCH v2] target/riscv: Add Tenstorrent Ascalon CPU

2024-11-13 Thread Daniel Henrique Barboza
On 11/13/24 8:04 AM, Anton Blanchard wrote: Add a CPU entry for the Tenstorrent Ascalon CPU, a series of 2 wide to 8 wide RV64 cores. More details can be found at https://tenstorrent.com/ip/tt-ascalon Signed-off-by: Anton Blanchard --- Reviewed-by: Daniel Henrique Barboza target/risc

[PATCH 2/6] acpi/ghes: add a firmware file with HEST address

2024-11-13 Thread Mauro Carvalho Chehab
Store HEST table address at GPA, placing its content at hest_addr_le variable. Signed-off-by: Mauro Carvalho Chehab --- Change from v8: - hest_addr_lr is now pointing to the error source size and data. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes.c | 15 +++ incl

[PATCH 3/6] acpi/ghes: rename the function which gets hw error offsets

2024-11-13 Thread Mauro Carvalho Chehab
Rename: get_ghes_offsets->get_hw_error_offsets to make clear that this function return offsets based on the hardware error firmware. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.

Re: [PATCH 1/1] vfio/platform: Add mmio-base property to define start address for MMIO mapping

2024-11-13 Thread Juan Pablo Ruiz
On Wed, Nov 13, 2024 at 1:43 AM Alex Williamson wrote: > > On Tue, 12 Nov 2024 22:02:12 + > Juan Pablo Ruiz wrote: > > > Some platform devices have large MMIO regions (e.g., GPU reserved memory). > > For > > certain devices, it's preferable to have a 1:1 address translation in the > > VM to

Re: [RFC PATCH 09/11] rust: build: add "make clippy", "make rustfmt"

2024-11-13 Thread Junjie Mao
Paolo Bonzini writes: > Abstract common invocations of "cargo", that do not require copying > the generated bindgen file or setting up MESON_BUILD_ROOT. > > In the future these could also do completely without cargo and invoke > the underlying programs directly. > > Signed-off-by: Paolo Bonzini

Re: [RFC PATCH 01/11] rust: qemu_api: do not disable lints outside bindgen-generated code

2024-11-13 Thread Junjie Mao
Paolo Bonzini writes: > On 11/12/24 11:10, Junjie Mao wrote: >> diff --git a/meson.build b/meson.build >> index 1239f5c48c..8cea09ffe1 100644 >> --- a/meson.build >> +++ b/meson.build >> @@ -4,6 +4,7 @@ project('qemu', ['c'], meson_version: '>=1.5.0', >> version: files('VERSION')) >>

Re: [PATCH v4 7/7] target/i386: Add EPYC-Genoa model to support Zen 4 processor series

2024-11-13 Thread Maksim Davydov
Hi! Thank you very much! I'm looking forward to your Genoa/Turin series. And I've sent patch series to KVM: https://lore.kernel.org/lkml/20241113133042.702340-1-davydov-...@yandex-team.ru/ On 11/12/24 19:23, Moger, Babu wrote: Hi Maksim, On 11/12/24 04:09, Maksim Davydov wrote: On 11/8/24 2

[PATCH v10 01/15] ui & main loop: Redesign of system-specific main thread event handling

2024-11-13 Thread Phil Dennis-Jordan
macOS's Cocoa event handling must be done on the initial (main) thread of the process. Furthermore, if library or application code uses libdispatch, the main dispatch queue must be handling events on the main thread as well. So far, this has affected Qemu in both the Cocoa and SDL UIs, although in

[PATCH v10 02/15] hw/display/apple-gfx: Introduce ParavirtualizedGraphics.Framework support

2024-11-13 Thread Phil Dennis-Jordan
MacOS provides a framework (library) that allows any vmm to implement a paravirtualized 3d graphics passthrough to the host metal stack called ParavirtualizedGraphics.Framework (PVG). The library abstracts away almost every aspect of the paravirtualized device model and only provides and receives c

[PATCH v10 09/15] gpex: Allow more than 4 legacy IRQs

2024-11-13 Thread Phil Dennis-Jordan
From: Alexander Graf Some boards such as vmapple don't do real legacy PCI IRQ swizzling. Instead, they just keep allocating more board IRQ lines for each new legacy IRQ. Let's support that mode by giving instantiators a new "nr_irqs" property they can use to support more than 4 legacy IRQ lines.

[PATCH v10 03/15] hw/display/apple-gfx: Adds PCI implementation

2024-11-13 Thread Phil Dennis-Jordan
This change wires up the PCI variant of the paravirtualised graphics device, mainly useful for x86-64 macOS guests, implemented by macOS's ParavirtualizedGraphics.framework. It builds on code shared with the vmapple/mmio variant of the PVG device. Signed-off-by: Phil Dennis-Jordan --- v4: * Th

[PATCH v10 10/15] hw/vmapple/aes: Introduce aes engine

2024-11-13 Thread Phil Dennis-Jordan
From: Alexander Graf VMApple contains an "aes" engine device that it uses to encrypt and decrypt its nvram. It has trivial hard coded keys it uses for that purpose. Add device emulation for this device model. Signed-off-by: Alexander Graf Signed-off-by: Phil Dennis-Jordan --- v3: * Rebased

[PATCH v10 14/15] hw/block/virtio-blk: Replaces request free function with g_free

2024-11-13 Thread Phil Dennis-Jordan
The virtio_blk_free_request() function has been a 1-liner forwarding to g_free() for a while now. We may as well call g_free on the request pointer directly. Signed-off-by: Phil Dennis-Jordan Reviewed-by: Akihiko Odaki --- hw/block/virtio-blk.c | 43 +++---

[PATCH v10 06/15] hw: Add vmapple subdir

2024-11-13 Thread Phil Dennis-Jordan
From: Alexander Graf We will introduce a number of devices that are specific to the vmapple target machine. To keep them all tidily together, let's put them into a single target directory. Signed-off-by: Alexander Graf Signed-off-by: Phil Dennis-Jordan Reviewed-by: Akihiko Odaki --- MAINTAIN

[PATCH v10 00/15] macOS PV Graphics and new vmapple machine type

2024-11-13 Thread Phil Dennis-Jordan
This patch set introduces a new ARM and macOS HVF specific machine type called "vmapple", as well as a family of display devices based on the ParavirtualizedGraphics.framework in macOS. One of the display adapter variants, apple-gfx-mmio, is required for the new machine type, while apple-gfx-pci ca

[PATCH v10 07/15] hw/misc/pvpanic: Add MMIO interface

2024-11-13 Thread Phil Dennis-Jordan
From: Alexander Graf In addition to the ISA and PCI variants of pvpanic, let's add an MMIO platform device that we can use in embedded arm environments. Signed-off-by: Alexander Graf Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Phil Dennis-Jordan Revie

[PATCH v10 12/15] hw/vmapple/cfg: Introduce vmapple cfg region

2024-11-13 Thread Phil Dennis-Jordan
From: Alexander Graf Instead of device tree or other more standardized means, VMApple passes platform configuration to the first stage boot loader in a binary encoded format that resides at a dedicated RAM region in physical address space. This patch models this configuration space as a qdev dev

[PATCH v10 13/15] hw/vmapple/virtio-blk: Add support for apple virtio-blk

2024-11-13 Thread Phil Dennis-Jordan
From: Alexander Graf Apple has its own virtio-blk PCI device ID where it deviates from the official virtio-pci spec slightly: It puts a new "apple type" field at a static offset in config space and introduces a new barrier command. This patch first creates a mechanism for virtio-blk downstream c

[PATCH v10 15/15] hw/vmapple/vmapple: Add vmapple machine type

2024-11-13 Thread Phil Dennis-Jordan
From: Alexander Graf Apple defines a new "vmapple" machine type as part of its proprietary macOS Virtualization.Framework vmm. This machine type is similar to the virt one, but with subtle differences in base devices, a few special vmapple device additions and a vastly different boot chain. This

[PATCH v10 11/15] hw/vmapple/bdif: Introduce vmapple backdoor interface

2024-11-13 Thread Phil Dennis-Jordan
From: Alexander Graf The VMApple machine exposes AUX and ROOT block devices (as well as USB OTG emulation) via virtio-pci as well as a special, simple backdoor platform device. This patch implements this backdoor platform device to the best of my understanding. I left out any USB OTG parts; they

[PATCH v10 05/15] MAINTAINERS: Add myself as maintainer for apple-gfx, reviewer for HVF

2024-11-13 Thread Phil Dennis-Jordan
I'm happy to take responsibility for the macOS PV graphics code. As HVF patches don't seem to get much attention at the moment, I'm also adding myself as designated reviewer for HVF and x86 HVF to try and improve that. I anticipate that the resulting workload should be covered by the funding I'm r

Re: [PATCH v8 12/15] hw/vmapple/cfg: Introduce vmapple cfg region

2024-11-13 Thread Phil Dennis-Jordan
On Mon, 11 Nov 2024 at 05:21, Akihiko Odaki wrote: > On 2024/11/11 0:01, Phil Dennis-Jordan wrote: > > On Sun, 10 Nov 2024 at 08:15, Akihiko Odaki > wrote: > >> > >> On 2024/11/08 23:47, Phil Dennis-Jordan wrote: > >>> From: Alexander Graf > >>> > >>> Instead of device tree or other more standa

Re: [PATCH 13/20] hw/net/xilinx_ethlite: Access TX_LEN register for each port

2024-11-13 Thread Edgar E. Iglesias
On Tue, Nov 12, 2024 at 07:10:37PM +0100, Philippe Mathieu-Daudé wrote: > Rather than accessing the registers within the mixed RAM/MMIO > region as indexed register, declare a per-port TX_LEN. This > will help to map the RAM as RAM (keeping MMIO as MMIO) in few > commits. > > Previous s->regs[R_TX

Re: [PATCH 12/20] hw/net/xilinx_ethlite: Access TX_GIE register for each port

2024-11-13 Thread Edgar E. Iglesias
On Tue, Nov 12, 2024 at 07:10:36PM +0100, Philippe Mathieu-Daudé wrote: > Rather than accessing the registers within the mixed RAM/MMIO > region as indexed register, declare a per-port TX_GIE. This > will help to map the RAM as RAM (keeping MMIO as MMIO) in few > commits. > > Previous s->regs[R_TX

Re: [PATCH 11/20] hw/net/xilinx_ethlite: Access RX_CTRL register for each port

2024-11-13 Thread Edgar E. Iglesias
On Tue, Nov 12, 2024 at 07:10:35PM +0100, Philippe Mathieu-Daudé wrote: > Rather than accessing the registers within the mixed RAM/MMIO > region as indexed register, declare a per-port RX_CTRL. This > will help to map the RAM as RAM (keeping MMIO as MMIO) in few > commits. > > Previous s->regs[R_R

Re: [PATCH 10/20] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper

2024-11-13 Thread Edgar E. Iglesias
On Tue, Nov 12, 2024 at 07:10:34PM +0100, Philippe Mathieu-Daudé wrote: > rxbuf_ptr() points to the beginning of a (RAM) RX buffer > within the device state. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias > --- > hw/net/xilinx_ethlite.c | 9 - > 1 file chang

Re: [PATCH 16/20] hw/net/xilinx_ethlite: Map TX_LEN as MMIO

2024-11-13 Thread Edgar E. Iglesias
On Tue, Nov 12, 2024 at 07:10:40PM +0100, Philippe Mathieu-Daudé wrote: > Declare TX registers as MMIO region, split it out > of the current mixed RAM/MMIO region. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias > --- > hw/net/xilinx_ethlite.c | 71 +

Re: [PATCH 17/20] hw/net/xilinx_ethlite: Map TX_GIE as MMIO

2024-11-13 Thread Edgar E. Iglesias
On Tue, Nov 12, 2024 at 07:10:41PM +0100, Philippe Mathieu-Daudé wrote: > Add TX_GIE to the TX registers MMIO region. > > Before TX_GIE1 was accessed as RAM, with no effect. > Now it is accessed as MMIO, also without any effect. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. I

Re: [PATCH 18/20] hw/net/xilinx_ethlite: Map TX_CTRL as MMIO

2024-11-13 Thread Edgar E. Iglesias
On Tue, Nov 12, 2024 at 07:10:42PM +0100, Philippe Mathieu-Daudé wrote: > Add TX_CTRL to the TX registers MMIO region. > Reviewed-by: Edgar E. Iglesias > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/net/xilinx_ethlite.c | 56 +++-- > 1 file changed, 26

Re: [PATCH 00/20] hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls

2024-11-13 Thread Edgar E. Iglesias
On Tue, Nov 12, 2024 at 07:10:24PM +0100, Philippe Mathieu-Daudé wrote: > This is the result of a long discussion with Edgar (started few > years ago!) and Paolo: > https://lore.kernel.org/qemu-devel/34f6fe2f-06e0-4e2a-a361-2d662f681...@redhat.com/ > After clarification from Richard on MMIO/RAM acc

Re: [PATCH 19/20] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region

2024-11-13 Thread Edgar E. Iglesias
On Tue, Nov 12, 2024 at 07:10:43PM +0100, Philippe Mathieu-Daudé wrote: > Rather than using I/O registers for RAM buffer, having to > swap endianness back and forth (because the core memory layer > automatically swaps endiannes for us), declare the buffers > as RAM regions. Remove the now unused s-

Re: [PATCH 1/6] bitops.h: add deposit16 function

2024-11-13 Thread Peter Maydell
On Thu, 7 Nov 2024 at 19:54, Titus Rwantare wrote: > > Makes it more explicit that 16 bit values are being used > > Signed-off-by: Titus Rwantare > --- > include/qemu/bitops.h | 26 ++ > 1 file changed, 26 insertions(+) > > diff --git a/include/qemu/bitops.h b/include/qem

Re: [RFC PATCH 0/5] hw/arm/virt: Add support for user-creatable nested SMMUv3

2024-11-13 Thread Mostafa Saleh
Hi Shameer, On Fri, Nov 08, 2024 at 12:52:37PM +, Shameer Kolothum via wrote: > Hi, > > This series adds initial support for a user-creatable "arm-smmuv3-nested" > device to Qemu. At present the Qemu ARM SMMUv3 emulation is per machine > and cannot support multiple SMMUv3s. > I had a quick

Re: [PATCH v2 3/4] qapi: rename 'special_features' to 'features'

2024-11-13 Thread Markus Armbruster
Daniel P. Berrangé writes: > This updates the QAPI code generation to refer to 'features' instead > of 'special_features', in preparation for generalizing their exposure. > > Signed-off-by: Daniel P. Berrangé > --- > scripts/qapi/commands.py | 4 ++-- > scripts/qapi/gen.py | 6 +++--- >

[PATCH] fuzz: disable tcg for OSS-Fuzz builds

2024-11-13 Thread Alexander Bulekov
OSS-Fuzz builds have been failing due to some strange issues that seem to be related to color codes from libffi: https://oss-fuzz-build-logs.storage.googleapis.com/log-8d5435ee-1677-40af-9656-b4162fa881e1.txt Disable tcg to disable libffi. Signed-off-by: Alexander Bulekov --- scripts/oss-fuzz/b

Re: [RFC PATCH 1/5] hw/arm/virt: Add an SMMU_IO_LEN macro

2024-11-13 Thread Eric Auger
Hi, On 11/8/24 13:52, Shameer Kolothum wrote: > From: Nicolin Chen > > A following patch will add a new MMIO region for nested SMMU instances. Nit: Add a new ... is generally preferred I think > > This macro will be repeatedly used to set offsets and MMIO sizes in both > virt and virt-acpi-build.

Re: [PATCH 2/7] target/i386/kvm: introduce 'pmu-cap-disabled' to set KVM_PMU_CAP_DISABLE

2024-11-13 Thread Zhao Liu
> > Further, considering that this is currently the only case that needs to > > to set the VM level's capability in the CPU context, there is no need to > > introduce a new kvm interface (in your previous patch), which can instead > > be set in kvm_cpu_realizefn(), like: > > Now your case is not t

[PATCH for-9.2] linux-user/arm: Select vdso for be8 and be32 modes

2024-11-13 Thread Richard Henderson
In be8 mode, instructions are little-endian. In be32 mode, instructions are big-endian. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2333 Signed-off-by: Richard Henderson --- Based-on: 20241112203757.804320-1-richard.hender...@linaro.org ("linux-user: Fix elf load and vdso alignment")

Re: [PATCH 3/7] target/i386/kvm: init PMU information only once

2024-11-13 Thread Zhao Liu
On Tue, Nov 12, 2024 at 05:50:26PM -0800, dongli.zh...@oracle.com wrote: > Date: Tue, 12 Nov 2024 17:50:26 -0800 > From: dongli.zh...@oracle.com > Subject: Re: [PATCH 3/7] target/i386/kvm: init PMU information only once > > Hi Zhao, > > On 11/10/24 7:29 AM, Zhao Liu wrote: > > Hi Dongli, > > > >

[PATCH v10 04/15] hw/display/apple-gfx: Adds configurable mode list

2024-11-13 Thread Phil Dennis-Jordan
This change adds a property 'display_modes' on the graphics device which permits specifying a list of display modes. (screen resolution and refresh rate) The property is an array of a custom type to make the syntax slightly less awkward to use, for example: -device '{"driver":"apple-gfx-pci", "di

Re: [RFC PATCH 2/5] hw/arm/smmuv3: Add initial support for SMMUv3 Nested device

2024-11-13 Thread Eric Auger
Hi Shameer, On 11/8/24 13:52, Shameer Kolothum wrote: > Based on SMMUv3 as a parent device, add a user-creatable > smmuv3-nested device. Subsequent patches will add support to > specify a PCI bus for this device. > > Currently only supported for "virt", so hook up the sybus mem & irq > for that as

Re: [PATCH v10 01/15] ui & main loop: Redesign of system-specific main thread event handling

2024-11-13 Thread Paolo Bonzini
On 11/13/24 15:23, Phil Dennis-Jordan wrote: macOS's Cocoa event handling must be done on the initial (main) thread of the process. Furthermore, if library or application code uses libdispatch, the main dispatch queue must be handling events on the main thread as well. So far, this has affected

[PATCH for-10.0 9/9] target/riscv/tcg: add sha

2024-11-13 Thread Daniel Henrique Barboza
'sha' is the augmented hypervisor extension, defined in RVA22 as a set of the following extensions: - RVH - Ssstateen - Shcounterenw (always present) - Shvstvala (always present) - Shtvala (always present) - Shvstvecd (always present) - Shvsatpa (always present) - Shgatpa (always present) We can

[PATCH for-10.0 0/9] target/riscv: add 'sha' support

2024-11-13 Thread Daniel Henrique Barboza
Hi, 'sha' is defined in RVA22 as "augmented hypervisor extension" and consists of a set of named features that must be enabled. RVA23 makes 'sha' mandatory, so let's add official support for it in preparation to support RVA23 later. Most of the named features added here are always implemented b

[PATCH for-10.0 1/9] target/riscv/tcg: hide warn for named feats when disabling via priv_ver

2024-11-13 Thread Daniel Henrique Barboza
Commit 68c9e54bea handled a situation where a warning was being shown when using the 'sifive_e' cpu when disabling the named extension zic64b. It makes little sense to show user warnings for named extensions that users can't control, and the solution taken was to disable zic64b manually in riscv_cp

[PATCH for-10.0 7/9] target/riscv: add shvsatpa

2024-11-13 Thread Daniel Henrique Barboza
shvsatpa is defined in RVA22 as: "All translation modes supported in satp must be supported in vsatp." This is always true in TCG so let's claim support for it. Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/cpu.c

[PATCH v2] target/arm: Add cortex-m0+ support

2024-11-13 Thread Matthieu Castet
Signed-off-by: Matthieu Castet --- hw/intc/armv7m_nvic.c| 51 ++-- target/arm/cpu.c | 5 ++-- target/arm/ptw.c | 14 +-- target/arm/tcg/cpu-v7m.c | 17 ++ 4 files changed, 81 insertions(+), 6 deletions(-) diff --git a/hw

[PATCH for-10.0 2/9] target/riscv: add ssstateen

2024-11-13 Thread Daniel Henrique Barboza
ssstateen is defined in RVA22 as: "Supervisor-mode view of the state-enable extension. The supervisor-mode (sstateen0-3) and hypervisor-mode (hstateen0-3) state-enable registers must be provided." Add ssstateen as a named feature that is available if we also have smstateen. Signed-off-by: Daniel

Re: [PATCH v1 2/2] migration: Do not perform RAMBlock dirty sync during the first iteration

2024-11-13 Thread Peter Xu
On Tue, Nov 12, 2024 at 11:08:44AM +0100, David Hildenbrand wrote: > On 11.11.24 12:37, Yong Huang wrote: > > > > > > On Mon, Nov 11, 2024 at 6:42 PM David Hildenbrand > > wrote: > > > > On 11.11.24 11:08, Yong Huang wrote: > > > > > > > > > On Mon, N

Re: [PATCH] virtio-net: Add queues before loading them

2024-11-13 Thread Laurent Vivier
On 25/10/2024 10:44, Jason Wang wrote: On Wed, Oct 23, 2024 at 4:02 PM Michael S. Tsirkin wrote: On Tue, Oct 22, 2024 at 03:49:01PM +0900, Akihiko Odaki wrote: Call virtio_net_set_multiqueue() to add queues before loading their states. Otherwise the loaded queues will not have handlers and el

Re: [RFC PATCH 01/11] rust: qemu_api: do not disable lints outside bindgen-generated code

2024-11-13 Thread Paolo Bonzini
On Wed, Nov 13, 2024 at 7:52 AM Junjie Mao wrote: > > A symbolic link seems to work too. Thanks for the tip! > > Linux-based hosts should be fine. Should we test if symlinks also work > on W32/W64 systems? We already use symlinks for scripts/symlink-install-tree.py, fortunately. Paolo

Re: [RFC PATCH 08/11] rust: build: establish a baseline of lints across all crates

2024-11-13 Thread Junjie Mao
Paolo Bonzini writes: > On 11/13/24 08:14, Junjie Mao wrote: >> Paolo Bonzini writes: >> >>> Many lints that default to allow can be helpful in detecting bugs or >>> keeping the code style homogeneous. Add them liberally, though perhaps >>> not as liberally as in hw/char/pl011/src/lib.rs. In

Re: [PATCH] hw/net/rocker/rocker_of_dpa.c: Remove superfluous error check

2024-11-13 Thread Ján Tomko
On a Tuesday in 2024, Rodrigo Dias Correa wrote: of_dpa_cmd_add_acl_ip() is called from a single place, and despite the fact that it always returns ROCKER_OK, its return value is still checked by the caller. Change of_dpa_cmd_add_acl_ip() to return void and remove the superfluous check from of_dp

[PATCH v2] target/riscv: Add Tenstorrent Ascalon CPU

2024-11-13 Thread Anton Blanchard
Add a CPU entry for the Tenstorrent Ascalon CPU, a series of 2 wide to 8 wide RV64 cores. More details can be found at https://tenstorrent.com/ip/tt-ascalon Signed-off-by: Anton Blanchard --- target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 67 ++ 2

Re: [PULL 32/65] amd_iommu: Check APIC ID > 255 for XTSup

2024-11-13 Thread Phil Dennis-Jordan
Hi Santosh, On Mon, 11 Nov 2024 at 06:39, Shukla, Santosh wrote: > > Hi Phil, > > On 11/10/2024 4:36 PM, Phil Dennis-Jordan wrote: > > Hi, > > > > This commit seems to be causing link errors, likely on all platforms > > where KVM is not available, but at minimum that's what I'm seeing when > > tr

[PATCH 0/6] Change ghes driver to use HEST-based offsets

2024-11-13 Thread Mauro Carvalho Chehab
This series was part of the previous PR to add generic error injection support on GHES. It depends on a cleanup patch series sent yesterday: https://lore.kernel.org/qemu-devel/c3e608a16a795b2d2be476eddc3707febcdb1ca3.1731406254.git.mchehab+hua...@kernel.org/T/#m60839c88a009f04bc73f75832ccb6a41523

[PATCH] tests/qtest: add TIMEOUT_MULTIPLIER

2024-11-13 Thread Dmitry Frolov
Some tests need more time when qemu is built with "--enable-asan --enable-ubsan" As was discussed here: https://patchew.org/QEMU/20241112120100.176492-2-fro...@swemel.ru/ TIMEOUT_MULTIPLIER enviroment variable will be a useful option, allowing non-invasive timeouts increasing for a specific build

Re: [RFC PATCH 08/11] rust: build: establish a baseline of lints across all crates

2024-11-13 Thread Paolo Bonzini
On 11/13/24 08:14, Junjie Mao wrote: Paolo Bonzini writes: Many lints that default to allow can be helpful in detecting bugs or keeping the code style homogeneous. Add them liberally, though perhaps not as liberally as in hw/char/pl011/src/lib.rs. In particular, enabling entire groups can b

Re: [PATCH 1/1] vfio/platform: Add mmio-base property to define start address for MMIO mapping

2024-11-13 Thread Alex Bennée
Juan Pablo Ruiz writes: > Some platform devices have large MMIO regions (e.g., GPU reserved memory). For > certain devices, it's preferable to have a 1:1 address translation in the VM > to > avoid modifying driver source code. > > This patch: > > 1. Increases the VFIO platform bus size from 32MB

Re: [PATCH v9 02/16] hw/display/apple-gfx: Introduce ParavirtualizedGraphics.Framework support

2024-11-13 Thread Phil Dennis-Jordan
On Mon, 11 Nov 2024 at 05:50, Akihiko Odaki wrote: > On 2024/11/11 6:55, Phil Dennis-Jordan wrote: > > MacOS provides a framework (library) that allows any vmm to implement a > > paravirtualized 3d graphics passthrough to the host metal stack called > > ParavirtualizedGraphics.Framework (PVG). Th

[PATCH 5/6] acpi/generic_event_device: Update GHES migration to cover hest addr

2024-11-13 Thread Mauro Carvalho Chehab
The GHES migration logic at GED should now support HEST table location too. Increase migration version and change needed to check for both ghes_addr_le and hest_addr_le. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/generic_event_device.c | 29 + 1 file changed, 2

Re: [RFC PATCH 10/11] rust: fix doc test syntax

2024-11-13 Thread Junjie Mao
Paolo Bonzini writes: > Allow "cargo test --doc" to pass. > > Signed-off-by: Paolo Bonzini Reviewed-by: Junjie Mao -- Best Regards Junjie Mao

RE: [PATCH v5 17/20] tests/acpi: q35: Update host address width in DMAR

2024-11-13 Thread Duan, Zhenzhong
Hi Clement, >-Original Message- >From: CLEMENT MATHIEU--DRIF >Sent: Wednesday, November 13, 2024 3:17 PM >Subject: Re: [PATCH v5 17/20] tests/acpi: q35: Update host address width in >DMAR > >Hi Zhenzhong, > >Ack I presume you mean: Acked-by: Clément Mathieu--Drif Thanks Zhenzhong > > >

Re: [PATCH 1/1] vfio/platform: Add mmio-base property to define start address for MMIO mapping

2024-11-13 Thread Eric Auger
Hi Juan Pablo, On 11/13/24 00:43, Alex Williamson wrote: > On Tue, 12 Nov 2024 22:02:12 + > Juan Pablo Ruiz wrote: > >> Some platform devices have large MMIO regions (e.g., GPU reserved memory). >> For >> certain devices, it's preferable to have a 1:1 address translation in the VM >> to >>

[PATCH 4/6] acpi/ghes: Use HEST table offsets when preparing GHES records

2024-11-13 Thread Mauro Carvalho Chehab
There are two pointers that are needed during error injection: 1. The start address of the CPER block to be stored; 2. The address of the ack, which needs a reset before next error. Calculate them preferrable from the HEST table, as this allows checking the source ID, the size of the table and th

[PATCH 6/6] acpi/generic_event_device: add logic to detect if HEST addr is available

2024-11-13 Thread Mauro Carvalho Chehab
Create a new property (x-has-hest-addr) and use it to detect if the GHES table offsets can be calculated from the HEST address (qemu 9.2 and upper) or via the legacy way via an offset obtained from the hardware_errors firmware file. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/generic_event_

RE: [PATCH v5 08/20] intel_iommu: Check stage-1 translation result with interrupt range

2024-11-13 Thread Duan, Zhenzhong
>-Original Message- >From: CLEMENT MATHIEU--DRIF >Sent: Wednesday, November 13, 2024 2:56 PM >Subject: Re: [PATCH v5 08/20] intel_iommu: Check stage-1 translation result >with >interrupt range > > >On 11/11/2024 09:34, Zhenzhong Duan wrote: >> Caution: External email. Do not open attach

Re: [PATCH 1/1] vfio/platform: Add mmio-base property to define start address for MMIO mapping

2024-11-13 Thread Juan Pablo Ruiz
On Wed, Nov 13, 2024 at 10:57 AM Eric Auger wrote: > > Hi Juan Pablo, > > On 11/13/24 00:43, Alex Williamson wrote: > > On Tue, 12 Nov 2024 22:02:12 + > > Juan Pablo Ruiz wrote: > > > >> Some platform devices have large MMIO regions (e.g., GPU reserved memory). > >> For > >> certain devices,

Re: [RFC PATCH 3/5] hw/arm/smmuv3: Associate a pci bus with a SMMUv3 Nested device

2024-11-13 Thread Eric Auger
Hi Shameer, On 11/8/24 13:52, Shameer Kolothum wrote: > Subsequent patches will add IORT modifications to get this working. add a proper commit msg once non RFC ;-) > > Signed-off-by: Shameer Kolothum > --- > hw/arm/smmuv3.c | 27 +++ > include/hw/arm/smmuv3.h |

Re: [PATCH] migration: fix-possible-int-overflow

2024-11-13 Thread Peter Xu
On Wed, Nov 13, 2024 at 05:05:01PM +0300, Dmitry Frolov wrote: > stat64_add() takes uint64_t as 2nd argument, but both > "p->next_packet_size" and "p->packet_len" are uint32_t. > Thus, theyr sum may overflow uint32_t. > > Found by Linux Verification Center (linuxtesting.org) with SVACE. > > Signe

Re: [PATCH] fuzz: disable tcg for OSS-Fuzz builds

2024-11-13 Thread Paolo Bonzini
On Wed, Nov 13, 2024 at 5:38 PM Alexander Bulekov wrote: > > OSS-Fuzz builds have been failing due to some strange issues that seem > to be related to color codes from libffi: > https://oss-fuzz-build-logs.storage.googleapis.com/log-8d5435ee-1677-40af-9656-b4162fa881e1.txt Hmm... unqueuing this :

Re: [RFC PATCH 5/5] hw/arm/virt-acpi-build: Add IORT RMR regions to handle MSI nested binding

2024-11-13 Thread Nicolin Chen
On Fri, Nov 08, 2024 at 12:52:42PM +, Shameer Kolothum wrote: > From: Eric Auger > > To handle SMMUv3 nested stage support it is practical to > expose the guest with reserved memory regions (RMRs) > covering the IOVAs used by the host kernel to map > physical MSI doorbells. There has been an

Re: [RFC PATCH 2/5] hw/arm/smmuv3: Add initial support for SMMUv3 Nested device

2024-11-13 Thread Eric Auger
On 11/8/24 13:52, Shameer Kolothum wrote: > Based on SMMUv3 as a parent device, add a user-creatable > smmuv3-nested device. Subsequent patches will add support to > specify a PCI bus for this device. > > Currently only supported for "virt", so hook up the sybus mem & irq > for that as well. >

Re: [PATCH v10 01/15] ui & main loop: Redesign of system-specific main thread event handling

2024-11-13 Thread BALATON Zoltan
On Wed, 13 Nov 2024, Phil Dennis-Jordan wrote: macOS's Cocoa event handling must be done on the initial (main) thread of the process. Furthermore, if library or application code uses libdispatch, the main dispatch queue must be handling events on the main thread as well. So far, this has affecte

Re: [PATCH 19/20] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region

2024-11-13 Thread Paolo Bonzini
On 11/12/24 19:10, Philippe Mathieu-Daudé wrote: Rather than using I/O registers for RAM buffer, having to swap endianness back and forth (because the core memory layer automatically swaps endiannes for us), declare the buffers as RAM regions. Remove the now unused s->regs[] array. The memory fl

[PATCH for-10.0 8/9] target/riscv: add shgatpa

2024-11-13 Thread Daniel Henrique Barboza
shgatpa is defined in RVA22 as: "For each supported virtual memory scheme SvNN supported in satp, the corresponding hgatp SvNNx4 mode must be supported. The hgatp mode Bare must also be supported." Claim support for shgatpa since this is always true for TCG. Signed-off-by: Daniel Henrique Barboz

Re: [PATCH] fuzz: disable tcg for OSS-Fuzz builds

2024-11-13 Thread Paolo Bonzini
On Wed, Nov 13, 2024 at 7:35 PM Alexander Bulekov wrote: > > Where is the Dockerfile that's being used? > > https://github.com/google/oss-fuzz/blob/master/projects/qemu/Dockerfile > > Thanks for catching that... I will try to run the docker build locally. You can add -Db_colorout=disabled to both

Re: qemu-systems-sparc can't do 1152x900 ?

2024-11-13 Thread Andrew Randrianasulu
On Wed, Nov 13, 2024 at 9:20 PM Andrew Randrianasulu < randrianas...@gmail.com> wrote: > Was trying to figure out if my glitches at [1] due to wrong resolution > tried to start > qemu like this: > > qemu-system-sparc -g 1152x900 > qemu-system-sparc: Unsupported resolution: 1152 x 900 > > ow? > > i

Re: [PATCH] fuzz: disable tcg for OSS-Fuzz builds

2024-11-13 Thread Alexander Bulekov
On 241113 1928, Paolo Bonzini wrote: > On Wed, Nov 13, 2024 at 5:38???PM Alexander Bulekov wrote: > > > > OSS-Fuzz builds have been failing due to some strange issues that seem > > to be related to color codes from libffi: > > https://oss-fuzz-build-logs.storage.googleapis.com/log-8d5435ee-1677-40

Re: [PATCH v1 2/2] migration: Do not perform RAMBlock dirty sync during the first iteration

2024-11-13 Thread David Hildenbrand
On 13.11.24 18:40, Peter Xu wrote: On Tue, Nov 12, 2024 at 11:08:44AM +0100, David Hildenbrand wrote: On 11.11.24 12:37, Yong Huang wrote: On Mon, Nov 11, 2024 at 6:42 PM David Hildenbrand mailto:da...@redhat.com>> wrote: On 11.11.24 11:08, Yong Huang wrote: > > > On M

Re: [PATCH v10 01/15] ui & main loop: Redesign of system-specific main thread event handling

2024-11-13 Thread Paolo Bonzini
On Wed, Nov 13, 2024 at 7:16 PM BALATON Zoltan wrote: > > int main(int argc, char **argv) > > { > > +QemuThread main_loop_thread; > > + > > qemu_init(argc, argv); > > -return qemu_main(); > > +if (qemu_main) { > > +qemu_thread_create(&main_loop_thread, "qemu_main", > > +

Re: [RFC PATCH 2/5] hw/arm/smmuv3: Add initial support for SMMUv3 Nested device

2024-11-13 Thread Nicolin Chen
Hi Eric, On Wed, Nov 13, 2024 at 06:12:15PM +0100, Eric Auger wrote: > On 11/8/24 13:52, Shameer Kolothum wrote: > > @@ -181,6 +181,7 @@ static const MemMapEntry base_memmap[] = { > > [VIRT_PVTIME] = { 0x090a, 0x0001 }, > > [VIRT_SECURE_GPIO] ={ 0x090b, 0x

Re: [PATCH] i386/kvm: Fix kvm_enable_x2apic link error in non-KVM builds

2024-11-13 Thread Paolo Bonzini
On 11/13/24 15:49, Phil Dennis-Jordan wrote: It appears that existing call sites for the kvm_enable_x2apic() function rely on the compiler eliding the calls during optimisation when building with KVM disabled, or on platforms other than Linux, where that function is declared but not defined. Thi

qemu-systems-sparc can't do 1152x900 ?

2024-11-13 Thread Andrew Randrianasulu
Was trying to figure out if my glitches at [1] due to wrong resolution tried to start qemu like this: qemu-system-sparc -g 1152x900 qemu-system-sparc: Unsupported resolution: 1152 x 900 ow? in source hw/sparc/sun4m.c (git commit f0cfd067867668870931c9411d96cd518564b7a8) if (!(graphi

Re: [PATCH] i386/kvm: Fix kvm_enable_x2apic link error in non-KVM builds

2024-11-13 Thread Phil Dennis-Jordan
On Wed 13. Nov 2024 at 19:06, Paolo Bonzini wrote: > On 11/13/24 15:49, Phil Dennis-Jordan wrote: > > It appears that existing call sites for the kvm_enable_x2apic() > > function rely on the compiler eliding the calls during optimisation > > when building with KVM disabled, or on platforms other

[PATCH for-10.0 3/9] target/riscv: add shcounterenw

2024-11-13 Thread Daniel Henrique Barboza
shcounterenw is defined in RVA22 as: "For any hpmcounter that is not read-only zero, the corresponding bit in hcounteren must be writable." This is always true in TCG so let's claim support for it. Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 1 + 1 file changed, 1 insertion

Re: [PATCH] i386/kvm: Fix kvm_enable_x2apic link error in non-KVM builds

2024-11-13 Thread Paolo Bonzini
On Wed, Nov 13, 2024 at 7:25 PM Shukla, Santosh wrote: > Same proposed at > https://lore.kernel.org/qemu-devel/cebca38a-5896-e2a5-8a68-5edad5dc9...@amd.com/ > and I think Phil confirmed that it works. Thanks Santosh, can you post it with commit message and everything? Paolo

Re: [PATCH] i386/kvm: Fix kvm_enable_x2apic link error in non-KVM builds

2024-11-13 Thread Shukla, Santosh
On 11/14/2024 12:09 AM, Paolo Bonzini wrote: > On Wed, Nov 13, 2024 at 7:25 PM Shukla, Santosh > wrote: >> Same proposed at >> https://lore.kernel.org/qemu-devel/cebca38a-5896-e2a5-8a68-5edad5dc9...@amd.com/ >> and I think Phil confirmed that it works. > > Thanks Santosh, can you post it wit

Re: [PATCH] i386/kvm: Fix kvm_enable_x2apic link error in non-KVM builds

2024-11-13 Thread Paolo Bonzini
On 11/13/24 15:49, Phil Dennis-Jordan wrote: It appears that existing call sites for the kvm_enable_x2apic() function rely on the compiler eliding the calls during optimisation when building with KVM disabled, or on platforms other than Linux, where that function is declared but not defined. Thi

[PATCH v2 06/22] tests/qtest/migration: Move qmp helpers to a separate file

2024-11-13 Thread Fabiano Rosas
We current have a bunch of non-test functions in migration-test.c and some others in migration-helpers.c. In order to split migration-test.c into separate test binaries, these helpers need to go somewhere else. To avoid making migration-helpers even larger, move all QMP-related functions into a ne

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