Re: [PATCH v3 7/8] migration: Unexport migration_is_active()

On 28/10/2024 17:45, Peter Xu wrote: External email: Use caution opening links or attachments On Mon, Oct 28, 2024 at 09:43:16AM +0200, Avihai Horon wrote: On 25/10/2024 0:30, Peter Xu wrote: External email: Use caution opening links or attachments We have two outside users of this API, s

Re: [RFC 18/21] arm/cpu: Introduce a customizable kvm host cpu model

On Mon, 28 Oct 2024 at 16:35, Daniel P. Berrangé wrote: > > On Mon, Oct 28, 2024 at 04:16:31PM +, Peter Maydell wrote: > > On Fri, 25 Oct 2024 at 14:24, Daniel P. Berrangé > > wrote: > > > On Fri, Oct 25, 2024 at 03:18:25PM +0200, Eric Auger wrote: > > > > On 10/25/24 15:06, Daniel P. Berran

Re: [PATCH v2 2/3] qdev-properties: Add DEFINE_PROP_ON_OFF_AUTO_BIT64()

On Tue, Oct 22, 2024 at 01:50:39PM +0900, Akihiko Odaki wrote: > DEFINE_PROP_ON_OFF_AUTO_BIT64() corresponds to DEFINE_PROP_ON_OFF_AUTO() > as DEFINE_PROP_BIT64() corresponds to DEFINE_PROP_BOOL(). The difference > is that DEFINE_PROP_ON_OFF_AUTO_BIT64() exposes OnOffAuto instead of > bool. Again,

Re: [PATCH v2 1/3] qdev-properties: Accept bool for OnOffAuto

The parent msg was sent off-list orignially, so below is a copy of my feedback to that off-list posting. On Tue, Oct 22, 2024 at 01:50:38PM +0900, Akihiko Odaki wrote: > Accept bool literals for OnOffAuto properties for consistency with bool > properties. This enables users to set the "on" or "off

Re: [RFC 18/21] arm/cpu: Introduce a customizable kvm host cpu model

On Mon, Oct 28, 2024 at 04:16:31PM +, Peter Maydell wrote: > On Fri, 25 Oct 2024 at 14:24, Daniel P. Berrangé wrote: > > On Fri, Oct 25, 2024 at 03:18:25PM +0200, Eric Auger wrote: > > > On 10/25/24 15:06, Daniel P. Berrangé wrote: > > > > Also, is this naming convention really the same one th

Re: [PATCH v3 7/8] migration: Unexport migration_is_active()

On 28/10/2024 18:58, Peter Xu wrote: External email: Use caution opening links or attachments On Mon, Oct 28, 2024 at 06:41:42PM +0200, Avihai Horon wrote: On 28/10/2024 17:45, Peter Xu wrote: External email: Use caution opening links or attachments On Mon, Oct 28, 2024 at 09:43:16AM +020

Re: [PATCH 0/4] target/riscv/kvm: add riscv-aia bool props

Hi, I had a change of heart w.r.t this work. I still believe that the boolean properties are better to deal with since we don't have to deal with string parsing, and that we should avoid creating new string props in the future. But as far as the user API goes it doesn't matter that much. Havin

[PATCH] hw/arm: enable at24c with aspeed

Enable AT24C with ASPEED in the KConfig because the boards build this device. Signed-off-by: Patrick Leis --- hw/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index e7fd9338d1..1b25e73578 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -539,6

Re: [PATCH v3 7/8] migration: Unexport migration_is_active()

On Mon, Oct 28, 2024 at 07:20:27PM +0200, Avihai Horon wrote: > > On 28/10/2024 18:58, Peter Xu wrote: > > External email: Use caution opening links or attachments > > > > > > On Mon, Oct 28, 2024 at 06:41:42PM +0200, Avihai Horon wrote: > > > On 28/10/2024 17:45, Peter Xu wrote: > > > > Externa

[PATCH v2] hw/intc/loongarch_ipi: Add safer check about cpu

If cpu hotplug is enabled, all possible_cpus is initialized with arch_id set. For ipi interrupt controller, cpu is searched from possible_cpus with specified arch_id. However it is possible that cpu object is not created for offlined cpu. Here safer check is added. If cpu object is not created, ar

Re: [PATCH 2/6] target/i386: add avx10-version property

On 10/28/2024 10:45 AM, Tao Su wrote: Introduce avx10-version property so that avx10 version can be controlled by user and cpu model. Per spec, avx10 version can never be 0, the default value of avx10-version is set to 0 to determine whether it is specified by user. I think it's better to merge

Re: [PATCH] hw/nvme: fix handling of over-committed queues

On Mon, Oct 28, 2024 at 10:01:50AM +0100, Klaus Jensen wrote: > On Oct 25 10:45, Keith Busch wrote: > > On Fri, Oct 25, 2024 at 12:50:45PM +0200, Klaus Jensen wrote: > > > @@ -1520,9 +1520,16 @@ static void nvme_post_cqes(void *opaque) > > > nvme_inc_cq_tail(cq); > > > nvme_sg_unm

[PATCH 02/14] target/i386: Tidy cc_op_str usage

From: Richard Henderson Make const. Use the read-only strings directly; do not copy them into an on-stack buffer with snprintf. Allow for holes in the cc_op_str array, now present with CC_OP_POPCNT. Fixes: 460231ad369 ("target/i386: give CC_OP_POPCNT low bits corresponding to MO_TL") Signed-o

[PATCH 04/14] target/i386: Rearrange CCOp

From: Richard Henderson Give the first few enumerators explicit integer constants, align the BWLQ enumerators. This will be used to simplify ((op - CC_OP_*B) & 3). Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20240701025115.1265117-4-richard.hender...@linaro.org Signed-off

[PATCH 01/14] target/i386: use tcg_gen_ext_tl when applicable

Prefer it to gen_ext_tl in the common case where the destination is known. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/t

[PATCH 14/14] target/i386: use + to put flags together

This gives greater opportunity for reassociation on x86 targets, since addition can use the LEA instruction. Signed-off-by: Paolo Bonzini --- target/i386/tcg/cc_helper_template.h.inc | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/target/i386/tcg/cc

[PATCH 09/14] target/i386: add a few more trivial CCPrepare cases

Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index d3bbcf7317c..6e89d4faef1 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/t

[PATCH 13/14] target/i386: use higher-precision arithmetic to compute CF

If the operands of the arithmetic instruction fit within a half-register, it's easiest to use a comparison instruction to compute the carry. ` Signed-off-by: Paolo Bonzini --- target/i386/tcg/cc_helper_template.h.inc | 37 1 file changed, 37 insertions(+) diff --git a/ta

[PATCH 06/14] target/i386: Wrap cc_op_live with a validity check

From: Richard Henderson Assert that op is known and that cc_op_live_ is populated. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/cpu.h| 1 - target/i386/tcg/translate.c | 21 ++--- target/i386/tcg/decode-new.c.inc | 2 +- ta

[PATCH 05/14] target/i386: Introduce cc_op_size

From: Richard Henderson Replace arithmetic on cc_op with a helper function. Assert that the op has a size and that it is valid for the configuration. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20240701025115.1265117-6-richard.hender...@linaro.org Signed-off-by: Paolo Bonz

[PATCH 10/14] target/i386: add a note about gen_jcc1

Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 4 1 file changed, 4 insertions(+) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 6e89d4faef1..5d729e68c98 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -1193,6 +1193

[PATCH 12/14] target/i386: use compiler builtin to compute PF

This removes the 256 byte parity table from the executable. Suggested-by: Richard Henderson Signed-off-by: Paolo Bonzini --- include/qemu/host-utils.h| 9 ++ target/i386/tcg/helper-tcg.h | 6 +++- target/i386/tcg/cc_helper_template.h.inc | 20 +++--- ta

[PATCH 03/14] target/i386: remove CC_OP_CLR

Just use CC_OP_EFLAGS; it is not that likely that the flags computed by CC_OP_CLR survive the end of the basic block, in which case there is no need to spill cc_op_src. cc_op_src now does need spilling if the XOR is followed by a memory operation, but this only costs 0.2% extra TCG ops. They will

[PATCH v2 00/14] target/i386: miscellaneous flags improvements

This includes improved translation of checks, microoptimization of the helpers, and improvements to the cc_op_* functions from Richard. Unlike his original patches[1] I didn't convert cc_op_live() to a switch statement, instead keeping the array but making sure that all of its entries are nonzero.

[PULL 06/24] qdev: make properties array "const"

Constify all accesses to qdev properties, except for the ObjectPropertyAccessor itself. This makes it possible to place them in read-only memory, and also lets Rust bindings switch from "static mut" arrays to "static"; which is advantageous, because mutable statics are highly discouraged. Reviewe

[PULL 12/24] rust: do not always select X_PL011_RUST

Right now the Rust pl011 device is included in all QEMU system emulator binaries if --enable-rust is passed. This is not needed since the board logic in hw/arm/Kconfig will pick it. Signed-off-by: Paolo Bonzini --- rust/hw/char/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/rust/hw/

Re: [PATCH 1/6] target/i386: Add AVX512 state when AVX10 is supported

On 10/28/2024 10:45 AM, Tao Su wrote: AVX10 state enumeration in CPUID leaf D and enabling in XCR0 register are identical to AVX512 state regardless of the supported vector lengths. Given that some E-cores will support AVX10 but not support AVX512, add AVX512 state components to guest when AVX10

Re: [PATCH v4 02/15] hw/display/apple-gfx: Introduce ParavirtualizedGraphics.Framework support

On Mon, 28 Oct 2024 at 10:00, Phil Dennis-Jordan wrote: > > > > >> > > Hmm. I think if we were to use that, we would need to create a >> new >> > > QemuEvent for every job and destroy it afterward, which seems >> > expensive. >> > > We can't rule out multiple concurrent jo

[PATCH 11/14] target/i386: make flag variables unsigned

This makes it easier for the compiler to understand which bits are set, and it also removes "cltq" instructions to canonicalize the output value as 32-bit signed. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/cc_helper_template.h.inc | 46 --

Re: [PATCH] MAINTAINERS: Remove myself as reviewer

On 28/10/24 06:51, David Gibson wrote: I've now well and truly moved on from ppc and qemu maintenance. I'm occupied with other things and am pretty much just ignoring mails on these topics I'm CCed on. Time to remove myself. I'm still listed as a reviewer for Device Tree, I'll keep this for no

Re: [PATCH v4 02/15] hw/display/apple-gfx: Introduce ParavirtualizedGraphics.Framework support

On 2024/10/28 22:31, Phil Dennis-Jordan wrote: On Mon, 28 Oct 2024 at 10:00, Phil Dennis-Jordan > wrote: >      > >      > Hmm. I think if we were to use that, we would need to create a new >      > QemuEvent for every job and des

Re: [PATCH v4 02/15] hw/display/apple-gfx: Introduce ParavirtualizedGraphics.Framework support

On Mon, 28 Oct 2024 at 15:02, Akihiko Odaki wrote: > On 2024/10/28 22:31, Phil Dennis-Jordan wrote: > > > > > > On Mon, 28 Oct 2024 at 10:00, Phil Dennis-Jordan > > wrote: > > > > > > > > > > > > Hmm. I think if we were to use that, we would

Re: [PULL 00/17] testing, gdbstub and plugin updates

On Thu, 24 Oct 2024 at 10:58, Alex Bennée wrote: > > The following changes since commit 6f625ce2f21d6a1243065d236298277c56f972d5: > > Merge tag 'pull-request-2024-10-21' of https://gitlab.com/thuth/qemu into > staging (2024-10-21 17:12:59 +0100) > > are available in the Git repository at: > >

[PULL 10/24] meson: remove repeated search for rust_root_crate.sh

Avoid repeated lines of the form Program scripts/rust/rust_root_crate.sh found: YES (/home/pbonzini/work/upstream/qemu/scripts/rust/rust_root_crate.sh) in the meson logs. Reviewed-by: Junjie Mao Reviewed-by: Zhao Liu Reviewed-by: Kevin Wolf Signed-off-by: Paolo Bonzini --- meson.build | 3

[PULL 20/24] rust: provide safe wrapper for MaybeUninit::zeroed()

MaybeUninit::zeroed() is handy, but it introduces unsafe (and has a pretty heavy syntax in general). Introduce a trait that provides the same functionality while staying within safe Rust. In addition, MaybeUninit::zeroed() is not available as a "const" function until Rust 1.75.0, so this also pre

[PULL 13/24] rust: do not use --no-size_t-is-usize

This is not necessary and makes it harder to write code that is portable between 32- and 64-bit systems: it adds extra casts even though size_of, align_of or offset_of already return the right type. Reviewed-by: Junjie Mao Reviewed-by: Kevin Wolf Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzi

[PULL 04/24] target/i386: fix CPUID check for LFENCE and SFENCE

LFENCE and SFENCE were introduced with the original SSE instruction set; marking them incorrectly as cpuid(SSE2) causes failures for CPU models that lack SSE2, for example pentium3. Reported-by: Guenter Roeck Tested-by: Guenter Roeck Cc: qemu-sta...@nongnu.org Signed-off-by: Paolo Bonzini ---

[PULL 23/24] configure, meson: deprecate 32-bit MIPS

The mipsel architecture is not available in Debian Trixie, and it will likely be a hard failure as soon as we drop support for the old Rust toolchain in Debian Bookworm. Prepare by deprecating 32-bit little endian MIPS in QEMU 9.2. Signed-off-by: Paolo Bonzini --- docs/about/build-platforms.rst

Re: [PATCH v3 0/7] target/i386: Add support for perfmon-v2, RAS bits and EPYC-Turin CPU model

On Mon, Oct 28, 2024 at 3:23 PM Moger, Babu wrote: > > Hi Paolo, > > On 10/28/24 03:37, Paolo Bonzini wrote: > > On 10/25/24 00:18, Babu Moger wrote: > >> > >> This series adds the support for following features in qemu. > >> 1. RAS feature bits (SUCCOR, McaOverflowRecov) > >> 2. perfmon-v2 > >> 3

[PULL 02/24] tests: add 'rust' and 'bindgen' to CI package list

From: Daniel P. Berrangé Although we're not enabling rust by default yet, we can still add rust and bindgen to the CI package list. This demonstrates that we're not accidentally triggering unexpected build behaviour merely from Rust being present. When we do dev work to enable rust by default, t

[PULL 01/24] stubs: avoid duplicate symbols in libqemuutil.a

qapi_event_send_device_deleted is always included (together with the rest of QAPI) in libqemuutil.a if either system-mode emulation or tools are being built, and in that case the stub causes a duplicate symbol to appear in libqemuutil.a. Add the symbol only if events are not being requested. Cc:

[PULL 16/24] rust: build integration test for the qemu_api crate

Adjust the integration test to compile with a subset of QEMU object files, and make it actually create an object of the class it defines. Follow the Rust filesystem conventions, where tests go in tests/ if they use the library in the same way any other code would. Reviewed-by: Junjie Mao Reviewe

[PULL 11/24] meson: pass rustc_args when building all crates

rustc_args is needed to smooth the difference in warnings between the various versions of rustc. Always include those arguments. Reviewed-by: Junjie Mao Reviewed-by: Kevin Wolf Signed-off-by: Paolo Bonzini --- meson.build | 20 +--- rust/qemu-api/meson.bu

[PULL 14/24] rust: remove uses of #[no_mangle]

Mangled symbols do not cause any issue; disabling mangling is only useful if C headers reference the Rust function, which is not the case here. Reviewed-by: Junjie Mao Reviewed-by: Kevin Wolf Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 4 ---

[PULL 03/24] ci: enable rust in the Fedora system build job

From: Daniel P. Berrangé We previously added a new job running Fedora with nightly rust toolchain. The standard rust toolchain distributed by Fedora is new enough, however, to let us enable a CI build with that too. Signed-off-by: Daniel P. Berrangé Link: https://lore.kernel.org/r/202410151339

[PULL 09/24] meson: import rust module into a global variable

Tested-by: Manos Pitsidianakis Reviewed-by: Manos Pitsidianakis Reviewed-by: Zhao Liu Reviewed-by: Kevin Wolf Signed-off-by: Paolo Bonzini --- meson.build | 3 ++- rust/qemu-api-macros/meson.build | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/meso

[PULL 17/24] rust: cleanup module_init!, use it from #[derive(Object)]

Remove the duplicate code by using the module_init! macro; at the same time, simplify how module_init! is used, by taking inspiration from the implementation of #[derive(Object)]. Reviewed-by: Junjie Mao Reviewed-by: Kevin Wolf Signed-off-by: Paolo Bonzini --- rust/qemu-api-macros/src/lib.rs

[PULL 15/24] rust: modernize link_section usage for ELF platforms

Some newer ABI implementations do not provide .ctors; and while some linkers rewrite .ctors into .init_array, not all of them do. Use the newer .init_array ABI, which works more reliably, and apply it to all non-Apple, non-Windows platforms. This is similar to how the ctor crate operates; without

[PULL 21/24] rust: do not use TYPE_CHARDEV unnecessarily

In the invocation of qdev_prop_set_chr(), "chardev" is the name of a property rather than a type and has to match the name of the property in device_class.rs. Do not use TYPE_CHARDEV here, just like in the C version of pl011_create. Reviewed-by: Junjie Mao Reviewed-by: Kevin Wolf Signed-off-by:

Re: [PATCH v3 5/7] target/i386: Expose bits related to SRSO vulnerability

Hi Zhao, Thanks for the review. On 10/28/24 03:56, Zhao Liu wrote: > Hi Babu > > On Thu, Oct 24, 2024 at 05:18:23PM -0500, Babu Moger wrote: >> Date: Thu, 24 Oct 2024 17:18:23 -0500 >> From: Babu Moger >> Subject: [PATCH v3 5/7] target/i386: Expose bits related to SRSO >> vulnerability >> X-Ma

Re: [PATCH 4/6] target/i386: Add feature dependencies for AVX10

On 10/28/2024 6:45 PM, Paolo Bonzini wrote: On 10/28/24 11:02, Tao Su wrote: On Mon, Oct 28, 2024 at 09:45:39AM +0100, Paolo Bonzini wrote: On 10/28/24 03:45, Tao Su wrote: Since the highest supported vector length for a processor implies that all lesser vector lengths are also supported, add

[PULL 18/24] rust: clean up define_property macro

Use the "struct update" syntax to initialize most of the fields to zero, and simplify the handmade type-checking of $name. Reviewed-by: Junjie Mao Reviewed-by: Kevin Wolf Signed-off-by: Paolo Bonzini --- rust/qemu-api/src/device_class.rs | 31 +++ 1 file changed, 7

[PULL 24/24] MAINTAINERS: Add myself as a reviewer of x86 general architecture support

From: Zhao Liu X86 architecture has always been a focus of my work. I would like to help to review more related patches. Signed-off-by: Zhao Liu Link: https://lore.kernel.org/r/20241022023628.1743686-1-zhao1@intel.com Signed-off-by: Paolo Bonzini --- MAINTAINERS | 1 + 1 file changed, 1 i

[PULL 19/24] rust: make properties array immutable

Now that device_class_set_props() takes a const pointer, the only part of "define_property!" that needs to be non-const is the call to try_into(). This in turn will only break if offset_of returns a value with the most significant bit set (i.e. a struct size that is >=2^31 or >= 2^63, respectively

Re: [PATCH] qga: skip bind mounts in fs list

Hi Jean-Louis, Thanks for your patch. I hope next week, I will test and review this patch. Just a question, did you have a chance to test that this patch fix kernel crash? Best Regards, Konstantin Kostiuk. On Fri, Oct 25, 2024 at 1:06 PM Jean-Louis Dupond wrote: > On 9/10/2024 10:34, Jean-Lo

Re: [PATCH] qga: skip bind mounts in fs list

Hi Konstantin, Thanks for your response. What I observed was when running CloudLinux is that with a /tmp on a loop device, is that the underlying fs was first freezed, and then the /tmp was getting a freeze call. But this was hanging, because it couldn't freeze as the underlying fs was already

Re: [PULL 4/4] target/arm: Fix usage of MMU indexes when EL3 is AArch32

On Fri, 25 Oct 2024 at 13:54, Thomas Huth wrote: > > On 13/08/2024 17.20, Peter Maydell wrote: > > Our current usage of MMU indexes when EL3 is AArch32 is confused. > > Architecturally, when EL3 is AArch32, all Secure code runs under the > > Secure PL1&0 translation regime: > > * code at EL3, wh

Re: [PATCH v2] configure, meson: deprecate 32-bit MIPS

On 28/10/24 05:24, Paolo Bonzini wrote: The mipsel architecture is not available in Debian Trixie, and it will likely be a hard failure as soon as we drop support for the old Rust toolchain in Debian Bookworm. Prepare by deprecating 32-bit little endian MIPS in QEMU 9.2. Signed-off-by: Paolo Bo

[PULL 22/24] configure: detect 64-bit MIPS

While right now 64-bit MIPS and 32-bit MIPS share the code in QEMU, Rust uses different rules for the target. Set $cpu correctly to either mips or mips64 (--cpu=mips64* is already accepted in the case statement that canonicalizes cpu/host_arch/linux_arch), and adjust the checks to account for the

Re: [PATCH 4/6] target/i386: Add feature dependencies for AVX10

On Mon, Oct 28, 2024 at 3:48 PM Xiaoyao Li wrote: > > On 10/28/2024 6:45 PM, Paolo Bonzini wrote: > > On 10/28/24 11:02, Tao Su wrote: > >> On Mon, Oct 28, 2024 at 09:45:39AM +0100, Paolo Bonzini wrote: > >>> On 10/28/24 03:45, Tao Su wrote: > Since the highest supported vector length for a p

Re: [PATCH v3 00/23] rust: fix CI + allow older versions of rustc and bindgen

Daniel P. Berrangé writes: > On Sun, Oct 27, 2024 at 10:01:26AM +0300, Michael Tokarev wrote: >> I think this is the wrong direction (ie, backwards). >> >> Sacrificing current code to be compatible with old stuff feels wrong. >> Especially for really old, like rustc in debian bookworm. >> >> bo

Re: [PATCH 4/6] target/i386: Add feature dependencies for AVX10

On Mon, Oct 28, 2024 at 11:45:25AM +0100, Paolo Bonzini wrote: > On 10/28/24 11:02, Tao Su wrote: > > On Mon, Oct 28, 2024 at 09:45:39AM +0100, Paolo Bonzini wrote: > > > On 10/28/24 03:45, Tao Su wrote: > > > > Since the highest supported vector length for a processor implies that > > > > all less

Re: [PATCH v3 00/23] rust: fix CI + allow older versions of rustc and bindgen

On 10/28/24 13:26, Alex Bennée wrote: At least rustup makes this reasonably easy for the rust bits. We do rely on the excellent Debian backports for getting QEMU quickly into testing images but I was assuming we would have trixie before --enable-rust became mandatory so I'm not too worried if boo

Re: [RFC 21/21] arm/cpu-features: Document custom vcpu model

On Fri, Oct 25 2024, Daniel P. Berrangé wrote: > On Fri, Oct 25, 2024 at 03:28:35PM +0200, Eric Auger wrote: >> Hi Daniel, >> >> On 10/25/24 15:13, Daniel P. Berrangé wrote: >> > On Fri, Oct 25, 2024 at 12:17:40PM +0200, Eric Auger wrote: >> >> From: Cornelia Huck >> >> >> >> Add some documenta

Re: [RFC 18/21] arm/cpu: Introduce a customizable kvm host cpu model

On Fri, Oct 25 2024, Daniel P. Berrangé wrote: > On Fri, Oct 25, 2024 at 03:18:25PM +0200, Eric Auger wrote: >> Hi Daniel, >> >> On 10/25/24 15:06, Daniel P. Berrangé wrote: >> > On Fri, Oct 25, 2024 at 12:17:37PM +0200, Eric Auger wrote: >> >> At the moment, the custom model does not support le

[PULL 07/24] Revert "rust: add PL011 device model"

From: Manos Pitsidianakis Patch was applied with invalid authorship by accident, which confuses git tooling that look at git blame for contributors etc. Patch will be re-applied with correct authorship right after this commit. This reverts commit d0f0cd5b1f7e9780753344548e17ad4df9fcf5d8. Signe

Re: [PATCH v4 02/15] hw/display/apple-gfx: Introduce ParavirtualizedGraphics.Framework support

On 2024/10/28 23:13, Phil Dennis-Jordan wrote: On Mon, 28 Oct 2024 at 15:02, Akihiko Odaki > wrote: On 2024/10/28 22:31, Phil Dennis-Jordan wrote: > > > On Mon, 28 Oct 2024 at 10:00, Phil Dennis-Jordan mailto:p...@philjordan.eu> > <

Re: [PATCH v6] i386/cpu: fixup number of addressable IDs for logical processors in the physical package

On 10/17/2024 5:03 PM, Zhao Liu wrote: On Thu, Oct 17, 2024 at 04:18:06PM +0800, Xiaoyao Li wrote: Date: Thu, 17 Oct 2024 16:18:06 +0800 From: Xiaoyao Li Subject: Re: [PATCH v6] i386/cpu: fixup number of addressable IDs for logical processors in the physical package On 10/14/2024 11:36 AM, Z

Re: [RFC 21/21] arm/cpu-features: Document custom vcpu model

On Mon, Oct 28, 2024 at 05:05:44PM +0100, Cornelia Huck wrote: > On Fri, Oct 25 2024, Daniel P. Berrangé wrote: > > > On Fri, Oct 25, 2024 at 03:28:35PM +0200, Eric Auger wrote: > >> Hi Daniel, > >> > >> On 10/25/24 15:13, Daniel P. Berrangé wrote: > >> > On Fri, Oct 25, 2024 at 12:17:40PM +0200

Re: [PATCH v4] scripts/symlink-install-tree.py: Fix MESONINTROSPECT parsing

On 10/18/24 06:08, Peter Maydell wrote: From: Akihiko Odaki The arguments in MESONINTROSPECT are quoted with shlex.quote() so it must be parsed with shlex.split(). Otherwise the script will fail if the build directory has a character like "~" in it. Note: this fix cannot be backported directl

Re: [PATCH 1/2] ui: Allow injection of vnc display name

Hi Daniel and Marc-André - please excuse my delay (I was traveling last week). I see 2 primary takeaways here: 1. Updating the name field from the ServerInit RFB message to be controlled by the 'name' VNC option 2. Updating where we store the display 'name' in memory For 1 - are we amenable

Re: [PATCH 0/2] MAINTAINERS: Remove myself from ppc subsystems

On 24/10/2024 20:14, Cédric Le Goater wrote: Hello, My experience with PPC has been over for a few years and now, I'm moving away from PowerNV and XIVE. I wish you the best ! Cheers, C. Cédric Le Goater (2): MAINTAINERS: Remove myself from the PowerNV machines MAINTAINERS: Remove mysel

Re: [RFC 21/21] arm/cpu-features: Document custom vcpu model

On Fri, Oct 25, 2024 at 12:17:40PM +0200, Eric Auger wrote: > From: Cornelia Huck > > Add some documentation for the custom model. > > Signed-off-by: Eric Auger > Signed-off-by: Cornelia Huck > --- > docs/system/arm/cpu-features.rst | 55 +++- > 1 file changed, 47

Re: [PATCH] MAINTAINERS: Remove myself as reviewer

On 28/10/2024 09:51, David Gibson wrote: I've now well and truly moved on from ppc and qemu maintenance. I'm occupied with other things and am pretty much just ignoring mails on these topics I'm CCed on. Time to remove myself. I'm still listed as a reviewer for Device Tree, I'll keep this for

Re: [PATCH 09/36] next-cube: move SCSI CSRs from next-pc to the next-scsi device

On 28/10/2024 16:21, Thomas Huth wrote: Am Wed, 23 Oct 2024 09:58:25 +0100 schrieb Mark Cave-Ayland : The SCSI CSRs are located within the SCSI subsystem of the NeXT PC (Peripheral Contoller) which is now modelled as a separate QEMU device. Add a new VMStateDescription for the next-scsi devic

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