On Fri, Aug 9, 2024 at 11:27 AM Zhao Liu wrote:
>
> On Fri, Aug 09, 2024 at 10:40:53AM +0530, Ani Sinha wrote:
> > Date: Fri, 9 Aug 2024 10:40:53 +0530
> > From: Ani Sinha
> > Subject: [PATCH v2 1/2] kvm: replace fprintf with error_report() in
> > kvm_init() for error conditions
> > X-Mailer: g
Zhao Liu writes:
> On Tue, Jul 30, 2024 at 10:10:23AM +0200, Markus Armbruster wrote:
>> Date: Tue, 30 Jul 2024 10:10:23 +0200
>> From: Markus Armbruster
>> Subject: [PATCH 09/18] qapi/machine: Rename CpuS390* to S390Cpu, and drop
>> 'prefix'
>>
>> QAPI's 'prefix' feature can make the connecti
Hi Shiyang,
kernel test robot noticed the following build errors:
[auto build test ERROR on tip/x86/core]
[also build test ERROR on cxl/next linus/master v6.11-rc2 next-20240809]
[cannot apply to cxl/pending]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when
Hi Shiyang,
kernel test robot noticed the following build errors:
[auto build test ERROR on tip/x86/core]
[also build test ERROR on cxl/next linus/master v6.11-rc2 next-20240809]
[cannot apply to cxl/pending]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when
Em Fri, 9 Aug 2024 08:26:09 +0200
Mauro Carvalho Chehab escreveu:
> Em Fri, 9 Aug 2024 00:41:37 +0200
> Mauro Carvalho Chehab escreveu:
>
> > > You should be able to use e.g.
> > >
> > > legacy.py's QEMUMonitorProtocol class for synchronous connections, e.g.
> > >
> > > from qemu.qmp.legacy i
On 8/8/2024 11:27 PM, Xin Li wrote:
+ if (f[FEAT_7_1_EAX] & CPUID_7_1_EAX_FRED) {
+ /* FRED injected-event data (0x2052). */
+ kvm_msr_entry_add(cpu, MSR_IA32_VMX_VMCS_ENUM, 0x52);
HMM, I have the questions when I check the FRED spec.
Section 9.3.4 said, (for injected-event d
From: Hyman Huang
The previous patchset:
https://lore.kernel.org/qemu-devel/cover.1722957352.git.yong.hu...@smartx.com/
does not made the necessary changes and tests for the upstream version.
This patchset works for that:
1. Move the guestperf to scripts directory suggested by Fabiano Rosas
2. M
From: Hyman Huang
Signed-off-by: Hyman Huang
Reviewed-by: Fabiano Rosas
---
scripts/migration/guestperf/comparison.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/migration/guestperf/comparison.py
b/scripts/migration/guestperf/comparison.py
index 42cc0372d1..40e
From: Hyman Huang
The initrd-stress.img was compiled by specifying the
target, to make it easier for developers to play the
guestperf tool, make it built by default.
Signed-off-by: Hyman Huang
---
tests/migration/meson.build | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --gi
From: Hyman Huang
Guestperf was designed to test the performance of migration,
with a loose connection to the fundamental test cases of QEMU.
To improve the repository's structure, move it to the scripts
directory.
Signed-off-by: Hyman Huang
---
MAINTAINERS
From: Hyman Huang
The way to enable multifd migration has been changed by commit,
82137e6c8c (migration: enforce multifd and postcopy preempt to
be set before incoming), and guestperf has not made the
necessary changes. If multifd migration had been enabled in the
previous manner, the following e
From: Hyman Huang
Guestperf tool does not cover the multifd compression option
currently, it is worth supporting so that developers can
analysis the migration performance with different
compression algorithms.
Multifd support 4 compression algorithms currently:
zlib, zstd, qpl, uadk
To request
This is not a clean patch, but does fix a problem I hit with TB
invalidation due to the target software writing to memory with TBs.
Lockup messages are triggering in Linux due to page clearing taking a
long time when a code page has been freed, because it takes a lot of
notdirty notifiers, which m
gltm, thanks!
Reviewed-by: Claudio Fontana
On 8/9/24 07:10, Ani Sinha wrote:
> Refactoring the core logic around KVM_CREATE_VM into its own separate function
> so that it can be called from other functions in subsequent patches. There is
> no functional change in this patch.
>
> CC: pbonz...@re
This patch adds a new instruction `mnret`. `mnret` is an M-mode-only
instruction that uses the values in `mnepc` and `mnstatus` to return to the
program counter, privilege mode, and virtualization mode of the
interrupted context.
Signed-off-by: Frank Chang
Signed-off-by: Tommy Wu
---
target/ris
Because the RNMI interrupt trap handler address is implementation defined.
We add the `rnmi-interrupt-vector` and `rnmi-exception-vector` as the property
of the harts. It’s very easy for users to set the address based on their
expectation. This patch also adds the functionality to handle the RNMI s
The boolean variable `ext_smrnmi` is used to determine whether the
Smrnmi extension exists.
Signed-off-by: Frank Chang
Signed-off-by: Tommy Wu
---
target/riscv/cpu_cfg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index 8b272fb826..ae2a945
This patchset added support for Smrnmi Extension in RISC-V.
There are four new CSRs and one new instruction added to allow NMI to be
resumable in RISC-V, which are:
=
* mnscratch (0x740)
* mnepc (0x741)
* mncause (0x742)
*
The Smrnmi extension adds the `MNSCRATCH`, `MNEPC`, `MNCAUSE`,
`MNSTATUS` CSRs.
Signed-off-by: Frank Chang
Signed-off-by: Tommy Wu
Reviewed-by: Alistair Francis
---
target/riscv/cpu.c | 5 +++
target/riscv/cpu.h | 4 ++
target/riscv/cpu_bits.h | 11 ++
target/riscv/csr.c |
This adds the properties for ISA extension Smrnmi.
Signed-off-by: Frank Chang
Signed-off-by: Tommy Wu
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 98e6940e93..7ee7b9c4ee 100644
--- a/target/riscv/cpu.c
+++ b/target/ri
Em Thu, 8 Aug 2024 19:33:32 -0400
John Snow escreveu:
> > > Then here you'd use qmp.cmd (raises exception on QMPError) or qmp.cmd_raw
> > > or qmp.cmd_obj (returns the QMP response as the return value even if it
> > was
> > > an error.)
> >
> > Good to know, I'll try and see what fits best.
(Widening Cc list)
On 9/8/24 09:47, Nicholas Piggin wrote:
This is not a clean patch, but does fix a problem I hit with TB
invalidation due to the target software writing to memory with TBs.
Lockup messages are triggering in Linux due to page clearing taking a
long time when a code page has bee
On Fri, Aug 09, 2024 at 03:43:33PM +0800, yong.hu...@smartx.com wrote:
> From: Hyman Huang
>
> The initrd-stress.img was compiled by specifying the
> target, to make it easier for developers to play the
> guestperf tool, make it built by default.
If you're going to do this, then you will need to
Hi Ani,
On 9/8/24 08:49, Ani Sinha wrote:
error_report() is more appropriate for error situations. Replace fprintf with
error_report. Cosmetic. No functional change.
CC: qemu-triv...@nongnu.org
CC: zhao1@intel.com
(Pointless to carry Cc line when patch is already reviewed next line)
Rev
On Thu, Aug 08, 2024 at 06:24:10PM +, Alejandro Zeise wrote:
> > On Wed, Aug 07, 2024 at 07:51:10PM +, Alejandro Zeise wrote:
> > > Implements the new hashing API in the gcrypt hash driver.
> > > Supports creating/destroying a context, updating the context with
> > > input data and obtaini
On 8/8/24 20:26, Markus Armbruster wrote:
Since we neglect to document the members of GrabToggleKeys, their
description in the QEMU QMP Reference manual is "Not documented". Fix
that.
Signed-off-by: Markus Armbruster
---
qapi/common.json | 14 +-
qapi/pragma.json | 1 -
2 file
On 8/8/24 20:26, Markus Armbruster wrote:
Since we neglect to document the members of QCryptoAkCipherKeyType,
their description in the QEMU QMP Reference manual is "Not
documented". Fix that.
Signed-off-by: Markus Armbruster
---
qapi/crypto.json | 4
qapi/pragma.json | 1 -
2 files ch
On 8/8/24 20:26, Markus Armbruster wrote:
Since we neglect to document a member of PciMemoryRegion, its
description in the QEMU QMP Reference manual is "Not documented". Fix
that.
Signed-off-by: Markus Armbruster
---
qapi/pci.json| 2 ++
qapi/pragma.json | 1 -
2 files changed, 2 inser
On 8/8/24 20:26, Markus Armbruster wrote:
Since we neglect to document the argument of query-rocker and
query-rocker-ports, their description in the QEMU QMP Reference manual
is "Not documented". Fix that.
Signed-off-by: Markus Armbruster
---
qapi/pragma.json | 4 +---
qapi/rocker.json | 4
Em Thu, 08 Aug 2024 16:45:51 +0200
Markus Armbruster escreveu:
> Igor Mammedov writes:
>
> > On Thu, 8 Aug 2024 16:11:41 +0200
> > Mauro Carvalho Chehab wrote:
> >
> >> Em Thu, 08 Aug 2024 10:50:33 +0200
> >> Markus Armbruster escreveu:
> >>
> >> > Mauro Carvalho Chehab writes:
> >>
Hi Markus,
On 8/8/24 20:26, Markus Armbruster wrote:
Since we neglect to document several members of ChardevBackendKind,
their description in the QEMU QMP Reference manual is "Not
documented". Fix that, and improve the existing member documentation.
Signed-off-by: Markus Armbruster
---
qapi
On Fri, Aug 09, 2024 at 12:38:02AM -0700, Xin Li wrote:
> Date: Fri, 9 Aug 2024 00:38:02 -0700
> From: Xin Li
> Subject: Re: [PATCH v1 3/3] target/i386: Raise the highest index value used
> for any VMCS encoding
>
> On 8/8/2024 11:27 PM, Xin Li wrote:
> > > > + if (f[FEAT_7_1_EAX] & CPUID_7_1
On Thu, Aug 08, 2024 at 11:38:11PM -0700, Xin Li wrote:
> Date: Thu, 8 Aug 2024 23:38:11 -0700
> From: Xin Li
> Subject: Re: [PATCH v1 2/3] target/i386: Add VMX control bits for nested
> FRED support
>
> > > > > @@ -1450,7 +1450,7 @@ FeatureWordInfo
> > > > > feature_word_info[FEATURE_WORDS] =
On 8/8/24 23:31, Octavian Purdila wrote:
+static Property flexspi_properties[] = {
+DEFINE_PROP_UINT32("mmap_base", FlexSpiState, mmap_base, 0),
+DEFINE_PROP_UINT32("mmap_size", FlexSpiState, mmap_size, 0),
Preferably simply 'size'.
+DEFINE_PROP_END_OF_LIST(),
+};
+
+static void
On Fri, 9 Aug 2024 at 04:52, Gavin Shan wrote:
>
> kvm_arch_get_default_type() and kvm_arm_get_max_vm_ipa_size() are
> interchangeable since the type is equivalent to IPA size (bits)
> with one exception that IPA size (bits) is 40 when the type is zero.
Well, sort of, but they're conceptually dif
On Fri, 9 Aug 2024 at 04:52, Gavin Shan wrote:
>
> virt_kvm_type() and mc->kvm_type() are only needed when CONFIG_KVM
> is enabled. It's reasonable to hide them when CONFIG_KVM is disabled.
>
> Signed-off-by: Gavin Shan
> ---
> hw/arm/virt.c | 4
> 1 file changed, 4 insertions(+)
>
> diff -
On Fri, Aug 9, 2024 at 4:34 PM Daniel P. Berrangé
wrote:
> On Fri, Aug 09, 2024 at 03:43:33PM +0800, yong.hu...@smartx.com wrote:
> > From: Hyman Huang
> >
> > The initrd-stress.img was compiled by specifying the
> > target, to make it easier for developers to play the
> > guestperf tool, make i
Kevin Wolf writes:
> Am 30.07.2024 um 10:10 hat Markus Armbruster geschrieben:
>> camel_to_upper() converts its argument from camel case to upper case
>> with '_' between words. Used for generated enumeration constant
>> prefixes.
>>
>> When some of the words are spelled all caps, where exactly
Philippe Mathieu-Daudé writes:
> Hi Markus,
>
> On 8/8/24 20:26, Markus Armbruster wrote:
>> Since we neglect to document several members of ChardevBackendKind,
>> their description in the QEMU QMP Reference manual is "Not
>> documented". Fix that, and improve the existing member documentation.
On Tue, Aug 06, 2024 at 01:31:51PM -0700, Octavian Purdila wrote:
> On Tue, Aug 6, 2024 at 7:06 AM Alex Bennée wrote:
> >
> > Octavian Purdila writes:
> >
> > > Picked from:
> > >
> > > https://github.com/nxp-mcuxpresso/mcux-soc-svd/blob/main/MIMXRT595S/MIMXRT595S_cm33.xml
> > >
> > > NOTE: the f
On Tue, 6 Aug 2024 at 19:13, Yan Vugenfirer wrote:
> Do we check that the MAC from the command line or HW was formed
> correctly and doesn't include multicast bit?
>
> Best regards,
> Yan.
>
> I didn't include a check for this, but it seems the vhost also doesn't
have this kind of verification. I
On Wed, 7 Aug 2024 at 10:36, Jason Wang wrote:
> On Tue, Aug 6, 2024 at 5:44 PM Cindy Lu wrote:
> >
> > On Tue, 6 Aug 2024 at 11:07, Jason Wang wrote:
> > >
> > > On Tue, Aug 6, 2024 at 8:58 AM Cindy Lu wrote:
> > > >
> > > > When using a VDPA device, it is important to ensure that
> > > > the
Hi Dmitry,
On 29/1/24 08:39, Dmitry Osipenko wrote:
virgl_renderer_resource_get_info() returns errno and not -1 on error.
So basically we were ignoring all errors...
Could some errors just be safely ignored? Because apparently
this patch now gives troubles, see:
https://gitlab.com/qemu-projec
On Tue, 6 Aug 2024 at 21:30, Michael S. Tsirkin wrote:
>
> On Tue, Aug 06, 2024 at 08:58:01AM +0800, Cindy Lu wrote:
> > When using a VDPA device, it is important to ensure that
> > the MAC address in the hardware matches the MAC address
> > from the QEMU command line.
> > This will allow the devi
On 9/8/24 00:30, Octavian Purdila wrote:
On Thu, Aug 8, 2024 at 2:56 PM John Snow wrote:
diff --git a/configure b/configure
index 5ad1674ca5..811bfa5d54 100755
--- a/configure
+++ b/configure
@@ -956,7 +956,7 @@ mkvenv="$python ${source_path}/python/scripts/mkvenv.py"
# Finish preparing th
On 8/9/24 7:00 PM, Peter Maydell wrote:
On Fri, 9 Aug 2024 at 04:52, Gavin Shan wrote:
virt_kvm_type() and mc->kvm_type() are only needed when CONFIG_KVM
is enabled. It's reasonable to hide them when CONFIG_KVM is disabled.
Signed-off-by: Gavin Shan
---
hw/arm/virt.c | 4
1 file ch
On Thu, Aug 08, 2024 at 01:56:35PM +1000, Alistair Francis wrote:
> [EXTERNAL MAIL]
>
> On Mon, Jul 15, 2024 at 7:58 PM Ethan Chen via wrote:
> >
> > Support basic functions of IOPMP specification v0.9.1 rapid-k model.
> > The specification url:
> > https://github.com/riscv-non-isa/iopmp-spec/rel
On Fri, Aug 9, 2024 at 11:30 AM Philippe Mathieu-Daudé
wrote:
>
> On 9/8/24 00:30, Octavian Purdila wrote:
> > On Thu, Aug 8, 2024 at 2:56 PM John Snow wrote:
>
>
> >>> diff --git a/configure b/configure
> >>> index 5ad1674ca5..811bfa5d54 100755
> >>> --- a/configure
> >>> +++ b/configure
> >>> @
On Wed, Aug 07, 2024 at 02:43:20PM +0200, Anthony Harivel wrote:
> Date: Wed, 7 Aug 2024 14:43:20 +0200
> From: Anthony Harivel
> Subject: [PATCH 1/1] target/i386: Fix arguments for vmsr_read_thread_stat()
>
> Snapshot of the stat utime and stime for each thread, taken before and
> after the pau
On Thu, Aug 08, 2024 at 02:25:04PM +1000, Alistair Francis wrote:
>
> On Mon, Jul 15, 2024 at 8:15 PM Ethan Chen via wrote:
> >
> > The iopmp_setup_cpu() function configures the RISCV CPU to support IOPMP and
> > specifies the CPU's RRID.
> >
> > Signed-off-by: Ethan Chen
> > ---
> > hw/misc/ri
On 8/9/24 6:59 PM, Peter Maydell wrote:
On Fri, 9 Aug 2024 at 04:52, Gavin Shan wrote:
kvm_arch_get_default_type() and kvm_arm_get_max_vm_ipa_size() are
interchangeable since the type is equivalent to IPA size (bits)
with one exception that IPA size (bits) is 40 when the type is zero.
Well,
From: lxx <1733205...@qq.com>
This patch adds support for the Zilsd and Zclsd extension,
which is documented at https://github.com/riscv/riscv-zilsd/releases/tag/v0.9.0
Co-developed-by: SUN Dongya
Co-developed-by: LIU Xu
Co-developed-by: ZHAO Fujin
---
target/riscv/cpu.c
Thanks for your previous reply.
Here are some explanations for the previous questions:
1. In the previous version, the 'int flag' was used to distinguish
whether an instruction was 'ld' or 'ldsp' for different processing. In
this version, a boolean type 'is_1dsp' is defined to make the code
cleare
On Fri, Aug 09, 2024 at 11:42:38AM +0200, Paolo Bonzini wrote:
> On Fri, Aug 9, 2024 at 11:30 AM Philippe Mathieu-Daudé
> wrote:
> >
> > On 9/8/24 00:30, Octavian Purdila wrote:
> > > On Thu, Aug 8, 2024 at 2:56 PM John Snow wrote:
> >
> >
> > >>> diff --git a/configure b/configure
> > >>> index
On 8/9/24 1:51 PM, Gavin Shan wrote:
kvm_arch_get_default_type() and kvm_arm_get_max_vm_ipa_size() are
interchangeable since the type is equivalent to IPA size (bits)
with one exception that IPA size (bits) is 40 when the type is zero.
Replace kvm_arm_get_max_vm_ipa_size() with kvm_arch_get_defa
On Thu, Aug 08, 2024 at 01:56:35PM +1000, Alistair Francis wrote:
> [EXTERNAL MAIL]
>
> On Mon, Jul 15, 2024 at 7:58 PM Ethan Chen via wrote:
> >
> > Support basic functions of IOPMP specification v0.9.1 rapid-k model.
> > The specification url:
> > https://github.com/riscv-non-isa/iopmp-spec/rel
On Thu, 08 Aug 2024 19:51:26 +0200
Markus Armbruster wrote:
> Hi Jonathan,
>
> You added the type in commit 415442a1b4a (hw/mem/cxl_type3: Add CXL RAS
> Error Injection Support.) The doc comment is missing a description of
> @retry-threshold. Can you supply me one? I'm happy to do the actual
Jonathan Cameron writes:
> On Thu, 08 Aug 2024 19:51:26 +0200
> Markus Armbruster wrote:
>
>> Hi Jonathan,
>>
>> You added the type in commit 415442a1b4a (hw/mem/cxl_type3: Add CXL RAS
>> Error Injection Support.) The doc comment is missing a description of
>> @retry-threshold. Can you supply
On Thu, Aug 08, 2024 at 02:23:56PM +1000, Alistair Francis wrote:
>
> On Mon, Jul 15, 2024 at 8:13 PM Ethan Chen via wrote:
> >
> > To enable system memory transactions through the IOPMP, memory regions must
> > be moved to the IOPMP downstream and then replaced with IOMMUs for IOPMP
> > translat
On Thu, Aug 08, 2024 at 02:01:13PM +1000, Alistair Francis wrote:
>
> On Mon, Jul 15, 2024 at 8:15 PM Ethan Chen via wrote:
> >
> > - Add 'iopmp=on' option to enable IOPMP. It adds an iopmp device virt
> > machine
> > to protect all regions of system memory, and configures RRID of CPU.
> >
> >
On 2024/08/08 22:55, Peter Xu wrote:
On Thu, Aug 08, 2024 at 08:43:22PM +0900, Akihiko Odaki wrote:
On 2024/08/07 5:41, Peter Xu wrote:
On Mon, Aug 05, 2024 at 04:27:43PM +0900, Akihiko Odaki wrote:
On 2024/08/04 22:08, Peter Xu wrote:
On Sun, Aug 04, 2024 at 03:49:45PM +0900, Akihiko Odaki w
Hi Daniel. Sorry, I don't notice that this is a fixed issue by
b8a7f51f59e28d5a8e0c07ed3919cc9695560ed2(chardev/char-socket: set
s->listener = NULL in char_socket_finalize).
the following process can lead this issue：
char_socket_finalize->object_unref(OBJECT(s->listener)); // free
io_source, free
Hi Shiyang,
kernel test robot noticed the following build warnings:
[auto build test WARNING on tip/x86/core]
[also build test WARNING on cxl/next linus/master v6.11-rc2 next-20240809]
[cannot apply to cxl/pending]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when
Set local_err to NULL after it has been freed in error_report_err(). This
avoids triggering assert(*errp == NULL) failure in error_setv() when
local_err is reused in the loop.
Signed-off-by: Alexander Ivanov
---
util/module.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/util/module.c b/ut
After updating QEMU modules previously executed QEMU processes crash
on module loading. It happens because error_setg() calls with a not NULL
errp argument.
There is a discussion - https://issues.redhat.com/browse/RHEL-29848
Alexander Ivanov (1):
module: Prevent crash by resetting local_err in
On 8/9/24 14:13, Alexander Ivanov wrote:
Set local_err to NULL after it has been freed in error_report_err(). This
avoids triggering assert(*errp == NULL) failure in error_setv() when
local_err is reused in the loop.
Signed-off-by: Alexander Ivanov
---
util/module.c | 1 +
1 file changed, 1
I apologize for the delay.
Zhao Liu writes:
> On Thu, Aug 01, 2024 at 01:28:27PM +0200, Markus Armbruster wrote:
[...]
>> Can you provide a brief summary of the design alternatives that have
>> been proposed so far? Because I've lost track.
>
> No problem!
>
> Currently, we have the following
On Thu, Aug 08, 2024 at 08:26:34PM GMT, Markus Armbruster wrote:
> Since we neglect to document the members of JSONType, their
> description in the QEMU QMP Reference manual is "Not documented". Fix
> that.
>
> Signed-off-by: Markus Armbruster
> ---
> qapi/introspect.json | 16
Zhaoxin currently uses two vendors: "Shanghai" and "Centaurhauls".
It is important to note that the latter now belongs to Zhaoxin. Therefore,
this patch replaces CPUID_VENDOR_VIA with CPUID_VENDOR_ZHAOXIN1.
The previous CPUID_VENDOR_VIA macro was only defined but never used in
QEMU, making this ch
Add new CPUID feature flags for various Zhaoxin PadLock extensions.
These definitions will be used for Zhaoxin CPU models.
Signed-off-by: EwanHai
Reviewed-by: Zhao Liu
---
target/i386/cpu.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/target/i386/cpu.h b/target/i38
This patch series introduces support for the Zhaoxin Yongfeng CPU model and
includes improvements and updates specific to Zhaoxin CPUs (including vendor
"Centaurhauls" and "Shanghai"). The changes ensure that QEMU can correctly
identify and emulate Zhaoxin CPUs, accurately reflecting their function
Zhaoxin CPUs (including vendors "Shanghai" and "Centaurhauls") handle the
CMPLegacy bit similarly to Intel CPUs. Therefore, this commit masks the
CMPLegacy bit in CPUID[0x8001].ECX for Zhaoxin CPUs, just as it is done
for Intel CPUs.
AMD uses the CMPLegacy bit (CPUID[0x8001].ECX.bit1) alon
Introduce support for the Zhaoxin Yongfeng CPU model.
The Zhaoxin Yongfeng CPU is Zhaoxin's latest server CPU.
This new cpu model ensure that QEMU can correctly emulate the Zhaoxin
Yongfeng CPU, providing accurate functionality and performance characteristics.
Signed-off-by: EwanHai
Reviewed-by:
Peter Xu writes:
> On Thu, Aug 08, 2024 at 10:47:28AM -0400, Michael S. Tsirkin wrote:
>> On Thu, Aug 08, 2024 at 10:15:36AM -0400, Peter Xu wrote:
>> > On Thu, Aug 08, 2024 at 07:12:14AM -0400, Michael S. Tsirkin wrote:
>> > > This is too big of a hammer. People already use what you call "cross
yong.hu...@smartx.com writes:
> From: Hyman Huang
>
> Guestperf was designed to test the performance of migration,
> with a loose connection to the fundamental test cases of QEMU.
>
> To improve the repository's structure, move it to the scripts
> directory.
>
> Signed-off-by: Hyman Huang
> ---
yong.hu...@smartx.com writes:
> From: Hyman Huang
>
> The initrd-stress.img was compiled by specifying the
> target, to make it easier for developers to play the
> guestperf tool, make it built by default.
>
> Signed-off-by: Hyman Huang
> ---
> tests/migration/meson.build | 5 +++--
This could
On Thu, Aug 8, 2024 at 5:47 PM Peter Maydell wrote:
>
> On Thu, 8 Aug 2024 at 13:37, David Hildenbrand wrote:
> >
> > On 08.08.24 14:25, Peter Maydell wrote:
> > > On Tue, 6 Aug 2024 at 17:08, Juraj Marcin wrote:
> > >>
> > >> LegacyReset does not pass ResetType to the reset callback method, whi
On 8/9/24 14:13, Alexander Ivanov wrote:
> Set local_err to NULL after it has been freed in error_report_err(). This
> avoids triggering assert(*errp == NULL) failure in error_setv() when
> local_err is reused in the loop.
>
> Signed-off-by: Alexander Ivanov
> ---
> util/module.c | 1 +
> 1 file
On 8/9/24 12:16, Philippe Mathieu-Daudé wrote:
> Hi Dmitry,
>
> On 29/1/24 08:39, Dmitry Osipenko wrote:
>> virgl_renderer_resource_get_info() returns errno and not -1 on error.
>
> So basically we were ignoring all errors...
>
> Could some errors just be safely ignored? Because apparently
> thi
Our current usage of MMU indexes when EL3 is AArch32 is confused.
Architecturally, when EL3 is AArch32, all Secure code runs under the
Secure PL1&0 translation regime:
* code at EL3, which might be Mon, or SVC, or any of the
other privileged modes (PL1)
* code at EL0 (Secure PL0)
This is diff
We have a long comment describing the Arm architectural translation
regimes and how we map them to QEMU MMU indexes. This comment has
got a bit out of date:
* FEAT_SEL2 allows Secure EL2 and corresponding new regimes
* FEAT_RME introduces Realm state and its translation regimes
* We now model
Our current usage of MMU indexes when EL3 is AArch32 is confused.
Architecturally, when EL3 is AArch32, all Secure code runs under the
Secure PL1&0 translation regime:
* code at EL3, which might be Mon, or SVC, or any of the
other privileged modes (PL1)
* code at EL0 (Secure PL0)
This is diff
On Sat, 25 May 2024 at 14:41, Bernhard Beschow wrote:
>
>
>
> Am 5. März 2024 13:52:34 UTC schrieb Peter Maydell :
> >From: Richard Henderson
> >
> >If translation is disabled, the default memory type is Device, which
> >requires alignment checking. This is more optimally done early via
> >the M
Although defaulting the handshake limit to 10 seconds was a nice QoI
change to weed out intentionally slow clients, it can interfere with
integration testing done with manual NBD_OPT commands over 'nbdsh
--opt-mode'. Expose a command line option to allow the user to alter
the timeout away from the
Originally posted as the tail part of this v4 series:
https://lists.gnu.org/archive/html/qemu-devel/2024-08/msg01154.html
but not deemed necessary for 9.1 as it is a feature addition that was
not proposed before soft freeze (even if the point of the feature is
to enable interop testing to revert b
Although defaulting the handshake limit to 10 seconds was a nice QoI
change to weed out intentionally slow clients, it can interfere with
integration testing done with manual NBD_OPT commands over 'nbdsh
--opt-mode'. Expose a QMP knob 'handshake-max-secs' to allow the user
to alter the timeout awa
In commit bb71846325e23 we added some macro magic to avoid
variable-shadowing when using some of our more complicated
macros. One of the internal components of this is a macro
named MAKE_IDENTFIER. Fix the typo in its name: it should
be MAKE_IDENTIFIER.
Commit created with
sed -i -e 's/MAKE_IDENT
nce commit 0f397dcfecc9211d12c2c720c01eb32f0eaa7d23:
Merge tag 'pull-nbd-2024-08-08' of https://repo.or.cz/qemu/ericb into staging
(2024-08-09 08:40:37 +1000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20240809
for you to
From: Eric Blake
Add in the missing space in the section header.
Fixes: 1084159b31 ("qapi: deprecate drive-backup", v6.2.0)
Signed-off-by: Eric Blake
Signed-off-by: Peter Maydell
---
docs/interop/live-block-operations.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a
Fix some minor grammar nits in the prl-xml documentation.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Reviewed-by: Eric Blake
Message-id: 20240801170131.3977807-6-peter.mayd...@linaro.org
---
docs/interop/prl-xml.rst | 73 +---
1 file changed
From: Richard Henderson
With pcrel, we cannot check the guarded page bit at translation
time, as different mappings of the same physical page may or may
not have the GP bit set.
Instead, add a couple of helpers to check the page at runtime,
after all other filters that might obviate the need for
Convert parallels.txt to rST format.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Reviewed-by: Eric Blake
Message-id: 20240801170131.3977807-4-peter.mayd...@linaro.org
---
MAINTAINERS | 2 +-
docs/interop/index.rst| 1
From: Mauro Carvalho Chehab
Having magic numbers inside the code is not a good idea, as it
is error-prone. So, instead, create a macro with the number
definition.
Link:
https://lore.kernel.org/qemu-devel/CAFEAcA-PYnZ-32MRX+PgvzhnoAV80zBKMYg61j2f=ohagfw...@mail.gmail.com/
Signed-off-by: Mauro C
Convert nbd.txt to rST format.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Reviewed-by: Eric Blake
Message-id: 20240801170131.3977807-3-peter.mayd...@linaro.org
---
MAINTAINERS| 2 +-
docs/interop/index.rst | 1 +
docs/interop/nbd.rst | 89 ++
Convert the rocker.txt specification document to rST format. We make
extensive use of the :: marker to introduce a literal block for all
the tables and ASCII art, rather than trying to convert the tables to
rST table syntax. This produces a valid rST document without needing
a huge diff.
Signed-
From: Jianzhou Yue
The real period is zero when both period and period_frac are zero.
Check the method ptimer_set_freq, if freq is larger than 1000 MHz,
the period is zero, but the period_frac is not, in this case, the
ptimer will work but the current code incorrectly recognizes that
the ptimer i
From: Alex Richardson
In the PMUv3, a new AArch32 64-bit (MCRR/MRRC) accessor for the
PMCCNTR was added. In QEMU we forgot to implement this, so only
provide the 32-bit accessor. Since we have a 64-bit PMCCNTR
sysreg for AArch64, adding the 64-bit AArch32 version is easy.
We add the PMCCNTR to t
Convert prl-xml.txt to rST format.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Reviewed-by: Eric Blake
Message-id: 20240801170131.3977807-5-peter.mayd...@linaro.org
---
MAINTAINERS | 1 +
docs/interop/index.rst | 1 +
docs/interop/prl-xml.rst | 187 ++
Hi Richard,
On 2/2/24 06:49, Richard Henderson wrote:
Rather than adjust env->hflags so that the value computed
by cpu_mmu_index() changes, compute the mmu_idx that we
want directly and pass it down.
Introduce symbolic constants for MMU_{KERNEL,ERL}_IDX.
Reviewed-by: Philippe Mathieu-Daudé
Si
On Wed, Aug 07, 2024 at 01:19:55PM +1000, Richard Henderson wrote:
On 8/7/24 10:06, Deepak Gupta wrote:
int prot = 0;
-if (pte & PTE_R) {
+/*
+ * If PTE has read bit in it or it's shadow stack page,
+ * then reads allowed
+ */
+if ((pte & PTE_R) || sstack_page) {
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