On Fri Jul 5, 2024 at 3:12 PM AEST, David Gibson wrote:
> On Fri, Jul 05, 2024 at 02:40:19PM +1000, Nicholas Piggin wrote:
> > On Fri Jul 5, 2024 at 11:41 AM AEST, David Gibson wrote:
> > > On Fri, Jul 05, 2024 at 11:18:47AM +1000, Nicholas Piggin wrote:
> > > > On Thu Jul 4, 2024 at 10:15 PM AEST,
On Thu, Jul 4, 2024 at 9:26 PM Pierrick Bouvier
wrote:
> > Patches 9-10 deal with how to define new subclasses in Rust. They are
> > a lot less polished and less ready. There is probably a lot of polish
> > that could be applied to make the code look nicer, but I guess there is
> > always time t
> -Original Message-
> From: Peter Xu
> Sent: Thursday, July 4, 2024 11:36 PM
> To: Liu, Yuan1
> Cc: Wang, Yichen ; Paolo Bonzini
> ; Daniel P. Berrangé ; Eduardo
> Habkost ; Marc-André Lureau
> ; Thomas Huth ; Philippe
> Mathieu-Daudé ; Fabiano Rosas ; Eric
> Blake ; Markus Armbruster ;
On Wed, Jul 03, 2024 at 06:49:30PM GMT, Michael S. Tsirkin wrote:
On Tue, Jun 18, 2024 at 12:00:30PM +0200, Stefano Garzarella wrote:
As discussed with Michael and Markus [1], this version also includes the patch
on which v7 depended to simplify the merge in Michael's tree.
The series is all re
They don't need to be in the global trace-events file and can have a
local trace header. Also add address_space_map tracepoint for tracking
mapping behaviour.
Message-Id: <20240628124258.832466-5-alex.ben...@linaro.org>
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
---
v2
- droppe
From: Akihiko Odaki
clang version 18.1.6 assumes a register is 64-bit by default and
complains if a 32-bit value is given. Explicitly specify register width
when passing a 32-bit value.
Signed-off-by: Akihiko Odaki
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20240627-tcg-v2-3-1690a8133...
In fact any other accelerator would be pointless as the point is to
exercise the TCI accelerator anyway.
Signed-off-by: Alex Bennée
---
.gitlab-ci.d/buildtest.yml | 2 +-
.gitlab-ci.d/crossbuilds.yml | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/.gitlab-ci.d/buildtest.
Really the problem here is the return values of fit_load_[kernel|fdt]() are a
little all over the place. However we don't want to somehow get
through not having set kernel_end and having it just be random unused
data.
The compiler complained on an --enable-gcov build:
In file included from ../.
The commit 4f9a8315e6 (gitlab-ci.d/crossbuilds: Drop the i386 system
emulation job) was a little too aggressive dropping testing for 32 bit
system builds. Partially revert but using the debian-i686 cross build
images this time as fedora has deprecated the 32 bit stuff.
As the SEV breakage gets in
From: Richard Henderson
Define the variable to the compiler flag used, not "y".
This avoids replication of the compiler flag itself.
Signed-off-by: Richard Henderson
Reviewed-by: Akihiko Odaki
Message-Id: <20240630190050.160642-3-richard.hender...@linaro.org>
Signed-off-by: Alex Bennée
---
t
I guess we never noticed and tried to build with this cross image. Fix
the toolchain prefix so we actually build 32 bit images.
Message-Id: <20240628124258.832466-2-alex.ben...@linaro.org>
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
---
tests/docker/dockerfiles/debian-i686-cross.d
From: Richard Henderson
This avoids a memcpy to the stack when compiled with clang.
Since we don't enable optimization, nor provide memcpy,
this results in an undefined symbol error at link time.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Akihiko Odaki
M
From: Akihiko Odaki
irg expects 64-bit integers. Passing a 32-bit integer results in
compilation failure with clang version 18.1.6.
Signed-off-by: Akihiko Odaki
Message-Id: <20240627-tcg-v2-4-1690a8133...@daynix.com>
Reviewed-by: Akihiko Odaki
Message-Id: <20240630190050.160642-6-richard.hende
From: Richard Henderson
Clang does not support IWMXT instructions.
Fall back to the external assembler.
Signed-off-by: Richard Henderson
Reviewed-by: Akihiko Odaki
Message-Id: <20240630190050.160642-11-richard.hender...@linaro.org>
Signed-off-by: Alex Bennée
---
tests/tcg/arm/Makefile.target
From: Akihiko Odaki
clang version 18.1.6 does not support x constraint for AArch64.
Use w instead.
Signed-off-by: Akihiko Odaki
Message-Id: <20240627-tcg-v2-5-1690a8133...@daynix.com>
Reviewed-by: Akihiko Odaki
Message-Id: <20240630190050.160642-7-richard.hender...@linaro.org>
Signed-off-by: A
From: Richard Henderson
Clang requires the architecture to be set properly
in order to assemble the half-precision instructions.
Signed-off-by: Richard Henderson
Reviewed-by: Akihiko Odaki
Message-Id: <20240630190050.160642-13-richard.hender...@linaro.org>
Signed-off-by: Alex Bennée
---
test
Hi,
This is a grab bag of fixes and clean-ups as we swiftly approach the
soft freeze deadline. The i386 TCG fix has been dropped now rth's TCG
clean-ups have been merged. I've also taken a series from Richard that
built on Akihiko's TCG test cleanups. There is one new fix I came
across when doing
From: Richard Henderson
Clang 14 generates
/home/rth/qemu/src/tests/tcg/arm/fcvt.c:431:9: error: invalid operand for
instruction
asm("mrc p10, 7, r1, cr1, cr0, 0\n\t"
^
:1:6: note: instantiated into assembly here
mrc p10, 7, r1, cr1, cr0, 0
^
/home/rth/qemu/src/t
We are interested in the particular instruction so we should use a
stable record for it. We could bring this down to physical address but
for now vaddr + disas seems to do the trick.
Signed-off-by: Alex Bennée
---
tests/plugin/insn.c | 76 ++---
1 file cha
From: Philippe Mathieu-Daudé
Since vCPUs are hashed by their index, this index can't
be uninitialized (UNASSIGNED_CPU_INDEX).
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Message-Id: <20240606124010.2460-2-phi...@linaro.org>
Signed-off-by: Alex Bennée
---
plugins/core.
From: Philippe Mathieu-Daudé
Calling qemu_plugin_vcpu_init__async() on the vCPU thread
is a detail of plugins, not relevant to TCG vCPU management.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Pierrick Bouvier
Message-Id: <20240606124010.2460-4-phi...@lina
From: Richard Henderson
The only use of SME is inline assembly. Both gcc and clang only
support SME with very recent releases; by deferring detection to
the assembler we get better test coverage.
Signed-off-by: Richard Henderson
Reviewed-by: Akihiko Odaki
Message-Id: <20240630190050.160642-8-
From: Philippe Mathieu-Daudé
cpu::plugin_state is allocated in cpu_common_initfn() when
the vCPU state is created. Release it in cpu_common_finalize()
when we are done.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Message-Id: <20240606124010.2460-3-phi...@linaro.org>
Sig
From: Gustavo Romero
Move GdbCmdParseEntry and its associated types into a separate header
file to allow the use of GdbCmdParseEntry and other gdbstub command
functions outside of gdbstub.c.
Since GdbCmdParseEntry and get_param are now public, kdoc
GdbCmdParseEntry and rename get_param to gdb_ge
From: Gustavo Romero
This commit implements the stubs to handle the qIsAddressTagged,
qMemTag, and QMemTag GDB packets, allowing all GDB 'memory-tag'
subcommands to work with QEMU gdbstub on aarch64 user mode. It also
implements the get/set functions for the special GDB MTE register
'tag_ctl', us
From: Richard Henderson
This option is not supported by clang, and is not required
in order to get sve code generation with gcc 12.
Signed-off-by: Richard Henderson
Reviewed-by: Akihiko Odaki
Message-Id: <20240630190050.160642-4-richard.hender...@linaro.org>
Signed-off-by: Alex Bennée
---
te
From: Akihiko Odaki
Previously we are always specifying -u $(UID) to match the UID in the
container with one outside. This causes a problem with rootless Podman.
Rootless Podman remaps user IDs in the container to ones controllable
for the current user outside. The -u option instructs Podman to
From: Gustavo Romero
Change 'process_string_cmd' to return true on success and false on
failure, instead of 0 and -1.
Signed-off-by: Gustavo Romero
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
Message-Id: <20240628050
From: Akihiko Odaki
Clang does not allow specifying an integer as the value of a single
precision register. Explicitly move value from a general register.
Signed-off-by: Akihiko Odaki
[rth: Use one single inline asm block.]
Signed-off-by: Richard Henderson
Reviewed-by: Akihiko Odaki
Message-
From: Gustavo Romero
Allow passing the current CPU context to command handlers via user_ctx
when the handler requires it.
Signed-off-by: Gustavo Romero
Signed-off-by: Alex Bennée
Message-Id: <20240628050850.536447-9-gustavo.rom...@linaro.org>
---
include/gdbstub/commands.h | 3 +++
gdbstub/gd
From: Gustavo Romero
Factor out the code used for setting the MTE TCF0 field from the prctl
code into a convenient function. Other subsystems, like gdbstub, need to
set this field as well, so keep it as a separate function to avoid
duplication and ensure consistency in how this field is set acros
The ExecState is shared across the socket and if we want to compare
say 64 bit and 32 bit binaries we need the two to use the same sizes
for things.
Message-Id: <20240628124258.832466-11-alex.ben...@linaro.org>
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
---
contrib/plugins/lockst
From: Gustavo Romero
Currently, it's not possible to have stubs specific to a given target,
even though there are GDB features which are target-specific, like, for
instance, memory tagging.
This commit introduces gdb_extend_qsupported_features,
gdb_extend_query_table, and gdb_extend_set_table fu
From: Gustavo Romero
Make gdb_hextomem non-internal so it's not confined to use only in
gdbstub.c.
Signed-off-by: Gustavo Romero
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20240628050850.536447-8-gustavo.rom...@linaro.org>
---
gdbstub/internals.h| 1 -
inc
From: Gustavo Romero
Make the MTE helpers allocation_tag_mem_probe, load_tag1, and store_tag1
available to other subsystems.
Signed-off-by: Gustavo Romero
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
Message-Id: <20240628050850.536447-6-gustav
From: Richard Henderson
For arm32 host and arm64 guest we get
.../main.c:851:32: error: result of comparison of constant 70368744177664 with
expression of type 'unsigned long' is always false
[-Werror,-Wtautological-constant-out-of-range-compare]
if (TASK_UNMAPPED_BASE < reserved_va) {
From: Akihiko Odaki
The test cases for "converting double-precision to single-precision"
emits float but the result variable was typed as uint32_t and corrupted
the printed values. Propertly type it as float.
Signed-off-by: Akihiko Odaki
Fixes: 8ec8a55e3fc9 ("tests/tcg/arm: add fcvt test cases
While the match functionality is useful lets make the verbosity
optional while we are actually running.
Signed-off-by: Alex Bennée
---
tests/plugin/insn.c | 36 +---
1 file changed, 21 insertions(+), 15 deletions(-)
diff --git a/tests/plugin/insn.c b/tests/plugin
This really helps with lockstep although its super slow on big jobs.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c
index 761bcdf363..353bf12dfb 100644
--- a/c
>-Original Message-
>From: CLEMENT MATHIEU--DRIF
>Subject: [PATCH v3 2/3] intel_iommu: fix type of the mask field in
>VTDIOTLBPageInvInfo
>
>From: Clément Mathieu--Drif
>
>VTDIOTLBPageInvInfo.mask might not fit in an uint8_t.
>Moreover, this field is used in binary operations with 64-bi
From: Richard Henderson
This is redudant with a linker script, and is not
supported by clang.
Signed-off-by: Richard Henderson
Reviewed-by: Akihiko Odaki
Message-Id: <20240630190050.160642-10-richard.hender...@linaro.org>
Signed-off-by: Alex Bennée
---
tests/tcg/arm/Makefile.softmmu-target |
We were repeating information which wasn't super clear. As we already
will have dumped the last failing PC just note the divergence and dump
the previous instruction log.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 16
1 file changed, 8 insertions(+), 8 deletions
>-Original Message-
>From: CLEMENT MATHIEU--DRIF
>Subject: [PATCH v3 1/3] intel_iommu: fix FRCD construction macro.
>
>From: Clément Mathieu--Drif
>
>The constant must be unsigned, otherwise the two's complement
>overrides the other fields when a PASID is present.
>
>Fixes: 1b2b12376c8a
From: Gustavo Romero
cmd_startswith is a boolean so use 'true' to set it instead of 1.
Signed-off-by: Gustavo Romero
Signed-off-by: Alex Bennée
Message-Id: <20240628050850.536447-10-gustavo.rom...@linaro.org>
---
gdbstub/gdbstub.c | 80 +++
1 file c
On Fri, Jul 05, 2024 at 10:39:33AM +0200, Stefano Garzarella wrote:
> On Wed, Jul 03, 2024 at 06:49:30PM GMT, Michael S. Tsirkin wrote:
> > On Tue, Jun 18, 2024 at 12:00:30PM +0200, Stefano Garzarella wrote:
> > > As discussed with Michael and Markus [1], this version also includes the
> > > patch
On 05/07/2024 10.40, Alex Bennée wrote:
In fact any other accelerator would be pointless as the point is to
exercise the TCI accelerator anyway.
Signed-off-by: Alex Bennée
---
.gitlab-ci.d/buildtest.yml | 2 +-
.gitlab-ci.d/crossbuilds.yml | 2 +-
2 files changed, 2 insertions(+), 2 delet
Roderick Klein writes:
> Hello
>
> Recently a bug was opened to get QEMU to support OS/2 again (newer
> versions of OS/2).
> https://gitlab.com/qemu-project/qemu/-/issues/2198
>
> I would like to point out a company from the US supports a current
> version of OS/2 called ArcaOS. I was trying to
>-Original Message-
>From: CLEMENT MATHIEU--DRIF
>Subject: [PATCH v3 3/3] intel_iommu: make types match
>
>From: Clément Mathieu--Drif
>
>The 'level' field in vtd_iotlb_key is an unsigned integer.
>We don't need to store level as an int in vtd_lookup_iotlb.
>
>Signed-off-by: Clément Mat
On Fri, Jul 05, 2024 at 05:03:17AM +, CLEMENT MATHIEU--DRIF wrote:
> From: Clément Mathieu--Drif
>
> VTDIOTLBPageInvInfo.mask might not fit in an uint8_t.
I think what you mean is that is assigned values that might not
fit it's u8 ATM so of course it fits.
> Moreover, this field is use
From: Gustavo Romero
Add tests to exercise the MTE stubs. The tests will only run if a
version of GDB that supports MTE is available in the test environment.
Signed-off-by: Gustavo Romero
[AJB: re-base and checkpatch fixes]
Signed-off-by: Alex Bennée
Message-Id: <20240628050850.536447-12-gusta
We can't assign sock_path directly from the autofree'd GStrv, take a
copy.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c
index 237543b43a..111ec3fa27 100644
---
From: Gustavo Romero
If page in 'ptr_access' is inaccessible and probe is 'true'
allocation_tag_mem_probe should not throw an exception, but currently it
does, so fix it.
Signed-off-by: Gustavo Romero
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-
Now that we've got a "virt" machine for or1k that supports PCI, too,
we can also enable the virtio device aliases like we do on other
similar platforms. This will e.g. help to run the iotests with
qemu-system-or1k later.
While we're at it, sort QEMU_ARCH_LOONGARCH alphabetically into
the list.
Si
Hi folks:
I have a questions about device vfio pass-through usage snarios, PCI device
pass-throug for example. did the GPA that host physical memory mapped to Guest
vcpu through MMU must be identical with the IOVA that host physical memory
mapped to gust device thourgh iommu? if so, that
On Fri, Jul 05, 2024 at 01:49:03PM +0800, Zhao Liu wrote:
> Update meson-buildoptions.sh to stay in sync with meson_options.txt.
>
> Signed-off-by: Zhao Liu
> ---
> scripts/meson-buildoptions.sh | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
Reviewed-by: Daniel P. Berran
On 05/07/2024 10:51, Duan, Zhenzhong wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
>> -Original Message-
>> From: CLEMENT MATHIEU--DRIF
>> Subject: [PATCH v3 3/3] intel_iommu:
On Fri, 5 Jul 2024 02:29:34 +
"Zhijian Li (Fujitsu)" wrote:
> On 05/07/2024 10:15, Zhao Liu wrote:
> >> There is a new user for cfmw_list now
> >> https://lore.kernel.org/qemu-devel/20240704093404.1848132-1-zhao1@linux.intel.com/
> >>
> >> So I think we should drop this patch.
>
> > Hi
On Fri, Jul 05, 2024 at 09:24:50AM +, CLEMENT MATHIEU--DRIF wrote:
>
>
> On 05/07/2024 10:51, Duan, Zhenzhong wrote:
> > Caution: External email. Do not open attachments or click links, unless
> > this email comes from a known sender and you know the content is safe.
> >
> >
> >> -Origin
On Fri, 5 Jul 2024 at 11:41, Alex Bennée wrote:
>
> Really the problem here is the return values of fit_load_[kernel|fdt]() are a
> little all over the place. However we don't want to somehow get
> through not having set kernel_end and having it just be random unused
> data.
>
> The compiler compl
On 05/07/2024 10:51, Michael S. Tsirkin wrote:
Caution: External email. Do not open attachments or click links, unless this
email comes from a known sender and you know the content is safe.
On Fri, Jul 05, 2024 at 05:03:17AM +, CLEMENT MATHIEU--DRIF wrote:
From: Clément Mathieu--Drif
<
On Thu, Jul 4, 2024 at 2:49 PM Alex Bennée wrote:
>
> Really the problem here is the return values of fit_load_[kernel|fdt]() are a
> little all over the place. However we don't want to somehow get
> through not having set kernel_end and having it just be random unused
> data.
>
> The compiler com
On Fri, 5 Jul 2024 at 11:57, Alex Bennée wrote:
>
> We can't assign sock_path directly from the autofree'd GStrv, take a
> copy.
>
> Signed-off-by: Alex Bennée
> ---
> contrib/plugins/lockstep.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/contrib/plugins/lockstep.c b
On Fri, 5 Jul 2024 at 11:49, Alex Bennée wrote:
>
> While the match functionality is useful lets make the verbosity
> optional while we are actually running.
>
> Signed-off-by: Alex Bennée
> ---
> tests/plugin/insn.c | 36 +---
> 1 file changed, 21 insertions(+),
On Fri, 5 Jul 2024 at 11:49, Alex Bennée wrote:
>
> From: Gustavo Romero
>
> cmd_startswith is a boolean so use 'true' to set it instead of 1.
>
> Signed-off-by: Gustavo Romero
> Signed-off-by: Alex Bennée
> Message-Id: <20240628050850.536447-10-gustavo.rom...@linaro.org>
> ---
> gdbstub/gdbst
On 05/07/2024 08:20, Yi Liu wrote:
On 2024/7/5 13:13, CLEMENT MATHIEU--DRIF wrote:
On 05/07/2024 05:03, Yi Liu wrote:
Caution: External email. Do not open attachments or click links,
unless this email comes from a known sender and you know the content
is safe.
On 2024/5/30 20:24, CLEMENT
On Fri, 5 Jul 2024 at 11:48, Alex Bennée wrote:
>
> This really helps with lockstep although its super slow on big jobs.
>
> Signed-off-by: Alex Bennée
> ---
> contrib/plugins/lockstep.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/contrib/plugins/lockstep.c b/contr
From: thomas
Patch 06b12970174 ("virtio-net: fix network stall under load")
added double-check to test whether the available buffer size
can satisfy the request or not, in case the guest has added
some buffers to the avail ring simultaneously after the first
check. It will be lucky if the availab
On Fri, 5 Jul 2024 at 11:47, Alex Bennée wrote:
>
> From: Gustavo Romero
>
> Factor out the code used for setting the MTE TCF0 field from the prctl
> code into a convenient function. Other subsystems, like gdbstub, need to
> set this field as well, so keep it as a separate function to avoid
> dup
On Fri, 5 Jul 2024 at 11:47, Alex Bennée wrote:
>
> From: Gustavo Romero
>
> Allow passing the current CPU context to command handlers via user_ctx
> when the handler requires it.
>
> Signed-off-by: Gustavo Romero
> Signed-off-by: Alex Bennée
> Message-Id: <20240628050850.536447-9-gustavo.rom..
On Fri, Jul 05, 2024 at 06:05:02PM +0800, Wencheng Yang wrote:
> From: thomas
>
> Patch 06b12970174 ("virtio-net: fix network stall under load")
> added double-check to test whether the available buffer size
> can satisfy the request or not, in case the guest has added
> some buffers to the avail
On Fri, Jul 05, 2024 at 06:05:02PM +0800, Wencheng Yang wrote:
> From: thomas
>
> Patch 06b12970174 ("virtio-net: fix network stall under load")
> added double-check to test whether the available buffer size
> can satisfy the request or not, in case the guest has added
> some buffers to the avail
On Fri, 5 Jul 2024 at 11:43, Alex Bennée wrote:
>
> We are interested in the particular instruction so we should use a
> stable record for it. We could bring this down to physical address but
> for now vaddr + disas seems to do the trick.
>
> Signed-off-by: Alex Bennée
> ---
> tests/plugin/insn.
On Fri, Jul 05, 2024 at 09:52:48AM +, CLEMENT MATHIEU--DRIF wrote:
>
>
> On 05/07/2024 10:51, Michael S. Tsirkin wrote:
>
> Caution: External email. Do not open attachments or click links, unless
> this email comes from a known sender and you know the content is safe.
>
>
> On Fri
On Thu, Jul 04, 2024 at 08:20:31PM +0200, Stefan Hajnoczi wrote:
> On Thu, Jun 13, 2024 at 03:13:25PM +0800, Changqi Lu wrote:
> > This commit enables ONCS to support the reservation
> > function at the controller level. Also enables rescap
> > function in the namespace by detecting the supported r
On Thursday, July 4, 2024 11:59 PM, Peter Xu wrote:
> On Thu, Jul 04, 2024 at 03:10:27PM +, Wang, Wei W wrote:
> > > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c index
> > > > 4c2e6f3a71..7db4fe4ead 100644
> > > > --- a/target/i386/cpu.c
> > > > +++ b/target/i386/cpu.c
> > > > @@ -8258,
I've just tried to rebase my own patches on top of this work and noticed
the following typo:
On Thu, 27 Jun 2024 at 13:17, Akihiko Odaki
wrote:
> static void cocoa_refresh(DisplayChangeListener *dcl);
> +static void cocoa_mouse_set(DisplayChangeListener *dcl, int x, int y, int
> on);
The abov
Add constants for the NVMe persistent command protocol.
The constants include the reservation command opcode and
reservation type values defined in section 7 of the NVMe
2.0 specification.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
include/block/nvme.h | 61
Add constants for the persistent reservation in/out protocol
in the scsi/constant module. The constants include the persistent
reservation command, type, and scope values defined in sections
6.13 and 6.14 of the SCSI Primary Commands-4 (SPC-4) specification.
Signed-off-by: Changqi Lu
Signed-off-b
Hi,
Patch v7 has been modified.
Thanks again to Stefan for reviewing the code.
v6->v7:
- Add buferlen size check at SCSI layer.
- Add pr_cap calculation in bdrv_merge_limits() function at block layer,
so the ugly bs->file->bs->bl.pr_cap in scsi and nvme layers was
changed to bs->bl.pr_cap.
-
Add persistent reservation in/out operations for raw driver.
The following methods are implemented: bdrv_co_pr_read_keys,
bdrv_co_pr_read_reservation, bdrv_co_pr_register, bdrv_co_pr_reserve,
bdrv_co_pr_release, bdrv_co_pr_clear and bdrv_co_pr_preempt.
Signed-off-by: Changqi Lu
Signed-off-by: zhe
This commit introduces two helper functions
that facilitate the conversion between the
reservation types used in the NVME protocol
and those used in the block layer.
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
hw/nvme/nvme.h | 84 +++
Add persistent reservation in/out operations for iscsi driver.
The following methods are implemented: bdrv_co_pr_read_keys,
bdrv_co_pr_read_reservation, bdrv_co_pr_register, bdrv_co_pr_reserve,
bdrv_co_pr_release, bdrv_co_pr_clear and bdrv_co_pr_preempt.
Signed-off-by: Changqi Lu
Signed-off-by: z
Add persistent reservation in/out operations in the
SCSI device layer. By introducing the persistent
reservation in/out api, this enables the SCSI device
to perform reservation-related tasks, including querying
keys, querying reservation status, registering reservation
keys, initiating and releasin
Add persistent reservation in/out operations
at the block level. The following operations
are included:
- read_keys:retrieves the list of registered keys.
- read_reservation: retrieves the current reservation status.
- register: registers a new reservation key.
- reserve:
This commit introduces two helper functions
that facilitate the conversion between the
persistent reservation types used in the SCSI
protocol and those used in the block layer.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
Reviewed-by: Stefan Hajnoczi
---
include/scsi/utils.h | 8 +
Add reservation acquire, reservation register,
reservation release and reservation report commands
in the nvme device layer.
By introducing these commands, this enables the nvme
device to perform reservation-related tasks, including
querying keys, querying reservation status, registering
reservati
This commit enables ONCS to support the reservation
function at the controller level. Also enables rescap
function in the namespace by detecting the supported reservation
function in the backend driver.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
hw/nvme/ctrl.c | 3 ++-
hw/nvm
From: Clément Mathieu--Drif
The mask we are trying to store into VTDIOTLBPageInvInfo.mask might not
fit in an uint8_t. Use uint64_t to avoid overflows
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu_internal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/
From: Clément Mathieu--Drif
The constant must be unsigned, otherwise the two's complement
overrides the other fields when a PASID is present.
Fixes: 1b2b12376c8a ("intel-iommu: PASID support")
Signed-off-by: Clément Mathieu--Drif
Reviewed-by: Yi Liu
Reviewed-by: Zhenzhong Duan
---
hw/i386/i
From: Clément Mathieu--Drif
These 2 macros are for high 64-bit of the FRCD registers.
Declarations have to be moved accordingly.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu_internal.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i386/intel_iommu_i
From: Clément Mathieu--Drif
The 'level' field in vtd_iotlb_key is an unsigned integer.
We don't need to store level as an int in vtd_lookup_iotlb.
This is not an issue by itself, but using unsigned here seems cleaner.
Signed-off-by: Clément Mathieu--Drif
---
hw/i386/intel_iommu.c | 2 +-
1 fi
From: Clément Mathieu--Drif
Various fixes for VT-d
This series contains fixes that will be necessary
when adding in-guest (fully emulated) SVM support.
v4
- Move declarations of VTD_FRCD_PV and VTD_FRCD_PP
- intel_iommu: make types match:
- edit commit message to explain that we
v2: Switch patch 1 from a patch that removes the cfmws_list element
of CXLState to a fix that makes use of it to fix a crash.
Now based on master as precursors merged.
Before pushing on to more significant features a few unrelated patches
doing tidying up + one to avoid people setting the
From: Zhao Liu
QEMU crashes (Segmentation fault) when getting cxl-fmw property via
qmp:
(QEMU) qom-get path=machine property=cxl-fmw
This issue is caused by accessing wrong callback (opaque) type in
machine_get_cfmw().
cxl_machine_init() sets the callback as `CXLState *` type but
machine_get_c
On Tue, 2 Jul 2024 15:34:22 +0100
Jonathan Cameron wrote:
> Before pushing on to more significant features a few unrelated patches
> doing tidying up + one to avoid people setting the memory backend both
> for a CXL type 3 device and as normal RAM in an attempt to get SRAT to
> cover it correctly
Similar protection to that provided for -numa memdev=x
to make sure that memory used to back a type3 device is not also mapped
as normal RAM, or for multiple type3 devices.
This is an easy footgun to remove and seems multiple people have
run into it.
Signed-off-by: Jonathan Cameron
---
hw/mem/c
On Fri, 5 Jul 2024 02:39:51 +
"Zhijian Li (Fujitsu)" wrote:
> On 04/07/2024 17:34, Zhao Liu wrote:
> > From: Zhao Liu
> >
> > Guest crashes (Segmentation fault) when getting cxl-fmw property via
> > qmp:
> >
>
> IMO, it's fair to say "Guest crashes" which generally means the guest kerne
From: Fan Ni
The whole mailbox output payload space is already zeroed after copying
out the input payload, which happens before processing the specific mailbox
command:
https://elixir.bootlin.com/qemu/v8.2.1/source/hw/cxl/cxl-device-utils.c#L204
Signed-off-by: Fan Ni
Link: https://lore.kernel.o
Am 27. Mai 2024 17:49:26 UTC schrieb Bernhard Beschow :
>
>
>Am 27. Mai 2024 16:20:44 UTC schrieb Richard Henderson
>:
>>On 5/27/24 08:29, Bernhard Beschow wrote:
>>> I think the kernel's output indicates that the MMU is active:
>>>
>>>[7e849b05] *pgd=2c552831, *pte=109eb34f, *ppte=109eb83
Now DCD is upstream, a number of sets that were dependent on it, that have
otherwise been in a good state for a long time, are (hopefully) ready to
upstream. I was also holding back series that were less critical for
kernel testing to make sure they didn't distract from the progress of
Dynamic Cap
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