[PATCH] tcg/riscv: Fix building on OpenBSD/riscv64

tcg/riscv: Fix building on OpenBSD/riscv64 Signed-off-by: Brad Smith --- tcg/riscv/tcg-target.c.inc | 5 + 1 file changed, 5 insertions(+) diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 639363039b..aeae9a8ad8 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/risc

Re: [PATCH] tests/avocado: add hotplug_blk test

On 09/04/2024 08.58, Vladimir Sementsov-Ogievskiy wrote: Introduce a test, that checks that plug/unplug of virtio-blk device works. (the test is developed by copying hotplug_cpu.py, so keep original copyright) Signed-off-by: Vladimir Sementsov-Ogievskiy --- tests/avocado/hotplug_blk.py | 69

RE: [PATCH v5 1/4] target/riscv: Add functions for common matching conditions of trigger

Hi Alistair, > -Original Message- > From: Alistair Francis > Sent: Wednesday, June 26, 2024 2:20 PM > To: Alvin Che-Chia Chang(張哲嘉) > Cc: qemu-ri...@nongnu.org; qemu-devel@nongnu.org; > alistair.fran...@wdc.com; bin.m...@windriver.com; liwei1...@gmail.com; > dbarb...@ventanamicro.com; zh

Re: [PATCH v3 1/4] hw/intc: Remove loongarch_ipi.c

在2024年6月26日六月 上午5:11，maobibo写道： [...] > It is different with existing implementation. What do you mean? Isn't this the actual hardware behaviour? > > With hw/intc/loongson_ipi.c, every vcpu has one ipi_mmio_mem, however on > loongarch ipi machine, there is no ipi_mmio_mem memory region. > So i

Re: [PATCH v3] virtio-pci: Fix the use of an uninitialized irqfd

On Wed, Jun 26, 2024 at 10:44:31AM +0800, Cindy Lu wrote: > The crash was reported in MAC OS and NixOS, here is the link for this bug > https://gitlab.com/qemu-project/qemu/-/issues/2334 > https://gitlab.com/qemu-project/qemu/-/issues/2321 > > The root cause is the function virtio_pci_set_guest_no

Re: [PATCH v3 1/4] hw/intc: Remove loongarch_ipi.c

On 2024/6/26 下午3:40, Jiaxun Yang wrote: 在2024年6月26日六月 上午5:11，maobibo写道： [...] It is different with existing implementation. What do you mean? Isn't this the actual hardware behaviour? With hw/intc/loongson_ipi.c, every vcpu has one ipi_mmio_mem, however on loongarch ipi machine, there i

Re: [RFC PATCH 1/1] vhost-user: add shmem mmap request

Hi Stefan, On Wed, Jun 5, 2024 at 4:28 PM Stefan Hajnoczi wrote: > On Wed, Jun 05, 2024 at 10:13:32AM +0200, Albert Esteve wrote: > > On Tue, Jun 4, 2024 at 8:54 PM Stefan Hajnoczi > wrote: > > > > > On Thu, May 30, 2024 at 05:22:23PM +0200, Albert Esteve wrote: > > > > Add SHMEM_MAP/UNMAP requ

Re: [RFC PATCH v3 1/2] target/riscv: Add RISC-V CSR qtest support

On 25/06/2024 17.35, Ivan Klokov wrote: The RISC-V architecture supports the creation of custom CSR-mapped devices. It would be convenient to test them in the same way as MMIO-mapped devices. To do this, a new call has been added to read/write CSR registers. Signed-off-by: Ivan Klokov --- tar

Re: [RFC PATCH v3 2/2] tests/qtest: QTest example for RISC-V CSR register

On 25/06/2024 17.35, Ivan Klokov wrote: Added demo for reading CSR register from qtest environment. Signed-off-by: Ivan Klokov --- tests/qtest/meson.build | 2 + tests/qtest/riscv-csr-test.c | 85 2 files changed, 87 insertions(+) create mode 100

Re: [PATCH v4 01/14] exec/memtxattr: add process identifier to the transaction attributes

Reviewed-by: Jason Chien On 2024/6/25 上午 04:18, Daniel Henrique Barboza wrote: From: Tomasz Jeznach Extend memory transaction attributes with process identifier to allow per-request address translation logic to use requester_id / process_id to identify memory mapping (e.g. enabling IOMMU w/ P

Re: linux-user cannot allocate stack memory on riscv64 host due to non-zero guest_base

On Jun 25 2024, Richard Henderson wrote: > can always force the use of a non-zero base with -B or -R. $ qemu-riscv64 -d page -B 0x3ee000 hello.riscv64 host mmap_min_addr=0x1000 (fallback) qemu-riscv64: /daten/src/test/hello.riscv64: requires virtual address space that is in use (omit the -B opti

[PATCH 1/7] virtio-iommu: Fix error handling in virtio_iommu_set_host_iova_ranges()

In case no IOMMUPciBus/IOMMUDevice are found we need to properly set the error handle and return. Fixes : Coverity CID 1549006 Signed-off-by: Eric Auger Fixes: cf2647a76e ("virtio-iommu: Compute host reserved regions") --- hw/virtio/virtio-iommu.c | 7 ++- 1 file changed, 6 insertions(+), 1

[PATCH 4/7] HostIOMMUDevice: Introduce get_page_size_mask() callback

This callback will be used to retrieve the page size mask supported along a given Host IOMMU device. Signed-off-by: Eric Auger --- include/hw/vfio/vfio-container-base.h | 7 +++ include/sysemu/host_iommu_device.h| 8 hw/vfio/container.c | 10 ++ hw/vf

[PATCH 2/7] vfio-container-base: Introduce vfio_container_get_iova_ranges() helper

Introduce vfio_container_get_iova_ranges() to retrieve the usable IOVA regions of the base container and use it in the Host IOMMU device implementations of get_iova_ranges() callback. We also fix a UAF bug as the list was shallow copied while g_list_free_full() was used both on the single call sit

[PATCH 0/7] VIRTIO-IOMMU/HostIOMMUDevice: Fixes and page size mask rework

The 2 first patches are fixes of cf2647a76e ("virtio-iommu: Compute host reserved regions") They can be taken separately of the rest. Then the series uses the HostIOMMUDevice interface to fetch information about the page size mask supported along the assigned device and propagate it to the virtio-

[PATCH 5/7] virtio-iommu : Retrieve page size mask on virtio_iommu_set_iommu_device()

Retrieve the Host IOMMU Device page size mask when this latter is set. This allows to get the information much sooner than when relying on IOMMU MR set_page_size_mask() call, whcih happens when the IOMMU MR gets enabled. We introduce check_page_size_mask() helper whose code is inherited from curren

[PATCH 3/7] HostIOMMUDevice : remove Error handle from get_iova_ranges callback

The error handle argument is not used anywhere. let's remove it. Signed-off-by: Eric Auger --- include/sysemu/host_iommu_device.h | 3 +-- hw/vfio/container.c| 2 +- hw/vfio/iommufd.c | 2 +- hw/virtio/virtio-iommu.c | 2 +- 4 files changed, 4 insertion

[PATCH 7/7] virtio-iommu: Revert transient enablement of IOMMU MR in bypass mode

In 94df5b2180d6 ("virtio-iommu: Fix 64kB host page size VFIO device assignment"), in case of bypass mode, we transiently enabled the IOMMU MR to allow the set_page_size_mask() to be called and pass information about the page size mask constraint of cold plugged VFIO devices. Now we do not use the I

[PATCH 6/7] memory: remove IOMMU MR iommu_set_page_size_mask() callback

Everything is now in place to use the Host IOMMU Device callbacks to retrieve the page size mask usable with a given assigned device. This new method brings the advantage to pass the info much earlier to the virtual IOMMU and before the IOMMU MR gets enabled. So let's remove the call to memory_regi

Re: [PATCH v2] Consider discard option when writing zeros

Am 24.06.2024 um 23:12 hat Nir Soffer geschrieben: > On Mon, Jun 24, 2024 at 7:08 PM Kevin Wolf wrote: > > > Am 24.06.2024 um 17:23 hat Stefan Hajnoczi geschrieben: > > > On Wed, Jun 19, 2024 at 08:43:25PM +0300, Nir Soffer wrote: > > > > Tested using: > > > > > > Hi Nir, > > > This looks like a

[PATCH v5 5/6] hw/ppc: SPI controller wiring to P10 chip

In this commit, create SPI controller on p10 chip and connect cs irq. The QOM tree of pnv-spi and seeprom are. /machine (powernv10-machine) /chip[0] (power10_v2.0-pnv-chip) /pib_spic[2] (pnv-spi) /pnv-spi-bus.2 (SSI) /xscom-spi[0] (memory-region) /machine (powernv10-machine) /

[PATCH v5 1/6] ppc/pnv: Remove ppc target dependency from pnv_xscom.h

In this commit target specific dependency from include/hw/ppc/pnv_xscom.h has been removed so that pnv_xscom.h can be included outside hw/ppc. Signed-off-by: Chalapathi V --- include/hw/ppc/pnv_xscom.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/ppc/pnv_xscom.h

[PATCH v5 2/6] hw/ssi: Add SPI model

SPI controller device model supports a connection to a single SPI responder. This provide access to SPI seeproms, TPM, flash device and an ADC controller. All SPI function control is mapped into the SPI register space to enable full control by firmware. In this commit SPI configuration component i

[PATCH v5 0/6] hw/ppc: SPI model

Hello, Thank You so much for reviewing patch v4. In patch v5, - Added a new commit to remove the dependency from include/hw/ppc/pnv_xscom.h so that pnv_xscom.h can be included in hw/ssi/pnv_spi.c in PATCH2. - General comments from Cedric and Glenn were addressed. The new qom-tree looks like below

[PATCH v5 6/6] tests/qtest: Add pnv-spi-seeprom qtest

In this commit Write a qtest pnv-spi-seeprom-test to check the SPI transactions between spi controller and seeprom device. Signed-off-by: Chalapathi V Acked-by: Cédric Le Goater --- tests/qtest/pnv-spi-seeprom-test.c | 110 + tests/qtest/meson.build| 1

[PATCH v5 3/6] hw/ssi: Extend SPI model

In this commit SPI shift engine and sequencer logic is implemented. Shift engine performs serialization and de-serialization according to the control by the sequencer and according to the setup defined in the configuration registers. Sequencer implements the main control logic and FSM to handle dat

[PATCH v5 4/6] hw/block: Add Microchip's 25CSM04 to m25p80

Add Microchip's 25CSM04 Serial EEPROM to m25p80. 25CSM04 provides 4 Mbits of Serial EEPROM utilizing the Serial Peripheral Interface (SPI) compatible bus. The device is organized as 524288 bytes of 8 bits each (512Kbyte) and is optimized for use in consumer and industrial applications where reliab

Re: [PATCH v5 1/6] ppc/pnv: Remove ppc target dependency from pnv_xscom.h

On 6/26/24 11:05 AM, Chalapathi V wrote: In this commit target specific dependency from include/hw/ppc/pnv_xscom.h has been removed so that pnv_xscom.h can be included outside hw/ppc. Signed-off-by: Chalapathi V Reviewed-by: Cédric Le Goater Thanks, C. --- include/hw/ppc/pnv_xscom.h

Re: [PATCH v2] Consider discard option when writing zeros

On Mon, Jun 24, 2024 at 06:08:26PM +0200, Kevin Wolf wrote: > Am 24.06.2024 um 17:23 hat Stefan Hajnoczi geschrieben: > > On Wed, Jun 19, 2024 at 08:43:25PM +0300, Nir Soffer wrote: > > > Tested using: > > > > Hi Nir, > > This looks like a good candidate for the qemu-iotests test suite. Adding > >

Re: [PATCH v5 1/4] target/riscv: Add functions for common matching conditions of trigger

On Wed, Jun 26, 2024 at 5:27 PM Alvin Che-Chia Chang(張哲嘉) wrote: > > Hi Alistair, > > > -Original Message- > > From: Alistair Francis > > Sent: Wednesday, June 26, 2024 2:20 PM > > To: Alvin Che-Chia Chang(張哲嘉) > > Cc: qemu-ri...@nongnu.org; qemu-devel@nongnu.org; > > alistair.fran...@wd

Re: [RFC PATCH v3 1/5] build-sys: Add rust feature option

On 6/25/24 23:47, Manos Pitsidianakis wrote: On Mon, 24 Jun 2024 20:14, Paolo Bonzini wrote: Yes, I agree. However, considering we haven't even checked the situation with what language features are required by any idiomatic bindings vs the 1.63 version that we need to support for Debian, I thin

[PATCH] disas/riscv: Add decode for Zawrs extension

From: Balaji Ravikumar Add disassembly support for these instructions from Zawrs: * wrs.sto * wrs.nto Signed-off-by: Balaji Ravikumar Signed-off-by: Rob Bradford --- disas/riscv.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/disas/riscv.c b/disas/riscv.c index 90d6b26de9..e79788

[PATCH] docs/system/devices/usb: Replace the non-existing "qemu" binary

We don't ship a binary that is simply called "qemu", so we should avoid this in the documentation. Use the configurable binary name via "|qemu_system|" instead. Signed-off-by: Thomas Huth --- docs/system/devices/usb.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/sys

Re: [PATCH RFC V3 00/29] Support of Virtual CPU Hotplug for ARMv8 Arch

Hi Salil, On 14-06-2024 05:06, Salil Mehta wrote: PROLOGUE To assist in review and set the right expectations from this RFC, please first read the sections *APPENDED AT THE END* of this cover letter: 1. Important *DISCLAIMER* [Section (X)] 2. Work presented at KVMForum Conference (sli

Re: [PATCH v3 1/4] hw/intc: Remove loongarch_ipi.c

在2024年6月26日六月 上午8:51，maobibo写道： > On 2024/6/26 下午3:40, Jiaxun Yang wrote: >> >> >> 在2024年6月26日六月 上午5:11，maobibo写道： >> [...] >>> It is different with existing implementation. >> What do you mean? Isn't this the actual hardware behaviour? >> >>> >>> With hw/intc/loongson_ipi.c, every vcpu has o

Re: [PATCH] tcg/riscv: Fix building on OpenBSD/riscv64

On 6/26/24 4:09 AM, Brad Smith wrote: tcg/riscv: Fix building on OpenBSD/riscv64 Signed-off-by: Brad Smith --- Please add in the commit msg a short description on the problem you're facing in the OpenBSD build and how this change fixes it. We want to keep a history on this kind of OS speci

Re: [PATCH 1/7] virtio-iommu: Fix error handling in virtio_iommu_set_host_iova_ranges()

On 6/26/24 10:26 AM, Eric Auger wrote: In case no IOMMUPciBus/IOMMUDevice are found we need to properly set the error handle and return. Fixes : Coverity CID 1549006 Signed-off-by: Eric Auger Fixes: cf2647a76e ("virtio-iommu: Compute host reserved regions") Reviewed-by: Cédric Le Goater Th

[PATCH v2 5/7] qapi: add job-change

Add a new-style command job-change, doing same thing as block-job-change. The aim is finally deprecate block-job-* APIs and move to job-* APIs. We add a new command to qapi/block-core.json, not to qapi/job.json to avoid resolving json file including loops for now. This all would be a lot simple to

[PATCH v2 4/7] blockjob: move change action implementation to job from block-job

Like for other block-job-* APIs we want have the actual functionality in job layer and make block-job-change to be a deprecated duplication of job-change in the following commit. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block/mirror.c | 7 +++ blockdev.c

[PATCH v2 6/7] qapi/block-core: derpecate block-job-change

That's a first step to move on newer job-* APIs. The difference between block-job-change and job-change is in find_block_job_locked() vs find_job_locked() functions. What's different? 1. find_block_job_locked() do check, is found job a block-job. This OK when moving to more generic API, no nee

[PATCH v2 2/7] blockjob: block_job_change_locked(): check job type

User may specify wrong type for the job id. Let's check it. Signed-off-by: Vladimir Sementsov-Ogievskiy --- blockjob.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/blockjob.c b/blockjob.c index 8cfbb15543..788cb1e07d 100644 --- a/blockjob.c +++ b/blockjob.c @@ -319,6 +319,12 @@ void

[PATCH v2 0/7] introduce job-change qmp command

Hi all! This is an updated first part of my "[RFC 00/15] block job API" Supersedes: <20240313150907.623462-1-vsement...@yandex-team.ru> v2: - only job-change for now, as a first step - drop "type-based unions", and keep type parameter as is for now (I now doubt that this was good idea, as it ma

[PATCH v2 7/7] iotests/mirror-change-copy-mode: switch to job-change command

block-job-change is deprecated, let's move test to job-change. Signed-off-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/tests/mirror-change-copy-mode | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/qemu-iotests/tests/mirror-change-copy-mode b/tests/qemu-iotes

[PATCH v2 3/7] qapi: block-job-change: make copy-mode parameter optional

We are going to add more parameters to change. We want to make possible to change only one or any subset of available options. So all the options should be optional. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block/mirror.c | 4 qapi/block-core.json | 3 ++- 2 files changed, 6 in

[PATCH v2 1/7] qapi: rename BlockJobChangeOptions to JobChangeOptions

We are going to move change action from block-job to job implementation, and then move to job-* extenral APIs, deprecating block-job-* APIs. This commit simplifies further transition. The commit is made by command git grep -l BlockJobChangeOptions | \ xargs sed -i 's/BlockJobChangeOpt

Re: [PATCH RFC 2/2] migration: abort on destination if switchover limit exceeded

On 25/06/2024 20:03, Peter Xu wrote: > On Tue, Jun 25, 2024 at 05:31:19PM +0100, Joao Martins wrote: >> The device-state multifd scaling is a take on improving switchover phase, >> and we will keep improving it whenever we find things... but the > > That'll be helpful, thanks. Just a quick note t

[PATCH 02/14] hw/ide: Free macio-ide IRQs

This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- hw/ide/macio.c | 9 + 1 file changed, 9 insertions(+) diff --git a/hw/ide/macio.c b/hw/ide/macio.c index aca90d04f0e8..d8fbc1a17ba6 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -464,6 +464,14 @@ static void

[PATCH 01/14] hw/core: Free CPUState allocations

This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- hw/core/cpu-common.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 0f0a247f5642..42f38b01a97f 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -274,6

[PATCH 00/14] Fix check-qtest-ppc64 sanitizer errors

I saw various sanitizer errors when running check-qtest-ppc64. While I could just turn off sanitizers, I decided to tackle them this time. Unfortunately, GLib does not free test data in some cases so some sanitizer errors remain. All sanitizer errors will be gone with this patch series combined wi

[PATCH 10/14] tests/qtest: Free unused QMP response

This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- tests/qtest/libqtest.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c index d8f80d335e74..28683fee28b2 100644 --- a/tests/qtest/libqtest.c +++ b/tests/qtest/libqtest.c

[PATCH 04/14] spapr: Free stdout path

This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- hw/ppc/spapr_vof.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/spapr_vof.c b/hw/ppc/spapr_vof.c index 09f29be0b9de..c02eaacfed0b 100644 --- a/hw/ppc/spapr_vof.c +++ b/hw/ppc/spapr_vof.c @@ -28

[PATCH 09/14] tests/qtest: Use qtest_add_data_func_full()

A test function may not be executed depending on the test command line so it is wrong to free data with a test function. Use qtest_add_data_func_full() to register a function to free data. Signed-off-by: Akihiko Odaki --- tests/qtest/device-introspect-test.c | 7 +++ 1 file changed, 3 insert

[PATCH 12/14] tests/qtest: Delete previous boot file

A test run may create boot files several times. Delete the previous boot file before creating a new one. Signed-off-by: Akihiko Odaki --- tests/qtest/migration-test.c | 18 +++--- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/tests/qtest/migration-test.c b/tests/qtes

[PATCH 11/14] tests/qtest: Free old machine variable name

This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- tests/qtest/libqtest.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c index 28683fee28b2..06585104c7af 100644 --- a/tests/qtest/libqtest.c +++ b/tests/qtest/libqtest.c @@

[PATCH 08/14] memory: Do not create circular reference with subregion

A memory region does not use their own reference counters, but instead piggybacks on another QOM object, "owner" (unless the owner is not the memory region itself). When creating a subregion, a new reference to the owner of the container must be created. However, if the subregion is owned by the sa

[PATCH 06/14] hw/virtio: Free vqs before vhost_dev_cleanup()

This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- hw/virtio/vhost-user-base.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/virtio/vhost-user-base.c b/hw/virtio/vhost-user-base.c index a83167191ee6..124ef536206f 100644 --- a/hw/virtio/vhost-user-base.c +++ b/hw/

[PATCH 03/14] hw/isa/vt82c686: Free irqs

This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- hw/isa/vt82c686.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 8582ac0322eb..189b487f1d22 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -721,7

[PATCH 14/14] tests/qtest: Free GThread

These GThreads are never referenced. Signed-off-by: Akihiko Odaki --- tests/qtest/vhost-user-test.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/qtest/vhost-user-test.c b/tests/qtest/vhost-user-test.c index d4e437265f66..929af5c183ce 100644 --- a/tests/qtest/vh

[PATCH 05/14] ppc/vof: Fix unaligned FDT property access

FDT properties are aligned by 4 bytes, not 8 bytes. Signed-off-by: Akihiko Odaki --- hw/ppc/vof.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/vof.c b/hw/ppc/vof.c index e3b430a81f4f..b5b6514d79fc 100644 --- a/hw/ppc/vof.c +++ b/hw/ppc/vof.c @@ -646,7 +646,7 @@ stat

[PATCH 13/14] tests/qtest: Free paths

This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- tests/qtest/qos-test.c | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/tests/qtest/qos-test.c b/tests/qtest/qos-test.c index 5da4091ec32b..114f6bef273a 100644 --- a/tests/qtest/qos-test

[PATCH 07/14] migration: Free removed SaveStateEntry

This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- migration/savevm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/migration/savevm.c b/migration/savevm.c index c621f2359ba3..10b261823b7c 100644 --- a/migration/savevm.c +++ b/migration/savevm.c @@ -874,6 +874,8 @@

[PATCH] tests/docker: Specify --userns keep-id for Podman

Previously we are always specifying -u $(UID) to match the UID in the container with one outside. This causes a problem with rootless Podman. Rootless Podman remaps user IDs in the container to ones controllable for the current user outside. The -u option instructs Podman to use a specified UID in

Re: [PATCH 06/14] hw/virtio: Free vqs before vhost_dev_cleanup()

On Wed, Jun 26, 2024 at 08:06:29PM +0900, Akihiko Odaki wrote: > This suppresses LeakSanitizer warnings. > more specifically, is there a leak here this fixes? or a false positive warning? > Signed-off-by: Akihiko Odaki > --- > hw/virtio/vhost-user-base.c | 2 ++ > 1 file changed, 2 insertions(

Re: [PATCH v2] block-backend: per-device throttling of BLOCK_IO_ERROR reports

ping2 On 09.01.24 16:13, Vladimir Sementsov-Ogievskiy wrote: From: Leonid Kaplan BLOCK_IO_ERROR events comes from guest, so we must throttle them. We still want per-device throttling, so let's use device id as a key. Signed-off-by: Leonid Kaplan Signed-off-by: Vladimir Sementsov-Ogievskiy -

Re: [PATCH v4] virtio: add VIRTQUEUE_ERROR QAPI event

ping4 On 17.10.23 15:39, Vladimir Sementsov-Ogievskiy wrote: For now we only log the vhost device error, when virtqueue is actually stopped. Let's add a QAPI event, which makes possible: - collect statistics of such errors - make immediate actions: take core dumps or do some other debugging

[PATCH 0/6] tests/tcg/aarch64: Fix inline assemblies for clang

Unlike GCC, clang checks if the operands in assembly matches with the type in C. It also does not support "x" constraint for AArch64 and complains about them. Signed-off-by: Akihiko Odaki --- Akihiko Odaki (6): tests/tcg/arm: Fix fcvt result messages tests/tcg/aarch64: Fix test archit

[PATCH 2/6] tests/tcg/aarch64: Fix test architecture specification

sme-smopa-2.c requires sme-i16i64 but the compiler option used not to specify it. Instead, the extension was specified with the inline assembly, resulting in mixing assembly code targeting sme-i1664 and C code that does not target sme-i1664. clang version 18.1.6 does not support such mixing so pro

[PATCH 5/6] tests/tcg/aarch64: Do not use x constraint

clang version 18.1.6 does not support x constraint for AArch64. Use w instead. Signed-off-by: Akihiko Odaki --- tests/tcg/arm/fcvt.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c index 05a27b2d0710..157790e67961 100

[PATCH 4/6] tests/tcg/aarch64: Fix irg operand type

irg expects 64-bit integers. Passing a 32-bit integer results in compilation failure with clang version 18.1.6. Signed-off-by: Akihiko Odaki --- tests/tcg/aarch64/mte-1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/tcg/aarch64/mte-1.c b/tests/tcg/aarch64/mte-1.c ind

[PATCH 6/6] tests/tcg/arm: Manually bit-cast half-precision numbers

clang version 18.1.6 does not allow specifying an integer as the value of a single-precision register. Manually bit-cast into float with vmov first. Signed-off-by: Akihiko Odaki --- tests/tcg/arm/fcvt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tests/tcg/arm/fcvt.c b

[PATCH 3/6] tests/tcg/aarch64: Explicitly specify register width

clang version 18.1.6 assumes a register is 64-bit by default and complains if a 32-bit value is given. Explicitly specify register width when passing a 32-bit value. Signed-off-by: Akihiko Odaki --- tests/tcg/aarch64/bti-1.c | 6 +++--- tests/tcg/aarch64/bti-3.c | 6 +++--- 2 files changed, 6 in

[PATCH 1/6] tests/tcg/arm: Fix fcvt result messages

The test cases for "converting double-precision to single-precision" emits float but the result variable was typed as uint32_t and corrupted the printed values. Propertly type it as float. Signed-off-by: Akihiko Odaki Fixes: 8ec8a55e3fc9 ("tests/tcg/arm: add fcvt test cases for AArch32/64") ---

Re: [PATCH RFC 2/2] migration: abort on destination if switchover limit exceeded

On 25/06/2024 19:37, Daniel P. Berrangé wrote: > On Tue, Jun 25, 2024 at 10:53:41AM -0400, Peter Xu wrote: >> Then the question is how should we suggest the user to specify these two >> parameters. >> >> The cover letter used: >> >> migrate_set_parameter downtime-limit 300 >> migrate_set_parame

Re: [PATCH RFC 2/2] migration: abort on destination if switchover limit exceeded

On Wed, Jun 26, 2024 at 12:29:41PM +0100, Joao Martins wrote: > On 25/06/2024 19:37, Daniel P. Berrangé wrote: > > On Tue, Jun 25, 2024 at 10:53:41AM -0400, Peter Xu wrote: > >> Then the question is how should we suggest the user to specify these two > >> parameters. > >> > >> The cover letter used

PING: [PATCH v6 00/10] Support persistent reservation operations

Hi, Could everyone please review this series? On 2024/6/19 10:49, 卢长奇 wrote: > Hi, > > Klaus, the pr related operations of the > nvme layer are almost ready. > > Stefan, the block layer has been modified > according to your comments. > > Please help review the code again. Thanks! > > On 2024/6/13

[PATCH v9 3/7] block: make bdrv_find_child() function public

To be reused soon for blockdev-replace functionality. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block.c | 13 + blockdev.c | 14 -- include/block/block_int-io.h | 2 ++ 3 files changed, 15 insertions(+), 14 deletions(-) diff

[PATCH v9 5/7] block: bdrv_get_xdbg_block_graph(): report export ids

Currently for block exports we report empty blk names. That's not good. Let's try to find corresponding block export and report its id. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block.c | 4 block/export/export.c | 13 + include/block/export.h

[PATCH v9 6/7] iotests.py: introduce VM.assert_edges_list() method

Add an alternative method to check block graph, to be used in further commit. Signed-off-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/iotests.py | 17 + 1 file changed, 17 insertions(+) diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py index e

[PATCH v9 4/7] qapi: add blockdev-replace command

Add a command that can replace bs in following BdrvChild structures: - qdev blk root child - block-export blk root child - any child of BlockDriverState selected by child-name Signed-off-by: Vladimir Sementsov-Ogievskiy --- blockdev.c | 56 +++ qapi/block-

[PATCH v9 7/7] iotests: add filter-insertion

Demonstrate new blockdev-replace API for filter insertion and removal. Signed-off-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/tests/filter-insertion | 236 ++ tests/qemu-iotests/tests/filter-insertion.out | 5 + 2 files changed, 241 insertions(+) create mode 10

[PATCH v9 0/7] blockdev-replace

Hi all! This series presents a new command blockdev-replace, which helps to insert/remove filters anywhere in the block graph. It can: - replace qdev block-node by qdev-id - replace export block-node by export-id - replace any child of parent block-node by node-name and child name So insertio

[PATCH v9 2/7] block/export: add blk_by_export_id()

We need it for further blockdev-replace functionality. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block/export/export.c | 18 ++ include/sysemu/block-backend-global-state.h | 1 + 2 files changed, 19 insertions(+) diff --git a/block/export/export.c b/

[PATCH v9 1/7] block-backend: blk_root(): drop const specifier on return type

We'll need get non-const child pointer for graph modifications in further commits. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block/block-backend.c | 2 +- include/sysemu/block-backend-global-state.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [PATCH 3/6] tests/tcg/aarch64: Explicitly specify register width

On 26/6/24 13:26, Akihiko Odaki wrote: clang version 18.1.6 assumes a register is 64-bit by default and complains if a 32-bit value is given. Explicitly specify register width when passing a 32-bit value. Signed-off-by: Akihiko Odaki --- tests/tcg/aarch64/bti-1.c | 6 +++--- tests/tcg/aarch6

Re: [PATCH 04/14] spapr: Free stdout path

On 26/6/24 13:06, Akihiko Odaki wrote: This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- hw/ppc/spapr_vof.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 05/14] ppc/vof: Fix unaligned FDT property access

On 26/6/24 13:06, Akihiko Odaki wrote: FDT properties are aligned by 4 bytes, not 8 bytes. Signed-off-by: Akihiko Odaki --- hw/ppc/vof.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/vof.c b/hw/ppc/vof.c index e3b430a81f4f..b5b6514d79fc 100644 --- a/hw/ppc/vof.c

Re: [PATCH 01/14] hw/core: Free CPUState allocations

On 26/6/24 13:06, Akihiko Odaki wrote: This suppresses LeakSanitizer warnings. Signed-off-by: Akihiko Odaki --- hw/core/cpu-common.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 0f0a247f5642..42f38b01a97f 100644 --- a/hw/core/cpu-co

Re: [PATCH v3 1/4] hw/intc: Remove loongarch_ipi.c

Hi Bibo, On 26/6/24 06:11, maobibo wrote: On 2024/6/5 上午10:15, Jiaxun Yang wrote: It was missed out in previous commit. Fixes: b4a12dfc2132 ("hw/intc/loongarch_ipi: Rename as loongson_ipi") Signed-off-by: Jiaxun Yang ---   hw/intc/loongarch_ipi.c | 347 -

Re: [PATCH RFC 2/2] migration: abort on destination if switchover limit exceeded

On 26/06/2024 12:34, Daniel P. Berrangé wrote: > On Wed, Jun 26, 2024 at 12:29:41PM +0100, Joao Martins wrote: >> On 25/06/2024 19:37, Daniel P. Berrangé wrote: >>> On Tue, Jun 25, 2024 at 10:53:41AM -0400, Peter Xu wrote: Then the question is how should we suggest the user to specify these tw

Re: [PATCH RFC 2/2] migration: abort on destination if switchover limit exceeded

On Wed, Jun 26, 2024 at 01:12:15PM +0100, Joao Martins wrote: > On 26/06/2024 12:34, Daniel P. Berrangé wrote: > > On Wed, Jun 26, 2024 at 12:29:41PM +0100, Joao Martins wrote: > >> On 25/06/2024 19:37, Daniel P. Berrangé wrote: > >>> On Tue, Jun 25, 2024 at 10:53:41AM -0400, Peter Xu wrote: >

Re: [PATCH 3/7] HostIOMMUDevice : remove Error handle from get_iova_ranges callback

On 6/26/24 10:26 AM, Eric Auger wrote: The error handle argument is not used anywhere. let's remove it. Signed-off-by: Eric Auger Reviewed-by: Cédric Le Goater Thanks, C. --- include/sysemu/host_iommu_device.h | 3 +-- hw/vfio/container.c| 2 +- hw/vfio/iommufd.c

Re: [PATCH 2/7] vfio-container-base: Introduce vfio_container_get_iova_ranges() helper

On 6/26/24 10:26 AM, Eric Auger wrote: Introduce vfio_container_get_iova_ranges() to retrieve the usable IOVA regions of the base container and use it in the Host IOMMU device implementations of get_iova_ranges() callback. We also fix a UAF bug as the list was shallow copied while g_list_free_fu

Re: [PATCH 4/7] HostIOMMUDevice: Introduce get_page_size_mask() callback

On 6/26/24 10:26 AM, Eric Auger wrote: This callback will be used to retrieve the page size mask supported along a given Host IOMMU device. Signed-off-by: Eric Auger Reviewed-by: Cédric Le Goater Thanks, C. --- include/hw/vfio/vfio-container-base.h | 7 +++ include/sysemu/host_

Re: [PATCH 03/14] hw/isa/vt82c686: Free irqs

On Wed, 26 Jun 2024 at 12:08, Akihiko Odaki wrote: > > This suppresses LeakSanitizer warnings. > > Signed-off-by: Akihiko Odaki > --- > hw/isa/vt82c686.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c > index 8582ac0322eb..189b487

Re: [PATCH 02/14] hw/ide: Free macio-ide IRQs

On Wed, 26 Jun 2024 at 12:09, Akihiko Odaki wrote: > > This suppresses LeakSanitizer warnings. > > Signed-off-by: Akihiko Odaki > --- > hw/ide/macio.c | 9 + > 1 file changed, 9 insertions(+) > > diff --git a/hw/ide/macio.c b/hw/ide/macio.c > index aca90d04f0e8..d8fbc1a17ba6 100644 > ---

Re: [PATCH] util: fix building on OpenBSD/powerpc

On 26/6/24 06:38, Brad Smith wrote: On 2024-06-23 6:03 p.m., Richard Henderson wrote: On 6/23/24 10:53, Richard Henderson wrote: On 6/22/24 19:03, Brad Smith wrote: util: fix building on OpenBSD/powerpc Signed-off-by: Brad Smith ---   util/cpuinfo-ppc.c | 20   1 file chan

[PATCH v6 0/3] RISC-V: Modularize common match conditions for trigger

According to RISC-V Debug specification ratified version 0.13 [1] (also applied to version 1.0 [2] but it has not been ratified yet), the enabled privilege levels of the trigger is common match conditions for all the types of the trigger. This series modularize the code for checking the privilege

[PATCH v6 2/3] target/riscv: Apply modularized matching conditions for watchpoint

From: Alvin Chang via We have implemented trigger_common_match(), which checks if the enabled privilege levels of the trigger match CPU's current privilege level. Remove the related code in riscv_cpu_debug_check_watchpoint() and invoke trigger_common_match() to check the privilege levels of the t

[PATCH v6 3/3] target/riscv: Apply modularized matching conditions for icount trigger

From: Alvin Chang via We have implemented trigger_common_match(), which checks if the enabled privilege levels of the trigger match CPU's current privilege level. We can invoke trigger_common_match() to check the privilege levels of the type 3 triggers. Signed-off-by: Alvin Chang Acked-by: Alis

[PATCH v6 1/3] target/riscv: Add functions for common matching conditions of trigger

From: Alvin Chang via According to RISC-V Debug specification version 0.13 [1] (also applied to version 1.0 [2] but it has not been ratified yet), there are several common matching conditions before firing a trigger, including the enabled privilege levels of the trigger. This commit adds trigger

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