On Thu, Jun 06, 2024 at 10:02:48AM -0400, Don Porter wrote:
> The new "info pg" monitor command prints the current page table,
> including virtual address ranges, flag bits, and snippets of physical
> page numbers. Completely filled regions of the page table with
> compatible flags are "folded", w
Hi Philippe,
On Fri, Jun 07, 2024 at 08:17:36AM +0200, Philippe Mathieu-Daudé wrote:
> Date: Fri, 7 Jun 2024 08:17:36 +0200
> From: Philippe Mathieu-Daudé
> Subject: Re: [PATCH] i386/apic: Add hint on boot failure because of
> disabling x2APIC
>
> On 6/6/24 16:08, Zhao Liu wrote:
> > Currently,
On 6/7/2024 3:46 PM, Zhao Liu wrote:
Hi Philippe,
On Fri, Jun 07, 2024 at 08:17:36AM +0200, Philippe Mathieu-Daudé wrote:
Date: Fri, 7 Jun 2024 08:17:36 +0200
From: Philippe Mathieu-Daudé
Subject: Re: [PATCH] i386/apic: Add hint on boot failure because of
disabling x2APIC
On 6/6/24 16:08, Z
On Fri, Jun 07, 2024 at 03:47:01PM +0800, Xiaoyao Li wrote:
> Date: Fri, 7 Jun 2024 15:47:01 +0800
> From: Xiaoyao Li
> Subject: Re: [PATCH] i386/apic: Add hint on boot failure because of
> disabling x2APIC
>
> On 6/7/2024 3:46 PM, Zhao Liu wrote:
> > Hi Philippe,
> >
> > On Fri, Jun 07, 2024 a
> -Original Message-
> From: Jinpu Wang [mailto:jinpu.w...@ionos.com]
> Sent: Friday, June 7, 2024 1:54 PM
> To: Gonglei (Arei)
> Cc: qemu-devel@nongnu.org; pet...@redhat.com; yu.zh...@ionos.com;
> mgal...@akamai.com; elmar.ger...@ionos.com; zhengchuan
> ; berra...@redhat.com; arm...@red
Hi Tomasz,
On 6/5/24 2:34 PM, Tomasz Jeznach wrote:
Daniel,
Thank you for your upstreaming work!
Glad to help!
I've synchronized the private branch with v3 changes, and noticed
there is an important change missing in this patchset. We need
reader-writer lock around access to GLib.HashTable
> -Original Message-
> From: Haris Iqbal [mailto:haris.iq...@ionos.com]
> Sent: Thursday, June 6, 2024 9:35 PM
> To: Gonglei (Arei)
> Cc: qemu-devel@nongnu.org; pet...@redhat.com; yu.zh...@ionos.com;
> mgal...@akamai.com; elmar.ger...@ionos.com; zhengchuan
> ; berra...@redhat.com; arm...
> -Original Message-
> From: Peter Xu [mailto:pet...@redhat.com]
> Sent: Wednesday, June 5, 2024 10:19 PM
> To: Gonglei (Arei)
> Cc: qemu-devel@nongnu.org; yu.zh...@ionos.com; mgal...@akamai.com;
> elmar.ger...@ionos.com; zhengchuan ;
> berra...@redhat.com; arm...@redhat.com; lizhij...@f
xiongyining1...@phytium.com.cn
From: Marcin Juszkiewicz
Date: 2024-05-24 02:47
To: Xiong Yining; qemu-arm; qemu-devel
CC: rad; peter.maydell; quic_llindhol
Subject: Re: [PATCH v4 1/1] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa
machine
W dniu 26.04.2024 o 09:35, Xiong Yining pisze:
> Fro
Hi,
> -Original Message-
> From: Peter Xu [mailto:pet...@redhat.com]
> Sent: Thursday, June 6, 2024 5:19 AM
> To: Dr. David Alan Gilbert
> Cc: Michael Galaxy ; zhengchuan
> ; Gonglei (Arei) ;
> Daniel P. Berrangé ; Markus Armbruster
> ; Yu Zhang ; Zhijian Li (Fujitsu)
> ; Jinpu Wang ; Elm
--- /tmp/asl-87N0O2.dsl 2024-06-07 07:20:54.081576394 +
+++ /tmp/asl-4Q0YO2.dsl 2024-06-07 07:20:54.077576397 +
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20230628 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
* Dis
Signed-off-by: Ricardo Ribalda
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..b2c2c10cbc 100644
--- a/tests/qtest/bios-tables-test-allo
When qemu runs without kvm acceleration the ACPI executions take a great
amount of time. If they take more than the default time (30sec), the
ACPI calls fail and the system might not behave correctly.
Now the _PRT table is computed on the fly. We can drastically reduce the
execution of the _PRT me
On Tue, Jun 04, 2024 at 08:14:09PM +0800, Gonglei wrote:
> From: Jialin Wang
>
> It is not feasible to obtain RDMA completion queue notifications
> through poll/ppoll on the rsocket fd. Therefore, we create a thread
> named rpoller for each rsocket fd and two eventfds: pollin_eventfd
> and pollou
Hi Daniel,
> -Original Message-
> From: Daniel P. Berrangé [mailto:berra...@redhat.com]
> Sent: Friday, June 7, 2024 5:04 PM
> To: Gonglei (Arei)
> Cc: qemu-devel@nongnu.org; pet...@redhat.com; yu.zh...@ionos.com;
> mgal...@akamai.com; elmar.ger...@ionos.com; zhengchuan
> ; arm...@redhat.
On Fri, Jun 07, 2024 at 08:58:57AM +, Ricardo Ribalda wrote:
> When qemu runs without kvm acceleration the ACPI executions take a great
> amount of time. If they take more than the default time (30sec), the
> ACPI calls fail and the system might not behave correctly.
Wow.
> Now the _PRT table
On Fri, Jun 07, 2024 at 08:58:58AM +, Ricardo Ribalda wrote:
> --- /tmp/asl-87N0O2.dsl 2024-06-07 07:20:54.081576394 +
> +++ /tmp/asl-4Q0YO2.dsl 2024-06-07 07:20:54.077576397 +
> @@ -1,30 +1,30 @@
> /*
> * Intel ACPI Component Architecture
> * AML/ASL+ Disassembler vers
On Fri, Jun 07, 2024 at 08:58:56AM +, Ricardo Ribalda wrote:
> Signed-off-by: Ricardo Ribalda
Thanks for working on this.
Pls include a cover letter with a patchset in the future.
That should include a changelog, too.
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 1 +
> 1 file chan
On Fri, Jun 7, 2024 at 10:45 AM Gonglei (Arei) wrote:
>
>
>
> > -Original Message-
> > From: Haris Iqbal [mailto:haris.iq...@ionos.com]
> > Sent: Thursday, June 6, 2024 9:35 PM
> > To: Gonglei (Arei)
> > Cc: qemu-devel@nongnu.org; pet...@redhat.com; yu.zh...@ionos.com;
> > mgal...@akamai.
On Tue, Jun 04, 2024 at 03:32:19PM -0400, Peter Xu wrote:
> Hi, Lei, Jialin,
>
> Thanks a lot for working on this!
>
> I think we'll need to wait a bit on feedbacks from Jinpu and his team on
> RDMA side, also Daniel for iochannels. Also, please remember to copy
> Fabiano Rosas in any relevant f
Support 4-byte atomic instruction fetch when instruction is natural
aligned.
Current implementation is not atomic because it loads instruction twice
for first and last 2 bytes. We load 4 bytes at once to keep the
atomicity. This instruction preload method only applys when instruction
is 4-byte ali
On Thu, 6 Jun 2024 at 22:18, Robin Murphy wrote:
>
> On 2024-06-06 6:13 pm, Jonathan Cameron wrote:
> > On Thu, 6 Jun 2024 12:56:59 +0100
> > Peter Maydell wrote:
> >
> >> On Thu, 6 Jun 2024 at 11:48, Zhenyu Zhang wrote:
> >>> In Linux, a check is applied to every device which is exposed through
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And
this topology can be passed to the firmware through /cpus/topology
Device Tree.
Signed-off-by: Xiong Yining
tested-by: Marcin Juszkiewicz
---
docs/system/arm/
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this
topology can be passed to the firmware through /cpus/topology Device Tree.
Signed-off-by: Xiong Yining
--
Changes in v5:
- use /cpus/topology to describe cp
>
> Trace events aren't designed to be multi-lines.
> Few format use the newline character: remove it
> and forbid further uses.
>
> Philippe Mathieu-Daudé (5):
> backends/tpm: Remove newline character in trace event
> hw/sh4: Remove newline character in trace events
> hw/usb: Remove newline c
在2024年6月5日六月 下午1:47,Jiaxun Yang写道:
[...]
> I'll try to upgrade kernel used in this test.
Unfortunately, we don't have kernel build from reliable source
for that test.
I requested Debian project to build kernel for us[1].
[1]: https://salsa.debian.org/kernel-team/linux/-/merge_requests/1074
T
On 30/05/24, Philippe Mathieu-Daudé wrote:
> Semihosting currently uses the TCG probe_access API. To prepare for
> encoding the TCG dependency in Kconfig, do not enable it unless TCG
> is available.
>
> Suggested-by: Paolo Bonzini
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> target/mips/Kcon
Weifeng Liu writes:
> Hi Alex,
>
> On Thu, 2024-06-06 at 11:43 +0100, Alex Bennée wrote:
>> Weifeng Liu writes:
>>
>> > Greetings,
>> >
>> > I'd like to introduce you my attempt to enable virglrenderer backend for
>> > rutabaga empowered virtio-gpu device. I am aware that there have been
>> >
Virtual CPU hotplug support is being added across various architectures[1][3].
This series adds various code bits common across all architectures:
1. vCPU creation and Parking code refactor [Patch 1]
2. Update ACPI GED framework to support vCPU Hotplug [Patch 2,3]
3. ACPI CPUs AML code change [Pat
CPU ctrl-dev MMIO region length could be used in ACPI GED and various other
architecture specific places. Move ACPI_CPU_HOTPLUG_REG_LEN macro to more
appropriate common header file.
Signed-off-by: Salil Mehta
Reviewed-by: Alex Bennée
Reviewed-by: Jonathan Cameron
Reviewed-by: Gavin Shan
Review
KVM vCPU creation is done once during the vCPU realization when Qemu vCPU thread
is spawned. This is common to all the architectures as of now.
Hot-unplug of vCPU results in destruction of the vCPU object in QOM but the
corresponding KVM vCPU object in the Host KVM is not destroyed as KVM doesn't
ACPI GED (as described in the ACPI 6.4 spec) uses an interrupt listed in the
_CRS object of GED to intimate OSPM about an event. Later then demultiplexes the
notified event by evaluating ACPI _EVT method to know the type of event. Use
ACPI GED to also notify the guest kernel about any CPU hot(un)pl
OSPM evaluates _EVT method to map the event. The CPU hotplug event eventually
results in start of the CPU scan. Scan figures out the CPU and the kind of
event(plug/unplug) and notifies it back to the guest. Update the GED AML _EVT
method with the call to \\_SB.CPUS.CSCN
Also, macro CPU_SCAN_METHOD
CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is IO port
based and existing CPUs AML code assumes _CRS objects would evaluate to a system
resource which describes IO Port address. But on ARM arch CPUs control
device(\\_SB.PRES) register interface is memory-mapped hence _CRS ob
On 06/06/2024 10:53, Mark Cave-Ayland wrote:
Instead of directly implementing the writeback using gen_op_st_v(), use the
existing gen_writeback() function.
Suggested-by: Paolo Bonzini
Signed-off-by: Mark Cave-Ayland
---
target/i386/tcg/emit.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 d
GED interface is used by many hotplug events like memory hotplug, NVDIMM hotplug
and non-hotplug events like system power down event. Each of these can be
selected using a bit in the 32 bit GED IO interface. A bit has been reserved for
the CPU hotplug event.
Signed-off-by: Salil Mehta
Reviewed-by
Virtual CPU Hot-unplug leads to unrealization of a CPU object. This also
involves destruction of the CPU AddressSpace. Add common function to help
destroy the CPU AddressSpace.
Signed-off-by: Salil Mehta
Tested-by: Vishnu Pajjuri
Reviewed-by: Gavin Shan
Tested-by: Xianglai Li
Tested-by: Miguel
Add common function to help unregister the GDB register space. This shall be
done in context to the CPU unrealization.
Note: These are common functions exported to arch specific code. For example,
for ARM this code is being referred in associated arch specific patch-set:
Link:
https://lore.kerne
On Fri, Jun 7, 2024 at 6:17 PM Peter Maydell wrote:
>
> On Thu, 6 Jun 2024 at 22:18, Robin Murphy wrote:
> >
> > On 2024-06-06 6:13 pm, Jonathan Cameron wrote:
> > > On Thu, 6 Jun 2024 12:56:59 +0100
> > > Peter Maydell wrote:
> > >
> > >> On Thu, 6 Jun 2024 at 11:48, Zhenyu Zhang wrote:
> > >>
On Thu, Jun 6, 2024 at 7:57 PM Peter Maydell wrote:
>
> On Thu, 6 Jun 2024 at 11:48, Zhenyu Zhang wrote:
> >
> > Multiple warning messages and corresponding backtraces are observed when
> > Linux
> > guest is booted on the host with Fujitsu CPUs. One of them is shown as
> > below.
> >
> > [
On Fri, 31 May 2024 at 19:16, Cord Amfmgm wrote:
> On Fri, May 31, 2024 at 9:03 AM Peter Maydell
> wrote:
>> What I would like to see is what we could classify under
>> "rationale", which is to say "what prompted us to make this
>> change?". In my experience it's important to record this
>> (inc
On Fri, 31 May 2024 at 10:37, Marcin Juszkiewicz
wrote:
>
> Trusted Firmware 2.11 got released, EDK2 202405 got released as well.
> Both were built for QEMU CI and proper patch is now in arm.next queue.
>
> So all requirements to move from legacy 62.5MHz to armv8.6-ready 1GHz
> frequency are fulfi
On 6/7/24 03:14, Jim Shu wrote:
Support 4-byte atomic instruction fetch when instruction is natural
aligned.
Current implementation is not atomic because it loads instruction twice
for first and last 2 bytes. We load 4 bytes at once to keep the
atomicity. This instruction preload method only app
On 7/6/24 13:08, Anton Johansson wrote:
On 30/05/24, Philippe Mathieu-Daudé wrote:
Semihosting currently uses the TCG probe_access API. To prepare for
encoding the TCG dependency in Kconfig, do not enable it unless TCG
is available.
Suggested-by: Paolo Bonzini
Signed-off-by: Philippe Mathieu-D
Document UADK(User Space Accelerator Development Kit) library details
and how to use that for migration.
Signed-off-by: Shameer Kolothum
---
docs/devel/migration/features.rst | 1 +
docs/devel/migration/uadk-compression.rst | 144 ++
2 files changed, 145 insertions(
Hi,
v1 --> v2
(v1:
https://lore.kernel.org/qemu-devel/20240529094435.11140-1-shameerali.kolothum.th...@huawei.com/)
-Rebased on top of Intel IAA v7 series[0].
-Addressed comments from Fabiano. Thanks.
-Gathered tags received.
Please take a look and let me know your feedback.
Thanks,
Shameer
[0
Add --enable-uadk and --disable-uadk options to enable and disable
UADK compression accelerator. This is for using UADK based hardware
accelerators for live migration.
Reviewed-by: Fabiano Rosas
Signed-off-by: Shameer Kolothum
---
meson.build | 14 ++
meson_options
Initialize UADK session and allocate buffers required. The actual
compression/decompression will only be done in a subsequent patch.
Signed-off-by: Shameer Kolothum
---
migration/multifd-uadk.c | 209 ++-
1 file changed, 208 insertions(+), 1 deletion(-)
diff
Uses UADK wd_do_comp_sync() API to (de)compress a normal page using
hardware accelerator.
Reviewed-by: Fabiano Rosas
Signed-off-by: Shameer Kolothum
---
migration/multifd-uadk.c | 132 ++-
1 file changed, 130 insertions(+), 2 deletions(-)
diff --git a/migrat
Adds the skeleton to support uadk compression method.
Complete functionality will be added in subsequent patches.
Acked-by: Markus Armbruster
Reviewed-by: Fabiano Rosas
Signed-off-by: Shameer Kolothum
---
hw/core/qdev-properties-system.c | 2 +-
migration/meson.build| 1 +
migrat
Reviewed-by: Fabiano Rosas
Signed-off-by: Shameer Kolothum
---
tests/qtest/migration-test.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/tests/qtest/migration-test.c b/tests/qtest/migration-test.c
index ef0c3f5e28..056d8790ec 100644
--- a/tests/qtest/migration-tes
Send raw packets over if UADK hardware support is not available. This is to
satisfy Qemu qtest CI which may run on platforms that don't have UADK
hardware support. Subsequent patch will add support for uadk migration
qtest.
Reviewed-by: Fabiano Rosas
Signed-off-by: Shameer Kolothum
---
migrati
* Dr. David Alan Gilbert (d...@treblig.org) wrote:
> A bunch of structs that are currently unused,
> found with a simple script and a bit of eyeballing.
>
> The only one I'm that suspicious of is the SPARC
> one, where the patch which removed the use is a bit
> confusing to me.
Copying in Trivial
> The bits in the secondary vmexit controls are not supported, and in general
> the same
> is true for the secondary vmexit case. I think it's better to not include
> the vmx-entry-
> load-fred bit either, and only do the vmxcap changes.
Right, we don't need it at all.
>
> Also, in patch 1 th
On Tue, 4 Jun 2024 at 07:45, Paolo Bonzini wrote:
>
> From: Brijesh Singh
>
> SEV-SNP support relies on a different set of properties/state than the
> existing 'sev-guest' object. This patch introduces the 'sev-snp-guest'
> object, which can be used to configure an SEV-SNP guest. For example,
> a
On Tue, 4 Jun 2024 at 07:49, Paolo Bonzini wrote:
>
> Add launch_update_data() in SevCommonStateClass and
> invoke as sev_launch_update_data() for SEV object.
>
> Signed-off-by: Pankaj Gupta
> Message-ID: <20240530111643.1091816-26-pankaj.gu...@amd.com>
> Signed-off-by: Paolo Bonzini
Hi; Coveri
When qemu runs without kvm acceleration the ACPI executions take a great
amount of time. If they take more than the default time (30sec), the
ACPI calls fail and the system might not behave correctly.
Now the _PRT table is computed on the fly. We can drastically reduce the
execution of the _PRT me
--- /tmp/asl-87N0O2.dsl 2024-06-07 07:20:54.081576394 +
+++ /tmp/asl-4Q0YO2.dsl 2024-06-07 07:20:54.077576397 +
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20230628 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
* Dis
Signed-off-by: Ricardo Ribalda
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..b2c2c10cbc 100644
--- a/tests/qtest/bios-tables-test-allo
Today for x86 the _PRT() table is computed in runtime.
Under some configurations, computing the _PRT table can take more than
30 seconds and the ACPI timeout is violated.
This patchset modifies _PRT() to return a pre-computed table.
Changelog v2 Thanks Michael:
- Code style
- Add cover letter
Ri
On Tue, 4 Jun 2024 at 07:47, Paolo Bonzini wrote:
>
> From: Michael Roth
>
> Currently all SEV/SEV-ES functionality is managed through a single
> 'sev-guest' QOM type. With upcoming support for SEV-SNP, taking this
> same approach won't work well since some of the properties/state
> managed by 's
On Thu, 23 May 2024 at 02:48, Song Gao wrote:
>
> From: Bibo Mao
>
> Memory map table for fwcfg is used for UEFI BIOS, UEFI BIOS uses the first
> entry from fwcfg memory map as the first memory HOB, the second memory HOB
> will be used if the first memory HOB is used up.
>
> Memory map table for
Hi Zhenzhong,
On 6/5/24 10:30, Zhenzhong Duan wrote:
> Hi,
>
> This series introduce a HostIOMMUDevice abstraction and sub-classes.
> Also HostIOMMUDeviceCaps structure in HostIOMMUDevice and a new interface
> between vIOMMU and HostIOMMUDevice.
>
> A HostIOMMUDevice is an abstraction for an assig
In some cases, the NBD server can be stopped before
nbd_blockdev_client_closed() is called, causing the nbd_server variable
to be nullified. This leads to a NULL pointer dereference when accessing
nbd_server.
Add a NULL check for nbd_server to the nbd_blockdev_client_closed()
function to prevent N
From: Daniel P. Berrangé
The lcitool generated containers have '$MAKE' set to the path
of the right 'make' binary. Using the env variable makes it
possible to override the choice per job.
Signed-off-by: Daniel P. Berrangé
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Message-ID
From: Xinyu Li
Features check of CPUID_SSE and CPUID_SSE2 should use cpuid_features,
rather than cpuid_ext_features.
Signed-off-by: Xinyu Li
Reviewed-by: Zhao Liu
Message-ID: <20240602100904.2137939-1-lixinyu...@ict.ac.cn>
Signed-off-by: Paolo Bonzini
(cherry picked from commit da7c95920d027d
From: Alistair Francis
Previously we only listed a single pmpcfg CSR and the first 16 pmpaddr
CSRs. This patch fixes this to list all 16 pmpcfg and all 64 pmpaddr
CSRs are part of the disassembly.
Reported-by: Eric DeVolder
Signed-off-by: Alistair Francis
Fixes: ea10325917 ("RISC-V Disassemble
From: Paolo Bonzini
xsave.flat checks that "executing the XSETBV instruction causes a general-
protection fault (#GP) if ECX = 0 and EAX[2:1] has the value 10b". QEMU allows
that option, so the test fails. Add the condition.
Cc: qemu-sta...@nongnu.org
Fixes: 892544317fe ("target/i386: implemen
From: "yang.zhang"
Since only root APLICs can have hw IRQ lines, aplic->parent should
be initialized first.
Fixes: e8f79343cf ("hw/intc: Add RISC-V AIA APLIC device emulation")
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: yang.zhang
Cc: qemu-stable
Message-ID: <20240409014445.278-1-gao
On 6/7/24 07:49, Chinmay Rath wrote:
Moving the following instructions to decodetree specification:
lxv{b16, d2, h8, w4, ds, ws}x : X-form
stxv{b16, d2, h8, w4}x : X-form
The changes were verified by validating that the tcg-ops generated for those
instructions remain the same,
From: Eric Blake
Prevent regressions when using NBD with TLS in the presence of
iothreads, adding coverage the fix to qio channels made in the
previous patch.
The shell function pick_unused_port() was copied from
nbdkit.git/tests/functions.sh.in, where it had all authors from Red
Hat, agreeing t
From: Richard Henderson
Gitlab has deprecated and removed support for windows-1809
and shared-windows. Update to saas-windows-medium-amd64 per
https://about.gitlab.com/blog/2024/01/22/windows-2022-support-for-gitlab-saas-runners/
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-
From: Eric Blake
Prevent regressions when using NBD with TLS in the presence of
iothreads, adding coverage the fix to qio channels made in the
previous patch.
The shell function pick_unused_port() was copied from
nbdkit.git/tests/functions.sh.in, where it had all authors from Red
Hat, agreeing t
On Wed, 5 Jun 2024 at 15:43, Edgar E. Iglesias wrote:
>
> From: "Edgar E. Iglesias"
>
> Julien reported that he has seen strange behaviour when running
> Xen on QEMU using GICv2. When Xen migrates a guest's vCPU to
> another pCPU while the vCPU is handling an interrupt the guest
> is unable to pr
Hello Gonglei,
Jinpu and I have tested your patchset by using our migration test
cases on the physical RDMA cards. The result is: among 59 migration
test cases, 10 failed. They are successful when using the original
RDMA migration coed, but always fail when using the patchset. The
syslog on the so
From: Daniel Henrique Barboza
Running a KVM guest using a 6.9-rc3 kernel, in a 6.8 host that has zkr
enabled, will fail with a kernel oops SIGILL right at the start. The
reason is that we can't expose zkr without implementing the SEED CSR.
Disabling zkr in the guest would be a workaround, but if
From: Huang Tao
In RVV and vcrypto instructions, the masked and tail elements are set to 1s
using vext_set_elems_1s function if the vma/vta bit is set. It is the element
agnostic policy.
However, this function can't deal the big endian situation. This patch fixes
the problem by adding handling o
On 30.05.24 12:30, Peter Maydell wrote:
On Fri, 24 May 2024 at 13:08, Sebastian Huber
wrote:
v2:
* Add Kconfig support
* Add array of CPUs to ZynqMachineState
* Add FIQ support
Sebastian Huber (2):
hw/arm/xilinx_zynq: Add cache controller
hw/arm/xilinx_zynq: Support up to two CPU cor
From: Max Chou
According v spec 18.4, only the vfwcvt.f.f.v and vfncvt.f.f.w
instructions will be affected by Zvfhmin extension.
And the vfwcvt.f.f.v and vfncvt.f.f.w instructions only support the
conversions of
* From 1*SEW(16/32) to 2*SEW(32/64)
* From 2*SEW(32/64) to 1*SEW(16/32)
Signed-off-
From: Paolo Bonzini
xsave.flat checks that "executing the XSETBV instruction causes a general-
protection fault (#GP) if ECX = 0 and EAX[2:1] has the value 10b". QEMU allows
that option, so the test fails. Add the condition.
Cc: qemu-sta...@nongnu.org
Fixes: 892544317fe ("target/i386: implemen
From: Daniel Henrique Barboza
raise_mmu_exception(), as is today, is prioritizing guest page faults by
checking first if virt_enabled && !first_stage, and then considering the
regular inst/load/store faults.
There's no mention in the spec about guest page fault being a higher
priority that PMP f
From: Bernhard Beschow
By default, SDL disables the screen saver which prevents the host from powering
down the screen even if the screen is locked. This results in draining the
battery needlessly when the host isn't connected to a wall charger. Fix that by
enabling the screen saver.
Signed-off-
This series is based on Zhenzhong HostIOMMUDevice:
[PATCH v7 00/17] Add a host IOMMU device abstraction to check with vIOMMU
https://lore.kernel.org/all/20240605083043.317831-1-zhenzhong.d...@intel.com/
It allows to convey host IOVA reserved regions to the virtio-iommu and
uses the HostIOMMUDevic
On 6/6/24 07:02, Don Porter wrote:
Signed-off-by: Don Porter
---
target/i386/cpu.h| 42 ++
target/i386/helper.c | 515 +
target/i386/tcg/sysemu/excp_helper.c | 555 +--
3 files changed, 562 insertions(+), 5
The following patches are queued for QEMU stable v8.2.5:
https://gitlab.com/qemu-project/qemu/-/commits/staging-8.2
Patch freeze is 2024-06-07 (frozen), and the release is planned for 2024-06-09:
https://wiki.qemu.org/Planning/8.2
Please respond here or CC qemu-sta...@nongnu.org for any add
From: Max Chou
The opfv_narrow_check needs to check the single width float operator by
require_rvf.
Signed-off-by: Max Chou
Reviewed-by: Daniel Henrique Barboza
Cc: qemu-stable
Message-ID: <20240322092600.1198921-4-max.c...@sifive.com>
Signed-off-by: Alistair Francis
(cherry picked from comm
Queued, thanks (with the op->unit assignment removed, to
answer your question).
Paolo
From: Marcin Juszkiewicz
Cc: qemu-sta...@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2304
Reported-by: Marcin Juszkiewicz
Signed-off-by: Richard Henderson
Signed-off-by: Marcin Juszkiewicz
Message-id: 20240526204551.553282-1-richard.hender...@linaro.org
Reviewed-by: Pete
On 6/7/24 12:42 PM, Fabiano Rosas wrote:
Peter Xu writes:
On Thu, May 23, 2024 at 04:05:48PM -0300, Fabiano Rosas wrote:
We've recently added support for direct-io with multifd, which brings
performance benefits, but creates a non-uniform user interface by
coupling direct-io with the multifd
From: Eric Blake
Since qemu 8.2, the combination of NBD + TLS + iothread crashes on an
assertion failure:
qemu-kvm: ../io/channel.c:534: void qio_channel_restart_read(void *): Assertion
`qemu_get_current_aio_context() == qemu_coroutine_get_aio_context(co)' failed.
It turns out that when we rem
On 6/6/24 21:53, Philippe Mathieu-Daudé wrote:
On 6/6/24 23:14, Pierrick Bouvier wrote:
On 6/6/24 05:40, Philippe Mathieu-Daudé wrote:
cpu::plugin_state is allocated in cpu_common_initfn() when
the vCPU state is created. Release it in cpu_common_finalize()
when we are done.
Signed-off-by: Phil
From: Eric Blake
Since qemu 8.2, the combination of NBD + TLS + iothread crashes on an
assertion failure:
qemu-kvm: ../io/channel.c:534: void qio_channel_restart_read(void *): Assertion
`qemu_get_current_aio_context() == qemu_coroutine_get_aio_context(co)' failed.
It turns out that when we rem
From: Daniel P. Berrangé
The TSAN job started failing when gitlab rolled out their latest
release. The root cause is a change in the Google COS version used
on shared runners. This brings a kernel running with
vm.mmap_rnd_bits = 31
which is incompatible with TSAN in LLVM < 18, which only suppo
From: Daniel P. Berrangé
The lcitool generated containers have '$MAKE' set to the path
of the right 'make' binary. Using the env variable makes it
possible to override the choice per job.
Signed-off-by: Daniel P. Berrangé
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Message-ID
From: Max Chou
If the checking functions check both the single and double width
operators at the same time, then the single width operator checking
functions (require_rvf[min]) will check whether the SEW is 8.
Signed-off-by: Max Chou
Reviewed-by: Daniel Henrique Barboza
Cc: qemu-stable
Messag
From: Daniel Henrique Barboza
Commit 33a24910ae changed 'reg_width' to use 'vlenb', i.e. vector length
in bytes, when in this context we want 'reg_width' as the length in
bits.
Fix 'reg_width' back to the value in bits like 7cb59921c05a
("target/riscv/gdbstub.c: use 'vlenb' instead of shifting '
Compute the host reserved regions in virtio_iommu_set_iommu_device().
The usable IOVA regions are retrieved from the HOSTIOMMUDevice.
The virtio_iommu_set_host_iova_ranges() helper turns usable regions
into complementary reserved regions while testing the inclusion
into existing ones. virtio_iommu_
From: Paolo Bonzini
xsave.flat checks that "executing the XSETBV instruction causes a general-
protection fault (#GP) if ECX = 0 and EAX[2:1] has the value 10b". QEMU allows
that option, so the test fails. Add the condition.
Cc: qemu-sta...@nongnu.org
Fixes: 892544317fe ("target/i386: implemen
From: Marcin Juszkiewicz
Cc: qemu-sta...@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2304
Reported-by: Marcin Juszkiewicz
Signed-off-by: Richard Henderson
Signed-off-by: Marcin Juszkiewicz
Message-id: 20240526204551.553282-1-richard.hender...@linaro.org
Reviewed-by: Pete
From: Alistair Francis
When running the instruction
```
cbo.flush 0(x0)
```
QEMU would segfault.
The issue was in cpu_gpr[a->rs1] as QEMU does not have cpu_gpr[0]
allocated.
In order to fix this let's use the existing get_address()
helper. This also has the benefit of performing pointer m
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