Refer to scripts/simpletrace.py, add the helpers to read the trace file
and parse the record type field, record header and log header.
Suggested-by: Paolo Bonzini
Signed-off-by: Zhao Liu
---
scripts/simpletrace-rust/src/main.rs | 151 +++
1 file changed, 151 insertions(+
Format simple trace output, as in the Python version. Further, complete
the trace file input and trace log output.
Additionally, remove `#![allow(dead_code)]` and
`#![allow(unused_variables)]` to allow rustc to do related checks.
Suggested-by: Paolo Bonzini
Signed-off-by: Zhao Liu
---
scripts/
Refer to scripts/tracetool/__init__.py, add Event & Arguments
abstractions in trace module.
Suggested-by: Paolo Bonzini
Signed-off-by: Zhao Liu
---
scripts/simpletrace-rust/Cargo.lock | 52
scripts/simpletrace-rust/Cargo.toml | 2 +
scripts/simpletrace-rust/src/trace.rs | 330 ++
Describe how to compile and use this Rust version program.
And also define the Rust code contribution requirements.
Signed-off-by: Zhao Liu
---
docs/devel/tracing.rst | 35 +++
1 file changed, 35 insertions(+)
diff --git a/docs/devel/tracing.rst b/docs/devel/tra
AST2700 SLI engine is designed to accelerate the
throughput between cross-die connections.
It have CPU_SLI at CPU die and IO_SLI at IO die.
Introduce dummy AST2700 SLI and SLIIO models.
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
hw/misc/aspeed_sli.c
AST2700 CPU is ARM Cortex-A35 which is 64 bits.
Add TARGET_AARCH64 to build this machine.
According to the design of ast2700, it has a bootmcu(riscv-32) which
is used for executing SPL.
Then, CPUs(cortex-a35) execute u-boot, kernel and rofs.
Currently, qemu not support emulate two CPU architectur
Changes from v1:
The patch series supports WDT, SDMC, SMC, SCU, SLI and INTC for AST2700 SoC.
Changes from v2:
- replace is_aarch64 with is_bus64bit for sdmc patch review.
- fix incorrect dram size for AST2700
Changes from v3:
- Add AST2700 Evaluation board in ASPEED document
- Add avocado test c
AST2700 fmc/spi controller's address decoding unit is 64KB
and only bits [31:16] are used for decoding. Introduce seg_to_reg
and reg_to_seg handlers for ast2700 fmc/spi controller.
In addition, adds ast2700 fmc, spi0, spi1, and spi2 class init handler.
Signed-off-by: Troy Lee
Signed-off-by: Jamin
DMA length is from 1 byte to 32MB for AST2600 and AST10x0
and DMA length is from 4 bytes to 32MB for AST2500.
In other words, if "R_DMA_LEN" is 0, it should move at least 1 byte
data for AST2600 and AST10x0 and 4 bytes data for AST2500.
To support all ASPEED SOCs, adds dma_start_length parameter t
Initial definitions for a simple machine using an AST2700 SOC (Cortex-a35 CPU).
AST2700 SOC and its interrupt controller are too complex to handle
in the common Aspeed SoC framework. We introduce a new ast2700
class with instance_init and realize handlers.
AST2700 is a 64 bits quad core cpus and
AST2700 dram size calculation is not back compatible AST2600.
According to the DDR capacity hardware behavior,
if users write the data to address which is beyond the ram size,
it would write the data to address 0.
For example:
a. sdram base address "0x4 "
b. sdram size is 1 GiB
The availabl
AST2700 support the maximum dram size is 8GiB
and has a "DMA DRAM Side Address High Part(0x7C)"
register to support 64 bits dma dram address.
Add helper routines functions to compute the dma dram
address, new features and update trace-event
to support 64 bits dram address.
Signed-off-by: Troy Lee
The SDRAM memory controller(DRAMC) controls the access to external
DDR4 and DDR5 SDRAM and power up to DDR4 and DDR5 PHY.
The DRAM memory controller of AST2700 is not backward compatible
to previous chips such AST2600, AST2500 and AST2400.
Max memory is now 8GiB on the AST2700. Introduce new
aspe
These macros are no longer used for ASPEED SOCs, so removes them.
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
hw/misc/aspeed_sdmc.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 64c
Fix coding style issues from checkpatch.pl
Test command:
scripts/checkpatch.pl --no-tree -f hw/misc/aspeed_sdmc.c
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
hw/misc/aspeed_sdmc.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --
Add AST2700 Evaluation board and its boot command.
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
docs/system/arm/aspeed.rst | 39 ++
1 file changed, 35 insertions(+), 4 deletions(-)
diff --git a/docs/system/arm/aspeed.rs
AST2700 interrupt controller(INTC) provides hardware interrupt interfaces
to interrupt of processors PSP, SSP and TSP. In INTC, each interrupt of
INT 128 to INT136 combines 32 interrupts.
Introduce a new aspeed_intc class with instance_init and realize handlers.
So far, this model only supports G
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
hw/ssi/aspeed_smc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 6e1a84c197..8a8d77b480 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/a
AST2700 have two SCU controllers which are SCU and SCUIO.
Both SCU and SCUIO registers are not compatible previous SOCs
, introduces new registers and adds ast2700 scu, sucio class init handler.
The pclk divider selection of SCUIO is defined in SCUIO280[20:18] and
the pclk divider selection of SCU
AST2700 wdt controller is similiar to AST2600's wdt, but
the AST2700 has 8 watchdogs, and they each have 0x80 of registers.
Introduce ast2700 object class and increase the number of regs(offset) of
ast2700 model.
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
Add a test case to test Aspeed OpenBMC SDK v09.01 on AST2700 board.
It loads u-boot-nodtb.bin, u-boot.dtb, tfa and optee-os
images to dram first which base address is 0x4.
Then, boot and launch 4 cpu cores.
```
qemu-system-aarch64 -machine ast2700-evb
-device loader,force-raw=on,addr=
On Fri, Mar 15, 2024 at 12:57:47PM +0900, Akihiko Odaki wrote:
> I submitted a RFC series[1] to add support for SR-IOV emulation to
> virtio-net-pci. During the development of the series, I fixed some
> trivial bugs and made improvements that I think are independently
> useful. This series extracts
From: Eric Blake
nbd_negotiate() is already marked coroutine_fn. And given the fix in
the previous patch to have nbd_negotiate_handle_starttls not create
and wait on a g_main_loop (as that would violate coroutine
constraints), it is worth marking the rest of the related static
functions reachabl
From: Daniel Henrique Barboza
Commit d424db2354 excluded some strerrorname_np() instances because they
break musl libc builds. Another instance happened to slip by via commit
d4ff3da8f4.
Remove it before it causes trouble again.
Fixes: d4ff3da8f4 (target/riscv/kvm: initialize 'vlenb' via get-re
From: Peter Maydell
The Linux kernel 5.10.16 binary for sunxi has been removed from
apt.armbian.com. This means that the avocado tests for these machines
will be skipped (status CANCEL) if the old binary isn't present in
the avocado cache.
Update to 6.6.16, in the same way we did in commit e384d
From: Li Zhijian
bdrv_activate_all() should not be called from the coroutine context, move
it to the QEMU thread colo_process_incoming_thread() with the bql_lock
protected.
The backtrace is as follows:
#4 0x561af7948362 in bdrv_graph_rdlock_main_loop () at
../block/graph-lock.c:260
#5 0
From: Philippe Mathieu-Daudé
The documentation says:
ADDV Rm, RnRn + Rm -> Rn, overflow -> T
But QEMU implementation was:
ADDV Rm, RnRn + Rm -> Rm, overflow -> T
Fix by filling the correct Rm register.
Add tests provided by Paul Cercueil.
Cc: qemu-sta...@nongnu.org
Fixes
From: Thomas Huth
Cirrus-CI introduced limitations to the free CI minutes. To avoid that
we are consuming them too fast, let's drop the usual targets that are
not that important since they are either a subset of another target
(like i386 or ppc being a subset of x86_64 or ppc64 respectively), or
From: Ruihan Li
When emulated with QEMU, interrupts will never come in the following
loop. However, if the NOP instruction is uncommented, interrupts will
fire as normal.
loop:
cli
call do_sti
jmp loop
do_sti:
sti
The following patches are queued for QEMU stable v9.0.1:
https://gitlab.com/qemu-project/qemu/-/commits/staging-9.0
Patch freeze is 2024-06-07, and the release is planned for 2024-06-09:
https://wiki.qemu.org/Planning/9.0
Please respond here or CC qemu-sta...@nongnu.org on any additional pa
This setsockopt accepts zero-lengh optlen (current qemu implementation
does not allow this). Also, there's no need to make a copy of the key,
it is enough to use lock_user() (which accepts zero length already).
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2197
Fixes: f312fc "linux-
From: Richard Henderson
For cpus using PMSA, when the MPU is disabled, the default memory
type is Normal, Non-cachable. This means that it should not
have alignment restrictions enforced.
Cc: qemu-sta...@nongnu.org
Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when
translation
From: Richard Henderson
Match the extra inserts of INDEX_op_insn_start, fixing
the db->num_insns != 1 assert in translator_loop.
Fixes: dcd092a0636 ("accel/tcg: Improve can_do_io management")
Signed-off-by: Richard Henderson
(cherry picked from commit ca51921158e3cc07520a0ef5eb33739e5852ac6e)
S
From: Richard Henderson
Not only do these instructions have f32 inputs, they also do not
perform rounding. Since these are relatively simple, implement
them properly inline.
Signed-off-by: Richard Henderson
Message-Id: <20240502165528.244004-6-richard.hender...@linaro.org>
Signed-off-by: Mark
From: Philippe Mathieu-Daudé
Use little endian for derivative OTP fuse key.
Cc: qemu-sta...@nongnu.org
Fixes: c752bb079b ("hw/nvram: NPCM7xx OTP device model")
Suggested-by: Avi Fishman
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20240422125813.1403-1-phi...@linaro.org
Reviewed-by: Peter
From: Zhu Yangyang
Coroutines are not supposed to block. Instead, they should yield.
The client performs TLS upgrade outside of an AIOContext, during
synchronous handshake; this still requires g_main_loop. But the
server responds to TLS upgrade inside a coroutine, so a nested
g_main_loop is wro
From: Li Zhijian
It seems that this error does not need to be propagated to the upper,
directly output the error to avoid the leaks
Closes: https://gitlab.com/qemu-project/qemu/-/issues/2283
Fixes: 2fda101de07 ("virtio-crypto: Support asynchronous mode")
Signed-off-by: Li Zhijian
Reviewed-by: P
From: Jeuk Kim
It fixes the buffer overflow vulnerability in the ufs device.
The bug was detected by sanitizers.
You can reproduce it by:
cat << EOF |\
qemu-system-x86_64 \
-display none -machine accel=qtest -m 512M -M q35 -nodefaults -drive \
file=null-co://,if=none,id=disk0 -device ufs,id=ufs
From: Zhao Liu
Commit e4e98c7eebfa ("pc: q35: Bump max_cpus to 4096 vcpus") increases
the supported CPUs for PC Q35 machine.
Update maximum CPU numbers for PC Q35 in the document.
Signed-off-by: Zhao Liu
Message-ID: <20240412085358.731560-1-zhao1@linux.intel.com>
Signed-off-by: Thomas Huth
From: Alexandra Diupina
The DMA descriptor structures for this device have
a set of "address extension" fields which extend the 32
bit source addresses with an extra 16 bits to give a
48 bit address:
https://docs.amd.com/r/en-US/ug1085-zynq-ultrascale-trm/ADDR_EXT-Field
However, we misimplement
From: Richard Henderson
These instructions have f32 inputs, which changes the decode
of the register numbers. While we're fixing things, use a
common helper for both insns, extracting the 16-bit scalar
in tcg beforehand.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Mes
From: Richard Henderson
Gitlab has deprecated and removed support for windows-1809
and shared-windows. Update to saas-windows-medium-amd64 per
https://about.gitlab.com/blog/2024/01/22/windows-2022-support-for-gitlab-saas-runners/
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-
From: Richard Henderson
This instruction has f32 as source1, which alters the
decoding of the register number, which means we've been
passing the wrong data for odd register numbers.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20240502165528.244004-4-richa
From: Gerd Hoffmann
Move the pflash_blk_write_start() call. We need the offset of the
first data write, not the offset for the setup (number-of-bytes)
write. Without this fix u-boot can do block writes to the first
flash block only.
While being at it drop a leftover FIXME.
Cc: qemu-sta...@non
From: hikalium
Remove gtk_widget_get_scale_factor() usage from the calculation of
the motion events in the GTK backend to make it work correctly on
environments that have `gtk_widget_get_scale_factor() != 1`.
This scale factor usage had been introduced in the commit f14aab420c and
at that time t
From: Richard Henderson
This is a 2-operand instruction, not 3-operand.
Worse, we took the source from the wrong operand.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20240502165528.244004-3-richard.hender...@linaro.org>
Signed-off-by: Mark Cave-Ayland
(ch
Fixes: 1590154ee437 ("target/loongarch: Fix qemu-system-loongarch64 assert
failed with the option '-d int'")
Signed-off-by: Michael Tokarev
Reviewed-by: Richard Henderson
(cherry picked from commit 0cbb322f70e8a87e4acbffecef5ea8f9448f3513)
Signed-off-by: Michael Tokarev
diff --git a/target/loo
From: Thomas Huth
If you try to run the configure script on a system without a working
C compiler, you get a very misleading error message:
ERROR: Unrecognized host OS (uname -s reports 'Linux')
Some people already opened bug tickets because of this problem:
https://gitlab.com/qemu-project/q
From: Richard Henderson
TCG register spill/fill uses tcg_out_ld/st with all types,
not necessarily going through INDEX_op_{ld,st}_vec.
Cc: qemu-sta...@nongnu.org
Fixes: 16288ded944 ("tcg/loongarch64: Lower basic tcg vec ops to LSX")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2336
Si
From: Richard Henderson
This instruction has f32 inputs, which changes the decode
of the register numbers.
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20240502165528.244004-7-richard.hender...@linaro.org>
Signed-off-by: Mark Cave-Ayland
(cherry picked fro
From: Paolo Bonzini
According to the manual, 32-bit vs 64-bit is governed by REX.W
and REX ignores the 0x66 prefix. This can be confirmed with this
program:
#include
int main()
{
int x = 0x1234;
int y;
asm("popcntl %1, %0" : "=r" (y) : "r" (x)); printf("%x\
From: Paolo Bonzini
The VMX feature bit depends on general availability of WAITPKG,
not the other way round.
Fixes: 33cc88261c3 ("target/i386: add support for
VMX_SECONDARY_EXEC_ENABLE_USER_WAIT_PAUSE", 2023-08-28)
Cc: qemu-sta...@nongnu.org
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
From: Jiaxun Yang
Higher bits for memory nodes were omitted at qemu_fdt_setprop_cells.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Jiaxun Yang
Reviewed-by: Song Gao
Message-Id: <20240520-loongarch-fdt-memnode-v1-1-5ea9be939...@flygoat.com>
Signed-off-by: Song Gao
(cherry picked from commit 6204
From: Paolo Bonzini
Reject 0x66/0xf3/0xf2 in front of them.
Cc: qemu-sta...@nongnu.org
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
(cherry picked from commit 40a3ec7b5ffde500789d016660a171057d6b467c)
Signed-off-by: Michael Tokarev
diff --git a/target/i386/tcg/translate.c b/ta
From: Fiona Ebner
Migration from an 8.2 or 9.0 binary to an 8.1 binary with machine
version 8.1 can fail with:
> kvm: Features 0x1c0010130afffa7 unsupported. Allowed features: 0x10179bfffe7
> kvm: Failed to load virtio-net:virtio
> kvm: error while loading state for instance 0x0 of device
> '00
From: Song Gao
The right fdt memory node like [1], not [2]
[1]
memory@0 {
device_type = "memory";
reg = <0x00 0x00 0x00 0x1000>;
};
[2]
memory@0 {
device_type = "memory";
reg = <0x02 0x00 0x02 0x1
From: Paolo Bonzini
Intel SDM 18.3.1.4 "If an occurrence of the MOV or POP instruction
loads the SS register executes with EFLAGS.TF = 1, no single-step debug
exception occurs following the MOV or POP instruction."
Cc: qemu-sta...@nongnu.org
Signed-off-by: Paolo Bonzini
(cherry picked from comm
From: Paolo Bonzini
If EFLAGS.RF is 1, special processing in gen_eob_worker() is needed and
therefore goto_tb cannot be used.
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Cc: qemu-sta...@nongnu.org
Signed-off-by: Paolo Bonzini
(cherry picked from commit 8225bff7c5db504f50e54
From: Paolo Bonzini
Ensure that they go through unmodified, instead of removing one layer
of quoting.
-D is a pretty specialized option and most options that can have spaces
do not need it (for example, c_args is covered by --extra-cflags).
Therefore it's unlikely that this causes actual trouble
From: Philippe Mathieu-Daudé
The documentation says:
SUBV Rm, RnRn - Rm -> Rn, underflow -> T
The overflow / underflow can be calculated as:
T = ((Rn ^ Rm) & (Result ^ Rn)) >> 31
However we were using the incorrect:
T = ((Rn ^ Rm) & (Result ^ Rm)) >> 31
Fix by using the Rn reg
From: Song Gao
The char pointer 'ramName' point to a block of memory,
but never free it. Use 'g_autofree' to automatically free it.
Resolves: Coverity CID 1544773
Fixes: 0cf1478d6 ("hw/loongarch: Add numa support")
Signed-off-by: Song Gao
Reviewed-by: Peter Maydell
Reviewed-by: Philippe Mathi
From: Philippe Mathieu-Daudé
"plugin_mask" was renamed as "event_mask" in commit c006147122
("plugins: create CPUPluginState and migrate plugin_mask").
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240427155714.53669-3-phi...@linaro.org>
(cherry picked fro
From: Dongwon Kim
'fence_fd' needs to be validated always before being referenced
And the passing condition should include '== 0' as 0 is a valid
value for the file descriptor.
Suggested-by: Marc-André Lureau
Reviewed-by: Daniel P. Berrangé
Cc: Philippe Mathieu-Daudé
Cc: Daniel P. Berrangé
C
From: Song Gao
On kvm side, get_fpu/set_fpu save the vreg registers high 192bits,
but QEMU missing.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240514110752.989572-1-gaos...@loongson.cn>
(cherry picked from commit 07c0866103d4aa2dd83c7c3e7898843e28e3
From: Mattias Nissler
PCI config space is little-endian, so on a big-endian host we need to
perform byte swaps for values as they are passed to and received from
the generic PCI config space access machinery.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Jaganna
From: Daniel P. Berrangé
All the lcitool generated containers define a "MAKE" env. It will be
convenient for later patches if all containers do this.
Signed-off-by: Daniel P. Berrangé
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20240513111551.488088-2-berra...@re
From: donsheng
This bug fix addresses the incorrect return value of kvm_hv_handle_exit for
KVM_EXIT_HYPERV_SYNIC, which should be EXCP_INTERRUPT.
Handling of KVM_EXIT_HYPERV_SYNIC in QEMU needs to be synchronous.
This means that async_synic_update should run in the current QEMU vCPU
thread befor
Six registers scr0 - scr3, eflags and ftop are added in percpu vmstate.
And two functions kvm_loongarch_get_lbt/kvm_loongarch_put_lbt are added
to save/restore lbt registers.
Signed-off-by: Bibo Mao
---
target/loongarch/cpu.h | 12 +
target/loongarch/kvm/kvm.c | 52 ++
Loongson Binary Translation (LBT) is used to accelerate binary
translation. LBT feature is added in kvm mode, not supported in TCG
mode since it is not emulated. And only LBT feature is added here, LBT
registers saving and restoring is not supported since it depeeds on LBT
feautre implemented in KV
Loongson Binary Translation (LBT) is used to accelerate binary
translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM
eflags (eflags) and x87 fpu stack pointer (ftop).
Now LBT feature is added in kvm mode, not supported in TCG mode since
it is not emulated. There are two feature f
On Wed, May 22, 2024 at 10:11:03PM +0100, Salil Mehta via wrote:
> Date: Wed, 22 May 2024 22:11:03 +0100
> From: Salil Mehta via
> Subject: [PATCH V11 0/8] Add architecture agnostic code to support vCPU
> Hotplug
> X-Mailer: git-send-email 2.34.1
>
> Virtual CPU hotplug support is being added ac
Fea,
Please try to also add all RISC-V QEMU maintainers and reviewers when sending
patches. It will get your patches reviewed and queued faster. Otherwise the
maintainers can miss you your series due to high ML traffic.
You can fetch who you want to CC using the get_maintainer.pl script with the
On 20/5/24 16:14, Peter Maydell wrote:
The board list in target-arm.rst is supposed to be in alphabetical
order by the title text of each file (which is not the same as
alphabetical order by filename). A few items had got out of order;
correct them.
The entry for
"Facebook Yosemite v3.5 Platfor
Hi Alex,
On 21/5/24 14:53, Alex Bennée wrote:
There are a few more bits referencing centos8 in the tree which needed
cleaning up. After this we can remove the dedicated runner from the
gitlab registration. If we want to keep a dedicated Centos runner then
we can add back the bits needed to set i
On 22/5/24 14:39, Paolo Bonzini wrote:
gen_rot_carry and gen_rot_overflow are meant to be called with count == NULL
if the count cannot be zero. However this is not done in gen_ROL and gen_ROR,
and writing everywhere "can_be_zero ? count : NULL" is burdensome and less
readable. Just pass can_be
On 21/5/24 23:06, Richard Henderson wrote:
When passing disassembly data to plugin callbacks,
translator_st_len relies on db->tb->size having been set.
Fixes: 4c833c60e047 ("disas: Use translator_st to get disassembly data")
Reported-by: Bernhard Beschow
Signed-off-by: Richard Henderson
---
With pv steal time supported, VM machine needs get physical address
of each vcpu and notify to new host during migration. Here two
functions kvm_loongarch_get_stealtime/kvm_loongarch_put_stealtime
are provided and they are called in cpu_pre_save/cpu_post_load
separately.
Signed-off-by: Bibo Mao
-
On 22/5/24 23:27, Richard Henderson wrote:
Use plain grep instead.
Signed-off-by: Richard Henderson
---
contrib/generate_all.sh | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 23/5/24 20:39, Marcin Juszkiewicz wrote:
FreeBSD has longer support cycle for stable release (14.x EoL in 2028)
than OpenBSD (7.3 we used is already EoL). Also bugfixes are backported
so we can stay on 14.x for longer.
Planned to upgrade to newer OpenBSD but we would have to wait for 7.6
rele
On Wed, May 22, 2024 at 10:11:04PM +0100, Salil Mehta via wrote:
> Date: Wed, 22 May 2024 22:11:04 +0100
> From: Salil Mehta via
> Subject: [PATCH V11 1/8] accel/kvm: Extract common KVM vCPU {creation,
> parking} code
> X-Mailer: git-send-email 2.34.1
>
> KVM vCPU creation is done once during th
On Wed, May 22, 2024 at 10:11:05PM +0100, Salil Mehta via wrote:
> Date: Wed, 22 May 2024 22:11:05 +0100
> From: Salil Mehta via
> Subject: [PATCH V11 2/8] hw/acpi: Move CPU ctrl-dev MMIO region len macro
> to common header file
> X-Mailer: git-send-email 2.34.1
>
> CPU ctrl-dev MMIO region leng
On 24/5/24 07:35, Akihiko Odaki wrote:
LeakSanitizer complains about allocations whose references are held
only by automatic variables. It is possible to free them to suppress
the complaints, but it is a chore to make sure they are freed in all
exit paths so make them static instead.
Signed-off-
On Wed, May 22, 2024 at 10:11:06PM +0100, Salil Mehta via wrote:
> Date: Wed, 22 May 2024 22:11:06 +0100
> From: Salil Mehta via
> Subject: [PATCH V11 3/8] hw/acpi: Update ACPI GED framework to support vCPU
> Hotplug
> X-Mailer: git-send-email 2.34.1
>
> ACPI GED (as described in the ACPI 6.4 sp
On 24/5/24 07:35, Akihiko Odaki wrote:
-fsanitize=undefined complains if function pointers are casted. It
also prevents enabling teh strict mode of CFI which is currently
disabled with -fsanitize-cfi-icall-generalize-pointers.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2345
Signed-o
On 27/5/24 11:57, Philippe Mathieu-Daudé wrote:
On 24/5/24 07:35, Akihiko Odaki wrote:
-fsanitize=undefined complains if function pointers are casted. It
also prevents enabling teh strict mode of CFI which is currently
s/teh/the/ (also next patch)
disabled with -fsanitize-cfi-icall-generaliz
On 24/5/24 10:00, Akihiko Odaki wrote:
We used to request declare_dependency() to link_whole static libraries.
If a static library is a thin archive, GNU ld needs to open all object
files referenced by the archieve, and sometimes reaches to the open
"archive"
file limit.
Another problem with
On Mon, May 27, 2024 at 02:41:01PM +0800, Shaoqin Huang wrote:
> Date: Mon, 27 May 2024 14:41:01 +0800
> From: Shaoqin Huang
> Subject: Re: [PATCH v9] arm/kvm: Enable support for
> KVM_ARM_VCPU_PMU_V3_FILTER
>
> Hi Zhao,
>
> Thanks for your proposed idea. If you are willing to take the PMU Filt
Hi Sunil,
On 24/5/24 08:14, Sunil V L wrote:
Since virt is a common machine name across architectures like ARM64 and
RISC-V, move existing ARM64 ACPI tables under aarch64 folder so that
RISC-V tables can be added under riscv64 folder in future.
Signed-off-by: Sunil V L
Reviewed-by: Alistair Fr
Hi Jamin,
On 27/5/24 10:02, Jamin Lin wrote:
The SDRAM memory controller(DRAMC) controls the access to external
DDR4 and DDR5 SDRAM and power up to DDR4 and DDR5 PHY.
The DRAM memory controller of AST2700 is not backward compatible
to previous chips such AST2600, AST2500 and AST2400.
Max memor
Cc'ing a few more Rust integration reviewers :)
On 27/5/24 10:14, Zhao Liu wrote:
Hi maintainers and list,
This RFC series attempts to re-implement simpletrace.py with Rust, which
is the 1st task of Paolo's GSoC 2024 proposal.
There are two motivations for this work:
1. This is an open chance
Hi Bibo,
On 27/5/24 10:35, Bibo Mao wrote:
Loongson Binary Translation (LBT) is used to accelerate binary
translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM
eflags (eflags) and x87 fpu stack pointer (ftop).
Now LBT feature is added in kvm mode, not supported in TCG mode sin
Hi Bibo,
On 27/5/24 10:34, Bibo Mao wrote:
Loongson Binary Translation (LBT) is used to accelerate binary
translation. LBT feature is added in kvm mode, not supported in TCG
mode since it is not emulated. And only LBT feature is added here, LBT
registers saving and restoring is not supported sin
Philippe Mathieu-Daudé writes:
> On 13/5/24 16:45, Markus Armbruster wrote:
>> Philippe Mathieu-Daudé writes:
>>
>>> On 13/5/24 16:17, Markus Armbruster wrote:
qmp_memsave() and qmp_pmemsave() report fwrite() error as
An IO error has occurred
Improve this to
Hi Dorjoy,
On 18/5/24 10:07, Dorjoy Chowdhury wrote:
An EIF (Enclave Image Format)[1] image is used to boot an AWS nitro
enclave[2] virtual machine. The EIF file contains the necessary
kernel, cmdline, ramdisk(s) sections to boot.
This commit adds support for loading EIF image using the microvm
Hi!
Noticed today that a rebuild of basically the same tree (a few commits apart)
in CI result in just 11% hit rate of ccache:
https://gitlab.com/mjt0k/qemu/-/jobs/6947445337#L5054
while it should be near 100%. What's interesting in there is:
1) cache size is close to max cache size,
and more
The non-standard .fa library suffix breaks the link source
de-duplication done by Meson so drop it.
The lack of link source de-duplication causes AddressSanitizer to
complain ODR violations, and makes GNU ld abort when combined with
clang's LTO.
Fortunately, the non-standard suffix is not necessa
From: Akihiko Odaki
This reverts commit 3eacf70bb5a83e4775ad8003cbca63a40f70c8c2.
It was only needed because of duplicate objects caused by
declare_dependency(link_whole: ...), and can be dropped now
that meson.build specifies objects and dependencies separately
for the internal dependencies.
S
Signed-off-by: Paolo Bonzini
---
meson.build | 34 +++---
1 file changed, 19 insertions(+), 15 deletions(-)
diff --git a/meson.build b/meson.build
index 63866071445..92ddbd17c32 100644
--- a/meson.build
+++ b/meson.build
@@ -3562,21 +3562,28 @@ modinfo_files = []
b
Hi,
Interesting work. I don't have any particular comments for the code, but I
wanted to address a few of the points here.
> 2. Rust delivers faster parsing.
For me, the point of simpletrace.py is not to be the fastest at parsing, but
rather to open the door for using Python libraries like numpy
From: Akihiko Odaki
We used to request declare_dependency() to link_whole static libraries.
If a static library is a thin archive, GNU ld keeps all object files
referenced by the archive open, and sometimes exceeds the open file limit.
Another problem with link_whole is that suboptimal handling
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