On Thu, May 16, 2024 at 07:00:11PM -0300, Fabiano Rosas wrote:
> Daniel P. Berrangé writes:
>
> > On Fri, Apr 26, 2024 at 11:20:34AM -0300, Fabiano Rosas wrote:
> >> We're enabling using the fdset interface to pass file descriptors for
> >> use in the migration code. Since migrations can happen m
On Fri, May 17, 2024 at 08:24:44AM +0200, Thomas Huth wrote:
> On 16/05/2024 20.24, Daniel P. Berrangé wrote:
> > On Thu, May 16, 2024 at 05:52:43PM +0100, Camilla Conte wrote:
> > > Enables caching from the qemu-project repository.
> > >
> > > Uses a dedicated "$NAME-cache" tag for caching, to ad
Migration from an 8.2 or 9.0 binary to an 8.1 binary with machine
version 8.1 can fail with:
> kvm: Features 0x1c0010130afffa7 unsupported. Allowed features: 0x10179bfffe7
> kvm: Failed to load virtio-net:virtio
> kvm: error while loading state for instance 0x0 of device
> ':00:12.0/virtio-ne
Hello Jamin
On 5/15/24 11:01, Jamin Lin wrote:
Hi Cedric,
Sorry reply you late.
Hello Jamin,
To handle the DMA DRAM Side Address High register, we should reintroduce an
"dram-base" property which I removed a while ago. Something like :
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/
On 4/19/24 09:58, Jamin Lin wrote:
Hi Cedric,
On 4/16/24 11:18, Jamin Lin wrote:
Initial definitions for a simple machine using an AST2700 SOC (Cortex-a35
CPU).
AST2700 SOC and its interrupt controller are too complex to handle in
the common Aspeed SoC framework. We introduce a new ast2700 c
On Thu, May 16, 2024 at 07:24:04PM +0100, Daniel P. Berrangé wrote:
> On Thu, May 16, 2024 at 05:52:43PM +0100, Camilla Conte wrote:
> > Enables caching from the qemu-project repository.
> >
> > Uses a dedicated "$NAME-cache" tag for caching, to address limitations.
> > See issue "when using --cac
On Fri, May 17, 2024 at 08:15 AM +0200, Thomas Huth wrote:
> adapter_info_so_needed() treats its "opaque" parameter as a S390FLICState,
> but the function belongs to a VMStateDescription that is attached to a
> TYPE_VIRTIO_CCW_BUS device. This is currently causing a crash when the
> user tries to
Hello,
is the mailing list the right place for contributions like this?
On 07.05.24 15:03, Sebastian Huber wrote:
Add support for the cache controller and up to two Cortex-A9 MPCore.
Sebastian Huber (2):
hw/arm/xilinx_zynq: Add cache controller
hw/arm/xilinx_zynq: Support up to two CPU c
On Fri, 17 May 2024, Nicholas Piggin wrote:
On Mon May 13, 2024 at 9:28 AM AEST, BALATON Zoltan wrote:
The ppc_hash32_pp_prot() function in mmu-hash32.c is the same as
pp_check() in mmu_common.c, merge these to remove duplicated code.
Define the common function as static lnline otherwise exporti
On Fri, 17 May 2024, Nicholas Piggin wrote:
On Mon May 13, 2024 at 9:28 AM AEST, BALATON Zoltan wrote:
The mmask local variable is a less descriptive local name for a
constant. Drop it and use the constant directly in the two places it
is needed.
Wow, lots more. I might take up to patch 34ish
On Thu, May 02, 2024 at 11:56:40AM +0200, Philippe Mathieu-Daudé wrote:
> crypto-tls-psk-helpers.c doesn't access the declarations
> of "crypto-tls-x509-helpers.h", remove the include line
> to avoid when building with GNUTLS but without Libtasn1:
>
> In file included from tests/unit/crypto-tls-
On Thu, May 02, 2024 at 11:56:41AM +0200, Philippe Mathieu-Daudé wrote:
> pkix_asn1_tab[] is only accessed by crypto-tls-x509-helpers.c,
> rename pkix_asn1_tab.c as pkix_asn1_tab.c.inc and include it once.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> tests/unit/crypto-tls-x509-helpers.h
On Thu, May 02, 2024 at 11:56:42AM +0200, Philippe Mathieu-Daudé wrote:
> We only use Libtasn1 in unit tests. As noted in commit d47b83b118
> ("tests: add migration tests of TLS with x509 credentials"), having
> GnuTLS without Libtasn1 is a valid configuration, so do not require
> Libtasn1, to avoi
On Thu, May 02, 2024 at 11:56:42AM +0200, Philippe Mathieu-Daudé wrote:
> We only use Libtasn1 in unit tests. As noted in commit d47b83b118
> ("tests: add migration tests of TLS with x509 credentials"), having
> GnuTLS without Libtasn1 is a valid configuration, so do not require
> Libtasn1, to avoi
Hi Cerdric,
> On 4/19/24 09:58, Jamin Lin wrote:
> > Hi Cedric,
> >> On 4/16/24 11:18, Jamin Lin wrote:
> >>> Initial definitions for a simple machine using an AST2700 SOC
> >>> (Cortex-a35
> >> CPU).
> >>>
> >>> AST2700 SOC and its interrupt controller are too complex to handle
> >>> in the commo
Hi Cédric,
>-Original Message-
>From: Cédric Le Goater
>Sent: Friday, May 17, 2024 12:48 AM
>To: Duan, Zhenzhong ; qemu-
>de...@nongnu.org
>Cc: alex.william...@redhat.com; eric.au...@redhat.com; Peng, Chao P
>
>Subject: Re: [PATCH 00/16] VFIO: misc cleanups part2
>
>Hello Zhenzhong,
>
>On
Hi Frank,
On 5/7/24 23:57, Frank Chang wrote:
Hi Daniel,
Daniel Henrique Barboza 於 2024年3月8日 週五 上午12:06寫道：
From: Tomasz Jeznach
Add PCIe Address Translation Services (ATS) capabilities to the IOMMU.
This will add support for ATS translation requests in Fault/Event
queues, Page-request que
Add persistent reservation in/out operations for raw driver.
The following methods are implemented: bdrv_co_pr_read_keys,
bdrv_co_pr_read_reservation, bdrv_co_pr_register, bdrv_co_pr_reserve,
bdrv_co_pr_release, bdrv_co_pr_clear and bdrv_co_pr_preempt.
Signed-off-by: Changqi Lu
Signed-off-by: zhe
Hi,
Please ignore the v2 series. Please review the v3 series instead.
Thanks!
v2->v3:
In v2 Persist Through Power Loss(PTPL) is enable default.
In v3 PTPL is supported, which is passed as a parameter.
v1->v2:
- Add sg_persist --report-capabilities for SCSI protocol and enable
oncs and rescap f
Add persistent reservation in/out operations
at the block level. The following operations
are included:
- read_keys:retrieves the list of registered keys.
- read_reservation: retrieves the current reservation status.
- register: registers a new reservation key.
- reserve:
Add constants for the persistent reservation in/out protocol
in the scsi/constant module. The constants include the persistent
reservation command, type, and scope values defined in sections
6.13 and 6.14 of the SCSI Primary Commands-4 (SPC-4) specification.
Signed-off-by: Changqi Lu
Signed-off-b
Add persistent reservation in/out operations in the
SCSI device layer. By introducing the persistent
reservation in/out api, this enables the SCSI device
to perform reservation-related tasks, including querying
keys, querying reservation status, registering reservation
keys, initiating and releasin
Add reservation acquire, reservation register,
reservation release and reservation report commands
in the nvme device layer.
By introducing these commands, this enables the nvme
device to perform reservation-related tasks, including
querying keys, querying reservation status, registering
reservati
This commit enables the rescap function in the
namespace by detecting the supported reservation
function in the backend driver.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
hw/nvme/ns.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/nvme/ns.c b/hw/nvme/ns.c
index ea8d
This commit introduces two helper functions
that facilitate the conversion between the
persistent reservation types used in the SCSI
protocol and those used in the block layer.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
include/scsi/utils.h | 8 +
scsi/utils.c | 81 +++
Add persistent reservation in/out operations for iscsi driver.
The following methods are implemented: bdrv_co_pr_read_keys,
bdrv_co_pr_read_reservation, bdrv_co_pr_register, bdrv_co_pr_reserve,
bdrv_co_pr_release, bdrv_co_pr_clear and bdrv_co_pr_preempt.
Signed-off-by: Changqi Lu
Signed-off-by: z
This commit enables ONCS to support the reservation
function at the controller level. It also lays the
groundwork for detecting and enabling the reservation
function on a per-namespace basis in RESCAP.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
hw/nvme/ctrl.c | 3 ++-
1 file change
Add constants for the NVMe persistent command protocol.
The constants include the reservation command opcode and
reservation type values defined in section 7 of the NVMe
2.0 specification.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
include/block/nvme.h | 61
This commit introduces two helper functions
that facilitate the conversion between the
reservation types used in the NVME protocol
and those used in the block layer.
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
hw/nvme/nvme.h | 40 +++
On Fri, 17 May 2024 at 09:31, Sebastian Huber
wrote:
>
> Hello,
>
> is the mailing list the right place for contributions like this?
Yes it is, and this is on my todo list to review. Sorry for
not getting back to you earlier, but I was on holiday last
week and at a conference this week. I hope to
On Fri, May 17, 2024 at 07:05:05AM +0200, Thomas Huth wrote:
> On 16/05/2024 19.43, Peter Maydell wrote:
> > On Thu, 16 May 2024 at 18:34, Michael S. Tsirkin wrote:
> > >
> > > On Thu, May 16, 2024 at 06:29:39PM +0100, Peter Maydell wrote:
> > > > On Thu, 16 May 2024 at 17:22, Daniel P. Berrangé
On Fri, May 10, 2024 at 06:16:46PM +0100, Jonathan Cameron wrote:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/jic23/cxl-staging.git/log/?h=arm-numa-fixes
>
Thank you :)
> I've run out of time to sort out cover letters and things + just before the
> merge
> window is never a good time get
Hi Nick,
> From: Nicholas Piggin
> Sent: Friday, May 17, 2024 4:44 AM
>
> On Thu May 16, 2024 at 11:35 PM AEST, Salil Mehta wrote:
> >
> > > From: Harsh Prateek Bora
> > > Sent: Thursday, May 16, 2024 2:07 PM
> > >
> > > Hi Salil,
> > >
> > > On 5/16/24 17:42, Salil Mehta wrote:
On Fri, 17 May 2024 18:07:07 +0800
Yuquan Wang wrote:
> On Fri, May 10, 2024 at 06:16:46PM +0100, Jonathan Cameron wrote:
> >
> > https://git.kernel.org/pub/scm/linux/kernel/git/jic23/cxl-staging.git/log/?h=arm-numa-fixes
> >
> Thank you :)
> > I've run out of time to sort out cover letters a
Cc stable - candidate for backport perhaps.
On Sun, May 12, 2024 at 11:59:45AM +0200, Bernhard Beschow wrote:
> By default, SDL disables the screen saver which prevents the host from
> powering
> down the screen even if the screen is locked. This results in draining the
> battery needlessly when
From: Yu Zhang
Currently we use only VTD_FR_PASID_TABLE_INV as fault reason.
Update with more detailed fault reasons listed in VT-d spec 7.2.3.
Signed-off-by: Yu Zhang
Signed-off-by: Zhenzhong Duan
---
hw/i386/intel_iommu_internal.h | 8 +++-
hw/i386/intel_iommu.c | 25 +
>-Original Message-
>From: CLEMENT MATHIEU--DRIF
>Subject: [PATCH ats_vtd v2 20/25] intel_iommu: fill the PASID field when
>creating an instance of IOMMUTLBEntry
>
>Signed-off-by: Clément Mathieu--Drif
>---
> hw/i386/intel_iommu.c | 7 +++
> 1 file changed, 7 insertions(+)
>
>diff --
>-Original Message-
>From: CLEMENT MATHIEU--DRIF
>Subject: [PATCH ats_vtd v2 21/25] atc: generic ATC that can be used by PCIe
>devices that support SVM
>
>As the SVM-capable devices will need to cache translations, we provide
>an first implementation.
>
>This cache uses a two-level desig
On Thu, May 16, 2024 at 01:04:42PM -0400, Michael S. Tsirkin wrote:
> On Thu, May 16, 2024 at 05:22:29PM +0100, Daniel P. Berrangé wrote:
> > Files contributed to QEMU are generally expected to be provided in the
> > preferred format for manipulation. IOW, we generally don't expect to
> > have gene
On Thu, May 16, 2024 at 01:11:26PM -0400, Michael S. Tsirkin wrote:
> On Thu, May 16, 2024 at 05:22:30PM +0100, Daniel P. Berrangé wrote:
> > There has been an explosion of interest in so called AI code generators
> > in the past year or two. Thus far though, this is has not been matched
> > by a b
On Thu, May 16, 2024 at 01:33:01PM -0400, Michael S. Tsirkin wrote:
> On Thu, May 16, 2024 at 05:22:28PM +0100, Daniel P. Berrangé wrote:
> > Currently we have a short paragraph saying that patches must include
> > a Signed-off-by line, and merely link to the kernel documentation.
> > The linked ke
On 17/05/2024 12:40, Duan, Zhenzhong wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
>> -Original Message-
>> From: CLEMENT MATHIEU--DRIF
>> Subject: [PATCH ats_vtd v2 20/25] int
On 17/05/2024 12:44, Duan, Zhenzhong wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
>> -Original Message-
>> From: CLEMENT MATHIEU--DRIF
>> Subject: [PATCH ats_vtd v2 21/25] atc
On Thu, 16 May 2024 10:05:33 -0700
fan wrote:
> On Fri, Apr 19, 2024 at 02:24:36PM -0400, Gregory Price wrote:
> > On Thu, Apr 18, 2024 at 04:10:51PM -0700, nifan@gmail.com wrote:
> > > A git tree of this series can be found here (with one extra commit on top
> > > for printing out accepted
We don't need C++ for the normal QEMU builds anymore, so installing
g++ in each and every container seems to be a waste of time and disk
space. The only container that still needs it is the Fedora MinGW
container that builds the only remaining C++ code in ./qga/vss-win32/
and we can install it ther
The following changes since commit 85ef20f1673feaa083f4acab8cf054df77b0dbed:
Merge tag 'pull-maintainer-may24-160524-2' of https://gitlab.com/stsquad/qemu
into staging (2024-05-16 10:02:56 +0200)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git tags/pull-request-202
Run "make lcitool-refresh" after the previous changes to the
lcitool files. This removes the g++ and xfslibs-dev packages
from the dockerfiles (except for the fedora-win64-cross dockerfile
where we keep the C++ compiler).
Message-ID: <20240516084059.511463-6-th...@redhat.com>
Reviewed-by: Daniel P
In case lcitool fails (e.g. with a python backtrace), this makes
the output of lcitool much more readable.
Suggested-by: Daniel P. Berrangé
Message-ID: <20240516084059.511463-2-th...@redhat.com>
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Thomas Huth
---
tests/lcitool/refresh | 4 ++--
1 f
From: Philippe Mathieu-Daudé
QEMU's commit a5730b8bd3 ("block/file-posix: Simplify the
XFS_IOC_DIOINFO handling") removed the need for the 'xfsprogs'
package.
Signed-off-by: Philippe Mathieu-Daudé
[thuth: Adjusted the patch from the lcitools repo to QEMU's repo]
Message-ID: <20240516084059.5114
Let's try to keep the entries in alphabetical order here!
Message-ID: <20240516084059.511463-5-th...@redhat.com>
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Thomas Huth
---
tests/lcitool/projects/qemu.yml | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/te
adapter_info_so_needed() treats its "opaque" parameter as a S390FLICState,
but the function belongs to a VMStateDescription that is attached to a
TYPE_VIRTIO_CCW_BUS device. This is currently causing a crash when the
user tries to save or migrate the VM state. Fix it by using s390_get_flic()
to get
On Tue Apr 23, 2024 at 4:32 PM AEST, Chinmay Rath wrote:
> Moving the below instructions to decodetree specification :
>
> divd[u, e, eu][o][.]: XO-form
> mod{sd, ud} : X-form
>
> With this patch, all the fixed-point arithmetic instructions have been
> moved to decodetre
Signed-off-by: Ray Lee
---
hw/scsi/scsi-bus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c
index 9e40b0c920..7c3df9b31a 100644
--- a/hw/scsi/scsi-bus.c
+++ b/hw/scsi/scsi-bus.c
@@ -255,7 +255,7 @@ static void scsi_dma_restart_req(SCSI
Hello Michael and Peter,
Exactly, not so compelling, as I did it first only on servers widely
used for production in our data center. The network adapters are
Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme BCM5720
2-port Gigabit Ethernet PCIe
InfiniBand controller: Mellanox Technol
Hi Zhenzhong
On 17/05/2024 12:23, Zhenzhong Duan wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> From: Yu Zhang
>
> Currently we use only VTD_FR_PASID_TABLE_INV as fault reason.
> Upda
Hi Ray,
On 17/5/24 09:14, Ray Lee wrote:
Signed-off-by: Ray Lee
---
hw/scsi/scsi-bus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c
index 9e40b0c920..7c3df9b31a 100644
--- a/hw/scsi/scsi-bus.c
+++ b/hw/scsi/scsi-bus.c
@@ -255,7 +
On 17/5/24 08:15, Thomas Huth wrote:
adapter_info_so_needed() treats its "opaque" parameter as a S390FLICState,
but the function belongs to a VMStateDescription that is attached to a
TYPE_VIRTIO_CCW_BUS device. This is currently causing a crash when the
user tries to save or migrate the VM state.
From: Cédric Le Goater
This to avoid a build breakage :
../ui/gtk-egl.c: In function ‘gd_egl_draw’:
../ui/gtk-egl.c:73:9: error: unused variable ‘fence_fd’
[-Werror=unused-variable]
73 | int fence_fd;
| ^~~~
Fixes: fa6426805b12 ("ui/console: Use qemu_dmabuf_set_..() he
From: Daniel P. Berrangé
This effectively reverts
commit 54c4ea8f3ae614054079395842128a856a73dbf9
Author: Zhao Liu
Date: Sat Mar 9 00:01:37 2024 +0800
hw/core/machine-smp: Deprecate unsupported "parameter=1" SMP configurations
but is not done as a 'git revert' since the part of th
From: Gustavo Romero
GDB commit a207f6b3a38 ('Rewrite "python" command exception handling')
changed how exit() called from Python scripts loaded by GDB behave,
turning it into an exception instead of a generic error code that is
returned. This change caused several QEMU tests to crash with the
fo
56 +0200)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/hw-misc-20240517
for you to fetch changes up to 93a3048dcf4565c73f2aa1d751f7197e296f1f1f:
tests: Gently exit from GDB when tests complete (2024-05-17
From: Daniel P. Berrangé
Validate that it is possible to pass 'parameter=1' for any SMP topology
parameter, since unsupported parameters are implicitly considered to
always have a value of 1.
Signed-off-by: Daniel P. Berrangé
Reviewed-by: Zhao Liu
Reviewed-by: Ján Tomko
Message-ID: <202405131
From: Gerd Hoffmann
Move the pflash_blk_write_start() call. We need the offset of the
first data write, not the offset for the setup (number-of-bytes)
write. Without this fix u-boot can do block writes to the first
flash block only.
While being at it drop a leftover FIXME.
Cc: qemu-sta...@non
On Fri, May 17, 2024 at 01:18:52PM +0100, Jonathan Cameron wrote:
> On Thu, 16 May 2024 10:05:33 -0700
> fan wrote:
>
> > On Fri, Apr 19, 2024 at 02:24:36PM -0400, Gregory Price wrote:
> > > On Thu, Apr 18, 2024 at 04:10:51PM -0700, nifan@gmail.com wrote:
> > > > A git tree of this series c
Hi Chalapathi,
Looks good. Just some suggestions on readability and some
simplifications (see below).
Thanks,
Glenn
On Thu, 2024-05-16 at 11:33 -0500, Chalapathi V wrote:
> SPI controller device model supports a connection to a single SPI
> responder.
> This provide access to SPI seeproms, TPM
On 4/30/24 19:05, Denis V. Lunev wrote:
Preallocate filter allows to implement really interesting setups.
Assume that we have
* shared block device, f.e. iSCSI LUN, implemented with some HW device
* clustered LVM on top of it
* QCOW2 image stored inside LVM volume
This allows very cheap cluster
On 4/30/24 19:02, Denis V. Lunev wrote:
This parameter is always passed as 'false' from the caller.
Signed-off-by: Denis V. Lunev
CC: Andrey Zhadchenko
CC: Kevin Wolf
CC: Hanna Reitz
---
block/file-posix.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/block/f
Hi Chalapathi,
Looks good. I think I would just shorten the names of the xscom
read/write functions to make things more readable inside the
transaction function.
-Glenn
Reviewed-by: Glenn Miles
> +static uint64_t pnv_spi_seeprom_xscom_addr(uint32_t reg)
> +{
> +return pnv_xscom_addr(SPIC2
Thanks and sorry for missing this in the original commit.
Acked-by: Dongwon Kim
> -Original Message-
> From: Philippe Mathieu-Daudé
> Sent: Friday, May 17, 2024 8:02 AM
> To: qemu-devel@nongnu.org
> Cc: Cédric Le Goater ; Kim, Dongwon
> ; Marc-André Lureau
> ; Philippe Mathieu-Daudé
>
Reviewed-by: Glenn Miles
-Glenn
On Thu, 2024-05-16 at 11:33 -0500, Chalapathi V wrote:
> Add Microchip's 25CSM04 Serial EEPROM to m25p80. 25CSM04 provides 4
> Mbits
> of Serial EEPROM utilizing the Serial Peripheral Interface (SPI)
> compatible
> bus. The device is organized as 524288 bytes o
OK, acknowledged. Thanks, All.
- Michael
On 5/16/24 13:07, Steven Sistare wrote:
On 5/16/2024 1:24 PM, Michael Galaxy wrote:
On 5/14/24 08:54, Michael Tokarev wrote:
On 5/14/24 16:39, Michael Galaxy wrote:
Steve,
OK, so it does not look like this bugfix you wrote was included in
8.2.4 (whi
Daniel Henrique Barboza writes:
> Commit 33a24910ae changed 'reg_width' to use 'vlenb', i.e. vector length
> in bytes, when in this context we want 'reg_width' as the length in
> bits.
>
> Fix 'reg_width' back to the value in bits like 7cb59921c05a
> ("target/riscv/gdbstub.c: use 'vlenb' instead
On Fri, 17 May 2024 11:14:41 +0100
Jonathan Cameron wrote:
> On Fri, 17 May 2024 18:07:07 +0800
> Yuquan Wang wrote:
>
> > On Fri, May 10, 2024 at 06:16:46PM +0100, Jonathan Cameron wrote:
> > >
> > > https://git.kernel.org/pub/scm/linux/kernel/git/jic23/cxl-staging.git/log/?h=arm-numa-fixes
Daniel P. Berrangé writes:
> Currently we have a short paragraph saying that patches must include
> a Signed-off-by line, and merely link to the kernel documentation.
> The linked kernel docs have a lot of content beyond the part about
> sign-off an thus are misleading/distracting to QEMU contrib
Daniel P. Berrangé writes:
> +
> +IOW, using coccinelle to convert code from one pattern to another pattern, or
> +fixing docs typos with a spell checker, or transforming code using sed / awk
> /
> +etc, are not considered to be acts of code generation. Where an automated
> +manipulation is per
Reviewed-by: Glenn Miles
-Glenn
On Thu, 2024-05-16 at 11:33 -0500, Chalapathi V wrote:
> In this commit, create SPI controller on p10 chip and connect cs irq.
>
> The QOM tree of spi controller and seeprom are.
> /machine (powernv10-machine)
> /chip[0] (power10_v2.0-pnv-chip)
> /pib_spic[
Chalapathi,
I'm having trouble seeing the benefit of breaking this commit out from
patch 1/5. It seems like the two should be merged into a single commit
responsible for adding the PNV SPI Controller model.
-Glenn
On Thu, 2024-05-16 at 11:33 -0500, Chalapathi V wrote:
> In this commit SPI shif
Hi,
In this v2 'reg_width' was renamed to 'bitsize' to provide a bit more
clarity about what's the value type of the variable. It is the same name
used by riscv_gen_dynamic_csr_feature() for a variable that has the same
purpose. The variable rename was suggested by Alex in v1.
Changes from v1:
-
Commit 33a24910ae changed 'reg_width' to use 'vlenb', i.e. vector length
in bytes, when in this context we want 'reg_width' as the length in
bits.
Fix 'reg_width' back to the value in bits like 7cb59921c05a
("target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen'") set
beforehand.
While w
Daniel P. Berrangé writes:
> On Wed, May 08, 2024 at 05:39:53PM -0300, Fabiano Rosas wrote:
>> Peter Xu writes:
>>
>> > On Wed, May 08, 2024 at 09:53:48AM +0100, Daniel P. Berrangé wrote:
>> >> On Fri, Apr 26, 2024 at 11:20:41AM -0300, Fabiano Rosas wrote:
>> >> > Allow multifd to use an fdset
In v2:
- correct list email address
- add iotest
- add R-b
I'm offline next week, and have been communicating with Stefan who may
want to push this through his block tree instead of waiting for me to
get back.
Eric Blake (2):
qio: Inherit follow_coroutine_ctx across TLS
iotests: test NBD+TLS+
Prevent regressions when using NBD with TLS in the presence of
iothreads, adding coverage the fix to qio channels made in the
previous patch.
CC: qemu-sta...@nongnu.org
Signed-off-by: Eric Blake
---
tests/qemu-iotests/tests/nbd-tls-iothread | 170 ++
tests/qemu-iotests/tests/
Since qemu 8.2, the combination of NBD + TLS + iothread crashes on an
assertion failure:
qemu-kvm: ../io/channel.c:534: void qio_channel_restart_read(void *): Assertion
`qemu_get_current_aio_context() == qemu_coroutine_get_aio_context(co)' failed.
It turns out that when we removed AioContext loc
On Fri, May 17, 2024 at 09:50:13PM GMT, Eric Blake wrote:
> In v2:
> - correct list email address
> - add iotest
> - add R-b
>
> I'm offline next week, and have been communicating with Stefan who may
> want to push this through his block tree instead of waiting for me to
> get back.
I also meant
Adding a bit of self-review (in case you want to amend this before
pushing, instead of waiting for me to get back online),
On Fri, May 17, 2024 at 09:50:15PM GMT, Eric Blake wrote:
> Prevent regressions when using NBD with TLS in the presence of
> iothreads, adding coverage the fix to qio channels
Add properties for user specified
- PCI vendor, device, subsystem vendor and subsystem IDs
- IEEE-OUI ID
e.g. PCI IDs to be specified as follows:
-device
nvme,id_vendor=0xABCD,id_device=0xA0B0,id_subsys_vendor=0xEF00,id_subsys=0xEF01
IEEE-OUI ID (Identify Controller bytes 75:73) is to be
specifi
On 2024/05/18 5:30, Daniel Henrique Barboza wrote:
Commit 33a24910ae changed 'reg_width' to use 'vlenb', i.e. vector length
in bytes, when in this context we want 'reg_width' as the length in
bits.
Fix 'reg_width' back to the value in bits like 7cb59921c05a
("target/riscv/gdbstub.c: use 'vlenb'
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