From: Bin Meng
The old Wind River email address (bin.m...@windriver.com) is no longer
available due to an internal infrastructure change within the company.
While a new email address (bin.meng...@windriver.com) has been assigned
to me, I am unable to find a way to send this patch directly from th
On 02/05/2024 13:22, Joao Martins wrote:
External email: Use caution opening links or attachments
On 01/05/2024 13:28, Avihai Horon wrote:
On 01/05/2024 14:50, Joao Martins wrote:
External email: Use caution opening links or attachments
On 30/04/2024 06:16, Avihai Horon wrote:
Emit VFIO
On 02/05/2024 14:19, Markus Armbruster wrote:
External email: Use caution opening links or attachments
Avihai Horon writes:
Add a new QAPI event for VFIO device migration state change. This event
will be emitted when a VFIO device changes its migration state, for
example, during migration
01.05.2024 10:55, Akihiko Odaki wrote:
This fixes LeakSanitizer complaints with xkbcommon 1.6.0.
Signed-off-by: Akihiko Odaki
---
qemu-keymap.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/qemu-keymap.c b/qemu-keymap.c
index 8c80f7a4ed65..7a9f38cf9863 100644
--- a/qemu-keymap.c
+++
On 2024/05/05 19:24, Michael Tokarev wrote:
01.05.2024 10:55, Akihiko Odaki wrote:
This fixes LeakSanitizer complaints with xkbcommon 1.6.0.
Signed-off-by: Akihiko Odaki
---
qemu-keymap.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/qemu-keymap.c b/qemu-keymap.c
index 8c80f7a4ed65
This macro can be used to abbreviate PAGE_READ | PAGE_WRITE | PAGE_EXEC
for which PAGE_RWX is a better name and renaming it also shows it is
not related to TARGET_PAGE_BITS.
Signed-off-by: BALATON Zoltan
---
accel/tcg/user-exec.c | 2 +-
bsd-user/mmap.c| 6 +++---
include/exec/c
On 03.05.24 19:34, Zenghui Yu wrote:
We wrongly encoded ID_AA64PFR1_EL1 using {3,0,0,4,2} in hvf_sreg_match[] so
we fail to get the expected ARMCPRegInfo from cp_regs hash table with the
wrong key.
Fix it with the correct encoding {3,0,0,4,1}. With that fixed, the Linux
guest can properly dete
W dniu 3.05.2024 o 17:34, Zenghui Yu pisze:
We wrongly encoded ID_AA64PFR1_EL1 using {3,0,0,4,2} in hvf_sreg_match[] so
we fail to get the expected ARMCPRegInfo from cp_regs hash table with the
wrong key.
Fix it with the correct encoding {3,0,0,4,1}. With that fixed, the Linux
guest can properly
Hi Ashraf,
On 04/05/24 12:45, Muzammil Ashraf wrote:
Hi All,
I am debugging a PCI subsystem. I saw callbacks registered here to
catch the pcie config read/write request at hw/pci/pci_host.c:201. How
can I make my subregion to overlap this area and How to receive those
pcie config read/write req
Among implemented STM32L4x5 devices, USART, GPIO and SYSCFG
have a clock source, but none has a corresponding test in QEMU.
This patch makes sure that all 3 devices create a clock,
have a QOM property to access the clock frequency,
and adds QTests checking that clock enable in RCC has the
expected
Signed-off-by: Inès Varhol
---
hw/gpio/stm32l4x5_gpio.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/gpio/stm32l4x5_gpio.c b/hw/gpio/stm32l4x5_gpio.c
index 71bf5fddb2..14e6618d30 100644
--- a/hw/gpio/stm32l4x5_gpio.c
+++ b/hw/gpio/stm32l4x5_gpio.c
@@ -20,6 +20,7 @@
#include "qemu/log
For USART, GPIO and SYSCFG devices, check that clock frequency before
and after enabling the peripheral clock in RCC is correct.
Signed-off-by: Inès Varhol
---
Hello,
Should these tests be regrouped in stm32l4x5_rcc-test.c ?
Best regards,
Inès Varhol
tests/qtest/stm32l4x5_gpio-test.c | 39
Signed-off-by: Inès Varhol
---
include/hw/misc/stm32l4x5_syscfg.h | 1 +
hw/arm/stm32l4x5_soc.c | 2 ++
hw/misc/stm32l4x5_syscfg.c | 26 ++
3 files changed, 29 insertions(+)
diff --git a/include/hw/misc/stm32l4x5_syscfg.h
b/include/hw/misc/stm32l4x5
Signed-off-by: Inès Varhol
---
hw/char/stm32l4x5_usart.c | 12
1 file changed, 12 insertions(+)
diff --git a/hw/char/stm32l4x5_usart.c b/hw/char/stm32l4x5_usart.c
index fc5dcac0c4..ee7727481c 100644
--- a/hw/char/stm32l4x5_usart.c
+++ b/hw/char/stm32l4x5_usart.c
@@ -26,6 +26,7 @@
#
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
hw/char/stm32l4x5_usart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/char/stm32l4x5_usart.c b/hw/char/stm32l4x5_usart.c
index 02f666308c..fc5dcac0c4 100644
--- a/hw/char/stm32l4x5_usart.c
+++ b/hw/char/stm32l
On 2024/5/5 21:18, Alexander Graf wrote:
On 03.05.24 19:34, Zenghui Yu wrote:
We wrongly encoded ID_AA64PFR1_EL1 using {3,0,0,4,2} in
hvf_sreg_match[] so
we fail to get the expected ARMCPRegInfo from cp_regs hash table with the
wrong key.
Fix it with the correct encoding {3,0,0,4,1}. With tha
As far as I can tell it was never used.
Signed-off-by: Dr. David Alan Gilbert
---
hw/usb/dev-network.c | 8
1 file changed, 8 deletions(-)
diff --git a/hw/usb/dev-network.c b/hw/usb/dev-network.c
index 2c33e36cad..d00d68b21d 100644
--- a/hw/usb/dev-network.c
+++ b/hw/usb/dev-network.c
I think it's use was removed by
Commit 5883d8b296 ("mmu-hash*: Don't use full ppc_hash{32,
64}_translate() path for get_phys_page_debug()")
Signed-off-by: Dr. David Alan Gilbert
---
target/ppc/mmu-hash32.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/target/ppc/mmu-hash32.c b/target/
This struct has been unused since
Commit f932093ae165 ("hw/arm/bcm2836: Split out common part of BCM283X
classes")
Signed-off-by: Dr. David Alan Gilbert
---
hw/arm/bcm2836.c | 12
1 file changed, 12 deletions(-)
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index db191661f2..40a
As far as I can tell this struct has never been used in this
file (it is used in can_core.c).
Signed-off-by: Dr. David Alan Gilbert
---
net/can/can_host.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/net/can/can_host.c b/net/can/can_host.c
index a3c84028c6..b2fe553f91 100644
--- a/ne
Since 'setup_rt_frame' has never been implemented, this struct
is unused.
Signed-off-by: Dr. David Alan Gilbert
---
linux-user/cris/signal.c | 8
1 file changed, 8 deletions(-)
diff --git a/linux-user/cris/signal.c b/linux-user/cris/signal.c
index 4f532b2903..10948bcf30 100644
--- a/li
A bunch of structs that are currently unused,
found with a simple script and a bit of eyeballing.
The only one I'm that suspicious of is the SPARC
one, where the patch which removed the use is a bit
confusing to me.
Tested with a
--target-list=ppc-softmmu,m68k-softmmu,x86_64-softmmu,arm-softm
The structs 'target_fpxreg' and 'target_xmmreg' are unused since
Paolo's:
Commit 2796f290b546 ("linux-user: i386/signal: support FXSAVE fpstate on
32-bit emulation")
Signed-off-by: Dr. David Alan Gilbert
---
linux-user/i386/signal.c | 10 --
1 file changed, 10 deletions(-)
diff --git a
This struct is unused since Peter's
Commit b8ae597f0e6d ("linux-user/sparc: Fix errors in target_ucontext
structures")
However, hmm, I'm a bit confused since that commit modifies the
structure and then removes it, was that intentional?
Signed-off-by: Dr. David Alan Gilbert
---
linux-user/sparc/
I have already studied this document and tested the overlap of MemoryRegions.
There is a structure named PCIHostState and in this struct there is a
field named config_reg. I want to understand where it gets changed.
On Sun, May 5, 2024 at 6:45 PM Aditya Gupta wrote:
>
> Hi Ashraf,
>
> On 04/05/2
On 5/5/24 05:10, BALATON Zoltan wrote:
This macro can be used to abbreviate PAGE_READ | PAGE_WRITE | PAGE_EXEC
for which PAGE_RWX is a better name and renaming it also shows it is
not related to TARGET_PAGE_BITS.
Signed-off-by: BALATON Zoltan
---
accel/tcg/user-exec.c | 2 +-
bsd-user/mm
On 5/5/24 10:14, Dr. David Alan Gilbert wrote:
Since 'setup_rt_frame' has never been implemented, this struct
is unused.
Signed-off-by: Dr. David Alan Gilbert
---
linux-user/cris/signal.c | 8
1 file changed, 8 deletions(-)
Cris is scheduled for removal in 9.2.
We could ignore thi
On 5/5/24 10:14, Dr. David Alan Gilbert wrote:
The structs 'target_fpxreg' and 'target_xmmreg' are unused since
Paolo's:
Commit 2796f290b546 ("linux-user: i386/signal: support FXSAVE fpstate on
32-bit emulation")
Signed-off-by: Dr. David Alan Gilbert
---
linux-user/i386/signal.c | 10 ---
* Richard Henderson (richard.hender...@linaro.org) wrote:
> On 5/5/24 10:14, Dr. David Alan Gilbert wrote:
> > The structs 'target_fpxreg' and 'target_xmmreg' are unused since
> > Paolo's:
> >
> > Commit 2796f290b546 ("linux-user: i386/signal: support FXSAVE fpstate on
> > 32-bit emulation")
> >
On Sun, 5 May 2024, Dr. David Alan Gilbert wrote:
I think it's use was removed by
Commit 5883d8b296 ("mmu-hash*: Don't use full ppc_hash{32,
64}_translate() path for get_phys_page_debug()")
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: BALATON Zoltan
---
target/ppc/mmu-hash32.c | 6 --
On 02/05/2024 17:55, Richard Henderson wrote:
Split out from my vis4 patch set, with just the bug fixes.
I've fixed the issue in patch 6, as noticed by Mark, but
include the follow-up that cleans up all of the macros by
removing them.
r~
Richard Henderson (7):
linux-user/sparc: Add more
On 03/05/2024 19:18, Philippe Mathieu-Daudé wrote:
On 2/5/24 18:55, Richard Henderson wrote:
Split out from my vis4 patch set, with just the bug fixes.
I've fixed the issue in patch 6, as noticed by Mark, but
include the follow-up that cleans up all of the macros by
removing them.
r~
Richar
The /dev/mem is used for two purposes:
- reading PCI_MSIX_ENTRY_CTRL_MASKBIT
- reading Pending Bit Array (PBA)
The first one was originally done because when Xen did not send all
vector ctrl writes to the device model, so QEMU might have outdated old
register value. If Xen is new enough, this ha
Call pci_default_write_config() only after resolving any handlers from
XenPTRegInfo structures, and only with a value updated with those
handlers. This is important for two reasons:
1. XenPTRegInfo has ro_mask which needs to be enforced - Xen-specific
hooks do that on their own (especially xen_p
This series fixes handling MSI-X when device model is running in a stubdomain.
The main part is to avoid accessing /dev/mem, which also fixes running dom0
with lockdown enabled.
It depends on a behavior change of Xen that was just comitted, and signaled
with a feature flag. If Xen is too old (and
Update it to get XENFEAT_dm_msix_all_writes for the next patch.
Signed-off-by: Marek Marczykowski-Górecki
---
include/hw/xen/interface/features.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/include/hw/xen/interface/features.h
b/include/hw/xen/interface/features.h
inde
On Mon, May 06, 2024 at 02:33:19AM +0200, Marek Marczykowski-Górecki wrote:
> This series fixes handling MSI-X when device model is running in a stubdomain.
> The main part is to avoid accessing /dev/mem, which also fixes running dom0
> with lockdown enabled.
>
> It depends on a behavior change of
Based-on: 20240424170908.759043-1-richard.hender...@linaro.org
("[PATCH 0/5] tcg: Misc improvements")
In the process, convert more code to gvec as well -- I will need
the gvec code for implementing SME2. I guess this is about 1/3
of the job done, but there's no reason to wait until the patch
set
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4
target/arm/tcg/translate-a64.c | 43 +++---
2 files changed, 18 insertions(+), 29 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 1292312a7f..7f354af25
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 2 +
target/arm/tcg/a64.decode | 22 +++
target/arm/tcg/translate-a64.c | 241 +
target/arm/tcg/vec_helper.c| 14 ++
4 files changed, 163 insertions(+), 116 deletions(-)
diff --git
This is the last instruction within disas_fp_2src,
so remove that and its subroutines.
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 1 +
target/arm/tcg/translate-a64.c | 177 +
2 files changed, 27 insertions(+), 151 deletions(-)
diff --
This includes AND, ORR, EOR, BIC, ORN, BSF, BIT, BIF.
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 10 +
target/arm/tcg/translate-a64.c | 68 ++
2 files changed, 29 insertions(+), 49 deletions(-)
diff --git a/target/arm/tcg/a64.decode
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 7 ++
target/arm/tcg/translate-a64.c | 40 +-
2 files changed, 32 insertions(+), 15 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 7cea0d2721..b98e0a5
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 6
target/arm/tcg/translate.h | 30 +++
target/arm/tcg/translate-a64.c | 44 +--
target/arm/tcg/translate-vfp.c | 54 +-
target/arm/vfp_helper.c
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 11
target/arm/tcg/translate-a64.c | 97 --
2 files changed, 32 insertions(+), 76 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 350afabc77..c342c2760
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 5 ++
target/arm/tcg/translate.h | 3 +
target/arm/tcg/a64.decode | 6 ++
target/arm/tcg/gengvec.c | 12
target/arm/tcg/translate-a64.c | 128 ++---
target/arm/tcg/vec_help
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4
target/arm/tcg/translate-a64.c | 22 +++---
2 files changed, 11 insertions(+), 15 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index b98e0a5c5d..6f55e0e300 100644
---
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 8
target/arm/tcg/translate.h | 4
target/arm/tcg/neon-dp.decode | 10 ++---
target/arm/tcg/gengvec.c| 24 ++
target/arm/tcg/neon_helper.c| 36
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 6
target/arm/tcg/translate-a64.c | 54 +++---
2 files changed, 10 insertions(+), 50 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 7590659ee6..350afabc7
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 13 +
target/arm/tcg/translate-a64.c | 426 +++--
2 files changed, 152 insertions(+), 287 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 7f354af25d..d5bfeae7a
These are the last instructions within handle_3same_float
and disas_simd_scalar_three_reg_same_fp16 so remove them.
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 12 ++
target/arm/tcg/translate-a64.c | 293 -
2 files changed, 46 insertions
These are the last instructions within handle_simd_3same_pair
so remove it.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 16 +
target/arm/tcg/translate.h | 8 +++
target/arm/tcg/a64.decode | 4 ++
target/arm/tcg/gengvec.c | 48 +
targ
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 4 +
target/arm/tcg/a64.decode | 17
target/arm/tcg/translate-a64.c | 168 +
target/arm/tcg/vec_helper.c| 4 +
4 files changed, 113 insertions(+), 80 deletions(-)
diff --git a
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 10 +
target/arm/tcg/translate.h | 4
target/arm/tcg/neon-dp.decode | 10 ++---
target/arm/tcg/gengvec.c| 22 +++
target/arm/tcg/neon_helper.c| 38 ++
Signed-off-by: Richard Henderson
---
target/arm/tcg/helper-a64.h| 4 +
target/arm/tcg/translate.h | 5 +
target/arm/tcg/a64.decode | 27 +
target/arm/tcg/translate-a64.c | 205 +
target/arm/tcg/vec_helper.c| 4 +
5 files changed, 143 ins
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 2 --
target/arm/tcg/neon_helper.c| 5 -
target/arm/tcg/translate-neon.c | 3 +--
3 files changed, 1 insertion(+), 9 deletions(-)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index d3579a101f..51ed49aa50 100
These are the last instructions within disas_simd_three_reg_same_fp16,
so remove it.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 16 ++
target/arm/tcg/a64.decode | 24 +++
target/arm/tcg/translate-a64.c | 296 ++---
target/arm/tcg/vec_
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 6 --
target/arm/tcg/translate.h | 4 +
target/arm/tcg/gengvec.c| 144
target/arm/tcg/neon_helper.c| 27 --
target/arm/tcg/translate-a64.c | 17 ++--
target/arm/tcg/
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 12 +++
target/arm/tcg/translate-a64.c | 132 -
2 files changed, 60 insertions(+), 84 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 97fe1ef927..d97390cac
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-neon.c | 78 ++---
1 file changed, 4 insertions(+), 74 deletions(-)
diff --git a/target/arm/tcg/translate-neon.c b/target/arm/tcg/translate-neon.c
index 6c5a7a98e1..18b048611b 100644
--- a/target/arm/tcg/tr
This fixes a bug in which scalar half-precision did not
diagnose sz == 1 as UNDEFINED.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 4 ++
target/arm/tcg/a64.decode | 12 +
target/arm/tcg/translate-a64.c | 87 ++
target/arm/tcg/ve
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 21 +++--
target/arm/tcg/translate-a64.c | 86 +++---
2 files changed, 54 insertions(+), 53 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 0e7656fd15..1de0
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 10 +++
target/arm/tcg/translate-a64.c | 144 ++---
2 files changed, 51 insertions(+), 103 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 16e9675335..9aa4fb9b
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4
target/arm/tcg/translate-a64.c | 22 ++
2 files changed, 10 insertions(+), 16 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index fc8a5ca14f..9b68444595 100644
---
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4 ++
target/arm/tcg/translate-a64.c | 74 ++
2 files changed, 53 insertions(+), 25 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 6f55e0e300..9f5ea9223d
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 2 ++
target/arm/tcg/translate-a64.c | 11 +++
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index d97390cacb..0881f00ecf 100644
--- a/target/arm/t
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 8 ++
target/arm/tcg/translate-a64.c | 132 +++--
2 files changed, 51 insertions(+), 89 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 5a46205751..ef6902e86a
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4
target/arm/tcg/translate-a64.c | 22 ++
2 files changed, 10 insertions(+), 16 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 9b68444595..e1667775f6 100644
---
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 4 +++
target/arm/tcg/translate-a64.c | 48 --
2 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 9f5ea9223d..86279edc98
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 8 ++
target/arm/tcg/translate.h | 4 +++
target/arm/tcg/neon-dp.decode | 17 ++--
target/arm/tcg/gengvec.c| 24
target/arm/tcg/neon_helper.c| 24
target/arm/t
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h |5 +
target/arm/tcg/gengvec.c | 1612
target/arm/tcg/translate.c | 1588 ---
target/arm/tcg/meson.build |1 +
4 files changed, 1618 insertions(+), 1588 d
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 7 --
target/arm/tcg/translate.h | 4 +
target/arm/tcg/gengvec.c| 144
target/arm/tcg/neon_helper.c| 27 --
target/arm/tcg/translate-a64.c | 48 ++-
target/a
Convert all forms (scalar, vector, scalar indexed, vector indexed),
which allows us to remove switch table entries elsewhere.
Signed-off-by: Richard Henderson
---
target/arm/tcg/helper-a64.h| 8 ++
target/arm/tcg/a64.decode | 45 +++
target/arm/tcg/translate-a64.c | 221 +
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 6 ++
target/arm/tcg/translate-a64.c | 34 +++---
2 files changed, 17 insertions(+), 23 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 86279edc98..97fe1ef
This eliminates the last uses of these neon helpers.
Incorporate the MO_64 expanders as an option to the vector expander.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 17
target/arm/tcg/translate.h | 15 +++
target/arm/tcg/gengvec.c | 116 +++
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 2 ++
target/arm/tcg/translate-a64.c | 11 +++
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 80c4c650c9..fc8a5ca14f 100644
--- a/target/arm/t
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 11
target/arm/tcg/translate-a64.c | 100 +++--
2 files changed, 68 insertions(+), 43 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index d0618ca794..5eced906
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 7 -
target/arm/tcg/translate-neon.c | 55 ++---
target/arm/tcg/vec_helper.c | 45 ---
3 files changed, 3 insertions(+), 104 deletions(-)
diff --git a/target/arm/he
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 11 +
target/arm/tcg/translate-a64.c | 78 +-
2 files changed, 21 insertions(+), 68 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 1de09903dc..7590659e
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 8
target/arm/tcg/translate-a64.c | 77 ++
2 files changed, 31 insertions(+), 54 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index dbeb5667fd..8f7ae63e1
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 2 ++
target/arm/tcg/translate-a64.c | 11 +++
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 0881f00ecf..80c4c650c9 100644
--- a/target/arm/t
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 6 --
target/arm/tcg/translate.h | 5 ++
target/arm/tcg/gengvec.c| 144
target/arm/tcg/neon_helper.c| 27 --
target/arm/tcg/translate-a64.c | 17 ++--
target/arm/tcg
We already have a gvec helper for the operations, but we aren't
using it on the aa32 neon side. Create a unified expander for
use by both aa32 and aa64 translators.
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h | 4
target/arm/tcg/gengvec.c| 20 +
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 1 +
target/arm/tcg/a64.decode | 6
target/arm/tcg/translate-a64.c | 60 ++
target/arm/tcg/vec_helper.c| 6
4 files changed, 53 insertions(+), 20 deletions(-)
diff --git a/
These are faux 2-operand instructions, reading from rd.
Sort them next to the other three-operand same insns for clarity.
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 8 +
target/arm/tcg/translate-a64.c | 64 --
2 files changed, 14 in
Signed-off-by: Richard Henderson
---
target/arm/tcg/gengvec.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/target/arm/tcg/gengvec.c b/target/arm/tcg/gengvec.c
index 51e66ccf5f..1d6bc6021d 100644
--- a/target/arm/tcg/gengvec.c
+++ b/target/arm/tcg/gengvec.c
@@ -933,14
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 5 +
target/arm/tcg/a64.decode | 30 ++
target/arm/tcg/translate-a64.c | 188 +++--
target/arm/tcg/vec_helper.c| 30 ++
4 files changed, 174 insertions(+), 79 deletions(-)
diff
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 5
target/arm/tcg/translate-a64.c | 51 +-
2 files changed, 25 insertions(+), 31 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index e1667775f6..dbeb5667f
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 10
target/arm/tcg/translate-a64.c | 43 ++
2 files changed, 22 insertions(+), 31 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index ef6902e86a..12923
These are the last instructions within disas_simd_three_reg_same
and disas_simd_scalar_three_reg_same, so remove them.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 10 ++
target/arm/tcg/a64.decode | 18 +++
target/arm/tcg/translate-a64.c | 276 ++--
This eliminates the last uses of these neon helpers.
Incorporate the MO_64 expanders as an option to the vector expander.
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 8 --
target/arm/tcg/translate-a64.h | 8 ++
target/arm/tcg/gengvec64.c | 71 ++
ta
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 16 +
target/arm/tcg/translate-a64.h | 6 ++
target/arm/tcg/gengvec64.c | 106 +++
target/arm/tcg/translate-a64.c | 113 ++---
target/arm/tcg/vec_helper.c|
No need for a full comparison; xor produces non-zero bits
for QC just fine.
Signed-off-by: Richard Henderson
---
target/arm/tcg/gengvec.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/target/arm/tcg/gengvec.c b/target/arm/tcg/gengvec.c
ind
Signed-off-by: Richard Henderson
---
target/arm/tcg/a64.decode | 5
target/arm/tcg/translate-a64.c | 50 ++
2 files changed, 8 insertions(+), 47 deletions(-)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index c342c27608..5a46205751
Split some routines out of translate-a64.c and translate-sve.c
that are used by both.
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.h | 4 +
target/arm/tcg/gengvec64.c | 190 +
target/arm/tcg/translate-a64.c | 26 -
target/arm/tcg/tr
In structure CPUArchState some struct elements are only used in TCG
mode, and it is not used in KVM mode. Macro CONFIG_TCG is added to
make it simpiler in KVM mode, also there is the same modification
in c code when these structure elements are used.
When VM runs in KVM mode, TLB entries are not u
Hi Clement,
Sorry for late response, just back from vacation.
I saw your rebased version and thanks for your work.
I'll schedule a timeslot to review them.
Thanks
Zhenzhong
>-Original Message-
>From: CLEMENT MATHIEU--DRIF
>Subject: Re: [PATCH intel_iommu 0/7] FLTS for VT-d
>
>Hi Zhenzho
>-Original Message-
>From: Cédric Le Goater
>Subject: Re: [PATCH v3 11/19] backends/iommufd: Implement
>HostIOMMUDeviceClass::check_cap() handler
>
>> +static int hiod_iommufd_check_cap(HostIOMMUDevice *hiod, int
>cap,
> Error **errp)
>> +{
>> +switch (cap) {
>> +
Hi Cédric,
>-Original Message-
>From: Cédric Le Goater
>Sent: Friday, May 3, 2024 10:04 PM
>To: Duan, Zhenzhong ; qemu-
>de...@nongnu.org
>Cc: alex.william...@redhat.com; eric.au...@redhat.com; m...@redhat.com;
>pet...@redhat.com; jasow...@redhat.com; j...@nvidia.com;
>nicol...@nvidia.com
In this patch, we modify the decoder to be a freely composable data
structure instead of a hardcoded one. It can be dynamically builded up
according to the extensions.
This approach has several benefits:
1. Provides support for heterogeneous cpu architectures. As we add decoder in
RISCVCPU, each
1 - 100 of 140 matches
Mail list logo