From: xiongyining1480
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And
this topology can be passed to the firmware through DT cpu-map.
Signed-off-by: Xiong Yining
tested-by: Marcin Juszkiewicz
Change-Id: Iac5
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this
topology can be passed to the firmware through DT cpu-map.
Changes in v3:
- squash the two patches together into one
- add the DTB information in docs/system/
Hi Paolo,
On Fri, Apr 26, 2024 at 07:21:12AM +0200, Paolo Bonzini wrote:
> Date: Fri, 26 Apr 2024 07:21:12 +0200
> From: Paolo Bonzini
> Subject: Re: [PULL v2 00/63] First batch of i386 and build system patch for
> QEMU 9.1
>
> On Wed, Apr 24, 2024 at 8:49 PM Richard Henderson
> wrote:
> >
> >
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this
topology can be passed to the firmware through DT cpu-map.
Signed-off-by: Xiong Yining
---
Changes in v4:
- align the machine-version-minor to 4
Changes in
From: xiongyining1480
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And
this topology can be passed to the firmware through DT cpu-map.
Signed-off-by: Xiong Yining
tested-by: Marcin Juszkiewicz
---
docs/syste
This patch has been successfully tested. Boot up a VM with a
virtio-mem device, hotplug some memory increasing the requested-size,
finally try to unplug the device and see the new message:
(qemu) device_del vmem0
Error: virtio-mem device cannot get unplugged while some of its memory
is still plugge
Ping. Anyone interested?
Thanks
Chris
On 3/22/24 11:24, Christian Pötzsch wrote:
Absolute input device did not work, cause VIRTIO_INPUT_CFG_ABS_INFO is
missing. Fetch this info when available and provide it to any virtio
client.
This is basically the same code as in hw/input/virtio-input-host.
On Fri, Nov 03, 2023 at 01:56 PM +0300, Dmitrii Gavrilov
wrote:
> Original goal of addition of drain_call_rcu to qmp_device_add was to cover
> the failure case of qdev_device_add. It seems call of drain_call_rcu was
> misplaced in 7bed89958bfbf40df what led to waiting for pending RCU callbacks
>
Collin Walling writes:
> On 4/25/24 02:31, Markus Armbruster wrote:
>> Collin Walling writes:
>>
>>> On 4/24/24 02:19, Markus Armbruster wrote:
Collin Walling writes:
> This optional parameter for query-cpu-model-expansion enables CPU
> model features flagged as deprecated to
If the client sends more than one region this assert triggers. The
reason is that two fd's are 8 bytes and VHOST_MEMORY_BASELINE_NREGIONS
is exactly 8.
The assert is wrong because it should not test for the size of the fd
array, but for the numbers of regions.
Signed-off-by: Christian Pötzsch
--
Hi Paolo,
Daniel P. Berrangé, Apr 25, 2024 at 17:42:
> On Thu, Apr 25, 2024 at 05:34:52PM +0200, Anthony Harivel wrote:
> > Hi Daniel,
> >
> > Daniel P. Berrangé, Apr 18, 2024 at 18:42:
> >
> > > > +if (kvm_is_rapl_feat_enable(cs)) {
> > > > +if (!IS_INTEL_CPU(env)) {
> > > > +
Daniil Tatianin writes:
> This can be used to force-synchronize the time in guest after a long
> stop-cont pause, which can be useful for serverless-type workload.
>
> Signed-off-by: Daniil Tatianin
> ---
> hw/rtc/mc146818rtc.c | 15 +++
> include/hw/rtc/mc146818rtc.h | 1 +
Collin Walling writes:
> Retain a list of deprecated features disjoint from any particular
> CPU model. A query-cpu-model-expansion reply will now provide a list of
> properties (i.e. features) that are flagged as deprecated. Example:
>
> {
> "return": {
> "model": {
>
26.04.2024, 11:17, "Marc Hartmayer" :On Fri, Nov 03, 2023 at 01:56 PM +0300, Dmitrii Gavrilov wrote: Original goal of addition of drain_call_rcu to qmp_device_add was to cover the failure case of qdev_device_add. It seems call of drain_call_rcu was misplaced in 7bed89958b
Previous discussion here:
https://lore.kernel.org/all/f86d6159-5610-476c-a69e-cd3a717f9...@nvidia.com/
The merged version cannot fully cover all possible scenarios. Here we revert
the previous
fixes and then use new methods to fix them.
Li Feng (2):
Revert "vhost-user: fix lost reconnect"
vh
This reverts commit f02a4b8e6431598612466f76aac64ab492849abf.
Signed-off-by: Li Feng
---
hw/block/vhost-user-blk.c | 2 +-
hw/scsi/vhost-user-scsi.c | 3 +--
hw/virtio/vhost-user-base.c| 2 +-
hw/virtio/vhost-user.c | 10 ++
include/hw/virtio/vhost-user.h | 3 +-
When the vhost-user is reconnecting to the backend, and if the vhost-user fails
at the get_features in vhost_dev_init(), then the reconnect will fail
and it will not be retriggered forever.
The reason is:
When the vhost-user fail at get_features, the vhost_dev_cleanup will be called
immediately.
nifan@gmail.com writes:
> From: Fan Ni
>
> To simulate FM functionalities for initiating Dynamic Capacity Add
> (Opcode 5604h) and Dynamic Capacity Release (Opcode 5605h) as in CXL spec
> r3.1 7.6.7.6.5 and 7.6.7.6.6, we implemented two QMP interfaces to issue
> add/release dynamic capacity e
This series has been successfully tested in x86. Execute the cpu help
command and check in the list the x86 prefix is no longer present.
Tested-by: Mario Casquero
On Sat, Apr 20, 2024 at 7:47 AM Thomas Huth wrote:
>
> Printing an architecture prefix in front of each CPU name is not helpful
> at
Daniel P. Berrangé writes:
> On Thu, Apr 25, 2024 at 02:21:11AM +, Hao Xiang wrote:
>> Intel DSA offloading is an optional feature that turns on if
>> proper hardware and software stack is available. To turn on
>> DSA offloading in multifd live migration:
>>
>> multifd-dsa-accel="[dsa_dev_pa
On 4/26/24 11:39 AM, Markus Armbruster wrote:
Daniil Tatianin writes:
This can be used to force-synchronize the time in guest after a long
stop-cont pause, which can be useful for serverless-type workload.
Signed-off-by: Daniil Tatianin
---
hw/rtc/mc146818rtc.c | 15 ++
On Fri, Apr 26, 2024 at 03:43:15PM +0800, Zhao Liu wrote:
> Date: Fri, 26 Apr 2024 15:43:15 +0800
> From: Zhao Liu
> Subject: Re: [PULL v2 00/63] First batch of i386 and build system patch for
> QEMU 9.1
>
> Hi Paolo,
>
> On Fri, Apr 26, 2024 at 07:21:12AM +0200, Paolo Bonzini wrote:
> > Date:
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240307164835.300412-9-gaos...@loongson.cn>
---
include/hw/loongarch/boot.h | 4
include/hw/loongarch/virt.h | 2 ++
hw/loongarch/boot.c | 11 +++
hw/loongarch/virt.c | 6 ++
4 files changed, 19 inser
The right fdt memory node like [1], not [2]
[1]
memory@0 {
device_type = "memory";
reg = <0x00 0x00 0x00 0x1000>;
};
[2]
memory@0 {
device_type = "memory";
reg = <0x02 0x00 0x02 0x1000>;
};
Signed-off-by: Song Gao
Message-Id: <20240307164835.300412-7-gaos...@loongson.cn>
---
include/hw/loongarch/boot.h | 27 +
include/hw/loongarch/virt.h | 10 ++
hw/loongarch/boot.c | 40 +
hw/loongarch/virt.c | 11 +
fdt adds pch msi controller, we use 'loongson,pch-msi-1.0'.
See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-msi.c
https://lore.kernel.org/r/20200528152757.1028711-6-jiaxun.y...@flygoat.com
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <2024030716483
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240307164835.300412-15-gaos...@loongson.cn>
---
hw/loongarch/virt.c | 73 ++---
1 file changed, 69 insertions(+), 4 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 566f
we load initrd ramdisk after kernel_high address
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240307164835.300412-3-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 29 -
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/hw/loongarch/boot.c
uart node need interrupts and interrupt-parent cells.
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240307164835.300412-17-gaos...@loongson.cn>
---
hw/loongarch/virt.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/
Hi, All
We already support boot efi kernel with bios, but not support boot elf kernel.
This series adds boot elf kernel with FDT.
'LoongArch supports ACPI and FDT. The information that needs to be passed
to the kernel includes the memmap, the initrd, the command line, optionally
the ACPI/FDT ta
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240307164835.300412-8-gaos...@loongson.cn>
---
include/hw/loongarch/boot.h | 9 +
hw/loongarch/boot.c | 23 +--
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/include/hw/loongarch/b
fdt adds Extend I/O Interrupt Controller,
we use 'loongson,ls2k2000-eiointc'.
See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-eiointc.c
https://lore.kernel.org/r/764e02d924094580ac0f1d15535f4b98308705c6.1683279769.git.zhoubin...@loongson.cn
Signed-off-by: Song Gao
R
Add init_systab and set boot_info->a2
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240307164835.300412-6-gaos...@loongson.cn>
---
include/hw/loongarch/boot.h | 48 +
hw/loongarch/boot.c | 22 +
2 files changed, 70 inser
fdt adds pch pic controller, we use 'loongson,pch-pic-1.0'
See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-pic.c
https://lore.kernel.org/r/20200528152757.1028711-4-jiaxun.y...@flygoat.com
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240307164835
Move some boot functions to boot.c and struct
loongarch_boot_info into struct LoongArchMachineState.
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20240307164835.300412-2-gaos...@loongson.cn>
---
include/hw/loongarch/boot.h | 21 ++
include
rtc node need interrupts and interrupt-parent cells.
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240307164835.300412-18-gaos...@loongson.cn>
---
hw/loongarch/virt.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loongar
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240307164835.300412-16-gaos...@loongson.cn>
---
hw/loongarch/virt.c | 31 +--
1 file changed, 1 insertion(+), 30 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 91a55a81b6..48f73ed
Add init_cmline and set boot_info->a0, a1
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id: <20240307164835.300412-5-gaos...@loongson.cn>
---
include/hw/loongarch/virt.h | 2 ++
target/loongarch/cpu.h | 2 ++
hw/loongarch/boot.c | 30 ++
3 file
fdt adds cpu interrupt controller node,
we use 'loongson,cpu-interrupt-controller'.
See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongarch-cpu.c
https://lore.kernel.org/r/20221114113824.1880-2-liupei...@loongson.cn
Signed-off-by: Song Gao
Reviewed-by: Bibo Mao
Message-Id
Signed-off-by: Song Gao
Message-Id: <20240307164835.300412-4-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 62 -
1 file changed, 61 insertions(+), 1 deletion(-)
diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index a9522d6912..d1a8434127 100644
Daniil Tatianin writes:
> On 4/26/24 11:39 AM, Markus Armbruster wrote:
>
>> Daniil Tatianin writes:
>>
>>> This can be used to force-synchronize the time in guest after a long
>>> stop-cont pause, which can be useful for serverless-type workload.
>>>
>>> Signed-off-by: Daniil Tatianin
>>> ---
Hi Daniil, Markus,
On 26/4/24 10:39, Markus Armbruster wrote:
Daniil Tatianin writes:
This can be used to force-synchronize the time in guest after a long
stop-cont pause, which can be useful for serverless-type workload.
Signed-off-by: Daniil Tatianin
---
hw/rtc/mc146818rtc.c | 1
Add feature definiations for KVM_CPUID_FEATURES in CPUID (
CPUID[4000_0001].EAX and CPUID[4000_0001].EDX), to get rid of lots of
offset calculations.
Signed-off-by: Zhao Liu
---
v2: Changed the prefix from CPUID_FEAT_KVM_* to CPUID_KVM_*. (Xiaoyao)
---
hw/i386/kvm/clock.c | 5 ++---
target/i3
Update the comment to match the X86ConfidentialGuestClass
implementation.
Suggested-by: Xiaoyao Li
Signed-off-by: Zhao Liu
---
target/i386/confidential-guest.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/confidential-guest.h b/target/i386/confidential-guest.h
Hi,
This series picks cleanup from my previous kvmclock [1] (as other
renaming attempts were temporarily put on hold).
In addition, this series also include the cleanup on a historically
workaround and recent comment of coco interface [2].
Avoiding the fragmentation of these misc cleanups, I con
The KVM_X86_DISABLE_EXITS_HTL typo has been fixed in commit
77d361b13c19 ("linux-headers: Update to kernel mainline commit
b357bf602").
Drop the related workaround.
Signed-off-by: Zhao Liu
---
target/i386/kvm/kvm.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/i386/kvm/kvm.c b/t
These 2 MSRs have been already defined in the kvm_para header
(standard-headers/asm-x86/kvm_para.h).
Remove QEMU local definitions to avoid duplication.
Reviewed-by: Xiaoyao Li
Signed-off-by: Zhao Liu
---
target/i386/kvm/kvm.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/target/i386/k
MSR_KVM_SYSTEM_TIME_NEW and MSR_KVM_WALL_CLOCK_NEW are bound to
kvmclock2 (KVM_FEATURE_CLOCKSOURCE2).
Add the save/load support for these 2 MSR just like kvmclock MSRs.
Signed-off-by: Zhao Liu
---
target/i386/cpu.h | 2 ++
target/i386/kvm/kvm.c | 16
2 files changed, 18 in
MSR_KVM_SYSTEM_TIME and MSR_KVM_WALL_CLOCK are attached with the (old)
kvmclock feature (KVM_FEATURE_CLOCKSOURCE).
So, just save/load them only when kvmclock (KVM_FEATURE_CLOCKSOURCE) is
enabled.
Signed-off-by: Zhao Liu
---
target/i386/kvm/kvm.c | 12
1 file changed, 8 insertions(+
MSR_KVM_SYSTEM_TIME_NEW and MSR_KVM_WALL_CLOCK_NEW are bound to new
kvmclock (KVM_FEATURE_CLOCKSOURCE2).
Add the save/load support for these 2 MSRs.
Signed-off-by: Zhao Liu
---
target/i386/cpu.h | 2 ++
target/i386/kvm/kvm.c | 16
2 files changed, 18 insertions(+)
diff --
W dniu 26.04.2024 o 09:35, Xiong Yining pisze:
From: xiongyining1480
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And
this topology can be passed to the firmware through DT cpu-map.
Signed-off-by: Xiong Yining
Introduce 'PnvChipClass::chip_type' to easily get which Power chip is
it.
This helps generalise similar codes such as *_dt_populate, and removes
duplication of code between Power11 and Power10 changes in following
patches.
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Mad
Make Power11 as default cpu type for 'pseries' and 'powernv' machine type,
with Power11 being the newest supported Power processor in QEMU.
Cc: Cédric Le Goater
Cc: Daniel Henrique Barboza
Cc: David Gibson
Cc: Frédéric Barrat
Cc: Harsh Prateek Bora
Cc: Mahesh J Salgaonkar
Cc: Madhavan Sriniv
Power11 core is same as Power10, reuse PNV10_OCC initialisation,
by declaring `PNV11_OCC` as child class of `PNV10_OCC`
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicholas Piggin
Signed-off-by: Aditya Gupta
---
hw/ppc/pnv_occ.c | 14
On Fri, Apr 26, 2024 at 11:57 AM +0300, Dmitrii Gavrilov
wrote:
> 26.04.2024, 11:17, "Marc Hartmayer" :
>
> On Fri, Nov 03, 2023 at 01:56 PM +0300, Dmitrii Gavrilov
> wrote:
>
> Original goal of addition of drain_call_rcu to qmp_device_add was to cover
> the failure case of qdev_device_add
Power11 core is same as Power10, use the existing functionalities to
introduce a Power11 chip and machine, with Power10 chip as parent of
Power11 chip, thus going through similar class_init paths
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicho
Add base support for "--cpu power11" in QEMU.
Power11 core is same as Power10, hence reuse functions defined for
Power10.
Cc: Cédric Le Goater
Cc: Daniel Henrique Barboza
Cc: David Gibson
Cc: Harsh Prateek Bora
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicholas Piggin
Signed-off-
Power11 core is same as Power10, declare PNV11_HOMER as a child
class of PNV10_HOMER, so it goes through same class init
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicholas Piggin
Signed-off-by: Aditya Gupta
---
hw/ppc/pnv_homer.c |
Overview
Add support for Power11 pseries and powernv machine types, to emulate VMs
running on Power11.
As Power11 core is same as Power10, hence much of the code has been reused from
Power10.
Also make Power11 as default cpu type for 'pseries' and 'powernv'
machine types, with Power
Power11 core is same as Power10 core, declare PNV11_LPC as a child
class of PNV10_LPC, so it goes through same class init
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicholas Piggin
Signed-off-by: Aditya Gupta
---
hw/ppc/pnv_lpc.c | 1
Power11 core is same as Power10, reuse PNV10_PSI initialisation, by
declaring 'PNV11_PSI' as child class of 'PNV10_PSI'
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicholas Piggin
Signed-off-by: Aditya Gupta
---
hw/ppc/pnv_psi.c | 24
Power11 core is same as Power10, reuse PNV10_SBER initialisation, by
declaring PNV11_PSI as child class of PNV10_PSI
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicholas Piggin
Signed-off-by: Aditya Gupta
---
hw/ppc/pnv_sbe.c | 15 +++
On 25/4/24 13:04, Konstantin Kostiuk wrote:
Compilation QGA without system and user fails
./configure --disable-system --disable-user --enable-guest-agent
So this config isn't tested on CI.
Maybe worth enabling QGA in the build-tools-and-docs-debian job?
Please include the link failure:
/
On Fri, Apr 26, 2024 at 2:08 PM Philippe Mathieu-Daudé
wrote:
> On 25/4/24 13:04, Konstantin Kostiuk wrote:
> > Compilation QGA without system and user fails
> > ./configure --disable-system --disable-user --enable-guest-agent
>
> So this config isn't tested on CI.
>
> Maybe worth enabling QGA in
During the past months, the netbsd and openbsd jobs in the Cirrus-CI
were broken most of the time - the setup to run a BSD in KVM on Cirrus-CI
from gitlab via the cirrus-run script was very fragile, and since the
jobs were not run by default, it used to bitrot very fast.
Now Cirrus-CI also introdu
Update the comment to match the X86ConfidentialGuestClass
implementation.
Suggested-by: Xiaoyao Li
Signed-off-by: Zhao Liu
---
target/i386/confidential-guest.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/confidential-guest.h b/target/i386/confidential-g
v1 -> v2:
- Added the link failure output
Konstantin Kostiuk (1):
stubs: Add missing qga stubs
stubs/meson.build | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
--
2.44.0
Compilation QGA without system and user fails
./configure --disable-system --disable-user --enable-guest-agent
Link failure:
/usr/bin/ld: libqemuutil.a.p/util_main-loop.c.o: in function
`os_host_main_loop_wait':
../util/main-loop.c:303: undefined reference to `replay_mutex_unlock'
/usr/bin
Currently QEMU CPUs always run with a generic timer counter frequency
of 62.5MHz, but ARMv8.6 CPUs will run at 1GHz. For older versions of
the TF-A firmware that sbsa-ref runs, the frequency of the generic
timer is hardcoded into the firmware, and so if the CPU actually has
a different frequency t
In previous versions of the Arm architecture, the frequency of the
generic timers as reported in CNTFRQ_EL0 could be any IMPDEF value,
and for QEMU we picked 62.5MHz, giving a timer tick period of 16ns.
In Armv8.6, the architecture standardized this frequency to 1GHz.
Because there is no ID regist
The generic timer frequency is settable by board code via a QOM
property "cntfrq", but otherwise defaults to 62.5MHz. The way this
is done includes some complication resulting from how this was
originally a fixed value with no QOM property. Clean it up:
* always set cpu->gt_cntfrq_hz to some se
In previous versions of the Arm architecture, the frequency of the
generic timers as reported in CNTFRQ_EL0 could be any IMPDEF value,
and for QEMU we picked 62.5MHz, giving a timer tick period of 16ns.
In Armv8.6, the architecture standardized this frequency to 1GHz.
Because there is no ID regist
Currently the sbsa_gdwt watchdog device hardcodes its frequency at
62.5MHz. In real hardware, this watchdog is supposed to be driven
from the system counter, which also drives the CPU generic timers.
Newer CPU types (in particular from Armv8.6) should have a CPU
generic timer frequency of 1GHz, so
On Fri, 26 Apr 2024 at 12:38, Thomas Huth wrote:
>
> During the past months, the netbsd and openbsd jobs in the Cirrus-CI
> were broken most of the time - the setup to run a BSD in KVM on Cirrus-CI
> from gitlab via the cirrus-run script was very fragile, and since the
> jobs were not run by defau
On 2024/04/24 21:32, Thomas Huth wrote:
On 24/04/2024 12.41, Prasad Pandit wrote:
On Wednesday, 24 April, 2024 at 03:36:01 pm IST, Philippe
Mathieu-Daudé wrote:
On 1/6/23 05:18, Akihiko Odaki wrote:
Recently MemReentrancyGuard was added to DeviceState to record that the
device is engaging in I
Hi Peter,
On 26/4/24 14:29, Peter Maydell wrote:
Currently the sbsa_gdwt watchdog device hardcodes its frequency at
62.5MHz. In real hardware, this watchdog is supposed to be driven
from the system counter, which also drives the CPU generic timers.
Newer CPU types (in particular from Armv8.6) sh
On 26/04/2024 14.30, Peter Maydell wrote:
On Fri, 26 Apr 2024 at 12:38, Thomas Huth wrote:
During the past months, the netbsd and openbsd jobs in the Cirrus-CI
were broken most of the time - the setup to run a BSD in KVM on Cirrus-CI
from gitlab via the cirrus-run script was very fragile, and
Markus Armbruster writes:
> Doesn't apply for me. What's your base?
88daa112d4 ("Merge tag 'migration-20240423-pull-request' of
https://gitlab.com/peterx/qemu into staging")
Probably clashed with the other removals from Philippe.
On 4/24/24 11:28, Andrew Jones wrote:
Implementing wrs.nto to always just return is consistent with the
specification, as the instruction is permitted to terminate the
stall for any reason, but it's not useful for virtualization, where
we'd like the guest to trap to the hypervisor in order to
Am 25. April 2024 10:16:10 UTC schrieb "Michael S. Tsirkin" :
>On Mon, Apr 22, 2024 at 10:06:21PM +0200, Bernhard Beschow wrote:
>> This series changes the "isa-bios" MemoryRegion to be an alias rather than a
>> copy in the pflash case. This fixes issuing pflash commands in the isa-bios
>> regio
Am 25. April 2024 08:07:43 UTC schrieb "Philippe Mathieu-Daudé"
:
>On 22/4/24 22:06, Bernhard Beschow wrote:
>> This series changes the "isa-bios" MemoryRegion to be an alias rather than a
>> copy in the pflash case. This fixes issuing pflash commands in the isa-bios
>> region which matches rea
Am 25. April 2024 07:19:27 UTC schrieb "Philippe Mathieu-Daudé"
:
>Hi Bernhard,
>
>On 22/4/24 22:06, Bernhard Beschow wrote:
>> Now that the -bios and -pflash code paths work the same it is possible to
>> have a
>> common implementation.
>>
>> While at it convert the magic number 0x10 (==
Fabiano Rosas writes:
> Markus Armbruster writes:
>
>> Doesn't apply for me. What's your base?
>
> 88daa112d4 ("Merge tag 'migration-20240423-pull-request' of
> https://gitlab.com/peterx/qemu into staging")
>
> Probably clashed with the other removals from Philippe.
Thanks!
The 'skipped' field of the MigrationStats struct has been deprecated
in 8.1. Time to remove it.
Deprecation commit 7b24d32634 ("migration: skipped field is really
obsolete.").
Reviewed-by: Markus Armbruster
Signed-off-by: Fabiano Rosas
---
docs/about/deprecated.rst | 6 --
docs/about
The fd: URI can currently trigger two different types of migration, a
TCP migration using sockets and a file migration using a plain
file. This is in conflict with the recently introduced (8.2) QMP
migrate API that takes structured data as JSON-like format. We cannot
keep the same backend for both
The block incremental option for block migration has been deprecated
in 8.2 in favor of using the block-mirror feature. Remove it now.
Deprecation commit 40101f320d ("migration: migrate 'inc' command
option is deprecated.").
Signed-off-by: Fabiano Rosas
---
docs/about/deprecated.rst | 9
The 'compress' migration capability enables the old compression code
which has shown issues over the years and is thought to be less stable
and tested than the more recent multifd-based compression. The old
compression code has been deprecated in 8.2 and now is time to remove
it.
Deprecation commi
[respinning because master moved and there were conflicts]
Hi everyone,
Here's some cleaning up of deprecated code. It removes the old block
migration and compression code. Both have suitable replacements in the
form of the blockdev-mirror driver and multifd compression,
respectively.
There's al
The block migration has been considered obsolete since QEMU 8.2 in
favor of the more flexible storage migration provided by the
blockdev-mirror driver. Two releases have passed so now it's time to
remove it.
Deprecation commit 66db46ca83 ("migration: Deprecate block
migration").
Signed-off-by: Fa
The block migration is considered obsolete and has been deprecated in
8.2. Remove the migrate command option that enables it. This only
affects the QMP and HMP commands, the feature can still be accessed by
setting the migration 'block' capability. The whole feature will be
removed in a future patc
Markus Armbruster writes:
> Fabiano Rosas writes:
>
>> Markus Armbruster writes:
>>
>>> Doesn't apply for me. What's your base?
>>
>> 88daa112d4 ("Merge tag 'migration-20240423-pull-request' of
>> https://gitlab.com/peterx/qemu into staging")
>>
>> Probably clashed with the other removals from
Fabiano Rosas writes:
> The block incremental option for block migration has been deprecated
> in 8.2 in favor of using the block-mirror feature. Remove it now.
>
> Deprecation commit 40101f320d ("migration: migrate 'inc' command
> option is deprecated.").
>
> Signed-off-by: Fabiano Rosas
> ---
Fabiano Rosas writes:
> The block migration is considered obsolete and has been deprecated in
> 8.2. Remove the migrate command option that enables it. This only
> affects the QMP and HMP commands, the feature can still be accessed by
> setting the migration 'block' capability. The whole feature
On Fri, 26 Apr 2024 at 13:46, Philippe Mathieu-Daudé wrote:
>
> Hi Peter,
>
> On 26/4/24 14:29, Peter Maydell wrote:
> > Currently the sbsa_gdwt watchdog device hardcodes its frequency at
> > 62.5MHz. In real hardware, this watchdog is supposed to be driven
> > from the system counter, which also
On 26/4/24 14:37, Akihiko Odaki wrote:
On 2024/04/24 21:32, Thomas Huth wrote:
On 24/04/2024 12.41, Prasad Pandit wrote:
On Wednesday, 24 April, 2024 at 03:36:01 pm IST, Philippe
Mathieu-Daudé wrote:
On 1/6/23 05:18, Akihiko Odaki wrote:
Recently MemReentrancyGuard was added to DeviceState to
On Tue, 23 Apr 2024 at 16:16, Paolo Bonzini wrote:
>
> From: Chao Peng
>
> Upon an KVM_EXIT_MEMORY_FAULT exit, userspace needs to do the memory
> conversion on the RAMBlock to turn the memory into desired attribute,
> switching between private and shared.
>
> Currently only KVM_MEMORY_EXIT_FLAG_P
On 26/4/24 15:28, Peter Maydell wrote:
On Fri, 26 Apr 2024 at 13:46, Philippe Mathieu-Daudé wrote:
Hi Peter,
On 26/4/24 14:29, Peter Maydell wrote:
Currently the sbsa_gdwt watchdog device hardcodes its frequency at
62.5MHz. In real hardware, this watchdog is supposed to be driven
from the sy
On 26/4/24 14:29, Peter Maydell wrote:
Currently QEMU CPUs always run with a generic timer counter frequency
of 62.5MHz, but ARMv8.6 CPUs will run at 1GHz. For older versions of
the TF-A firmware that sbsa-ref runs, the frequency of the generic
timer is hardcoded into the firmware, and so if the
Markus Armbruster writes:
> Fabiano Rosas writes:
>
>> The block migration is considered obsolete and has been deprecated in
>> 8.2. Remove the migrate command option that enables it. This only
>> affects the QMP and HMP commands, the feature can still be accessed by
>> setting the migration 'bl
Markus Armbruster writes:
> Fabiano Rosas writes:
>
>> The block incremental option for block migration has been deprecated
>> in 8.2 in favor of using the block-mirror feature. Remove it now.
>>
>> Deprecation commit 40101f320d ("migration: migrate 'inc' command
>> option is deprecated.").
>>
>
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