On 17/4/24 08:47, Zhang, Chen wrote:
-Original Message-
From: Philippe Mathieu-Daudé
Sent: Wednesday, April 17, 2024 2:14 PM
To: Li Zhijian ; Zhang, Hailiang
; pet...@redhat.com; faro...@suse.de
Cc: qemu-devel@nongnu.org; Zhang, Chen ; Wen
Congyang ; Xie Changlong
Subject: Re: [PATCH
On 17/04/2024 14:13, Philippe Mathieu-Daudé wrote:
> On 17/4/24 04:56, Li Zhijian via wrote:
>> bdrv_activate_all() should not be called from the coroutine context, move
>> it to the QEMU thread colo_process_incoming_thread() with the bql_lock
>> protected.
>>
>> The backtrace is as follows:
>>
The length of Physical Address in General Media Event Record/DRAM Event
Record is 64-bit, so the field mask should be defined as such length.
Otherwise, this causes cxl_general_media and cxl_dram tracepoints to
mask off the upper-32-bits of DPA addresses. The cxl_poison event is
unaffected.
If use
Changes: RFCv2 -> v3:
1. patch1: removed changes for flags
2. changed the main idea of this patchset: not for injection event
handling, but for creation;
3. removed GET_POISON_LIST command while receiving POISON event;
4. dropped poison report in debugfs;
5. added DER event handler to handle P
Currently driver only traces cxl events, poison creation (for both vmem
and pmem type) on cxl memdev is silent. OS needs to be notified then it
could handle poison pages in time. Per CXL spec, the device error event
could be signaled through FW-First and OS-First methods.
So, add poison creation
> On 16 Apr 2024, at 21:11, Don Porter wrote:
>
> On 4/16/24 13:03, Peter Maydell wrote:
>> On Tue, 16 Apr 2024 at 17:53, Don Porter wrote:
>>> There is still a lot I am learning about the code base, but it seems
>>> that qemu_get_guest_memory_mapping() does most of what one would need.
>>> I
On 4/17/24 06:21, Duan, Zhenzhong wrote:
-Original Message-
From: Cédric Le Goater
Subject: Re: [PATCH v2 3/5] intel_iommu: Add a framework to do
compatibility check with host IOMMU cap/ecap
Hello,
On 4/16/24 09:09, Duan, Zhenzhong wrote:
Hi Cédric,
-Original Message-
Fro
On Tue, Apr 16, 2024 at 04:42:39PM +0200, Maciej S. Szmigiero wrote:
> From: "Maciej S. Szmigiero"
>
> VFIO device state transfer is currently done via the main migration channel.
> This means that transfers from multiple VFIO devices are done sequentially
> and via just a single common migration
On Wed, Apr 10, 2024 at 9:51 AM Jonathan Cameron
wrote:
>
> On Tue, 9 Apr 2024 12:02:31 -0700
> "Ho-Ren (Jack) Chuang" wrote:
>
> > Hi Jonathan,
> >
> > On Tue, Apr 9, 2024 at 9:12 AM Jonathan Cameron
> > wrote:
> > >
> > > On Fri, 5 Apr 2024 15:43:47 -0700
> > > "Ho-Ren (Jack) Chuang" wrote:
>
Queued, thanks.
Paolo
>-Original Message-
>From: Cédric Le Goater
>Subject: Re: [PATCH v2 3/5] intel_iommu: Add a framework to do
>compatibility check with host IOMMU cap/ecap
>
>On 4/17/24 06:21, Duan, Zhenzhong wrote:
>>
>>
>>> -Original Message-
>>> From: Cédric Le Goater
>>> Subject: Re: [PATCH v
Hi Anthony,
May I ask what your usage scenario is? Is it to measure Guest's energy
consumption and to charged per watt consumed? ;-)
On Thu, Apr 11, 2024 at 02:14:34PM +0200, Anthony Harivel wrote:
> Date: Thu, 11 Apr 2024 14:14:34 +0200
> From: Anthony Harivel
> Subject: [PATCH v5 3/3] Add supp
Hi,
> -Original Message-
> From: qemu-devel-bounces+fkonrad=amd@nongnu.org
> On Behalf Of
> Peter Maydell
> Sent: Friday, April 12, 2024 12:07 PM
> To: Alexandra Diupina
> Cc: Alistair Francis ; Edgar E. Iglesias
> ; qemu-...@nongnu.org; qemu-
> de...@nongnu.org; sdl.q...@linuxtest
On Tue, Apr 16, 2024 at 5:55 PM Peter Xu wrote:
>
> On Tue, Apr 16, 2024 at 03:28:41PM +0200, Jürgen Groß wrote:
> > On 16.04.24 13:32, Edgar E. Iglesias wrote:
> > > On Wed, Apr 10, 2024 at 8:56 PM Peter Xu wrote:
> > > >
> > > > On Wed, Apr 10, 2024 at 06:44:38PM +0200, Edgar E. Iglesias wrote:
Hi
On Wed, Apr 17, 2024 at 8:14 AM wrote:
>
> From: Dongwon Kim
>
> This commit introduces dpy_gl_qemu_dmabuf_get_... helpers to extract
> specific fields from the QemuDmaBuf struct. It also updates all instances
> where fields within the QemuDmaBuf struct are directly accessed, replacing
> them
These patches adds the framework for a proper ADU model rather than
putting registers into the xscom default ops, and implements ADU's
indirect LPC access functionality which IBM's proprietary firmware
uses to provide consoles on UARTs.
Patch 1 should be quite a simple hooking up the xscom address
One of the functions of the ADU is indirect memory access engines that
send and receive data via ADU registers.
This implements the ADU LPC memory access functionality sufficiently
for IBM proprietary firmware to access the UART and print characters
to the serial port as it does on real hardware.
This implements a framework for an ADU unit model.
The ADU unit actually implements XSCOM, which is the bridge between MMIO
and PIB. However it also includes control and status registers and other
functions that are exposed as PIB (xscom) registers.
To keep things simple, pnv_xscom.c remains the
On Tue, Apr 16, 2024 at 09:09:52PM -0700, dongwon@intel.com wrote:
> From: Dongwon Kim
>
> This commit introduces dpy_gl_qemu_dmabuf_get_... helpers to extract
> specific fields from the QemuDmaBuf struct. It also updates all instances
> where fields within the QemuDmaBuf struct are directly
On Tue, Apr 16, 2024 at 09:09:54PM -0700, dongwon@intel.com wrote:
> From: Dongwon Kim
>
> This commit introduces utility functions for the creation and deallocation
> of QemuDmaBuf instances. Additionally, it updates all relevant sections
> of the codebase to utilize these new utility functi
On Tue, Apr 16, 2024 at 09:09:51PM -0700, dongwon@intel.com wrote:
> From: Dongwon Kim
>
> This series introduces privacy enhancements to the QemuDmaBuf struct
> and its contained data to bolster security. it accomplishes this by
> introducing of helper functions for allocating, deallocating,
On Wed, Apr 17, 2024 at 8:14 AM wrote:
>
> From: Dongwon Kim
>
> This commit introduces utility functions for the creation and deallocation
> of QemuDmaBuf instances. Additionally, it updates all relevant sections
> of the codebase to utilize these new utility functions.
>
> Suggested-by: Marc-An
Hello Nick,
On 4/17/24 13:02, Nicholas Piggin wrote:
This implements a framework for an ADU unit model.
The ADU unit actually implements XSCOM, which is the bridge between MMIO
and PIB. However it also includes control and status registers and other
functions that are exposed as PIB (xscom) reg
> > >
> > > ret = cxl_detect_malformed_extent_list(ct3d, in);
> > > if (ret != CXL_MBOX_SUCCESS) {
> > > +cxl_extent_group_list_delete_front(&ct3d->dc.extents_pending);
> >
> > If it's a bad message from the host, I don't think the device is supposed to
> > do anything with
On Wednesday, April 17, 2024 1:16:02 AM CEST Daniel Henrique Barboza wrote:
>
> On 4/16/24 16:54, Michael Tokarev wrote:
> > 27.03.2024 17:20, Daniel Henrique Barboza :
> >> Commit 558f5c42ef gated the local tests with g_test_slow() to skip them
> >> in 'make check'. The reported issue back then w
On Tue, 16 Apr 2024 09:37:09 -0700
fan wrote:
> On Tue, Apr 16, 2024 at 04:00:56PM +0100, Jonathan Cameron wrote:
> > On Mon, 15 Apr 2024 10:37:00 -0700
> > fan wrote:
> >
> > > On Fri, Apr 12, 2024 at 06:54:42PM -0400, Gregory Price wrote:
> > > > On Mon, Mar 25, 2024 at 12:02:28PM -0700,
On 17.04.2024 10:36, Daniel P. Berrangé wrote:
On Tue, Apr 16, 2024 at 04:42:39PM +0200, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
VFIO device state transfer is currently done via the main migration channel.
This means that transfers from multiple VFIO devices are done sequentiall
On Wed, Apr 17, 2024 at 01:52:24PM +0200, Christian Schoenebeck wrote:
> On Wednesday, April 17, 2024 1:16:02 AM CEST Daniel Henrique Barboza wrote:
> >
> > On 4/16/24 16:54, Michael Tokarev wrote:
> > > 27.03.2024 17:20, Daniel Henrique Barboza :
> > >> Commit 558f5c42ef gated the local tests wit
On 4/17/24 13:02, Nicholas Piggin wrote:
One of the functions of the ADU is indirect memory access engines that
send and receive data via ADU registers.
This implements the ADU LPC memory access functionality sufficiently
for IBM proprietary firmware to access the UART and print characters
to th
On Wed, Apr 17, 2024 at 06:07:02PM +0800, Zhao Liu wrote:
> Hi Anthony,
>
> May I ask what your usage scenario is? Is it to measure Guest's energy
> consumption and to charged per watt consumed? ;-)
>
> On Thu, Apr 11, 2024 at 02:14:34PM +0200, Anthony Harivel wrote:
> > Date: Thu, 11 Apr 2024 14
Hi all,
Thank you all for the feedback. I've updated the patch to address most of the
suggestions, but only the copyright part. I'm not sure how to deal with it.
BTW, should I directly paste the revised patch below? Sorry that I'm not
familiar with the process here. Thanks for your help again.
Li Zhijian via writes:
> bdrv_activate_all() should not be called from the coroutine context, move
> it to the QEMU thread colo_process_incoming_thread() with the bql_lock
> protected.
>
> The backtrace is as follows:
> #4 0x561af7948362 in bdrv_graph_rdlock_main_loop () at
> ../block/grap
On 17/4/24 08:24, Cédric Le Goater wrote:
Hello,
On 4/16/24 20:47, Philippe Mathieu-Daudé wrote:
We are going to modify these lines, fix their style
in order to avoid checkpatch.pl warnings:
WARNING: line over 80 characters
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i2c/i2c.h
When qemu runs without kvm acceleration the ACPI executions take a great
amount of time. If they take more than the default time (30sec), the
ACPI calls fail and the system might not behave correctly.
Now the _PRT table is computed on the fly. We can drastically reduce the
execution of the _PRT me
Hi Daniel,
On Wed, Apr 17, 2024 at 01:27:03PM +0100, Daniel P. Berrangé wrote:
> Date: Wed, 17 Apr 2024 13:27:03 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [PATCH v5 3/3] Add support for RAPL MSRs in KVM/Qemu
>
> On Wed, Apr 17, 2024 at 06:07:02PM +0800, Zhao Liu wrote:
> > Hi Anthony,
>
On 4/16/24 19:40, Richard Henderson wrote:
On 4/16/24 17:35, Pierrick Bouvier wrote:
On 4/15/24 21:06, Richard Henderson wrote:
Based-on: 20240404230611.21231-1-richard.hender...@linaro.org
("[PATCH v2 00/21] Rewrite plugin code generation")
This is an attempt to fix
https://gitlab.com/qemu-pr
On Fri, Apr 12, 2024 at 03:24:06PM +0200, Thomas Huth wrote:
> RHEL 9 (and thus also the derivatives) are available since two years
> now, so according to QEMU's support policy, we can drop the active
> support for the previous major version 8 now.
> Thus upgrade our CentOS Stream container to majo
Hi Aidan,
Thank you for these patches. Currently, I don't have any comments.
I asked QE from my team to test this patch and wait for feedback.
Also, QEMU is in the code freeze stage now, so I plan to merge all QGA
patches after release.
Best Regards,
Konstantin Kostiuk.
On Tue, Apr 16, 2024 at
On Wed, Apr 17, 2024 at 02:11:37PM +0200, Maciej S. Szmigiero wrote:
> On 17.04.2024 10:36, Daniel P. Berrangé wrote:
> > On Tue, Apr 16, 2024 at 04:42:39PM +0200, Maciej S. Szmigiero wrote:
> > > From: "Maciej S. Szmigiero"
> > >
> > > VFIO device state transfer is currently done via the main mi
On Wed, Apr 17, 2024 at 10:56:34AM +0800, Li Zhijian via wrote:
> bdrv_activate_all() should not be called from the coroutine context, move
> it to the QEMU thread colo_process_incoming_thread() with the bql_lock
> protected.
>
> The backtrace is as follows:
> #4 0x561af7948362 in bdrv_graph
Hi Daniel,
> -Original Message-
> From: Daniel P. Berrangé
> Sent: Wednesday, April 17, 2024 4:05 AM
> To: Kim, Dongwon
> Cc: qemu-devel@nongnu.org; marcandre.lur...@redhat.com
> Subject: Re: [PATCH v6 1/3] ui/console: Introduce
> dpy_gl_qemu_dmabuf_get_..() helpers
>
> On Tue, Apr 16,
Hi Konstantin,
Thank you for the quick response. I didn’t realize the QEMU was in a code
freeze, thank you for letting me know. Let me know if you find any defects in
the patch and I will fix them promptly.
Aidan Leuck
From: Konstantin Kostiuk
Sent: Wednesday, April 17, 2024 10:33 AM
To: Aida
On Thu, Apr 11, 2024 at 02:14:31PM +0200, Anthony Harivel wrote:
> Dear maintainers,
>
> First of all, thank you very much for your review of my patch
> [1].
>
> In this version (v5), I have attempted to address all the problems
> addressed by Daniel during the last review. I've been more care
On 4/17/24 12:50 AM, Shiyang Ruan wrote:
> Currently driver only traces cxl events, poison creation (for both vmem
> and pmem type) on cxl memdev is silent. OS needs to be notified then it
> could handle poison pages in time. Per CXL spec, the device error event
> could be signaled through FW-
On Thu, Apr 11, 2024 at 02:14:34PM +0200, Anthony Harivel wrote:
> diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
> index fad9a7e8ff30..37f68c496807 100644
> --- a/include/sysemu/kvm.h
> +++ b/include/sysemu/kvm.h
> @@ -544,4 +544,6 @@ uint32_t kvm_dirty_ring_size(void);
> * reported
On Fri, Apr 12, 2024 at 12:57:11PM +0200, Paolo Bonzini wrote:
> On Thu, Apr 11, 2024 at 2:14 PM Anthony Harivel wrote:
> >
> > Dear maintainers,
> >
> > First of all, thank you very much for your review of my patch
> > [1].
> >
> > In this version (v5), I have attempted to address all the problem
Hi
On Wed, Apr 17, 2024 at 9:06 PM Kim, Dongwon wrote:
>
> Hi Daniel,
>
> > -Original Message-
> > From: Daniel P. Berrangé
> > Sent: Wednesday, April 17, 2024 4:05 AM
> > To: Kim, Dongwon
> > Cc: qemu-devel@nongnu.org; marcandre.lur...@redhat.com
> > Subject: Re: [PATCH v6 1/3] ui/cons
Commit fd3f7d24d4 ("include/hw/core: Remove i386 conditional
on fake_user_interrupt") remove the need to check on NEED_CPU_H.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240322161439.6448-3-phi...@linaro.org>
---
include/hw/core/tcg-cpu-ops.h | 3 ---
1 f
CPUArchState 'env' field is defined within the ArchCPU structure,
so we need to include each target "cpu.h" header which defines it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
Message-Id: <20231211212003.21686-2-phi...@linaro.org>
---
include/exec/cpu-all.h | 1 +
1 file cha
'NEED_CPU_H' guard target-specific code; it is defined by meson
altogether with the 'CONFIG_TARGET' definition. Rename NEED_CPU_H
as COMPILING_PER_TARGET to clarify its meaning.
Mechanical change running:
$ sed -i s/NEED_CPU_H/COMPILING_PER_TARGET/g $(git grep -l NEED_CPU_H)
then manually add a
Hi,
This series contains the patches I'm going to send in
a pull request once the final 9.0 tag is out. Sending
now since I'll post another series based on it.
Also available here for convenience:
https://gitlab.com/philmd/qemu/-/commits/exec-next
Regards,
Phil.
Philippe Mathieu-Daudé (21):
Slightly simplify by checking NEED_CPU_H definition in header.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240322161439.6448-2-phi...@linaro.org>
---
include/gdbstub/helpers.h | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/in
User-only objects might benefit from the "exec/target_page.h"
API, which allows to build some objects once for all targets.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
Reviewed-by: Richard Henderson
Message-Id: <20231211212003.21686-3-phi...@linaro.org>
---
meson.build
set_helper_retaddr() is only used in accel/tcg/user-exec.c.
clear_helper_retaddr() is only used in accel/tcg/user-exec.c
and accel/tcg/user-exec.c.
No need to expose their definitions to all user-emulation
files including "exec/cpu_ldst.h", move them to a new
"user-retaddr.h" header (restricted t
"semihosting/uaccess.h" only requires declarations
from "exec/cpu-defs.h". Avoid including the huge "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231211212003.21686-6-phi...@linaro.org>
---
include/semihosting/uaccess.h | 2 +-
1 file changed, 1 in
Nothing in guestfd.c requires "semihosting/uaccess.h" nor "qemu.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20231212123401.37493-8-phi...@linaro.org>
---
semihosting/guestfd.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/semihos
The XRSTOR instruction ends calling tlb_flush(), declared
in "exec/exec-all.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231211212003.21686-13-phi...@linaro.org>
---
target/i386/tcg/fpu_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/targe
Functions such gdb_get_cpu_pid() dereference CPUState so
require the structure declaration from "hw/core/cpu.h":
static uint32_t gdb_get_cpu_pid(CPUState *cpu)
{
...
return cpu->cluster_index + 1;
}
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
Message-Id: <202312
tcg_cpu_init_cflags() accesses CPUState fields, so requires
"hw/core/cpu.h" to get its structure definition.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20231212123401.37493-12-phi...@linaro.org>
---
accel/tcg/tcg-accel-ops.c | 2 ++
1 file changed, 2 inserti
accel/tcg/ files requires the following definitions:
- TARGET_LONG_BITS
- TARGET_PAGE_BITS
- TARGET_PHYS_ADDR_SPACE_BITS
- TCG_GUEST_DEFAULT_MO
The first 3 are defined in "cpu-param.h". The last one
in "cpu.h", with a bunch of definitions irrelevant for
TCG. By moving the TCG_GUEST_DEFAUL
We usually check target endianess before swapping values,
so target_words_bigendian() declaration makes sense in
"exec/tswap.h" with the target swapping helpers.
Remove "hw/core/cpu.h" when it was only included to get
the target_words_bigendian() declaration.
Signed-off-by: Philippe Mathieu-Daudé
"exec/user/abitypes.h" requires:
- "exec/cpu-defs.h" (TARGET_LONG_BITS)
- "exec/tswap.h" (tswap32)
In order to avoid "cpu.h", pick the minimum required headers.
Assert this user-specific header is only included from user
emulation.
Signed-off-by: Philippe Mathieu-Daudé
Last use of tswapls() was removed 2 years ago in commit
aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64").
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20231212123401.37493-15-phi...@linaro.org>
---
include/exec/cpu-all.h | 2 --
1 file changed, 2
Theses files call cpu_ldl_code() which is declared
in "exec/cpu_ldst.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231211212003.21686-5-phi...@linaro.org>
---
accel/tcg/translator.c| 1 +
target/hexagon/translate.c| 1 +
target/microblaze/cp
Nothing is required from "qemu/thread.h" in "exec/cpu-all.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20231212123401.37493-13-phi...@linaro.org>
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include
tswapl() and bswaptls() are target-dependent and only used
by user emulation. Move their definitions to a new header:
"exec/user/tswap-target.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20231212123401.37493-17-phi...@linaro.org>
---
MAINTAINERS
The abi_ptr type is declared in "exec/cpu_ldst.h" with all
the load/store helpers. Some source files requiring abi_ptr
type don't need the load/store helpers. In order to simplify,
create a new "exec/abi_ptr.h" header.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-
"exec/cpu-all.h" doesn't need definitions from "qemu/rcu.h",
however "exec/ram_addr.h" does.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231211212003.21686-17-phi...@linaro.org>
---
include/exec/cpu-all.h | 1 -
include/exec/ram_addr.h | 1 +
2 files cha
'abi_ptr' is a user specific type. The system emulation
equivalent is 'target_ulong'. Use it in ppc_ldl_code()
to emphasis this is not an user emulation function.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Nicholas Piggin
Reviewed-by: Thomas Huth
Message-Id: <20231211212003.21686-18-phi...
We leak global_filename, and do not close global_file. Let's fix that.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
Interesting: seems, nobody is maintainer of util/log.c
util/log.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/util/log.c b/util/log.c
index d36c98da0b..30de20
On 4/17/24 11:27, Philippe Mathieu-Daudé wrote:
Functions such gdb_get_cpu_pid() dereference CPUState so
require the structure declaration from "hw/core/cpu.h":
static uint32_t gdb_get_cpu_pid(CPUState *cpu)
{
...
return cpu->cluster_index + 1;
}
Signed-off-by: Philippe Mathi
On 4/17/24 11:27, Philippe Mathieu-Daudé wrote:
"semihosting/uaccess.h" only requires declarations
from "exec/cpu-defs.h". Avoid including the huge "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231211212003.21686-6-phi...@linaro.org>
---
include
On 4/17/24 11:27, Philippe Mathieu-Daudé wrote:
Nothing in guestfd.c requires "semihosting/uaccess.h" nor "qemu.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id:<20231212123401.37493-8-phi...@linaro.org>
---
semihosting/guestfd.c | 5 +
1 file changed, 1 i
On 4/17/24 11:27, Philippe Mathieu-Daudé wrote:
'abi_ptr' is a user specific type. The system emulation
equivalent is 'target_ulong'. Use it in ppc_ldl_code()
to emphasis this is not an user emulation function.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Nicholas Piggin
Reviewed-by: Thomas H
On 4/17/24 11:28, Philippe Mathieu-Daudé wrote:
Nothing is required from "qemu/thread.h" in "exec/cpu-all.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id:<20231212123401.37493-13-phi...@linaro.org>
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(
On 4/17/24 11:28, Philippe Mathieu-Daudé wrote:
tcg_cpu_init_cflags() accesses CPUState fields, so requires
"hw/core/cpu.h" to get its structure definition.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id:<20231212123401.37493-12-phi...@linaro.org>
---
accel/tcg/t
On 4/17/24 11:28, Philippe Mathieu-Daudé wrote:
Last use of tswapls() was removed 2 years ago in commit
aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64").
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id:<20231212123401.37493-15-phi...@linaro.org>
---
i
On 4/17/24 11:27, Philippe Mathieu-Daudé wrote:
set_helper_retaddr() is only used in accel/tcg/user-exec.c.
clear_helper_retaddr() is only used in accel/tcg/user-exec.c
and accel/tcg/user-exec.c.
Typo here, repeating the same filename.
r~
On 4/17/24 11:28, Philippe Mathieu-Daudé wrote:
We usually check target endianess before swapping values,
so target_words_bigendian() declaration makes sense in
"exec/tswap.h" with the target swapping helpers.
Remove "hw/core/cpu.h" when it was only included to get
the target_words_bigendian() d
Hi Daniel,
thank you for looking into this. I checked how VHOST_USER_VSOCK and it
refers to the vhost-user protocol. It is implemented in the
subprojects/libvhost-user library, but this library depends on poll.h
and linux/vhost.h files. Do you know if it builds/works on Windows?
I checked how pol
On 4/17/24 11:28, Philippe Mathieu-Daudé wrote:
tswapl() and bswaptls() are target-dependent and only used
by user emulation. Move their definitions to a new header:
"exec/user/tswap-target.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id:<20231212123401.37493-17
On 4/17/24 11:28, Philippe Mathieu-Daudé wrote:
"exec/user/abitypes.h" requires:
- "exec/cpu-defs.h" (TARGET_LONG_BITS)
- "exec/tswap.h" (tswap32)
In order to avoid "cpu.h", pick the minimum required headers.
Assert this user-specific header is only included from use
> On 17 Apr 2024, at 11:30, Nadav Amit wrote:
>
>
>
>> On 16 Apr 2024, at 21:11, Don Porter wrote:
>>
>> On 4/16/24 13:03, Peter Maydell wrote:
>>> On Tue, 16 Apr 2024 at 17:53, Don Porter wrote:
There is still a lot I am learning about the code base, but it seems
that qemu_get_
On 4/16/24 08:11, Jonathan Cameron wrote:
On Fri, 1 Mar 2024 10:41:09 -1000
Richard Henderson wrote:
If translation is disabled, the default memory type is Device, which
requires alignment checking. This is more optimally done early via
the MemOp given to the TCG memory operation.
Reviewed-
* Don Porter (por...@cs.unc.edu) wrote:
> On 4/16/24 13:03, Peter Maydell wrote:
> > On Tue, 16 Apr 2024 at 17:53, Don Porter wrote:
> > > There is still a lot I am learning about the code base, but it seems
> > > that qemu_get_guest_memory_mapping() does most of what one would need.
> > > It curr
On 4/17/24 14:03, Dr. David Alan Gilbert wrote:
In looking at x86 code, I see the following places where there is page table
walking code to
potentially merge:
* target/i386/monitor.c - existing info commands
* target/i386/helper.c - get_phys_page_attrs_debug
* target/i386/arch_memory_mapping.
We do set MIGRATION_FAILED state, but don't give a chance to
orchestrator to query migration state and get the error.
Let's report an error through QAPI like we do on outgoing migration.
migration-test is updated correspondingly.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
Doubt: is exitin
The th.sxstatus CSR can be used to identify available custom extension
on T-Head CPUs. The CSR is documented here:
https://github.com/T-head-Semi/thead-extension-spec/blob/master/xtheadsxstatus.adoc
An important property of this patch is, that the th.sxstatus MAEE field
is not set (indicating t
On Fri, Apr 5, 2024 at 3:36 AM LIU Zhiwei wrote:
>
>
> On 2024/3/29 20:04, Christoph Müllner wrote:
> > The th.sxstatus CSR can be used to identify available custom extension
> > on T-Head CPUs. The CSR is documented here:
> >https://github.com/T-head-Semi/thead-extension-spec/pull/46
> >
> >
Hi Perter HSU,
On Wed, Apr 17, 2024 at 01:07:17PM +, Peter Dave Hello wrote:
> Date: Wed, 17 Apr 2024 13:07:17 +
> From: Peter Dave Hello
> Subject: Re: [PATCH] Add zh_TW Traditional Chinese translation
>
> Hi all,
>
> Thank you all for the feedback. I've updated the patch to address mo
Tomorrow I plan to push patches to mark the nios2 target as obsolete in
GCC 14.
Background: Intel has EOL'ed the Nios II processor IP and is now
directing their FPGA customers to a RISC-V platform instead.
https://www.intel.com/content/www/us/en/content-details/781327/intel-is-discontinuing-i
On 18/04/2024 05.27, Sandra Loosemore wrote:
Tomorrow I plan to push patches to mark the nios2 target as obsolete in GCC 14.
Background: Intel has EOL'ed the Nios II processor IP and is now directing
their FPGA customers to a RISC-V platform instead.
https://www.intel.com/content/www/us/en/co
On 12/04/2024 16.40, Eric Blake wrote:
On Fri, Apr 12, 2024 at 03:24:11PM +0200, Thomas Huth wrote:
Since version 2.66, glib has useful URI parsing functions, too.
Use those instead of the QEMU-internal ones to be finally able
to get rid of the latter.
Signed-off-by: Thomas Huth
---
block/gl
On 17/04/2024 18.15, Daniel P. Berrangé wrote:
On Fri, Apr 12, 2024 at 03:24:06PM +0200, Thomas Huth wrote:
RHEL 9 (and thus also the derivatives) are available since two years
now, so according to QEMU's support policy, we can drop the active
support for the previous major version 8 now.
Thus u
Hello Zhenzhong
On 4/17/24 11:24, Duan, Zhenzhong wrote:
-Original Message-
From: Cédric Le Goater
Subject: Re: [PATCH v2 3/5] intel_iommu: Add a framework to do
compatibility check with host IOMMU cap/ecap
On 4/17/24 06:21, Duan, Zhenzhong wrote:
-Original Message-
From
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