Hi all,
This is the v9 patch to support S3.
v9 makes below changes:
* patch#1 no changes
* patch#2 remove unnecessary parentheses.
add some comments to remind we may need to consider SUSPEND bit in
future.
change the commit message to describe which virtio device was tested.
In current code, when guest does S3, virtio-gpu are reset due to the
bit No_Soft_Reset is not set. After resetting, the display resources
of virtio-gpu are destroyed, then the display can't come back and only
show blank after resuming.
Implement No_Soft_Reset bit of PCI_PM_CTRL register, then gues
Fix bug imported by 27ce0f3afc9dd25d21b43bbce505157afd93d111
(fix Power Management Control Register for PCI Express virtio devices)
Only state of PM_CTRL is writable.
Only when flag VIRTIO_PCI_FLAG_INIT_PM is set, need to reset state.
Signed-off-by: Jiqian Chen
---
hw/virtio/virtio-pci.c | 8 ++
Hi Cédric,
>-Original Message-
>From: Cédric Le Goater
>Subject: Re: [PATCH v2 3/5] intel_iommu: Add a framework to do
>compatibility check with host IOMMU cap/ecap
>
>On 4/8/24 10:44, Zhenzhong Duan wrote:
>> From: Yi Liu
>>
>> If check fails, the host side device(either vfio or vdpa de
On Tue, Apr 16, 2024 at 1:43 PM Yuri Benditovich
wrote:
>
> On Tue, Apr 16, 2024 at 7:00 AM Jason Wang wrote:
> >
> > On Mon, Apr 15, 2024 at 10:05 PM Yuri Benditovich
> > wrote:
> > >
> > > On Wed, Apr 3, 2024 at 2:11 PM Akihiko Odaki
> > > wrote:
> > > >
> > > > vhost requires eBPF for RSS.
On 15/4/24 08:56, Thomas Huth wrote:
First patch fixes the problem that the file hw/cpu/Kconfig is
currently ignored and the switches there are duplicated in hw/arm/.
The second patch introduces a proper config switch for the cpu-cluster
device.
v2:
- Don't make core.c depend on the CPU_CLUSTER
In rtas_nvram_fetch() and rtas_nvram_store() if len is equal
to zero, result of a cpu_physical_memory_map() will be NULL.
It will lead to NULL dereference, since return value using
without check. It could be avoided by making IF condition
more strict.
Found by Linux Verification Center (linuxte
On 2/29/2024 2:36 PM, Xiaoyao Li wrote:
> Current KVM doesn't support PMU for TD guest. It returns error if TD is
> created with PMU bit being set in attributes.
>
> Disable PMU for TD guest on QEMU side.
>
> Signed-off-by: Xiaoyao Li
> ---
> target/i386/kvm/tdx.c | 2 ++
> 1 file changed, 2
On Sat, Apr 13, 2024 at 7:23 AM Richard Henderson
wrote:
>
> More sprintf cleanup encouraged by the Apple deprecation.
> Probably there's a more minimal patch. On the other hand,
> there's certainly a larger cleanup possible.
>
>
> r~
On the series:
Reviewed-by: Edgar E. Iglesias
>
>
> Richa
On Mon, Apr 15, 2024 at 9:42 PM Sahil wrote:
>
> Hi,
>
> Thank you for your reply.
>
> On Monday, April 15, 2024 2:27:36 PM IST Eugenio Perez Martin wrote:
> > [...]
> > > I have one question though. One of the options (use case 1 in [1])
> > >
> > > given to the "qemu-kvm" command is:
> > > > -de
Hi
On Tue, Apr 16, 2024 at 1:00 AM Kim, Dongwon wrote:
>
> Hi Marc-André,
>
> > -Original Message-
> > From: marcandre.lur...@redhat.com
> > Sent: Monday, April 15, 2024 4:16 AM
> > To: qemu-devel@nongnu.org
> > Cc: Kim, Dongwon ; dbas...@redhat.com; Marc-
> > André Lureau ; Michael S. T
On 4/16/2024 4:32 PM, Chenyi Qiang wrote:
On 2/29/2024 2:36 PM, Xiaoyao Li wrote:
Current KVM doesn't support PMU for TD guest. It returns error if TD is
created with PMU bit being set in attributes.
Disable PMU for TD guest on QEMU side.
Signed-off-by: Xiaoyao Li
---
target/i386/kvm/tdx.
On Mon, 15 Apr 2024 at 19:18, Dorjoy Chowdhury wrote:
>
> On Mon, Apr 15, 2024 at 5:35 PM Peter Maydell
> wrote:
> > This bit of the codebase has got a bit more complicated since
> > I wrote up the bug report. I will look into this and get back
> > to you, but my suspicion is that these calls mu
On 17:08 Fri 12 Apr , Peter Maydell wrote:
> Rather than directly calling the device's implementation of its 'hold'
> reset phase, call device_cold_reset(). This means we don't have to
> adjust this callsite when we add another argument to the function
> signature for the hold and exit reset me
On 17:08 Fri 12 Apr , Peter Maydell wrote:
> We pass a ResetType argument to the Resettable class enter phase
> method, but we don't pass it to hold and exit, even though the
> callsites have it readily available. This means that if a device
> cared about the ResetType it would need to record
Hi Irina
On Mon, Mar 25, 2024 at 10:44 AM Marc-André Lureau
wrote:
>
> Hi
>
> On Sun, Mar 24, 2024 at 7:23 PM Irina Ryapolova
> wrote:
> >
> > After exit Qemu need to return the terminal to the default state.
> >
> > Signed-off-by: Irina Ryapolova
> > ---
> > chardev/char-win-stdio.c | 5 +
On 17:08 Fri 12 Apr , Peter Maydell wrote:
> We pass a ResetType argument to the Resettable class enter
> phase method, but we don't pass it to hold and exit, even though
> the callsites have it readily available. This means that if
> a device cared about the ResetType it would need to record i
On 17:08 Fri 12 Apr , Peter Maydell wrote:
> Update the reset documentation's example code to match the new API
> for the hold and exit phase method APIs where they take a ResetType
> argument.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Luc Michel
> ---
> docs/devel/reset.rst | 8 -
On 17:08 Fri 12 Apr , Peter Maydell wrote:
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> The npcm7xx_clk and npcm7xx_gcr device reset methods look at
> the ResetType argument and only handle RES
Hi Paolo,
Just a friendly ping. Hope this series could get your review!
Thanks,
Zhao
On Thu, Mar 21, 2024 at 10:40:27PM +0800, Zhao Liu wrote:
> Date: Thu, 21 Mar 2024 22:40:27 +0800
> From: Zhao Liu
> Subject: [PATCH v10 00/21] i386: Introduce smp.modules and clean up cache
> topology
> X-Mai
Changes from v1:
The patch series supports WDT, SDMC, SMC, SCU, SLI and INTC for AST2700 SoC.
Changes from v2:
- replace is_aarch64 with is_bus64bit for sdmc patch review.
- fix incorrect dram size for AST2700
Changes from v3:
- Add AST2700 Evaluation board in ASPEED document
- Add avocado test c
Fix coding style issues from checkpatch.pl
Test command:
scripts/checkpatch.pl --no-tree -f hw/misc/aspeed_sdmc.c
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
---
hw/misc/aspeed_sdmc.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/misc/aspeed_sdmc.c b/h
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
---
hw/ssi/aspeed_smc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 6e1a84c197..8a8d77b480 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -1448,7 +1448,7
AST2700 support the maximum dram size is 8GiB
and has a "DMA DRAM Side Address High Part(0x7C)"
register to support 64 bits dma dram address.
Add helper routines functions to compute the dma dram
address, new features and update trace-event
to support 64 bits dram address.
Signed-off-by: Troy Lee
AST2700 have two SCU controllers which are SCU and SCUIO.
Both SCU and SCUIO registers are not compatible previous SOCs
, introduces new registers and adds ast2700 scu, sucio class init handler.
The pclk divider selection of SCUIO is defined in SCUIO280[20:18] and
the pclk divider selection of SCU
The SDRAM memory controller(DRAMC) controls the access to external
DDR4 and DDR5 SDRAM and power up to DDR4 and DDR5 PHY.
The DRAM memory controller of AST2700 is not backward compatible
to previous chips such AST2600, AST2500 and AST2400.
Max memory is now 8GiB on the AST2700. Introduce new
aspe
Initial definitions for a simple machine using an AST2700 SOC (Cortex-a35 CPU).
AST2700 SOC and its interrupt controller are too complex to handle
in the common Aspeed SoC framework. We introduce a new ast2700
class with instance_init and realize handlers.
AST2700 is a 64 bits quad core cpus and
AST2700 SLI engine is designed to accelerate the
throughput between cross-die connections.
It have CPU_SLI at CPU die and IO_SLI at IO die.
Introduce dummy AST2700 SLI and SLIIO models.
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
---
hw/misc/aspeed_sli.c | 178
AST2700 fmc/spi controller's address decoding unit is 64KB
and only bits [31:16] are used for decoding. Introduce seg_to_reg
and reg_to_seg handlers for ast2700 fmc/spi controller.
In addition, adds ast2700 fmc, spi0, spi1, and spi2 class init handler.
Signed-off-by: Troy Lee
Signed-off-by: Jamin
DMA length is from 1 byte to 32MB for AST2600 and AST10x0
and DMA length is from 4 bytes to 32MB for AST2500.
In other words, if "R_DMA_LEN" is 0, it should move at least 1 byte
data for AST2600 and AST10x0 and 4 bytes data for AST2500.
To support all ASPEED SOCs, adds dma_start_length parameter t
AST2700 dram size calculation is not back compatible AST2600.
According to the DDR capacity hardware behavior,
if users write the data to address which is beyond the ram size,
it would write the data to address 0.
For example:
a. sdram base address "0x4 "
b. sdram size is 1 GiB
The availabl
AST2700 wdt controller is similiar to AST2600's wdt, but
the AST2700 has 8 watchdogs, and they each have 0x80 of registers.
Introduce ast2700 object class and increase the number of regs(offset) of
ast2700 model.
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
Add a test case to test Aspeed OpenBMC SDK v09.01 on AST2700 board.
It loads u-boot-nodtb.bin, u-boot.dtb, tfa and optee-os
images to dram first which base address is 0x4.
Then, boot and launch 4 cpu cores.
```
qemu-system-aarch64 -machine ast2700-evb
-device loader,force-raw=on,addr=
These macros are no longer used for ASPEED SOCs, so removes them.
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
---
hw/misc/aspeed_sdmc.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 64cd1a81dc..74279bbe8e 100644
---
On 17:08 Fri 12 Apr , Peter Maydell wrote:
> Some devices and machines need to handle the reset before a vmsave
> snapshot is loaded differently -- the main user is the handling of
> RNG seed information, which does not want to put a new RNG seed into
> a ROM blob when we are doing a snapshot l
AST2700 CPU is ARM Cortex-A35 which is 64 bits.
Add TARGET_AARCH64 to build this machine.
According to the design of ast2700, it has a bootmcu(riscv-32) which
is used for executing SPL.
Then, CPUs(cortex-a35) execute u-boot, kernel and rofs.
Currently, qemu not support emulate two CPU architectur
AST2700 interrupt controller(INTC) provides hardware interrupt interfaces
to interrupt of processors PSP, SSP and TSP. In INTC, each interrupt of
INT 128 to INT136 combines 32 interrupts.
Introduce a new aspeed_intc class with instance_init and realize handlers.
So far, this model only supports G
Add AST2700 Evaluation board and its boot command.
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
---
docs/system/arm/aspeed.rst | 39 ++
1 file changed, 35 insertions(+), 4 deletions(-)
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
On 12/21/23 06:49, Chao Du wrote:
This patch implements insert/remove software breakpoint process:
Add an input parameter for kvm_arch_insert_sw_breakpoint() and
kvm_arch_remove_sw_breakpoint() to pass the length information,
which helps us to know whether it is a compressed instruction.
For
On 4/9/24 06:43, Chao Du wrote:
Hi Daniel and all,
The KVM patches have been reviewd and are in the queue.
https://lore.kernel.org/all/20240402062628.5425-1-duc...@eswincomputing.com/
Could you please review in the QEMU side ?
Then I will rebase this series with your comments.
Some Notes:
1
On 12.04.24 16:42, Kevin Wolf wrote:
Commit 30896374 started to pass the full BlockConf from usb-storage to
scsi-disk, while previously only a few select properties would be
forwarded. This enables the user to set more properties, e.g. the block
size, that are actually taking effect.
However, no
Hello,
Please rephrase the subject to something like:
"ppc/pnv: Extend SPI model ..."
Using a verb is preferable.
On 4/9/24 19:56, Chalapathi V wrote:
In this commit SPI shift engine and sequencer logic is implemented.
Shift engine performs serialization and de-serialization according to th
On Tue, 16 Apr 2024, Nicholas Piggin wrote:
On Wed Apr 10, 2024 at 9:03 PM AEST, BALATON Zoltan wrote:
On Wed, 10 Apr 2024, Nicholas Piggin wrote:
On Wed Apr 10, 2024 at 9:55 AM AEST, BALATON Zoltan wrote:
Real 460EX SoC apparently does not expose a bridge device and having
it appear on PCI bu
On Tue, Apr 16, 2024 at 10:14 AM Jason Wang wrote:
>
> On Tue, Apr 16, 2024 at 1:43 PM Yuri Benditovich
> wrote:
> >
> > On Tue, Apr 16, 2024 at 7:00 AM Jason Wang wrote:
> > >
> > > On Mon, Apr 15, 2024 at 10:05 PM Yuri Benditovich
> > > wrote:
> > > >
> > > > On Wed, Apr 3, 2024 at 2:11 PM Ak
On Wed, Apr 3, 2024 at 2:11 PM Akihiko Odaki wrote:
>
> vhost requires eBPF for RSS. When eBPF is not available, virtio-net
> implicitly disables RSS even if the user explicitly requests it. Return
> an error instead of implicitly disabling RSS if RSS is requested but not
> available.
>
> Signed-o
On Mon, 15 Apr 2024 at 11:52, Michael S. Tsirkin wrote:
>
> From: Cindy Lu
>
> During the booting process of the non-standard image, the behavior of the
> called function in qemu is as follows:
>
> 1. vhost_net_stop() was triggered by guest image. This will call the function
> virtio_pci_set_gues
On 4/15/24 19:56, fan wrote:
> From 4b9695299d3d4b22f83666f8ab79099ec9f9817f Mon Sep 17 00:00:00 2001
> From: Fan Ni
> Date: Tue, 20 Feb 2024 09:48:30 -0800
> Subject: [PATCH 08/13] hw/cxl/cxl-mailbox-utils: Add mailbox commands to
> support add/release dynamic capacity response
>
> Per CXL sp
On Mon, 15 Apr 2024 at 15:56, Philippe Mathieu-Daudé wrote:
>
> The following changes since commit 824ebb92c39920a65b34a93d1bd462baf0d2d174:
>
> Merge tag 'pull-sp-20240412' of https://gitlab.com/rth7680/qemu into
> staging (2024-04-13 09:43:46 +0100)
>
> are available in the Git repository at:
Hi
On Tue, Apr 16, 2024 at 3:11 AM wrote:
>
> From: Dongwon Kim
>
> This commit introduces dpy_gl_qemu_dmabuf_get_... helpers to extract
> specific fields from the QemuDmaBuf struct. It also updates all instances
> where fields within the QemuDmaBuf struct are directly accessed, replacing
> them
On Tue, Apr 16, 2024 at 6:01 PM Peter Maydell wrote:
>
> On Mon, 15 Apr 2024 at 11:52, Michael S. Tsirkin wrote:
> >
> > From: Cindy Lu
> >
> > During the booting process of the non-standard image, the behavior of the
> > called function in qemu is as follows:
> >
> > 1. vhost_net_stop() was tri
On 15/4/24 20:39, Thomas Huth wrote:
The old "-runas" option has the disadvantage that it is not visible
in the QAPI schema, so it is not available via the normal introspection
mechanisms. We've recently introduced the "-run-with" option for exactly
this purpose, which is meant to handle the opti
On Wed, Apr 10, 2024 at 8:56 PM Peter Xu wrote:
>
> On Wed, Apr 10, 2024 at 06:44:38PM +0200, Edgar E. Iglesias wrote:
> > On Tue, Feb 27, 2024 at 11:37 PM Vikram Garhwal
> > wrote:
> >
> > > From: Juergen Gross
> > >
> > > In order to support mapping and unmapping guest memory dynamically to
>
adding John Snow to CC because he investigated this in 2020.
On Fri, 12 Apr 2024, Eric Blake wrote:
> On Fri, Apr 12, 2024 at 10:06:17AM +0200, Stefan Fritsch wrote:
> > Commit 99868af3d0 changed the hardcoded constant BDRV_SECTOR_SIZE to a
> > dynamic field 'align' but introduced a bug. qemu_iov
On Tue, 16 Apr 2024 at 12:05, Cindy Lu wrote:
>
> On Tue, Apr 16, 2024 at 6:01 PM Peter Maydell
> wrote:
> > Here we pass that through to kvm_virtio_pci_vector_use_one().
> > In kvm_virtio_pci_vector_use_one()'s error-exit path ("undo")
> > it does
> > vector = virtio_queue_vector(vdev, queu
On 4/14/24 12:28, Inès Varhol wrote:
The messages for assertions using hexadecimal numbers will be
easier to understand with `g_assert_cmphex`.
Cases changed : "cmpuint.*0x", "cmpuint.*<<"
Signed-off-by: Inès Varhol
---
tests/qtest/aspeed_fsi-test.c | 20 ++--
tests/qtest/cmsdk-
The cross-i686-tci job is flaky again, with persistent intermittent
failures due to jobs timing out.
https://gitlab.com/qemu-project/qemu/-/issues/2285 has the details
with links to 8 CI jobs in the last week or so with timeouts, typically
something like:
16/258 qemu:qtest+qtest-aarch64 / qtest-a
On Tue, 16 Apr 2024 at 10:26, Hanna Czenczek wrote:
>
> On 12.04.24 16:42, Kevin Wolf wrote:
> > Commit 30896374 started to pass the full BlockConf from usb-storage to
> > scsi-disk, while previously only a few select properties would be
> > forwarded. This enables the user to set more properties,
Am 16.04.24 um 14:10 schrieb Peter Maydell:
The cross-i686-tci job is flaky again, with persistent intermittent
failures due to jobs timing out.
[...]
Some of these timeouts are very high -- no test should be taking
10 minutes, even given TCI and a slowish CI runner -- which suggests
to me tha
On Tue, 16 Apr 2024 at 12:50, Peter Maydell wrote:
>
> On Tue, 16 Apr 2024 at 12:05, Cindy Lu wrote:
> >
> > On Tue, Apr 16, 2024 at 6:01 PM Peter Maydell
> > wrote:
> > > Hi; Coverity points out what it thinks is a problem in
> > > this commit (CID 1543938):
> > > Here we pass that through to
In function kvm_virtio_pci_vector_use_one(), in the undo label,
the function will get the vector incorrectly while using
VIRTIO_CONFIG_IRQ_IDX
To fix this, we remove this label and simplify the failure process
Fixes: f9a09ca3ea ("vhost: add support for configure interrupt")
Cc: qemu-sta...@nongnu.
On Tue, 16 Apr 2024 at 13:29, Cindy Lu wrote:
>
> In function kvm_virtio_pci_vector_use_one(), in the undo label,
> the function will get the vector incorrectly while using
> VIRTIO_CONFIG_IRQ_IDX
> To fix this, we remove this label and simplify the failure process
>
> Fixes: f9a09ca3ea ("vhost: a
On Tue, Apr 16, 2024 at 8:30 PM Peter Maydell wrote:
>
> On Tue, 16 Apr 2024 at 13:29, Cindy Lu wrote:
> >
> > In function kvm_virtio_pci_vector_use_one(), in the undo label,
> > the function will get the vector incorrectly while using
> > VIRTIO_CONFIG_IRQ_IDX
> > To fix this, we remove this lab
On Tue, Apr 16, 2024 at 7:50 PM Peter Maydell wrote:
>
> On Tue, 16 Apr 2024 at 12:05, Cindy Lu wrote:
> >
> > On Tue, Apr 16, 2024 at 6:01 PM Peter Maydell
> > wrote:
> > > Here we pass that through to kvm_virtio_pci_vector_use_one().
> > > In kvm_virtio_pci_vector_use_one()'s error-exit path
From: Peter Dave Hello
Date: Tue, 16 Apr 2024 00:43:29 +0800
Subject: [PATCH] Add a simple zh_TW Traditional Chinese translation
This patch adds a basic zh_TW translation file for Taiwan Traditional
Chinese users.
Signed-off-by: Peter Dave Hello
---
po/LINGUAS | 1 +
po/zh_TW.po | 93 +++
On Tue, Apr 16, 2024 at 8:22 PM Peter Maydell wrote:
>
> On Tue, 16 Apr 2024 at 12:50, Peter Maydell wrote:
> >
> > On Tue, 16 Apr 2024 at 12:05, Cindy Lu wrote:
> > >
> > > On Tue, Apr 16, 2024 at 6:01 PM Peter Maydell
> > > wrote:
> > > > Hi; Coverity points out what it thinks is a problem i
On Tue, 16 Apr 2024 at 14:06, Cindy Lu wrote:
>
> On Tue, Apr 16, 2024 at 8:22 PM Peter Maydell
> wrote:
> > Paolo's comment on CID 1468940 was to suggest "virtio_queue_vector
> > should check VIRTIO_CONFIG_IRQ_IDX just like virtio_pci_get_notifier",
> > incidentally.
> >
> Hi peter，
> Really so
On Tue, 16 Apr 2024 at 13:41, Cindy Lu wrote:
>
> On Tue, Apr 16, 2024 at 8:30 PM Peter Maydell
> wrote:
> >
> > On Tue, 16 Apr 2024 at 13:29, Cindy Lu wrote:
> > >
> > > In function kvm_virtio_pci_vector_use_one(), in the undo label,
> > > the function will get the vector incorrectly while usi
On 22/3/24 17:28, Philippe Mathieu-Daudé wrote:
"cpu.h" is implicitly included. Include it explicitly to
avoid the following error when refactoring headers:
hw/s390x/s390-stattrib.c:86:40: error: use of undeclared identifier
'TARGET_PAGE_SIZE'
len = sac->peek_stattr(sas, addr / TARGET
On Tue, 16 Apr 2024 at 14:00, Peter Dave Hello wrote:
>
> From: Peter Dave Hello
> Date: Tue, 16 Apr 2024 00:43:29 +0800
> Subject: [PATCH] Add a simple zh_TW Traditional Chinese translation
>
> This patch adds a basic zh_TW translation file for Taiwan Traditional
> Chinese users.
>
> Signed-off-
On 22/3/24 17:14, Philippe Mathieu-Daudé wrote:
'NEED_CPU_H' guard target-specific code.
Clarify by renaming as COMPILING_PER_TARGET.
Philippe Mathieu-Daudé (3):
gdbstub: Simplify #ifdef'ry in helpers.h
hw/core: Remove check on NEED_CPU_H in tcg-cpu-ops.h
exec: Rename NEED_CPU_H -> COM
On 16.04.24 13:32, Edgar E. Iglesias wrote:
On Wed, Apr 10, 2024 at 8:56 PM Peter Xu wrote:
On Wed, Apr 10, 2024 at 06:44:38PM +0200, Edgar E. Iglesias wrote:
On Tue, Feb 27, 2024 at 11:37 PM Vikram Garhwal
wrote:
From: Juergen Gross
In order to support mapping and unmapping guest memory
On Wed, Apr 03, 2024 at 12:11:33PM +0100, Roy Hopkins wrote:
> In order to add support for parsing IGVM files for secure virtual
> machines, a the path to an IGVM file needs to be specified as
> part of the guest configuration. It makes sense to add this to
> the ConfidentialGuestSupport object as
On 28/3/24 03:54, Zhao Liu wrote:
On Wed, Mar 27, 2024 at 10:51:14AM +0100, Philippe Mathieu-Daudé wrote:
Date: Wed, 27 Mar 2024 10:51:14 +0100
From: Philippe Mathieu-Daudé
Subject: [PATCH-for-9.1 v2 12/21] hw/i386/pc: Remove
PCMachineClass::enforce_aligned_dimm
X-Mailer: git-send-email 2.41.
On Thu, Apr 04, 2024 at 10:00:53AM +0200, Philippe Mathieu-Daudé wrote:
> Hi Roy,
>
> On 3/4/24 13:11, Roy Hopkins wrote:
> > In preparation for supporting the processing of IGVM files to configure
> > guests, this adds a set of functions to ConfidentialGuestSupport
> > allowing configuration of s
On 27/3/24 12:32, David Hildenbrand wrote:
On 27.03.24 10:51, Philippe Mathieu-Daudé wrote:
'legacy_align' is always NULL, remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20240305134221.30924-11-phi...@linaro.org>
---
I was really confused for a second
On 28/3/24 05:10, Zhao Liu wrote:
Hi Philippe,
On Wed, Mar 27, 2024 at 10:51:23AM +0100, Philippe Mathieu-Daudé wrote:
Date: Wed, 27 Mar 2024 10:51:23 +0100
From: Philippe Mathieu-Daudé
Subject: [PATCH-for-9.1 v2 21/21] hw/i386/pc: Replace
PCMachineClass::acpi_data_size by PC_ACPI_DATA_SIZE
XHCI_FLAG_FORCE_PCIE_ENDCAP was only used by the
pc-i440fx-2.0 machine, which got removed. Remove it
and simplify usb_xhci_pci_realize().
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
hw/usb/hcd-xhci.h | 1 -
hw/usb/hcd-xhci-nec.c | 2 --
hw/usb/h
Similarly to the commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated",
deprecate the 2.4 to 2.7 machines.
Suggested-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecated.rst | 4 ++--
hw/i386/pc_piix.c | 2 +-
2 files cha
XHCI_FLAG_SS_FIRST was only used by the pc-i440fx-2.0 machine,
which got removed. Remove it and simplify various functions in
hcd-xhci.c.
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
hw/usb/hcd-xhci.h | 3 +--
hw/usb/hcd-xhci-nec.c | 2 --
hw/u
'smbios_encode_uuid' is always true, remove it,
simplifying smbios_encode_uuid().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
hw/smbios/smbios.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index 8261eb7
PCMachineClass::enforce_aligned_dimm was only used by the
pc-i440fx-2.1 machine, which got removed. It is now always
true. Remove it, simplifying pc_get_device_memory_range().
Update the comment in Avocado test_phybits_low_pse36().
Reviewed-by: Zhao Liu
Signed-off-by: Philippe Mathieu-Daudé
---
PCMachineClass::smbios_uuid_encoded was only used by the
pc-i440fx-2.1 machine, which got removed. It is now always
true, remove it.
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
include/hw/i386/pc.h | 1 -
hw/i386/fw_cfg.c | 3 +--
hw/i386/pc.c
PCMachineClass::legacy_acpi_table_size was only used by the
pc-i440fx-2.0 machine, which got removed. Remove it and simplify
acpi_build().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
include/hw/i386/pc.h | 1 -
hw/i386/acpi-build.c | 62 +
'uuid_encoded' is always true, remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
include/hw/firmware/smbios.h | 3 +--
hw/arm/virt.c| 3 +--
hw/i386/fw_cfg.c | 2 +-
hw/loongarch/virt.c | 2 +-
hw/riscv/virt.c | 2 +-
hw
x86_cpu_change_kvm_default() was only used out of kvm-cpu.c by
the pc-i440fx-2.1 machine, which got removed. Make it static,
and remove its declaration. "kvm-cpu.h" is now empty, remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20240305134221.30924-8-phi...@
Hello,
On 4/16/24 05:41, Duan, Zhenzhong wrote:
Hi Cédric,
-Original Message-
From: Cédric Le Goater
Subject: Re: [PATCH v2 02/10] vfio: Introduce HIODLegacyVFIO device
On 4/8/24 10:12, Zhenzhong Duan wrote:
HIODLegacyVFIO represents a host IOMMU device under VFIO legacy
container b
'legacy_align' is always NULL, remove it, simplifying
memory_device_pre_plug().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20240305134221.30924-12-phi...@linaro.org>
Reviewed-by: David Hildenbrand
Reviewed-by: Zhao Liu
---
include/hw/mem/memory-device.h | 2 +
PCMachineClass::resizable_acpi_blob was only used by the
pc-i440fx-2.2 machine, which got removed. It is now always
true. Remove it, simplifying acpi_build().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
include/hw/i386/pc.h | 3 ---
hw/i386/acpi-build.c | 10 --
hw/
'legacy_align' is always NULL, remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20240305134221.30924-11-phi...@linaro.org>
Reviewed-by: David Hildenbrand
Reviewed-by: Zhao Liu
---
include/hw/mem/pc-dimm.h | 3 +--
hw/arm/virt.c| 2 +-
hw/i386/
PCMachineClass::rsdp_in_ram was only used by the
pc-i440fx-2.2 machine, which got removed. It is
now always true. Remove it, simplifying acpi_setup().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20240305134221.30924-15-phi...@linaro.org>
Reviewed-by: Zhao Liu
---
Missing review: 1 (new, extracted from 20) & 20
Since v2:
- Addressed Zhao review comments
Since v1:
- Addressed Zhao and Thomas review comments
Kill legacy code, because we need to evolve.
I ended there via dynamic machine -> ICH9 -> legacy ACPI...
This should also help Igor cleanups:
http://
PCMachineClass::acpi_data_size was only used by the pc-i440fx-2.0
machine, which got removed. Since it is constant, replace the class
field by a definition (local to hw/i386/pc.c, since not used
elsewhere).
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <2024030513422
X86CPU::kvm_no_smi_migration was only used by the
pc-i440fx-2.3 machine, which got removed. Remove it
and simplify kvm_put_vcpu_events().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
target/i386/cpu.h | 3 ---
target/i386/cpu.c | 2 --
target/i386/kvm/kvm.c | 7 +-
No external code sets the 'memory-hotplug-support'
property, remove it.
Suggested-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
hw/acpi/ich9.c | 18 --
1 file changed, 18 deletions(-)
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 573d032e
The pc-i440fx-2.1 machine was deprecated for the 8.2
release (see commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated"),
time to remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20240305134221.30924-7-phi...@linaro.org
acpi_memory_hotplug::is_enabled is set to %true once via
ich9_lpc_initfn() -> ich9_pm_add_properties(). No need to
check it, so remove now dead code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
---
hw/acpi/ich9.c | 28 ++--
1 file changed, 6 insertions(+)
AcpiBuildState::rsdp is always NULL, remove it,
simplifying acpi_build_update().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20240305134221.30924-16-phi...@linaro.org>
Reviewed-by: Zhao Liu
---
hw/i386/acpi-build.c | 8 +---
1 file changed, 1 insertion(+), 7
The pc-i440fx-2.3 machine was deprecated for the 8.2
release (see commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated"),
time to remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecated.rst | 4 ++--
docs/about/removed-features.rst
The pc-i440fx-2.2 machine was deprecated for the 8.2
release (see commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated"),
time to remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20240305134221.30924-13-phi...@linaro.or
The pc-i440fx-2.0 machine was deprecated for the 8.2
release (see commit c7437f0ddb "docs/about: Mark the
old pc-i440fx-2.0 - 2.3 machine types as deprecated"),
time to remove it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20240305134221.30924-2-phi...@linaro.org
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