Re: [PATCH-for-9.0 0/4] hw/virtio: Protect from more DMA re-entrancy bugs

On Thu, Apr 04, 2024 at 09:13:35PM +0200, Philippe Mathieu-Daudé wrote: > Gerd suggested to use the transport guard to protect the > device from DMA re-entrancy abuses. Thanks for turning that idea into a proper patch series. Series: Reviewed-by: Gerd Hoffmann take care, Gerd

[PATCH] sh4: mac.w: implement saturation arithmetic logic

The saturation arithmetic logic in helper_macw is not correct. I tested and verified this behavior on a SH7091, the general pattern is a code sequence such as: sets mov.l _mach,r2 lds r2,mach mov.l _macl,r2 lds r2,macl mova _n,r0 mov r0,r1

Re: [PATCH v2] hw/virtio: Fix packed virtqueue flush used_idx

On Thu, Apr 4, 2024 at 7:03 PM Wafer wrote: > > If a virtio-net device has the VIRTIO_NET_F_MRG_RXBUF feature > but not the VIRTIO_RING_F_INDIRECT_DESC feature, > 'VirtIONetQueue->rx_vq' will use the merge feature > to store data in multiple 'elems'. > The 'num_buffers' in the virtio header indica

Re: [PATCH v4 3/3] Add support for RAPL MSRs in KVM/Qemu

Hi Daniel, > > +SocketAddress saddr = { > > +.type = SOCKET_ADDRESS_TYPE_UNIX, > > +.u.q_unix.path = socket_path > > +}; > > +QIOChannelSocket *sioc = qio_channel_socket_new(); > > +Error *local_err = NULL; > > + > > +int r; > > + > > +qio_channel_set_name(Q

Re: [RFC PATCH-for-9.1] qapi: Do not generate commands/events/introspect code for user emulation

Hi Markus, On 5/4/24 07:35, Markus Armbruster wrote: Philippe Mathieu-Daudé writes: User emulation requires the QAPI types. Due to the command line processing, some visitor code is also used. The rest is irrelevant (no QMP socket). Add an option to the qapi-gen script to allow generating the

Re: [PATCH v6 11/12] hw/cxl/cxl-mailbox-utils: Add superset extent release mailbox support

On 3/25/24 20:02, nifan@gmail.com wrote: > From: Fan Ni > > With the change, we extend the extent release mailbox command processing > to allow more flexible release. As long as the DPA range of the extent to > release is covered by accepted extent(s) in the device, the release can be > perfo

[PATCH 13/32] plugins: Use DisasContextBase for qemu_plugin_insn_haddr

We can delay the computation of haddr until the plugin actually requests it. Signed-off-by: Richard Henderson --- include/qemu/plugin.h | 4 accel/tcg/plugin-gen.c | 20 plugins/api.c | 25 - 3 files changed, 24 insertions(+), 25 delet

[PATCH 07/32] accel/tcg: Record when translator_fake_ldb is used

Signed-off-by: Richard Henderson --- include/exec/translator.h | 2 ++ accel/tcg/translator.c| 2 ++ 2 files changed, 4 insertions(+) diff --git a/include/exec/translator.h b/include/exec/translator.h index b341dfbf02..2d42a4e7ed 100644 --- a/include/exec/translator.h +++ b/include/exec/tran

[PATCH 09/32] plugins: Copy memory in qemu_plugin_insn_data

Instead of returning a host pointer, copy the data into storage provided by the caller. Signed-off-by: Richard Henderson --- include/qemu/qemu-plugin.h | 15 +++ contrib/plugins/execlog.c | 5 +++-- contrib/plugins/howvec.c | 4 ++-- plugins/api.c | 7 +-- 4 fi

[PATCH 23/32] target/hexagon: Use translator_ldl in pkt_crosses_page

Cc: Brian Cain Signed-off-by: Richard Henderson --- target/hexagon/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 1344a3e4ab..37dec8b5c5 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/t

[PATCH 22/32] target/s390x: Disassemble EXECUTEd instructions

Cc: qemu-s3...@nongnu.org Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index c1614b8264..fed326b136 100644 --- a/target/s390x/tcg/translate.c +

[PATCH 12/32] plugins: Read mem_only directly from TB cflags

Do not pass around a boolean between multiple structures, just read it from the TranslationBlock in the TCGContext. Signed-off-by: Richard Henderson --- include/exec/plugin-gen.h | 7 +++ include/qemu/plugin.h | 3 --- accel/tcg/plugin-gen.c| 4 +--- accel/tcg/translator.c| 2

[PATCH 32/32] target/s390x: Use translator_lduw in get_next_pc

Cc: qemu-s3...@nongnu.org Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index fed326b136..aaf0e0c335 100644 --- a/target/s390x/tcg/translate.c +++

[PATCH 18/32] disas: Split disas.c

The routines in disas-common.c are also used from disas-mon.c. Otherwise the rest of disassembly is only used from tcg. While we're at it, put host and target code into separate files. Signed-off-by: Richard Henderson --- disas/disas-internal.h | 4 + include/disas/disas.h | 4 + disas/disa

[PATCH 14/32] plugins: Use DisasContextBase for qemu_plugin_tb_vaddr

We do not need to separately record the start of the TB. Signed-off-by: Richard Henderson --- include/qemu/plugin.h | 1 - accel/tcg/plugin-gen.c | 3 +-- plugins/api.c | 3 ++- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h

[PATCH 20/32] accel/tcg: Introduce translator_fake_ld

Replace translator_fake_ldb, which required multiple calls, with translator_fake_ld, which can take all data at once. Signed-off-by: Richard Henderson --- include/exec/translator.h| 8 accel/tcg/translator.c | 5 ++--- target/s390x/tcg/translate.c | 8 3 files changed

[PATCH 01/32] accel/tcg: Use vaddr in translator_ld*

Signed-off-by: Richard Henderson --- include/exec/translator.h | 18 +- accel/tcg/translator.c| 15 --- target/hexagon/translate.c| 1 + target/microblaze/translate.c | 1 + target/nios2/translate.c | 1 + 5 files changed, 20 insertions(+), 16 d

[PATCH 11/32] plugins: Use translator_st for qemu_plugin_insn_data

Use the bytes that we record for the entire TB, rather than a per-insn GByteArray. Record the length of the insn in plugin_gen_insn_end rather than infering from the length of the array. Signed-off-by: Richard Henderson --- include/qemu/plugin.h | 14 +- accel/tcg/plugin-gen.c | 7

[PATCH 19/32] disas: Use translator_st to get disassembly data

Read from already translated pages, or saved mmio data. Signed-off-by: Richard Henderson --- include/disas/disas.h | 5 +++-- include/exec/translator.h | 4 ++-- include/qemu/typedefs.h | 1 + accel/tcg/translator.c| 2 +- disas/disas-common.c | 14 -- disas/disas-

[PATCH 16/32] accel/tcg: Provide default implementation of disas_log

Almost all of the disas_log implementations are identical. Unify them within translator_loop. Signed-off-by: Richard Henderson --- accel/tcg/translator.c | 9 - target/alpha/translate.c | 9 - target/arm/tcg/translate-a64.c | 11 --- target/arm/tcg/t

[PATCH 29/32] target/riscv: Use translator_ld* for everything

Cc: qemu-ri...@nongnu.org Signed-off-by: Richard Henderson --- target/riscv/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 9fd1ac1d60..9a4a68b955 100644 --- a/target/riscv/translate.c +++ b/target/ris

[PATCH 24/32] target/microblaze: Use translator_ldl

Cc: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index be3ff76f78..11d84bc514 100644 --- a/target/microblaze/translate.c +++

[PATCH 06/32] accel/tcg: Record mmio bytes during translation

This will be able to replace plugin_insn_append, and will be usable for disassembly. Signed-off-by: Richard Henderson --- include/exec/translator.h | 12 accel/tcg/translator.c| 41 +++ 2 files changed, 53 insertions(+) diff --git a/include/e

[PATCH 15/32] plugins: Merge alloc_tcg_plugin_context into plugin_gen_tb_start

We don't need to allocate plugin context at startup, we can wait until we actually use it. Signed-off-by: Richard Henderson --- accel/tcg/plugin-gen.c | 36 tcg/tcg.c | 11 --- 2 files changed, 20 insertions(+), 27 deletions(-) diff --gi

[PATCH 17/32] accel/tcg: Return bool from TranslatorOps.disas_log

We have eliminated most uses of this hook. Reduce further by allowing the hook to handle only the special cases, returning false for normal processing. Signed-off-by: Richard Henderson --- include/exec/translator.h| 2 +- accel/tcg/translator.c | 5 ++--- target/hppa/translate.c

[PATCH 10/32] accel/tcg: Implement translator_st

Copy data out of a completed translation. This will be used for both plugins and disassembly. Signed-off-by: Richard Henderson --- include/exec/translator.h | 23 accel/tcg/translator.c| 55 +++ 2 files changed, 78 insertions(+) diff --g

[PATCH 21/32] target/s390x: Fix translator_fake_ld length

The ilen value extracted from ex_value is the length of the EXECUTE instruction itself, and so is the increment to the pc. However, the length of the synthetic insn is located in the opcode like all other instructions. Cc: qemu-s3...@nongnu.org Signed-off-by: Richard Henderson --- target/s390x/t

[PATCH 31/32] target/xtensa: Use translator_ldub in xtensa_insn_len

Cc: Max Filippov Signed-off-by: Richard Henderson --- target/xtensa/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 42109d33ad..75b7bfda4c 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/tran

[PATCH 00/32] accel/tcg: Improve disassembly for target and plugin

Based-on: 20240404230611.21231-1-richard.hender...@linaro.org ("[PATCH v2 00/21] Rewrite plugin code generation") While I was trying to debug something the other week, I noticed that hppa_cpu_get_phys_page_debug was not using the same cpu state as the translator, which meant that the disassembler

[PATCH 26/32] target/avr: Use translator_ldl

Cc: Michael Rolnik Signed-off-by: Richard Henderson --- target/avr/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/avr/translate.c b/target/avr/translate.c index 6df93d4c77..2d51892115 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -2

[PATCH 27/32] target/cris: Use translator_ld* in cris_fetch

Cc: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/cris/translate.c | 25 - 1 file changed, 8 insertions(+), 17 deletions(-) diff --git a/target/cris/translate.c b/target/cris/translate.c index b5410189d4..bb2d6612ba 100644 --- a/target/cris/translate.c ++

[PATCH 05/32] accel/tcg: Cap the translation block when we encounter mmio

Do not allow translation to proceed beyond one insn with mmio, as we will not be caching the TranslationBlock. Signed-off-by: Richard Henderson --- accel/tcg/translator.c | 4 1 file changed, 4 insertions(+) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 42beb1c9b7..438

[PATCH 30/32] target/rx: Use translator_ld*

Cc: Yoshinori Sato Signed-off-by: Richard Henderson --- target/rx/translate.c | 27 ++- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/target/rx/translate.c b/target/rx/translate.c index 92fb2b43ad..9b81cf20b3 100644 --- a/target/rx/translate.c +++ b/targ

[PATCH 04/32] accel/tcg: Reorg translator_ld*

Reorg translator_access into translator_ld, with a more memcpy-ish interface. If both pages are in ram, do not go through the caller's slow path. Assert that the access is within the two pages that we are prepared to protect, per TranslationBlock. Allow access prior to pc_first, so long as it is

[PATCH 02/32] accel/tcg: Hide in_same_page outside of a target-specific context

While there are other methods that could be used to replace TARGET_PAGE_MASK, the function is not really required outside the context of target-specific translation. This makes the header usable by target independent code. Signed-off-by: Richard Henderson --- include/exec/translator.h | 2 ++ 1

[PATCH 25/32] target/i386: Use translator_ldub for everything

Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 796180f085..d0ba81eb6d 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/transl

[PATCH 08/32] accel/tcg: Record DisasContextBase in tcg_ctx for plugins

Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 1 + accel/tcg/plugin-gen.c | 1 + 2 files changed, 2 insertions(+) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 135e36d729..2a1c080bab 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -537,6 +537,7 @@ struct TCGC

[PATCH 03/32] accel/tcg: Pass DisasContextBase to translator_fake_ldb

Signed-off-by: Richard Henderson --- include/exec/translator.h| 5 +++-- accel/tcg/translator.c | 2 +- target/s390x/tcg/translate.c | 2 +- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index 185ab5c374..65d0c6489a

[PATCH 28/32] target/cris: Use cris_fetch in translate_v10.c.inc

Cc: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/cris/translate.c | 1 - target/cris/translate_v10.c.inc | 30 +- 2 files changed, 9 insertions(+), 22 deletions(-) diff --git a/target/cris/translate.c b/target/cris/translate.c index bb2d661

Re: [PATCH v2] virtio-snd: Enhance error handling for invalid transfers

ping On Fri, 22 Mar 2024 13:08, Zheyu Ma wrote: This patch improves error handling in virtio_snd_handle_tx_xfer() and virtio_snd_handle_rx_xfer() in the VirtIO sound driver. Previously, 'goto' statements were used for error paths, leading to unnecessary processing and potential null pointer der

Re: [PATCH v1 0/1] virtio-snd: fix invalid tx/rx message handling logic

ping On Sun, 24 Mar 2024 12:04, Manos Pitsidianakis wrote: This is a logic fix for the error handling in the TX/RX virt queue handlers. A potential invalid address dereference was reported and fixed by Zheyu Ma in <20240322110827.568412-1-zheyum...@gmail.com>. This patch moves the invalid me

Re: [PATCH v6 06/12] hw/mem/cxl_type3: Add host backend and address space handling for DC regions

On Mon, 25 Mar 2024 12:02:24 -0700 nifan@gmail.com wrote: > From: Fan Ni > > Add (file/memory backed) host backend, all the dynamic capacity regions > will share a single, large enough host backend. This doesn't parse. I suggests splitting it into 2 sentences. Add (file/memory backend) h

Re: [PATCH v1 0/1] virtio-snd: fix invalid tx/rx message handling logic

On Fri, Apr 05, 2024 at 01:54:46PM +0300, Manos Pitsidianakis wrote: > ping confused at this point. Do you mind sending a patchset with everything in the correct order? Tag it PATCH repost so people know nothing changed. Thanks! -- MST

Re: [PATCH v6 07/12] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support

On Mon, 25 Mar 2024 12:02:25 -0700 nifan@gmail.com wrote: > From: Fan Ni > > Add dynamic capacity extent list representative to the definition of > CXLType3Dev and implement get DC extent list mailbox command per > CXL.spec.3.1:.8.2.9.9.9.2. > > Signed-off-by: Fan Ni One really minor comm

Re: [PATCH v6 08/12] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response

On Thu, 4 Apr 2024 13:32:23 + Jørgen Hansen wrote: Hi Jørgen, > > +static CXLRetCode cmd_dcd_add_dyn_cap_rsp(const struct cxl_cmd *cmd, > > + uint8_t *payload_in, > > + size_t len_in, > > +

Re: [PATCH v6 08/12] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response

On Mon, 25 Mar 2024 12:02:26 -0700 nifan@gmail.com wrote: > From: Fan Ni > > Per CXL spec 3.1, two mailbox commands are implemented: > Add Dynamic Capacity Response (Opcode 4802h) 8.2.9.9.9.3, and > Release Dynamic Capacity (Opcode 4803h) 8.2.9.9.9.4. > > For the process of the above two co

Re: [PATCH v6 09/12] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

On Mon, 25 Mar 2024 12:02:27 -0700 nifan@gmail.com wrote: > From: Fan Ni > > To simulate FM functionalities for initiating Dynamic Capacity Add > (Opcode 5604h) and Dynamic Capacity Release (Opcode 5605h) as in CXL spec > r3.1 7.6.7.6.5 and 7.6.7.6.6, we implemented two QMP interfaces to iss

Re: [PATCH v6 09/12] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

On Wed, 3 Apr 2024 14:16:25 -0400 Gregory Price wrote: A few follow up comments. > On Mon, Mar 25, 2024 at 12:02:27PM -0700, nifan@gmail.com wrote: > > From: Fan Ni > > > > To simulate FM functionalities for initiating Dynamic Capacity Add > > (Opcode 5604h) and Dynamic Capacity Release (O

Re: [PATCH v6 10/12] hw/mem/cxl_type3: Add dpa range validation for accesses to DC regions

On Mon, 25 Mar 2024 12:02:28 -0700 nifan@gmail.com wrote: > From: Fan Ni > > All dpa ranges in the DC regions are invalid to access until an extent Let's be more consistent for commit logs and use DPA DC HPA etc all caps. It's a bit of a mixture in this series at the moment. > covering the

Re: [PATCH v6 11/12] hw/cxl/cxl-mailbox-utils: Add superset extent release mailbox support

On Mon, 25 Mar 2024 12:02:29 -0700 nifan@gmail.com wrote: > From: Fan Ni > > With the change, we extend the extent release mailbox command processing > to allow more flexible release. As long as the DPA range of the extent to > release is covered by accepted extent(s) in the device, the rele

Re: [PATCH v6 12/12] hw/mem/cxl_type3: Allow to release extent superset in QMP interface

On Mon, 25 Mar 2024 12:02:30 -0700 nifan@gmail.com wrote: > From: Fan Ni > > Before the change, the QMP interface used for add/release DC extents > only allows to release an extent whose DPA range is contained by a single > accepted extent in the device. > > With the change, we relax the co

Re: [PATCH 01/32] accel/tcg: Use vaddr in translator_ld*

On 5/4/24 12:24, Richard Henderson wrote: Signed-off-by: Richard Henderson --- include/exec/translator.h | 18 +- accel/tcg/translator.c| 15 --- target/hexagon/translate.c| 1 + target/microblaze/translate.c | 1 + target/nios2/translate.c

Re: [PATCH 02/32] accel/tcg: Hide in_same_page outside of a target-specific context

On 5/4/24 12:24, Richard Henderson wrote: While there are other methods that could be used to replace TARGET_PAGE_MASK, the function is not really required outside the context of target-specific translation. This makes the header usable by target independent code. Signed-off-by: Richard Henders

Re: [PATCH 03/32] accel/tcg: Pass DisasContextBase to translator_fake_ldb

On 5/4/24 12:24, Richard Henderson wrote: Signed-off-by: Richard Henderson --- include/exec/translator.h| 5 +++-- accel/tcg/translator.c | 2 +- target/s390x/tcg/translate.c | 2 +- 3 files changed, 5 insertions(+), 4 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 05/32] accel/tcg: Cap the translation block when we encounter mmio

On 5/4/24 12:24, Richard Henderson wrote: Do not allow translation to proceed beyond one insn with mmio, as we will not be caching the TranslationBlock. Signed-off-by: Richard Henderson --- accel/tcg/translator.c | 4 1 file changed, 4 insertions(+) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 14/32] plugins: Use DisasContextBase for qemu_plugin_tb_vaddr

On 5/4/24 12:24, Richard Henderson wrote: We do not need to separately record the start of the TB. Signed-off-by: Richard Henderson --- include/qemu/plugin.h | 1 - accel/tcg/plugin-gen.c | 3 +-- plugins/api.c | 3 ++- 3 files changed, 3 insertions(+), 4 deletions(-) Reviewed-

Re: [PATCH 16/32] accel/tcg: Provide default implementation of disas_log

On 5/4/24 12:24, Richard Henderson wrote: Almost all of the disas_log implementations are identical. Unify them within translator_loop. Signed-off-by: Richard Henderson --- accel/tcg/translator.c | 9 - target/alpha/translate.c | 9 - target/arm/tcg/trans

Re: [PATCH 17/32] accel/tcg: Return bool from TranslatorOps.disas_log

On 5/4/24 12:24, Richard Henderson wrote: We have eliminated most uses of this hook. Reduce further by allowing the hook to handle only the special cases, returning false for normal processing. Signed-off-by: Richard Henderson --- include/exec/translator.h| 2 +- accel/tcg/translator.c

Re: [PATCH 20/32] accel/tcg: Introduce translator_fake_ld

On 5/4/24 12:24, Richard Henderson wrote: Replace translator_fake_ldb, which required multiple calls, with translator_fake_ld, which can take all data at once. Signed-off-by: Richard Henderson --- include/exec/translator.h| 8 accel/tcg/translator.c | 5 ++--- target/s390

Re: [PATCH 27/32] target/cris: Use translator_ld* in cris_fetch

On 5/4/24 12:24, Richard Henderson wrote: Cc: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/cris/translate.c | 25 - 1 file changed, 8 insertions(+), 17 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 28/32] target/cris: Use cris_fetch in translate_v10.c.inc

On 5/4/24 12:24, Richard Henderson wrote: Cc: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/cris/translate.c | 1 - target/cris/translate_v10.c.inc | 30 +- 2 files changed, 9 insertions(+), 22 deletions(-) Nice. Reviewed-by: Philippe

Re: [PATCH 24/32] target/microblaze: Use translator_ldl

On 5/4/24 12:24, Richard Henderson wrote: Cc: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

[PATCH-for-9.1 v2 0/3] target/ppc: fix tlb flushing race (plus

ppc's broadcast tlb flushe must ensure all vCPUs have invalidated their TLBs when the tlbie sequence completes. This is not true in the current TCG implementation, due to async_run_on_cpu() returning before the remote CPU runs the job. Fixing ppc requires moving to async_safe_run_on_cpu(), however

[PATCH v2 2/3] tcg/cputlb: Remove non-synced variants of global TLB flushes

These are no longer used. tlb_flush_all_cpus: removed by previous commit. tlb_flush_page_all_cpus: removed by previous commit. tlb_flush_page_bits_by_mmuidx_all_cpus: never used. tlb_flush_page_by_mmuidx_all_cpus: never used. tlb_flush_page_bits_by_mmuidx_all_cpus: never used, thus:

[PATCH v2 1/3] target/ppc: Fix broadcast tlbie synchronisation

With mttcg, broadcast tlbie instructions do not wait until other vCPUs have been kicked out of TCG execution before they complete (including necessary subsequent tlbsync, etc., instructions). This is contrary to the ISA, and it permits other vCPUs to use translations after the TLB flush. For exampl

[PATCH v2 3/3] tcg/cputlb: remove other-cpu capability from TLB flushing

Some TLB flush operations can flush other CPUs. The problem with this is they used non-synced variants of flushes (i.e., that return before the destination has completed the flush). Since all TLB flush users need the _synced variants, and that last user (ppc) of the non-synced flush was buggy, this

Re: [PATCH 30/32] target/rx: Use translator_ld*

On 5/4/24 12:24, Richard Henderson wrote: Cc: Yoshinori Sato Signed-off-by: Richard Henderson --- target/rx/translate.c | 27 ++- 1 file changed, 14 insertions(+), 13 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 27/32] target/cris: Use translator_ld* in cris_fetch

On Fri, Apr 5, 2024 at 12:25 PM Richard Henderson < richard.hender...@linaro.org> wrote: > Cc: Edgar E. Iglesias > Signed-off-by: Richard Henderson > Reviewed-by: Edgar E. Iglesias > --- > target/cris/translate.c | 25 - > 1 file changed, 8 insertions(+), 17 deletio

Re: [PATCH 31/32] target/xtensa: Use translator_ldub in xtensa_insn_len

On 5/4/24 12:24, Richard Henderson wrote: Cc: Max Filippov Signed-off-by: Richard Henderson --- target/xtensa/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 26/32] target/avr: Use translator_ldl

On 5/4/24 12:24, Richard Henderson wrote: Cc: Michael Rolnik Signed-off-by: Richard Henderson --- target/avr/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 25/32] target/i386: Use translator_ldub for everything

On 5/4/24 12:24, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 28/32] target/cris: Use cris_fetch in translate_v10.c.inc

On Fri, Apr 5, 2024 at 12:25 PM Richard Henderson < richard.hender...@linaro.org> wrote: > Cc: Edgar E. Iglesias > Signed-off-by: Richard Henderson > Reviewed-by: Edgar E. Iglesias > --- > target/cris/translate.c | 1 - > target/cris/translate_v10.c.inc | 30 +--

Re: [PATCH 24/32] target/microblaze: Use translator_ldl

On Fri, Apr 5, 2024 at 12:25 PM Richard Henderson < richard.hender...@linaro.org> wrote: > Cc: Edgar E. Iglesias > Signed-off-by: Richard Henderson > Reviewed-by: Edgar E. Iglesias > --- > target/microblaze/translate.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --gi

[PATCH 33/32] accel/tcg: Remove cpu_ldsb_code / cpu_ldsw_code

Previous commits replaced them by translator_ld* calls. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/cpu_ldst.h | 10 -- 1 file changed, 10 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index eb8f3f0595..85ca104dc9 100644 --- a/include/exec/cpu_ld

Re: [PATCH v5] blockcommit: Reopen base image as RO after abort

On 04.04.24 12:11, Alexander Ivanov wrote: If a blockcommit is aborted the base image remains in RW mode, that leads to a fail of subsequent live migration. How to reproduce: $ virsh snapshot-create-as vm snp1 --disk-only *** write something to the disk inside the guest *** $ virsh bl

[PATCH v3] hw/virtio: Fix packed virtqueue flush used_idx

If a virtio-net device has the VIRTIO_NET_F_MRG_RXBUF feature but not the VIRTIO_RING_F_INDIRECT_DESC feature, 'VirtIONetQueue->rx_vq' will use the merge feature to store data in multiple 'elems'. The 'num_buffers' in the virtio header indicates how many elements are merged. If the value of 'num_bu

Re: [PATCH v12 13/23] hw/intc/arm_gicv3: Add has-nmi property to GICv3 device

On Wed, 3 Apr 2024 at 11:18, Jinjie Ruan wrote: > > Add a property has-nmi to the GICv3 device, and use this to set > the NMI bit in the GICD_TYPER register. This isn't visible to > guests yet because the property defaults to false and we won't > set it in the board code until we've landed all of

[PATCH 1/1] virtio-net: fix bug 1451 aka "assert(!virtio_net_get_subqueue(nc)->async_tx.elem); "

Don't send zero length packets in virtio_net_flush_tx(). Reproducer from https://gitlab.com/qemu-project/qemu/-/issues/1451 creates small packet (1 segment, len = 10 == n->guest_hdr_len), destroys queue. "if (n->host_hdr_len != n->guest_hdr_len)" is triggered, if body creates zero length/zero seg

Re: [PATCH v4 0/5] backup: discard-source parameter

On 13.03.24 18:28, Vladimir Sementsov-Ogievskiy wrote: Hi all! The main patch is 04, please look at it for description and diagram. v4: add t-b by Fiona add r-b by Fiona to 02-05 (patch 01 still lack an r-b) 05: fix copyrights and subject in the test 04: since 9.0 --> since 9.1 (w

Re: [PATCH v12 23/23] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC

On Wed, 3 Apr 2024 at 11:18, Jinjie Ruan wrote: > > A PE that implements FEAT_NMI and FEAT_GICv3 also implements > FEAT_GICv3_NMI. A PE that does not implement FEAT_NMI, does not implement > FEAT_GICv3_NMI This is true but not really relevant here -- FEAT_GICv3_NMI is not "NMI support in the GIC"

Re: [PATCH v11 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

On Fri, 5 Apr 2024 00:07:05 + "Ho-Ren (Jack) Chuang" wrote: > Since different memory devices require finding, allocating, and putting > memory types, these common steps are abstracted in this patch, > enhancing the scalability and conciseness of the code. > > Signed-off-by: Ho-Ren (Jack) Ch

Re: [RFC v2 1/5] virtio: Initialize sequence variables

On 4/4/24 12:33 PM, Eugenio Perez Martin wrote: On Thu, Apr 4, 2024 at 4:42 PM Jonah Palmer wrote: On 4/4/24 7:35 AM, Eugenio Perez Martin wrote: On Wed, Apr 3, 2024 at 6:51 PM Jonah Palmer wrote: On 4/3/24 6:18 AM, Eugenio Perez Martin wrote: On Thu, Mar 28, 2024 at 5:22 PM Jonah

Re: [PATCH v11 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

On Fri, 5 Apr 2024 00:07:06 + "Ho-Ren (Jack) Chuang" wrote: > The current implementation treats emulated memory devices, such as > CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory > (E820_TYPE_RAM). However, these emulated devices have different > characteristics t

Re: [PATCH v12 00/23] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI

On Wed, 3 Apr 2024 at 11:18, Jinjie Ruan wrote: > > This patch set implements FEAT_NMI and FEAT_GICv3_NMI for ARMv8. These > introduce support for a new category of interrupts in the architecture > which we can use to provide NMI like functionality. I think I'm now done with review on this series

Re: [PATCH v3] nbd/server: do not poll within a coroutine context

On 04.04.24 04:42, Eric Blake wrote: From: Zhu Yangyang Coroutines are not supposed to block. Instead, they should yield. The client performs TLS upgrade outside of an AIOContext, during synchronous handshake; this still requires g_main_loop. But the server responds to TLS upgrade inside a co

Re: [PATCH] target/arm: Fix CNTPOFF_EL2 trap to missing EL3

On Thu, 4 Apr 2024 at 17:36, Pierre-Clément Tosi wrote: > > EL2 accesses to CNTPOFF_EL2 should only ever trap to EL3 if EL3 is > present, as described by the reference manual (for MRS): > > /* ... */ > elsif PSTATE.EL == EL2 then > if Halted() && HaveEL(EL3) && /*...*/ then > U

Re: [PATCH v3 5/5] tests/qtest: Add tests for the STM32L4x5 USART

On Fri, 29 Mar 2024 at 17:45, Arnaud Minier wrote: > > Test: > - read/write from/to the usart registers > - send/receive a character/string over the serial port > > Signed-off-by: Arnaud Minier > Signed-off-by: Inès Varhol > --- Reviewed-by: Peter Maydell thanks -- PMM

Re: [PATCH v3 0/5] hw/char: Implement the STM32L4x5 USART, UART and LPUART

On Fri, 29 Mar 2024 at 17:44, Arnaud Minier wrote: > > This patch adds the STM32L4x5 USART > (Universal Synchronous/Asynchronous Receiver/Transmitter) > device and is part of a series implementing the > STM32L4x5 with a few peripherals. > > It implements the necessary functionalities to receive/se

Re: [PATCH] tests/qtest: Standardize qtest function caller strings.

Het Gala writes: > On 27/03/24 2:37 am, Fabiano Rosas wrote: >> Het Gala writes: >> >> Some comments, mostly just thinking out loud... >> >>> For --> migrate >>> // >>> //O:/... >>> >>> For --> validate >>> ///O:/O:/ >>> /O:/O:/... >> Do we need an optional 'capability' element? I'm not su

Re: [PATCH] sh4: mac.w: implement saturation arithmetic logic

On Fri, 5 Apr 2024 at 08:55, Zack Buhman wrote: > > The saturation arithmetic logic in helper_macw is not correct. > > I tested and verified this behavior on a SH7091, the general pattern > is a code sequence such as: > > sets > > mov.l _mach,r2 > lds r2,mach > mov.

Re: [PATCH v3] nbd/server: do not poll within a coroutine context

On Fri, Apr 05, 2024 at 05:10:16PM +0300, Vladimir Sementsov-Ogievskiy wrote: > On 04.04.24 04:42, Eric Blake wrote: > > From: Zhu Yangyang > > > > Coroutines are not supposed to block. Instead, they should yield. > > > > The client performs TLS upgrade outside of an AIOContext, during > > synch

Re: [RFC v2 1/5] virtio: Initialize sequence variables

On Fri, Apr 5, 2024 at 3:59 PM Jonah Palmer wrote: > > > > On 4/4/24 12:33 PM, Eugenio Perez Martin wrote: > > On Thu, Apr 4, 2024 at 4:42 PM Jonah Palmer wrote: > >> > >> > >> > >> On 4/4/24 7:35 AM, Eugenio Perez Martin wrote: > >>> On Wed, Apr 3, 2024 at 6:51 PM Jonah Palmer > >>> wrote: > >

Re: [PATCH v3] hw/virtio: Fix packed virtqueue flush used_idx

On Fri, Apr 5, 2024 at 3:20 PM Wafer wrote: > > If a virtio-net device has the VIRTIO_NET_F_MRG_RXBUF feature > but not the VIRTIO_RING_F_INDIRECT_DESC feature, > 'VirtIONetQueue->rx_vq' will use the merge feature > to store data in multiple 'elems'. > The 'num_buffers' in the virtio header indica

Re: [RFC v2 1/5] virtio: Initialize sequence variables

On 4/5/24 11:04 AM, Eugenio Perez Martin wrote: On Fri, Apr 5, 2024 at 3:59 PM Jonah Palmer wrote: On 4/4/24 12:33 PM, Eugenio Perez Martin wrote: On Thu, Apr 4, 2024 at 4:42 PM Jonah Palmer wrote: On 4/4/24 7:35 AM, Eugenio Perez Martin wrote: On Wed, Apr 3, 2024 at 6:51 PM Jonah

Re: [PATCH v6 09/12] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

On Fri, Apr 05, 2024 at 01:27:19PM +0100, Jonathan Cameron wrote: > On Wed, 3 Apr 2024 14:16:25 -0400 > Gregory Price wrote: > > A few follow up comments. > > > > > > +error_setg(errp, "no valid extents to send to process"); > > > +return; > > > +} > > > + > > > > I'm loo

Re: [PATCH] mem/cxl_type3: fix hpa to dpa logic

On Mon, 1 Apr 2024 17:00:50 +0100 Jonathan Cameron via wrote: > On Thu, 28 Mar 2024 06:24:24 + > "Xingtao Yao (Fujitsu)" wrote: > > > Jonathan > > > > thanks for your reply! > > > > > -Original Message- > > > From: Jonathan Cameron > > > Sent: Wednesday, March 27, 2024 9:28 PM

Re: [PATCH v2 2/3] tcg/cputlb: Remove non-synced variants of global TLB flushes

On 4/5/24 02:53, Nicholas Piggin wrote: These are no longer used. tlb_flush_all_cpus: removed by previous commit. tlb_flush_page_all_cpus: removed by previous commit. tlb_flush_page_bits_by_mmuidx_all_cpus: never used. tlb_flush_page_by_mmuidx_all_cpus: never used. tlb_flush_page

Re: [PATCH v2 3/3] tcg/cputlb: remove other-cpu capability from TLB flushing

On 4/5/24 02:53, Nicholas Piggin wrote: Some TLB flush operations can flush other CPUs. The problem with this is they used non-synced variants of flushes (i.e., that return before the destination has completed the flush). Since all TLB flush users need the _synced variants, and that last user (pp

Re: [PATCH] target/i386: fix direction of "32-bit MMU" test

01.04.2024 09:02, Michael Tokarev: Anyone can guess why this rather trivial and obviously correct patch causes segfaults in a few tests in staging-7.2 - when run in tcg mode, namely:   pxe-test   migration-test   boot-serial-test   bios-tables-test   vmgenid-test   cdrom-test When rever

Re: [RFC PATCH 5/5] cxl/core: add poison injection event handler

On Fri, 15 Mar 2024 10:29:07 +0800 Shiyang Ruan wrote: > 在 2024/2/14 0:51, Jonathan Cameron 写道: > > > >> + > >> +void cxl_event_handle_record(struct cxl_memdev *cxlmd, > >> + enum cxl_event_log_type type, > >> + enum cxl_event_type event_type, > >> +

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