Both CSRRS and CSRRC always read the addressed CSR and cause any read side
effects regardless of rs1 and rd fields. Note that if rs1 specifies a register
holding a zero value other than x0, the instruction will still attempt to write
the unmodified value back to the CSR and will cause any attendant
Hi Mostafa,
On 4/2/24 20:47, Mostafa Saleh wrote:
> Hi Eric,
>
> On Tue, Apr 02, 2024 at 07:15:20PM +0200, Eric Auger wrote:
>> Hi Mostafa,
>>
>> On 3/25/24 11:13, Mostafa Saleh wrote:
>>> TLBs for nesting will be extended to be combined, a new index is added
>>> "stage", with 2 valid values:
>>>
在 2024/4/1 上午4:20, Michael S. Tsirkin 写道:
On Fri, Mar 29, 2024 at 10:16:41AM -0700, Breno Leitao wrote:
There is a bug when setting the RSS options in virtio_net that can break
the whole machine, getting the kernel into an infinite loop.
Running the following command in any QEMU virtual mach
Hi
On Tue, Apr 2, 2024 at 11:24 PM Vladimir Sementsov-Ogievskiy
wrote:
>
> On 02.04.24 18:34, Eric Blake wrote:
> > On Tue, Apr 02, 2024 at 12:58:43PM +0300, Vladimir Sementsov-Ogievskiy
> > wrote:
> Again, same false-positives, because of WITH_GRAPH_RDLOCK_GUARD()..
>
> Didn't yo
On 03.04.24 11:11, Marc-André Lureau wrote:
Hi
On Tue, Apr 2, 2024 at 11:24 PM Vladimir Sementsov-Ogievskiy
wrote:
On 02.04.24 18:34, Eric Blake wrote:
On Tue, Apr 02, 2024 at 12:58:43PM +0300, Vladimir Sementsov-Ogievskiy wrote:
Again, same false-positives, because of WITH_GRAPH_RDLOCK_GUA
On 4/3/2024 5:39, Peter Xu wrote:>
> I'm not 100% sure such thing (no matter here or moved into it, which
> does look cleaner) would work for us.
>
> The problem is I still don't yet see an ordering restricted on top of
> (1)
> accept() happens, and (2) receive LISTEN cm
On Wed, Apr 3, 2024 at 8:53 AM Si-Wei Liu wrote:
>
>
>
> On 4/2/2024 5:01 AM, Eugenio Perez Martin wrote:
> > On Tue, Apr 2, 2024 at 8:19 AM Si-Wei Liu wrote:
> >>
> >>
> >> On 2/14/2024 11:11 AM, Eugenio Perez Martin wrote:
> >>> On Wed, Feb 14, 2024 at 7:29 PM Si-Wei Liu wrote:
> Hi Micha
Hi Simeon,
On 3/4/24 07:14, Michael Tokarev wrote:
02.04.2024 15:47, Simeon Krastnikov:
[Content-Type: text/html]
Your patch is html-damaged. There's probably a way to extract the
text/plain
version of it but it's better if you re-send it without html.
You can find tips on how to post pat
* The immediate argument to lui/auipc should be an integer in the interval
[0x0, 0xf]; e.g., 'auipc 0xf' and not 'auipc -1'
* The floating-point rounding mode is the last operand to the function,
not the first; e.g., 'fcvt.w.s a0, fa0, rtz' and not 'fcvt.w.s rtz,
a0, fa0'. Note that fcvt
On 03/04/2024 11:42, Li Zhijian wrote:
>
>
> On 02/04/2024 17:17, Jonathan Cameron wrote:
>> On Tue, 2 Apr 2024 09:46:47 +0800
>> Li Zhijian wrote:
>>
>>> After the kernel commit
>>> 0cab68720598 ("cxl/pci: Fix disabling memory if DVSEC CXL Range does not
>>> match a CFMWS window")
>>
>> Fix
From: Michael Vogt
Tiny patch to add the missing FITRIM ioctl.
Signed-off-by: Michael Vogt
---
linux-user/ioctls.h| 3 +++
linux-user/syscall_defs.h | 1 +
linux-user/syscall_types.h | 5 +
3 files changed, 9 insertions(+)
diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h
in
Hi
On Wed, Apr 3, 2024 at 12:31 PM Vladimir Sementsov-Ogievskiy
wrote:
>
> On 03.04.24 11:11, Marc-André Lureau wrote:
> > Hi
> >
> > On Tue, Apr 2, 2024 at 11:24 PM Vladimir Sementsov-Ogievskiy
> > wrote:
> >>
> >> On 02.04.24 18:34, Eric Blake wrote:
> >>> On Tue, Apr 02, 2024 at 12:58:43PM +0
On 27/3/24 15:48, Philippe Mathieu-Daudé wrote:
Since v1:
- Remove user emulation too
- Remove ALTERA_TIMER
Philippe Mathieu-Daudé (3):
fpu/softfloat: Remove mention of TILE-Gx target
target/nios2: Remove the deprecated Nios II target
hw/timer: Remove the ALTERA_TIMER model
Patch 1 me
On 28/3/24 14:02, Philippe Mathieu-Daudé wrote:
Since v1:
- split in 3 (Thomas)
- justify gluster removal
Philippe Mathieu-Daudé (3):
hw/rdma: Remove pvrdma device and rdmacm-mux helper
migration: Remove RDMA protocol handling
block/gluster: Remove RDMA protocol handling
Patch 2 super
On 1/4/24 05:59, Li Zhijian wrote:
Except for RDMA migration, other parts of the RDMA subsystem have been
removed since 9.1.
Due to the lack of unit tests and CI tests for RDMA migration, int the
past developing cycles, a few fatal errors were introduced and broke the
RDMA migration, and these i
On Wed, Apr 03, 2024 at 09:22:03AM +0200, Eric Auger wrote:
> Hi Mostafa,
>
> On 4/2/24 20:47, Mostafa Saleh wrote:
> > Hi Eric,
> >
> > On Tue, Apr 02, 2024 at 07:15:20PM +0200, Eric Auger wrote:
> >> Hi Mostafa,
> >>
> >> On 3/25/24 11:13, Mostafa Saleh wrote:
> >>> TLBs for nesting will be exte
The following changes since commit 7fcf7575f3d201fc84ae168017ffdfd6c86257a6:
Merge tag 'pull-target-arm-20240402' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-04-02
11:34:49 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for
According to Arm GIC section 4.6.3 Interrupt superpriority, the interrupt
with superpriority is always IRQ, never FIQ, so handle NMI same as IRQ in
arm_phys_excp_target_el().
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
---
v4:
- Add Reviewed-by.
v3:
- Remove nmi_is_irq flag in CPUA
This patch set implements FEAT_NMI and FEAT_GICv3_NMI for ARMv8. These
introduce support for a new category of interrupts in the architecture
which we can use to provide NMI like functionality.
There are two modes for using this FEAT_NMI. When PSTATE.ALLINT or
PSTATE.SP & SCTLR_ELx.SCTLR_SPINTMASK
Add ALLINT MSR (immediate) to decodetree, in which the CRm is 0b000x. The
EL0 check is necessary to ALLINT, and the EL1 check is necessary when
imm == 1. So implement it inline for EL2/3, or EL1 with imm==0. Avoid the
unconditional write to pc and use raise_exception_ra to unwind.
Signed-off-by: J
Enable FEAT_NMI on the 'max' CPU.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
Reviewed-by: Peter Maydell
---
v12:
- Add Reviewed-by.
v3:
- Add Reviewed-by.
- Sorted to last.
---
docs/system/arm/emulation.rst | 1 +
target/arm/tcg/cpu64.c| 1 +
2 files changed, 2 insertion
When PSTATE.ALLINT is set, an IRQ or FIQ interrupt that is targeted to
ELx, with or without superpriority is masked.
As Richard suggested, place ALLINT bit in PSTATE in env->pstate.
With the change to pstate_read/write, exception entry
and return are automatically handled.
Signed-off-by: Jinjie
Augment the GICv3's QOM device interface by adding one
new set of sysbus IRQ line, to signal NMI to each CPU.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
Reviewed-by: Peter Maydell
---
v11：
- Add new Reviewed-by.
v4:
- Add Reviewed-by.
v3:
- Add support for VNMI.
---
hw/intc/arm_
If GICD_CTLR_DS bit is zero and the NMI is non-secure, the NMI priority is
higher than 0x80, otherwise it is higher than 0x0. And save the interrupt
non-maskable property in hppi.nmi to deliver NMI exception. Since both GICR
and GICD can deliver NMI, it is both necessary to check whether the pendin
On Thu, Mar 28, 2024 at 5:22 PM Jonah Palmer wrote:
>
> Initialize sequence variables for VirtQueue and VirtQueueElement
> structures. A VirtQueue's sequence variables are initialized when a
> VirtQueue is being created or reset. A VirtQueueElement's sequence
> variable is initialized when a VirtQ
Support ALLINT msr access as follow:
mrs , ALLINT// read allint
msr ALLINT, // write allint with imm
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
---
v9:
- Move nmi_reginfo and related functions inside an existing ifdef
TARGET_AARCH64 to solve the -
Add support for FEAT_NMI. NMI (FEAT_NMI) is an mandatory feature in
ARMv8.8-A and ARM v9.3-A.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
---
v3:
- Add Reviewed-by.
- Adjust to before the MSR patches.
---
target/arm/internals.h | 3 +++
1 file changed, 3 insertions(+)
diff --git
Add GICD_INMIR, GICD_INMIRnE register and support access GICD_INMIR0.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
Reviewed-by: Peter Maydell
---
v11:
- Add new Reviewed-by.
v10:
- superprio -> nmi.
v4:
- Make the GICD_INMIR implementation more clearer.
- Udpate the commit message.
Add the NMIAR CPU interface registers which deal with acknowledging NMI.
When introduce NMI interrupt, there are some updates to the semantics for the
register ICC_IAR1_EL1 and ICC_HPPIR1_EL1. For ICC_IAR1_EL1 register, it
should return 1022 if the intid has non-maskable property. And for
ICC_NMIA
Set or clear PSTATE.ALLINT on taking an exception to ELx according to the
SCTLR_ELx.SPINTMASK bit.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
---
v9:
- Not check SCTLR_NMI in arm_cpu_do_interrupt_aarch64().
v3:
- Add Reviewed-by.
---
target/arm/helper.c | 8
1 file chang
Add a property has-nmi to the GICv3 device, and use this to set
the NMI bit in the GICD_TYPER register. This isn't visible to
guests yet because the property defaults to false and we won't
set it in the board code until we've landed all of the changes
needed to implement FEAT_GICV3_NMI.
Signed-off
Wire the new NMI and VINMI interrupt line from the GIC to each CPU.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
---
v9:
- Rename ARM_CPU_VNMI to ARM_CPU_VINMI.
- Update the commit message.
v4:
- Add Reviewed-by.
v3:
- Also add VNMI wire.
---
hw/arm/virt.c | 7 ++-
1 file chang
Add GICR_INMIR0 register and support access GICR_INMIR0.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
Reviewed-by: Peter Maydell
---
v11:
- Add new Reviewed-by.
v10:
- gicr_isuperprio -> gicr_inmir0.
v6:
- Add Reviewed-by.
v4:
- Make the GICR_INMIR0 implementation more clearer.
---
This only implements the external delivery method via the GICv3.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
---
v12:
- Correct the comment style in arm_cpu_initfn().
v10:
- In arm_cpu_exec_interrupt(), if SCTLR_ELx.NMI is 0, NMI -> IRQ,
VINMI -> VIRQ, VFNMI -> VFIQ.
- Make arm_c
In vCPU Interface, if the vIRQ has the non-maskable property, report
vINMI to the corresponding vPE.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
Reviewed-by: Peter Maydell
---
v12:
- Do not check nmi_support repetitively.
- Add Reviewed-by.
v10:
- Update the commit message, superp
A SPI, PPI or SGI interrupt can have non-maskable property. So maintain
non-maskable property in PendingIrq and GICR/GICD. Since add new device
state, it also needs to be migrated, so also save NMI info in
vmstate_gicv3_cpu and vmstate_gicv3.
Signed-off-by: Jinjie Ruan
Acked-by: Richard Henderson
When configuring VMs with the CDROM device using the USB bus
in Libvirt, do as follows:
The destination Qemu process crashed, causing the VM migration
to fail; the backtrace reveals the following:
Program terminated with signal SIGSEGV, Segmentation fault.
0 __memmove_sse2_una
Add IS and FS bit in ISR_EL1 and handle the read. With CPU_INTERRUPT_NMI or
CPU_INTERRUPT_VINMI, both CPSR_I and ISR_IS must be set. With
CPU_INTERRUPT_VFNMI, both CPSR_F and ISR_FS must be set.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
---
v9:
- CPU_INTERRUPT_VNMI -> CPU_INTERRU
A PE that implements FEAT_NMI and FEAT_GICv3 also implements
FEAT_GICv3_NMI. A PE that does not implement FEAT_NMI, does not implement
FEAT_GICv3_NMI
So included support FEAT_GICv3_NMI feature as part of virt platform
GIC initialization if FEAT_NMI and FEAT_GICv3 supported.
Signed-off-by: Jinjie
FEAT_NMI defines another three new bits in HCRX_EL2: TALLINT, HCRX_VINMI and
HCRX_VFNMI. When the feature is enabled, allow these bits to be written in
HCRX_EL2.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
---
v12:
- Remove the redundant blank line.
v9:
- Declare cpu variable to re
To indicate to the destination whether or not emulational SCSI
requests are sent, introduce the migrate_emulate_scsi_request
in struct SCSIDiskState. It seeks to achieve migration backend
compatibility.
This commit sets the stage for the next one, which addresses
the crash of a VM configured with
Implement icv_nmiar1_read() for icc_nmiar1_read(), so add definition for
ICH_LR_EL2.NMI and ICH_AP1R_EL2.NMI bit.
If FEAT_GICv3_NMI is supported, ich_ap_write() should consider ICV_AP1R_EL1.NMI
bit. In icv_activate_irq() and icv_eoir_write(), the ICV_AP1R_EL1.NMI bit
should be set or clear accordi
According to Arm GIC section 4.6.3 Interrupt superpriority, the interrupt
with superpriority is always IRQ, never FIQ, so the NMI exception trap entry
behave like IRQ. And VINMI(vIRQ with Superpriority) can be raised from the
GIC or come from the hcrx_el2.HCRX_VINMI bit, VFNMI(vFIQ with Superpriori
In CPU Interface, if the IRQ has the non-maskable property, report NMI to
the corresponding PE.
Signed-off-by: Jinjie Ruan
Reviewed-by: Richard Henderson
Reviewed-by: Peter Maydell
---
v12:
- Add Reviewed-by.
v10:
- superprio -> nmi.
- Update the commit message, superpriority -> non-maskable.
v
ACPI 6.5 introduced Generic Port Affinity Structures to close a system
description gap that was a problem for CXL memory systems.
It defines an new SRAT Affinity structure (and hence allows creation of an
ACPI Proximity Node which can only be defined via an SRAT structure)
for the boundary between
Before making additional modification, tidy up this misleading indentation.
Signed-off-by: Jonathan Cameron
---
hw/acpi/acpi_generic_initiator.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/acpi/acpi_generic_initiator.c b/hw/acpi/acpi_generic_initiator.c
index 17b9a052f
This will simplify reuse when adding acpi-generic-port.
Note that some error_printf() messages will now print acpi-generic-node
whereas others will move to type specific cases in next patch so
are left alone for now.
Signed-off-by: Jonathan Cameron
---
include/hw/acpi/acpi_generic_initiator.h |
These are very similar to the recently added Generic Initiators
but instead of representing an initiator of memory traffic they
represent an edge point beyond which may lie either targets or
initiators. Here we add these ports such that they may
be targets of hmat_lb records to describe the latenc
The test to be added exercises many corners of the SRAT and HMAT
table generation.
Signed-off-by: Jonathan Cameron
---
tests/qtest/bios-tables-test-allowed-diff.h | 5 +
tests/data/acpi/q35/APIC.acpihmat-generic-x | 0
tests/data/acpi/q35/CEDT.acpihmat-generic-x | 0
tests/data/acpi/q35/DSDT
Add a test with 6 nodes to exercise most interesting corner cases
of SRAT and HMAT generation including the new Generic Initiator
and Generic Port Affinity structures. More details of the
set up in the following patch adding the table data.
Signed-off-by: Jonathan Cameron
---
tests/qtest/bios-t
Given this is a new configuration, there are affects on APIC, CEDT
and DSDT, but the key elements are in SRAT (plus related data in
HMAT). The configuration has node to exercise many different combinations.
0) CPUs + Memory
1) GI only
2) GP only
3) CPUS only
4) Memory only
5) CPUs + HP memory
GI
Hi Nicolin,
On Tue, Apr 02, 2024 at 03:28:12PM -0700, Nicolin Chen wrote:
> Hi Mostafa,
>
> On Mon, Mar 25, 2024 at 10:13:56AM +, Mostafa Saleh wrote:
> >
> > Currently, QEMU supports emulating either stage-1 or stage-2 SMMUs
> > but not nested instances.
> > This patch series adds support f
This series contains fixes and improvements for virtio-net RSS and hash
reporting feature.
V7 -> V8:
Reset author email addresses.
Rebased.
V6 -> V7:
Dropped patch "virtio-net: Do not clear VIRTIO_NET_F_HASH_REPORT".
Dropped the changes to remove packet flags.
Re-introduced tap_receive(
Multiqueue usage is not negotiated yet when realizing. If more than
one queue is added and the guest never requests to enable multiqueue,
the extra queues will not be deleted when unrealizing and leak.
Fixes: f9d6dbf0bf6e ("virtio-net: remove virtio queues if the guest doesn't
support multiqueue"
It was necessary since an Linux older than 2.6.35 may implement the
virtio-net header but may not allow to change its length. Remove it
since such an old Linux is no longer supported.
Signed-off-by: Akihiko Odaki
Acked-by: Michael S. Tsirkin
---
net/tap_int.h | 1 -
net/tap-bsd.c | 5
While netmap implements virtio-net header, it does not implement
receive_raw(). Instead of implementing receive_raw for netmap, add
virtio-net headers in the common code and use receive_iov()/receive()
instead. This also fixes the buffer size for the virtio-net header.
Fixes: fbbdbddec0 ("tap: all
The kernel interprets the returned value as an unsigned 32-bit so -1
will mean queue 4294967295, which is awkward. Return 0 instead.
Signed-off-by: Akihiko Odaki
---
ebpf/rss.bpf.skeleton.h | 1532 +++
tools/ebpf/rss.bpf.c|2 +-
2 files changed
tap prepends a zeroed virtio-net header when writing a packet to a
tap with virtio-net header enabled but not in use. This only happens
when s->host_vnet_hdr_len == sizeof(struct virtio_net_hdr).
Signed-off-by: Akihiko Odaki
---
net/tap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
The peer buffer is qualified with const and not meant to be modified.
It also prevents enabling VIRTIO_NET_F_HASH_REPORT for peers without
virtio-net header support.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 36 +---
1 file changed, 17 insertions(+),
This commit adds an implementation of an IGVM loader which parses the
file specified as a pararameter to ConfidentialGuestSupport and provides
a function that uses the interface in the same object to configure and
populate guest memory based on the contents of the file.
The IGVM file is parsed whe
When using an IGVM file the configuration of the system firmware is
defined by IGVM directives contained in the file. In this case the user
should not configure any pflash devices.
This commit skips initialization of the ROM mode when pflash0 is not set
then checks to ensure no pflash devices have
In preparation for supporting the processing of IGVM files to configure
guests, this adds a set of functions to ConfidentialGuestSupport
allowing configuration of secure virtual machines that can be
implemented for each supported isolation platform type such as Intel TDX
or AMD SEV-SNP. These funct
Propagating ebpf-rss-fds errors has several problems.
First, it makes device realization fail and disables the fallback to the
conventional eBPF loading.
Second, it leaks memory by making device realization fail without
freeing memory already allocated.
Third, the convention is to set an error w
IGVM support has been implemented for Confidential Guests that support
AMD SEV and AMD SEV-ES. Add some documentation that gives some
background on the IGVM format and how to use it to configure a
confidential guest.
Signed-off-by: Roy Hopkins
---
docs/system/i386/amd-memory-encryption.rst | 2
Since qemu_set_vnet_hdr_len() is always called when
qemu_using_vnet_hdr() is called, we can merge them and save some code.
For consistency, express that the virtio-net header is not in use by
returning 0 with qemu_get_vnet_hdr_len() instead of having a dedicated
function, qemu_get_using_vnet_hdr()
This will save duplicate logic found in both of tap_receive_iov() and
tap_receive().
Suggested-by: "Zhang, Chen"
Signed-off-by: Akihiko Odaki
---
net/tap.c | 35 +--
1 file changed, 5 insertions(+), 30 deletions(-)
diff --git a/net/tap.c b/net/tap.c
index 99c59e
calculate_rss_hash() was using hash value 0 to tell if it calculated
a hash, but the hash value may be 0 on a rare occasion. Have a
distinct bool value for correctness.
Fixes: f3fa412de2 ("ebpf: Added eBPF RSS program.")
Signed-off-by: Akihiko Odaki
---
ebpf/rss.bpf.skeleton.h | 1210 +++
Warning about RSS fallback at device realization allows the user to
notice the configuration problem early.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
RSS is disabled by default.
Fixes: 590790297c ("virtio-net: implement RSS configuration command")
Signed-off-by: Akihiko Odaki
Reviewed-by: Michael Tokarev
---
hw/net/virtio-net.c | 70 +++--
1 file changed, 36 insertions(+), 34 deletions(-)
diff
This saves branches and makes later BPF program changes easier.
Signed-off-by: Akihiko Odaki
---
tools/ebpf/rss.bpf.c | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/tools/ebpf/rss.bpf.c b/tools/ebpf/rss.bpf.c
index 77434435ac15..c989cb3cd82c 1006
The IGVM library allows Independent Guest Virtual Machine files to be
parsed and processed. IGVM files are used to configure guest memory
layout, initial processor state and other configuration pertaining to
secure virtual machines.
This adds the --enable-igvm configure option, enabled by default,
The virtio-net header length assertion should happen for any clients.
Signed-off-by: Akihiko Odaki
---
net/net.c | 5 +
net/tap.c | 3 ---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/net/net.c b/net/net.c
index bd51037ebfb0..db096765f4b2 100644
--- a/net/net.c
+++ b/net/ne
Byte swapping is only performed for the part of header shared with the
legacy standard and the buffer only needs to cover it.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw/net/v
When an SEV guest is started, the reset vector and state are
extracted from metadata that is contained in the firmware volume.
In preparation for using IGVM to setup the initial CPU state,
the code has been refactored to populate vmcb_save_area for each
CPU which is then applied during guest start
vhost requires eBPF for RSS. When eBPF is not available, virtio-net
implicitly disables RSS even if the user explicitly requests it. Return
an error instead of implicitly disabling RSS if RSS is requested but not
available.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 97 ++
An IGVM file contains configuration of a guest that supports
confidential computing hardware. As part of the PC system
initialisation, the IGVM needs to be processed to apply this
configuration before the guest is started.
This patch introduces processing of a provided IGVM file at the end of
the
The member is not cleared during reset so may have a stale value.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index 86929c9e1fad..2de073ce18fd 100644
--- a/hw/net/virtio-net.c
+++ b/hw/net/virt
Here is v2 of the set of patches to add support for IGVM files to QEMU. These
address all of the comments on v1 [1]. These patches are also available
to view on github: [2].
Changes in v2:
* Fixed various spelling and documentation errors from Stefano.
* Addressed readability and other sugges
This generalizes the rule to generate the skeleton and allows to add
another.
Signed-off-by: Akihiko Odaki
---
tools/ebpf/Makefile.ebpf | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/tools/ebpf/Makefile.ebpf b/tools/ebpf/Makefile.ebpf
index 3391e7ce0898..572c
The ConfidentialGuestSupport object defines a number of virtual
functions that are called during processing of IGVM directives to query
or configure initial guest state. In order to support processing of IGVM
files, these functions need to be implemented by relevant isolation
hardware support code
The copied header is only used for byte swapping.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index e33bdbfd84a5..ca0fbf7b7654 100644
--- a/hw/net/v
The code to attach or detach the eBPF program to RSS were duplicated so
unify them into one function to save some code.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 90 +
1 file changed, 36 insertions(+), 54 deletions(-)
diff --git a
Create an enum entry within FirmwareDevice for 'igvm' to describe that
an IGVM file can be used to map firmware into memory as an alternative
to pre-existing firmware devices.
Signed-off-by: Roy Hopkins
---
docs/interop/firmware.json | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
In order to add support for parsing IGVM files for secure virtual
machines, a the path to an IGVM file needs to be specified as
part of the guest configuration. It makes sense to add this to
the ConfidentialGuestSupport object as this is common to all secure
virtual machines that potentially could
On Wed, 3 Apr 2024 at 04:16, Jinjie Ruan wrote:
> On 2024/4/3 0:12, Peter Maydell wrote:
> >> @@ -776,7 +811,11 @@ static uint64_t icv_iar_read(CPUARMState *env, const
> >> ARMCPRegInfo *ri)
> >> if (thisgrp == grp && icv_hppi_can_preempt(cs, lr)) {
> >> intid = ich_lr_vinti
Justinien Bouron writes:
> Depending on your use-case, it might be inconvenient to have qemu grab
> the input device from the host immediately upon starting the guest.
>
> Added a new bool option to input-linux: grab-on-startup. If true, the
> device is grabbed as soon as the guest is started, ot
On Sun, Mar 31, 2024 at 04:20:30PM -0400, Michael S. Tsirkin wrote:
> On Fri, Mar 29, 2024 at 10:16:41AM -0700, Breno Leitao wrote:
> > @@ -3814,13 +3815,24 @@ static int virtnet_set_rxfh(struct net_device *dev,
> > return -EOPNOTSUPP;
> >
> > if (rxfh->indir) {
> > + if
On Wed, Apr 03, 2024 at 10:03:15AM +0800, Xiaoyao Li wrote:
> On 4/2/2024 10:31 PM, Michael S. Tsirkin wrote:
> > On Tue, Apr 02, 2024 at 09:18:44PM +0800, Xiaoyao Li wrote:
> > > On 4/2/2024 6:02 PM, Michael S. Tsirkin wrote:
> > > > On Tue, Apr 02, 2024 at 04:25:16AM -0400, Xiaoyao Li wrote:
> >
From: Austin Clements
The E1000 debug messages are very useful for developing drivers.
Make these available to users without recompiling QEMU.
Signed-off-by: Austin Clements
[geo...@ldpreload.com: Rebased on top of 2.9.0]
Signed-off-by: Geoffrey Thomas
Signed-off-by: Don Porter
---
hw/net/e1
Hi,
Thank you for the reply.
On Tuesday, April 2, 2024 5:08:24 PM IST Eugenio Perez Martin wrote:
> [...]
> > > > Q2.
> > > > In the Red Hat article, just below the first listing ("Memory layout of
> > > > a
> > > > packed virtqueue descriptor"), there's the following line referring to
> > > >
On Wed, Apr 03, 2024 at 04:35:35PM +0800, Wang, Lei wrote:
> We should change the following line from
>
> while (!qemu_sem_timedwait(&mis->postcopy_qemufile_dst_done, 100)) {
>
> to
>
> while (qemu_sem_timedwait(&mis->postcopy_qemufile_dst_done, 100)) {
Stupid me.. :( Thanks for fi
在 2024/3/30 9:50, Dan Williams 写道:
Shiyang Ruan wrote:
The GMER only has "Physical Address" field, no such one indicates length.
So, when a poison event is received, we could use GET_POISON_LIST command
to get the poison list. Now driver has cxl_mem_get_poison(), so
reuse it and add a parame
A value 1 of PCAT_COMPAT (bit 0) of MADT.Flags indicates that the system
also has a PC-AT-compatible dual-8259 setup, i.e., the PIC.
When PIC is not enabled (pic=off) for x86 machine, the PCAT_COMPAT bit
needs to be cleared. Otherwise, the guest thinks there is a present PIC.
Signed-off-by: Xiaoy
在 2024/3/30 9:52, Dan Williams 写道:
Shiyang Ruan wrote:
Poison injection from debugfs is silent too. Add calling
cxl_mem_report_poison() to make it able to do memory_failure().
Why does this needs to be signalled? It is a debug interface, the
debugger can also trigger a read after the injec
On Wed, 3 Apr 2024 10:59:53 -0400
Xiaoyao Li wrote:
> A value 1 of PCAT_COMPAT (bit 0) of MADT.Flags indicates that the system
> also has a PC-AT-compatible dual-8259 setup, i.e., the PIC.
>
> When PIC is not enabled (pic=off) for x86 machine, the PCAT_COMPAT bit
> needs to be cleared. Otherwis
On 4/3/2024 11:12 PM, Igor Mammedov wrote:
On Wed, 3 Apr 2024 10:59:53 -0400
Xiaoyao Li wrote:
A value 1 of PCAT_COMPAT (bit 0) of MADT.Flags indicates that the system
also has a PC-AT-compatible dual-8259 setup, i.e., the PIC.
When PIC is not enabled (pic=off) for x86 machine, the PCAT_COMP
On Wed, Mar 27, 2024 at 04:05:14AM +0100, Marek Marczykowski-Górecki wrote:
> Introduce global xen_is_stubdomain variable when qemu is running inside
> a stubdomain instead of dom0. This will be relevant for subsequent
> patches, as few things like accessing PCI config space need to be done
> diffe
On Wed, Mar 27, 2024 at 04:05:15AM +0100, Marek Marczykowski-Górecki wrote:
> When running in a stubdomain, the config space access via sysfs needs to
> use BDF as seen inside stubdomain (connected via xen-pcifront), which is
> different from the real BDF. For other purposes (hypercall parameters
>
There is a bug when setting the RSS options in virtio_net that can break
the whole machine, getting the kernel into an infinite loop.
Running the following command in any QEMU virtual machine with virtionet
will reproduce this problem:
# ethtool -X eth0 hfunc toeplitz
This is how the proble
> Again, QAPI schema
Pardon my ignorance, but are you writing this because there is a problem with
the QAPI schema changes that I would need to fix and re-submit?
Or is it just here to indicate that you've reviewed the change made to the
schema?
Regards,
Justinien Bouron
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