[PATCH v3 0/8] TCG plugins new inline operations

This series implement two new operations for plugins: - Store inline allows to write a specific value to a scoreboard. - Conditional callback executes a callback only when a given condition is true. The condition is evaluated inline. It's possible to mix various inline operations (add, store) wi

[PATCH v3 3/8] plugins: add new inline op STORE_U64

Signed-off-by: Pierrick Bouvier --- include/qemu/plugin.h | 1 + include/qemu/qemu-plugin.h | 4 ++-- accel/tcg/plugin-gen.c | 15 +++ plugins/core.c | 6 ++ 4 files changed, 24 insertions(+), 2 deletions(-) diff --git a/include/qemu/plugin.h b/include/qem

[PATCH v3 4/8] tests/plugin/inline: add test for STORE_U64 inline op

Signed-off-by: Pierrick Bouvier --- tests/plugin/inline.c | 41 + 1 file changed, 37 insertions(+), 4 deletions(-) diff --git a/tests/plugin/inline.c b/tests/plugin/inline.c index 0163e9b51c5..103c3a22f6e 100644 --- a/tests/plugin/inline.c +++ b/tests/plug

[PATCH v3 6/8] tests/plugin/inline: add test for conditional callback

Count number of tb and insn executed using a conditional callback. We ensure the callback has been called expected number of time (per vcpu). Signed-off-by: Pierrick Bouvier --- tests/plugin/inline.c | 89 +-- 1 file changed, 86 insertions(+), 3 deletions(

[PATCH v3 7/8] plugins: distinct types for callbacks

To prevent errors when writing new types of callbacks or inline operations, we split callbacks data to distinct types. Signed-off-by: Pierrick Bouvier --- include/qemu/plugin.h | 46 ++--- plugins/plugin.h | 2 +- accel/tcg/plugin-gen.c | 58 +-

[PATCH v3 2/8] plugins: extract generate ptr for qemu_plugin_u64

Signed-off-by: Pierrick Bouvier --- accel/tcg/plugin-gen.c | 27 ++- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 41d4d83f547..d3667203546 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen

[PATCH v3 5/8] plugins: conditional callbacks

Extend plugins API to support callback called with a given criteria (evaluated inline). Added functions: - qemu_plugin_register_vcpu_tb_exec_cond_cb - qemu_plugin_register_vcpu_insn_exec_cond_cb They expect as parameter a condition, a qemu_plugin_u64_t (op1) and an immediate (op2). Callback is ca

[PATCH v3 1/8] plugins: prepare introduction of new inline ops

Until now, only add_u64 was available, and all functions assumed this or were named uniquely. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/qemu/plugin.h | 2 +- accel/tcg/plugin-gen.c | 6 +++--- plugins/core.c | 14 -- 3 files changed, 16 in

[PATCH v3 8/8] plugins: extract cpu_index generate

Signed-off-by: Pierrick Bouvier --- accel/tcg/plugin-gen.c | 28 +--- 1 file changed, 13 insertions(+), 15 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 16618adf1bc..e6fd6fdfae5 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-g

Re: [PATCH] qapi: document leftover members in qapi/run-state.json

Paolo Bonzini writes: > Il lun 25 mar 2024, 12:36 Markus Armbruster ha scritto: > >> Paolo Bonzini writes: >> >> > Suggested-by: Markus Armbruster >> > Signed-off-by: Paolo Bonzini >> > --- >> > qapi/run-state.json | 26 +- >> > 1 file changed, 25 insertions(+), 1 del

Re: [PATCH v3 10/17] esp.c: don't assert() if FIFO empty when executing non-DMA SELATNS

On 25/03/2024 10:49, Philippe Mathieu-Daudé wrote: On 24/3/24 20:16, Mark Cave-Ayland wrote: The current logic assumes that at least 1 byte is present in the FIFO when executing a non-DMA SELATNS command, but this may not be the case if the guest executes an invalid ESP command sequence. What

Re: [PATCH] qapi/block-core: improve Qcow2OverlapCheckFlags documentation

Vladimir Sementsov-Ogievskiy writes: > Most of fields have no description at all. Let's fix that. Still, no > reason to place here more detailed descriptions of what these > structures are, as we have public Qcow2 format specification. > > Signed-off-by: Vladimir Sementsov-Ogievskiy > --- > qap

[PATCH trivial for-9.0] hw/i386/fw_cfg.c: fix non-legacy smbios build

When building qemu with smbios but not legacy mode (eg minimal microvm build), link fails with: hw/i386/fw_cfg.c:74: undefined reference to `smbios_get_table_legacy' This is because fw_cfg interface can call this function if CONFIG_SMBIOS is defined. Made this code block to depend on CONFIG_SM

Re: Intention to work on GSoC project

Hi, Thank you for your reply. On Wednesday, March 20, 2024 9:27:00 PM IST Eugenio Perez Martin wrote: > [...] > > Q1. > > Regarding the "Deep dive into Virtio-networking and vhost-net" > > article [3], the "Introduction" subsection of the "Vhost protocol" > > section mentions that sending the ava

Re: [PULL 20/34] tests/libqos: add riscv/virt machine nodes

On Monday, March 25, 2024 1:35:52 PM CET Daniel Henrique Barboza wrote: > On 3/25/24 06:20, Thomas Huth wrote: > > On 08/03/2024 12.11, Alistair Francis wrote: > >> From: Daniel Henrique Barboza > >> > >> Add a RISC-V 'virt' machine to the graph. This implementation is a > >> modified copy of the

[PATCH for-9.0] target/arm: take HSTR traps of cp15 accesses to EL2, not EL1

The HSTR_EL2 register allows the hypervisor to trap AArch32 EL1 and EL0 accesses to cp15 registers. We incorrectly implemented this so they trap to EL1 when we detect the need for a HSTR trap at code generation time. (The check in access_check_cp_reg() which we do at runtime to catch traps from E

Re: [PATCH 02/10] pnv/phb4: Add reset logic to PHB4

Cc: +Fred +Daniel On 3/21/24 11:04, Saif Abrar wrote: Add a method to be invoked on QEMU reset. Also add CFG and PBL core-blocks reset logic using appropriate bits of PHB_PCIE_CRESET register. Tested by reading the reset value of a register. Signed-off-by: Saif Abrar --- hw/pci-host/pnv_phb

[PATCH-for-9.0? v2 0/8] hw/clock: Propagate clock changes when STM32L4X5 MUX is updated

Since v1: - Rework API to only propagate when both clock_set and clock_set_mul_div modified the clock params (Peter & Luc). - Use that in zynq_slcr. Per https://www.qemu.org/docs/master/devel/clocks.html#clock-multiplier-and-divider-settings: Note that clock_set_mul_div() does not automati

[PATCH-for-9.0? v2 2/8] hw/clock: Pass optional &bool argument to clock_set()

Currently clock_set() returns whether the clock has been changed or not. In order to combine this information with other clock calls, pass an optional boolean and do not return anything. The single caller ignores the return value, have it use NULL. Signed-off-by: Philippe Mathieu-Daudé --- incl

[PATCH-for-9.0? v2 3/8] hw/clock: Pass optional &bool argument to clock_set_ns()

Pass optional &bool argument to clock_set_ns(). Since all callers ignore the return value, have them use NULL. Signed-off-by: Philippe Mathieu-Daudé --- docs/devel/clocks.rst | 2 +- include/hw/clock.h| 8 ++-- hw/arm/stellaris.c| 2 +- 3 files changed, 4 insertions(+), 8 deletions(-

[PATCH-for-9.0? v2 5/8] hw/clock: Pass optional &bool argument to clock_set_mul_div()

Pass optional &bool argument to clock_set_ns(). Since all callers ignore the return value, have them use NULL. Signed-off-by: Philippe Mathieu-Daudé --- docs/devel/clocks.rst | 4 include/hw/clock.h | 3 ++- hw/arm/msf2-soc.c | 2 +- hw/arm/stm32f100_soc.c | 2 +- hw/arm/stm32

[PATCH-for-9.0 v2 6/8] hw/misc/stm32l4x5_rcc: Inline clock_update() in clock_mux_update()

Trivial inlining in preliminary patch to make the next one easier to review. Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/stm32l4x5_rcc.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index f01113308a..8852b434db

[PATCH-for-9.0 v2 1/8] hw/clock: Have clock_set_mul_div() return early when nothing to change

Return early when clock_set_mul_div() is called with same mul/div values the clock has. Signed-off-by: Philippe Mathieu-Daudé --- hw/core/clock.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/core/clock.c b/hw/core/clock.c index d82e44cd1a..c73f0c2f98 100644 --- a/hw/core/clock.c ++

[PATCH-for-9.0? v2 4/8] hw/clock: Pass optional &bool argument to clock_set_hz()

Pass optional &bool argument to clock_set_ns(). Since all callers ignore the return value, have them use NULL. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/clock.h | 8 ++-- hw/arm/aspeed.c| 2 +- hw/arm/fby35.c | 2 +- hw/arm/mps2-tz.c | 4 +

[PATCH-for-9.0? v2 7/8] hw/misc/stm32l4x5_rcc: Propagate period when enabling a clock

From: Arnaud Minier The "clock_set_mul_div" function doesn't propagate the clock period to the children if it is changed (e.g. by enabling/disabling a clock multiplexer). This was overlooked during the implementation due to late changes. This commit propagates the change if the multiplier or div

Re: [PATCH 10/10] pnv/phb4: Mask off LSI Source-ID based on number of interrupts

On 3/21/24 11:04, Saif Abrar wrote: Add a method to reset the value of LSI Source-ID. Mask off LSI source-id based on number of interrupts in the big/small PHB. Looks ok. Signed-off-by: Saif Abrar --- hw/pci-host/pnv_phb4.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-

[PATCH-for-9.1 v2 8/8] hw/misc/zynq_slcr: Only propagate clock changes when necessary

Pass &bool to zynq_slcr_compute_clocks[_internal](), so we can pass it to the clock_set() calls which might update it. Then check it and only call zynq_slcr_propagate_clocks() and clock_propagate() when necessary. Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/zynq_slcr.c | 39 +++

Re: [PATCH 09/10] hw/pci: Set write-mask bits for PCIE Link-Control-2 register

On 3/21/24 11:04, Saif Abrar wrote: PHB updates the register PCIE Link-Control-2. Set the write-mask bits for TLS, ENTER_COMP, TX_MARGIN, HASD, MOD_COMP, COMP_SOS and COMP_P_DE. You should resend this patch independently of the PowerNV PHB changes. Thanks, C. Signed-off-by: Saif Abrar

Re: [PATCH 08/10] pnv/phb4: Implement IODA PCT table

On 3/21/24 11:04, Saif Abrar wrote: IODA PCT table (#3) is implemented without any functionality, being a debug table. Signed-off-by: Saif Abrar Reviewed-by: Cédric Le Goater Thanks, C. --- hw/pci-host/pnv_phb4.c | 6 ++ include/hw/pci-host/pnv_phb4.h | 2 ++

Re: [PATCH 07/10] pnv/phb4: Set link speed and width in the DLP training control register

On 3/21/24 11:04, Saif Abrar wrote: Get the current link-status from PCIE macro. Extract link-speed and link-width from the link-status and set in the DLP training control (PCIE_DLP_TCR) register. Signed-off-by: Saif Abrar Reviewed-by: Cédric Le Goater Thanks, C. --- hw/pci-host/pnv_p

Re: [PATCH trivial for-9.0] hw/i386/fw_cfg.c: fix non-legacy smbios build

Hi Michael, On 25/3/24 14:09, Michael Tokarev wrote: When building qemu with smbios but not legacy mode (eg minimal microvm build), link fails with: hw/i386/fw_cfg.c:74: undefined reference to `smbios_get_table_legacy' This is because fw_cfg interface can call this function if CONFIG_SMBIOS

Re: [PULL 20/34] tests/libqos: add riscv/virt machine nodes

On 25/03/2024 13.35, Daniel Henrique Barboza wrote: On 3/25/24 06:20, Thomas Huth wrote: On 08/03/2024 12.11, Alistair Francis wrote: From: Daniel Henrique Barboza Add a RISC-V 'virt' machine to the graph. This implementation is a modified copy of the existing arm machine in arm-virt-machin

[PATCH v2] target/riscv/kvm/kvm-cpu.c: kvm_riscv_handle_sbi() fail with vendor-specific SBI

kvm_riscv_handle_sbi() may return not supported return code to not trigger qemu abort with vendor-specific sbi. Added SBI related return code's defines. Signed-off-by: Alexei Filippov Fixes: 4eb47125 ("target/riscv: Handle KVM_EXIT_RISCV_SBI exit") Reviewed-by: Daniel Henrique Barboza --- Chan

[PATCH v1] coroutine: avoid inserting duplicate coroutine to co_queue_wakeup

If g_main_loop_run()/aio_poll() is called in the coroutine context, the pending coroutine may be woken up repeatedly, and the co_queue_wakeup may be disordered. When the poll() syscall exited in g_main_loop_run()/aio_poll(), it means some listened events is completed. Therefore, the completion cal

Re: [PULL 20/34] tests/libqos: add riscv/virt machine nodes

On 25/03/2024 14.25, Christian Schoenebeck wrote: On Monday, March 25, 2024 1:35:52 PM CET Daniel Henrique Barboza wrote: On 3/25/24 06:20, Thomas Huth wrote: On 08/03/2024 12.11, Alistair Francis wrote: From: Daniel Henrique Barboza Add a RISC-V 'virt' machine to the graph. This implementat

[PATCH] target/riscv/kvm/kvm-cpu.c: kvm_riscv_handle_sbi() fail with vendor-specific SBI

kvm_riscv_handle_sbi() may return not supported return code to not trigger qemu abort with vendor-specific sbi. Added SBI related return code's defines. Signed-off-by: Alexei Filippov --- target/riscv/kvm/kvm-cpu.c | 5 +++-- target/riscv/sbi_ecall_interface.h | 11 +++ 2 files

Re: [PATCH] virtio_net: Do not send RSS key if it is not supported

在 2024/3/25 下午7:35, Xuan Zhuo 写道: On Mon, 25 Mar 2024 04:26:08 -0700, Breno Leitao wrote: Hello Xuan, On Mon, Mar 25, 2024 at 01:57:53PM +0800, Xuan Zhuo wrote: On Fri, 22 Mar 2024 03:21:21 -0700, Breno Leitao wrote: Hello Xuan, On Fri, Mar 22, 2024 at 10:00:22AM +0800, Xuan Zhuo wrote:

Re: [PATCH-for-9.0? v2 2/8] hw/clock: Pass optional &bool argument to clock_set()

On Mon, 25 Mar 2024 at 13:33, Philippe Mathieu-Daudé wrote: > > Currently clock_set() returns whether the clock has > been changed or not. In order to combine this information > with other clock calls, pass an optional boolean and do > not return anything. The single caller ignores the return > v

[PATCH] misc/pca955*: Move models under hw/gpio

The PCA9552 and PCA9554 devices are both I2C GPIO controllers and the PCA9552 also can drive LEDs. Do all the necessary adjustments to move the models under hw/gpio. Cc: Glenn Miles Signed-off-by: Cédric Le Goater --- MAINTAINERS | 4 ++-- include/hw/{misc => gpio}/

Re: [PATCH 05/10] pnv/phb4: Implement write-clear and return 1's on unimplemented reg read

On 3/21/24 11:04, Saif Abrar wrote: Implement write-1-to-clear and write-X-to-clear logic. Update registers with silent simple read and write. Return all 1's when an unimplemented/reserved register is read. Test that reading address 0x0 returns all 1's (i.e. -1). Signed-off-by: Saif Abrar R

[PATCH] pc_q35: remove unnecessary m->alias assignment

The assignment is already inherited from pc-q35-8.2. -s --- hw/i386/pc_q35.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index b5922b44afa..c7bc8a2041f 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -393,7 +393,6 @@ static void pc_q35_8_1_machine

Re: [PATCH] pc_q35: remove unnecessary m->alias assignment

On Mon, 25 Mar 2024 at 13:59, Paolo Bonzini wrote: > > The assignment is already inherited from pc-q35-8.2. -s Missing signed-off-by and a stray "-s" in the commit message :-) -- PMM

Re: [PATCH] pc_q35: remove unnecessary m->alias assignment

On Mon, Mar 25, 2024 at 3:02 PM Peter Maydell wrote: > > On Mon, 25 Mar 2024 at 13:59, Paolo Bonzini wrote: > > > > The assignment is already inherited from pc-q35-8.2. -s > > Missing signed-off-by and a stray "-s" in the commit message :-) You can probably guess that the two are related. :) Pa

Re: [PATCH] misc/pca955*: Move models under hw/gpio

On 25/03/2024 14.48, Cédric Le Goater wrote: The PCA9552 and PCA9554 devices are both I2C GPIO controllers and the PCA9552 also can drive LEDs. Do all the necessary adjustments to move the models under hw/gpio. Cc: Glenn Miles Signed-off-by: Cédric Le Goater --- Reviewed-by: Thomas Huth

[PATCH v2] pc_q35: remove unnecessary m->alias assignment

The assignment is already inherited from pc-q35-8.2. Signed-off-by: Paolo Bonzini --- hw/i386/pc_q35.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index b5922b44afa..c7bc8a2041f 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -393,7 +393,6 @@ st

[PULL 1/9] .travis.yml: Shorten the runtime of the problematic jobs

The "[s390x] GCC (other-system)" and the "[s390x] GCC check-tcg" jobs are hitting the 50 minutes timeout in Travis quite frequently since a while. To fix it, we've got to drop a lot of the targets from the target list in the jobs to make them work again. With regards to the "check-tcg" test, we c

[PULL 9/9] tests/tcg/s390x: Test TEST AND SET

From: Ilya Leoshkevich Add a small test to prevent regressions. Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson Message-ID: <20240318202722.20675-2-...@linux.ibm.com> Signed-off-by: Thomas Huth --- tests/tcg/s390x/ts.c| 35 + tests/t

[PULL 0/9] Patches for QEMU 9.0-rc1

The following changes since commit 853546f8128476eefb701d4a55b2781bb3a46faa: Merge tag 'pull-loongarch-20240322' of https://gitlab.com/gaosong/qemu into staging (2024-03-22 10:59:57 +) are available in the Git repository at: https://gitlab.com/thuth/qemu.git tags/pull-request-2024-03-25

[PULL 6/9] misc/pca955*: Move models under hw/gpio

From: Cédric Le Goater The PCA9552 and PCA9554 devices are both I2C GPIO controllers and the PCA9552 also can drive LEDs. Do all the necessary adjustments to move the models under hw/gpio. Cc: Glenn Miles Signed-off-by: Cédric Le Goater Message-ID: <20240325134833.1484265-1-...@redhat.com> Rev

[PULL 2/9] .travis.yml: Remove the unused xfslib-dev package

Drop the "xfslibs-dev" package which should not be necessary anymore since commit a5730b8bd3 ("block/file-posix: Simplify the XFS_IOC_DIOINFO handling"). Message-ID: <20240320104144.823425-3-th...@redhat.com> Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Huth --- .travis.yml | 1 -

[PULL 7/9] libqos/virtio.c: Correct 'flags' reading in qvirtqueue_kick

From: Zheyu Ma In qvirtqueue_kick(), the 'flags' were previously being incorrectly read from vq->avail instead of the correct vq->used location. This update ensures 'flags' are read from the correct location as per the virtio standard. Signed-off-by: Zheyu Ma Reviewed-by: Philippe Mathieu-Daudé

[PULL 8/9] target/s390x: Use mutable temporary value for op_ts

From: Ido Plat Otherwise TCG would assume the register that holds t1 would be constant and reuse whenever it needs the value within it. Cc: qemu-sta...@nongnu.org Fixes: f1ea739bd598 ("target/s390x: Use tcg_constant_* in local contexts") Reviewed-by: Ilya Leoshkevich Reviewed-by: Richard Hender

Re: Let's close member documentation gaps

On 25.03.24 10:36, Markus Armbruster wrote: If you're cc'ed, I have a bit of doc work for you. Search for your name to find it. The QAPI generator forces you to document your stuff. Except for commands, events, enum and object types listed in pragma documentation-exceptions, the generator sile

[PULL 4/9] aspeed: Make the ast2600-a3 SoC not user creatable

From: Cédric Le Goater Aspeed SoCs are complex devices that can not be specified on the command line. Fix that to avoid QEMU aborts. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2227 Fixes: f25c0ae1079d ("aspeed/soc: Add AST2600 support") Reported-by: Thomas Huth Signed-off-by: Cédri

[PULL 3/9] hw/microblaze: Do not allow xlnx-zynqmp-pmu-soc to be created by the user

Using xlnx-zynqmp-pmu-soc on the command line causes QEMU to crash: ./qemu-system-microblazeel -M petalogix-ml605 -device xlnx-zynqmp-pmu-soc ** ERROR:tcg/tcg.c:813:tcg_register_thread: assertion failed: (n < tcg_max_ctxs) Bail out! Aborted (core dumped) Mark the device with "user_creatable

[PATCH for-9.1 v5 0/3] kvm: add support for guest physical bits

The adjustments based on Gerd' v4 patches are small, the main change is the introduction of ABI-compatible machine types for 9.0 so that the new property is only available on 9.1. Gerd Hoffmann (2): target/i386: add guest-phys-bits cpu property kvm: add support for guest physical bits Paolo B

[PULL 5/9] aspeed: Make the ast1030-a1 SoC not user creatable

From: Cédric Le Goater Aspeed SoCs are complex devices that can not be specified on the command line. Fix that to avoid QEMU aborts. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2227 Fixes: 356b230ed138 ("aspeed/soc : Add AST1030 support") Reported-by: Thomas Huth Signed-off-by: Cédr

Re: Let's close member documentation gaps

On 25.03.24 15:13, David Hildenbrand wrote: On 25.03.24 10:36, Markus Armbruster wrote: If you're cc'ed, I have a bit of doc work for you. Search for your name to find it. The QAPI generator forces you to document your stuff. Except for commands, events, enum and object types listed in pragma

[PATCH for-9.1 v5 2/3] target/i386: add guest-phys-bits cpu property

From: Gerd Hoffmann Allows to set guest-phys-bits (cpuid leaf 8008, eax[23:16]) via -cpu $model,guest-phys-bits=$nr. Signed-off-by: Gerd Hoffmann Message-ID: <20240318155336.156197-3-kra...@redhat.com> Signed-off-by: Paolo Bonzini --- v4->v5: - move here all non-KVM parts - add compat prop

[PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1

Add 9.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. Cc: Cornelia Huck Cc: Thomas Huth Cc: Harsh Prateek Bora Cc: Gavin Shan Signed-off-by: Paolo Bonzini --- include/hw/boards.h| 3 +++ include/hw/i386/pc.h | 3 +++ hw/arm/virt.c | 11 +-- hw/core/m

[PATCH for-9.1 v5 3/3] kvm: add support for guest physical bits

From: Gerd Hoffmann Query kvm for supported guest physical address bits, in cpuid function 8008, eax[23:16]. Usually this is identical to host physical address bits. With NPT or EPT being used this might be restricted to 48 (max 4-level paging address space size) even if the host cpu suppor

Re: [PATCH 04/10] pnv/phb4: Implement read-only and write-only bits of registers

On 3/21/24 11:04, Saif Abrar wrote: SW cannot write the read-only(RO) bits of a register and write-only(WO) bits of a register return 0 when read. Added ro_mask[] for each register that defines which bits in that register are RO. When writing to a register, the RO-bits are not updated. When rea

[PULL v2 0/7] target-arm queue

2 10:59:57 +) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240325-1 for you to fetch changes up to fe3e38390126c2202292911c49d46fc7ee4a163a: tests/qtest/libqtest.c: Check for g_setenv() failure (2024-03-25 14:17

Re: [RFC PATCH 07/12] hw/arm/smmu-common: Support nested translation

Hi Mostafa, On 25/03/2024 10:14, Mostafa Saleh wrote: @@ -524,7 +551,7 @@ static int smmu_ptw_64_s2(SMMUTransCfg *cfg, tlbe->entry.translated_addr = gpa; tlbe->entry.iova = ipa & ~mask; tlbe->entry.addr_mask = mask; -tlbe->entry.perm = s2ap; +tlbe->p

Re: Let's close member documentation gaps

David Hildenbrand writes: > On 25.03.24 15:13, David Hildenbrand wrote: >> On 25.03.24 10:36, Markus Armbruster wrote: >>> If you're cc'ed, I have a bit of doc work for you. Search for your >>> name to find it. >>> >>> The QAPI generator forces you to document your stuff. Except for >>> command

Re: [PATCH 09/10] hw/pci: Set write-mask bits for PCIE Link-Control-2 register

On Mon, Mar 25 2024, Cédric Le Goater wrote: > On 3/21/24 11:04, Saif Abrar wrote: >> PHB updates the register PCIE Link-Control-2. >> Set the write-mask bits for TLS, ENTER_COMP, TX_MARGIN, >> HASD, MOD_COMP, COMP_SOS and COMP_P_DE. > > > You should resend this patch independently of the PowerNV

Re: [PATCH-for-9.0? v2 2/8] hw/clock: Pass optional &bool argument to clock_set()

On 25/3/24 14:47, Peter Maydell wrote: On Mon, 25 Mar 2024 at 13:33, Philippe Mathieu-Daudé wrote: Currently clock_set() returns whether the clock has been changed or not. In order to combine this information with other clock calls, pass an optional boolean and do not return anything. The sin

[PATCH] edk2: get version + date from git submodule

Turned out hard-coding version and date in the Makefile wasn't a bright idea. Updating it on edk2 updates is easily forgotten. Fetch the info from git instead. Signed-off-by: Gerd Hoffmann --- roms/Makefile | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/roms/Makefil

Re: [PATCH-for-9.0? v2 2/8] hw/clock: Pass optional &bool argument to clock_set()

On Mon, 25 Mar 2024 at 14:39, Philippe Mathieu-Daudé wrote: > > On 25/3/24 14:47, Peter Maydell wrote: > > On Mon, 25 Mar 2024 at 13:33, Philippe Mathieu-Daudé > > wrote: > >> > >> Currently clock_set() returns whether the clock has > >> been changed or not. In order to combine this information

[PATCH v5 1/2] kvm: add support for guest physical bits

Query kvm for supported guest physical address bits, in cpuid function 8008, eax[23:16]. Usually this is identical to host physical address bits. With NPT or EPT being used this might be restricted to 48 (max 4-level paging address space size) even if the host cpu supports more physical addre

[PATCH v5 2/2] target/i386: add guest-phys-bits cpu property

Allows to set guest-phys-bits (cpuid leaf 8008, eax[23:16]) via -cpu $model,guest-phys-bits=$nr. Signed-off-by: Gerd Hoffmann --- target/i386/cpu.c | 13 + 1 file changed, 13 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 3b7bd506baf1..79bea83b7b1c 100644

[PATCH v5 0/2] kvm: add support for guest physical bits

The matching kernel bits are here: https://lore.kernel.org/kvm/20240313125844.912415-1-kra...@redhat.com/T/ ovmf test patches are here: https://github.com/kraxel/edk2/commits/devel/guest-phys-bits/ Gerd Hoffmann (2): kvm: add support for guest physical bits target/i386: add guest-phys-bits cp

Re: [PATCH] edk2: get version + date from git submodule

On Mon, 25 Mar 2024 at 14:45, Gerd Hoffmann wrote: > > Turned out hard-coding version and date in the Makefile wasn't a bright > idea. Updating it on edk2 updates is easily forgotten. Fetch the info > from git instead. > > Signed-off-by: Gerd Hoffmann > --- > roms/Makefile | 7 +-- > 1 fil

Re: [PATCH] misc/pca955*: Move models under hw/gpio

Thanks for doing this, Cédric! Reviewed-by: Glenn Miles -Glenn On Mon, 2024-03-25 at 14:48 +0100, Cédric Le Goater wrote: > The PCA9552 and PCA9554 devices are both I2C GPIO controllers and the > PCA9552 also can drive LEDs. Do all the necessary adjustments to move > the models under hw/gpio. >

Re: [PATCH-for-9.0? v2 2/8] hw/clock: Pass optional &bool argument to clock_set()

On 25/3/24 15:44, Peter Maydell wrote: On Mon, 25 Mar 2024 at 14:39, Philippe Mathieu-Daudé wrote: On 25/3/24 14:47, Peter Maydell wrote: On Mon, 25 Mar 2024 at 13:33, Philippe Mathieu-Daudé wrote: Currently clock_set() returns whether the clock has been changed or not. In order to combine

[PATCH v1] qapi: document parameters of query-cpu-model-* QAPI commands

Let's document the parameters of these commands, so we can remove them from the "documentation-exceptions" list. While at it, extend the "Returns:" documentation as well, fixing a wrong use of CpuModelBaselineInfo vs. CpuModelCompareInfo for query-cpu-model-comparison. Cc: Markus Armbruster Cc:

Re: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1

On Mon, Mar 25 2024, Paolo Bonzini wrote: > Add 9.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. > > Cc: Cornelia Huck > Cc: Thomas Huth > Cc: Harsh Prateek Bora > Cc: Gavin Shan > Signed-off-by: Paolo Bonzini > --- > include/hw/boards.h| 3 +++ > include/hw/i386/pc.h |

Re: [PATCH-for-9.0? v2 2/8] hw/clock: Pass optional &bool argument to clock_set()

On Mon, 25 Mar 2024 at 15:01, Philippe Mathieu-Daudé wrote: > > On 25/3/24 15:44, Peter Maydell wrote: > > On Mon, 25 Mar 2024 at 14:39, Philippe Mathieu-Daudé > > wrote: > >> > >> On 25/3/24 14:47, Peter Maydell wrote: > >>> On Mon, 25 Mar 2024 at 13:33, Philippe Mathieu-Daudé > >>> wrote: >

Re: [PATCH trivial for-9.0] hw/i386/fw_cfg.c: fix non-legacy smbios build

25.03.2024 16:40, Philippe Mathieu-Daudé пишет: Hi Michael, On 25/3/24 14:09, Michael Tokarev wrote: When building qemu with smbios but not legacy mode (eg minimal microvm build), link fails with:    hw/i386/fw_cfg.c:74: undefined reference to `smbios_get_table_legacy' This is because fw_cfg

Re: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1

On 25/03/2024 15.14, Paolo Bonzini wrote: Add 9.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. Cc: Cornelia Huck Cc: Thomas Huth Cc: Harsh Prateek Bora Cc: Gavin Shan Signed-off-by: Paolo Bonzini --- include/hw/boards.h| 3 +++ include/hw/i386/pc.h | 3 +++ hw/arm/

Re: [PATCH-for-9.0? v2 2/8] hw/clock: Pass optional &bool argument to clock_set()

On 25/3/24 16:03, Peter Maydell wrote: On Mon, 25 Mar 2024 at 15:01, Philippe Mathieu-Daudé wrote: On 25/3/24 15:44, Peter Maydell wrote: On Mon, 25 Mar 2024 at 14:39, Philippe Mathieu-Daudé wrote: On 25/3/24 14:47, Peter Maydell wrote: On Mon, 25 Mar 2024 at 13:33, Philippe Mathieu-Daudé

Re: [PATCH trivial for-9.0] hw/i386/fw_cfg.c: fix non-legacy smbios build

On Mon, 25 Mar 2024 16:09:20 +0300 Michael Tokarev wrote: > When building qemu with smbios but not legacy mode (eg minimal microvm build), > link fails with: > > hw/i386/fw_cfg.c:74: undefined reference to `smbios_get_table_legacy' > > This is because fw_cfg interface can call this function i

Re: [PATCH-for-9.0? v2 2/8] hw/clock: Pass optional &bool argument to clock_set()

On 25/3/24 16:11, Philippe Mathieu-Daudé wrote: On 25/3/24 16:03, Peter Maydell wrote: On Mon, 25 Mar 2024 at 15:01, Philippe Mathieu-Daudé wrote: On 25/3/24 15:44, Peter Maydell wrote: On Mon, 25 Mar 2024 at 14:39, Philippe Mathieu-Daudé wrote: On 25/3/24 14:47, Peter Maydell wrote: On M

[PATCH-for-9.0 v3 3/3] hw/misc/stm32l4x5_rcc: Propagate period when enabling a clock

From: Arnaud Minier The "clock_set_mul_div" function doesn't propagate the clock period to the children if it is changed (e.g. by enabling/disabling a clock multiplexer). This was overlooked during the implementation due to late changes. This commit propagates the change if the multiplier or div

[PATCH-for-9.0 v3 0/3] hw/clock: Propagate clock changes when STM32L4X5 MUX is updated

Since v2: - Simpler approach Since v1: - Rework API to only propagate when both clock_set and clock_set_mul_div modified the clock params (Peter & Luc). - Use that in zynq_slcr. Per https://www.qemu.org/docs/master/devel/clocks.html#clock-multiplier-and-divider-settings: Note that clock_s

[PATCH-for-9.0 v3 1/3] hw/clock: Let clock_set_mul_div() return a boolean value

Let clock_set_mul_div() return a boolean value whether the clock has been updated or not, similarly to clock_set(). Return early when clock_set_mul_div() is called with same mul/div values the clock has. Acked-by: Luc Michel Signed-off-by: Philippe Mathieu-Daudé --- docs/devel/clocks.rst | 4 +

[PATCH-for-9.0 v3 2/3] hw/misc/stm32l4x5_rcc: Inline clock_update() in clock_mux_update()

Trivial inlining in preliminary patch to make the next one easier to review. Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/stm32l4x5_rcc.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index bc2d63528b..49b90afdf0

Re: [PATCH trivial for-9.0] hw/i386/fw_cfg.c: fix non-legacy smbios build

On Mon, 25 Mar 2024 16:09:20 +0300 Michael Tokarev wrote: > When building qemu with smbios but not legacy mode (eg minimal microvm build), > link fails with: > > hw/i386/fw_cfg.c:74: undefined reference to `smbios_get_table_legacy' > > This is because fw_cfg interface can call this function i

[PATCH 3/4] linux-user: Fix shmat(NULL) for h != g

In the h != g && shmaddr == NULL && !reserved_va case, target_shmat() incorrectly mmap()s the initial anonymous range with MAP_FIXED_NOREPLACE, even though the earlier mmap_find_vma() has already reserved the respective address range. Fix by using MAP_FIXED when "mapped", which is set after mmap_f

[PATCH 4/4] tests/tcg: Test shmat(NULL)

Add a small test to prevent regressions. Signed-off-by: Ilya Leoshkevich --- tests/tcg/multiarch/linux/linux-shmat-null.c | 38 1 file changed, 38 insertions(+) create mode 100644 tests/tcg/multiarch/linux/linux-shmat-null.c diff --git a/tests/tcg/multiarch/linux/linux-shm

[PATCH 1/4] linux-user: Fix semctl() strace

The indices of arguments used with semctl() are all off-by-1, because arg1 is the ipc() command. Fix them. While at it, reuse print_semctl(). New output (for a small test program): 3540333 semctl(999,888,SEM_INFO,0x7fe5051ee9a0) = -1 errno=14 (Bad address) Fixes: 7ccfb2eb5f9d ("Fix warn

[PATCH 2/4] linux-user: Fix shmat() strace

The indices of arguments passed to print_shmat() are all off-by-1, because arg1 is the ipc() command. Fix them. New output for linux-shmat-maps test: 3501769 shmat(4784214,0x0080,SHM_RND) = 0 Fixes: 9f7c97324c27 ("linux-user: Add strace for shmat") Signed-off-by: Ilya Leoshkevich

[PATCH 0/4] linux-user: Fix shmat(NULL) for h != g

Hi, I noticed that while shmat() now works with /proc/self/maps, shmat(NULL) got broken. This series fixes that along with two related strace issues, and adds a test. Best regards, Ilya Ilya Leoshkevich (4): linux-user: Fix semctl() strace linux-user: Fix shmat() strace linux-user: Fix shm

Re: [PATCH v1] qapi: document parameters of query-cpu-model-* QAPI commands

David Hildenbrand writes: > Let's document the parameters of these commands, so we can remove them > from the "documentation-exceptions" list. > > While at it, extend the "Returns:" documentation as well, fixing a wrong > use of CpuModelBaselineInfo vs. CpuModelCompareInfo for > query-cpu-model-c

Re: [PATCH] qapi: document InputMultiTouchType

Squashing in diff --git a/qapi/pragma.json b/qapi/pragma.json index 6929ab776e..92715d22b3 100644 --- a/qapi/pragma.json +++ b/qapi/pragma.json @@ -62,8 +62,6 @@ 'ImageInfoSpecificKind', 'InputAxis', 'InputButton', -'InputMultiTouchEvent', -'InputMultiTou

[PATCH] tests/qemu-iotests: Test 157 and 227 require virtio-blk

Tests 157 and 227 use the virtio-blk device, so we have to mark these tests accordingly to be skipped if this devices is not available (e.g. when running the tests with qemu-system-avr only). Signed-off-by: Thomas Huth --- tests/qemu-iotests/157 | 2 ++ tests/qemu-iotests/227 | 2 ++ 2 files cha

Re: [PATCH] qapi: document leftover members in qapi/run-state.json

Squashing in diff --git a/qapi/pragma.json b/qapi/pragma.json index 92715d22b3..1a302981c1 100644 --- a/qapi/pragma.json +++ b/qapi/pragma.json @@ -57,7 +57,6 @@ 'DummyForceArrays', 'DummyVirtioForceArrays', 'GrabToggleKeys', -'GuestPanicInformationHyperV',

Re: [PATCH] qapi: document leftover members in qapi/stats.json

Squashing in diff --git a/qapi/pragma.json b/qapi/pragma.json index 1a302981c1..99e4052ab3 100644 --- a/qapi/pragma.json +++ b/qapi/pragma.json @@ -75,8 +75,6 @@ 'Qcow2OverlapCheckFlags', 'RbdAuthMode', 'RbdImageEncryptionFormat', -'StatsFilter', -'StatsV

Re: [PATCH v1] coroutine: avoid inserting duplicate coroutine to co_queue_wakeup

On Mon, Mar 25, 2024 at 05:18:50PM +0800, zhuyangyang wrote: > If g_main_loop_run()/aio_poll() is called in the coroutine context, > the pending coroutine may be woken up repeatedly, and the co_queue_wakeup > may be disordered. aio_poll() must not be called from coroutine context: bool no_corou

Re: [PATCH] qapi/block-core: improve Qcow2OverlapCheckFlags documentation

Squashing in diff --git a/qapi/pragma.json b/qapi/pragma.json index 99e4052ab3..9e28de1721 100644 --- a/qapi/pragma.json +++ b/qapi/pragma.json @@ -72,7 +72,6 @@ 'QCryptoAkCipherKeyType', 'QCryptodevBackendServiceType', 'QKeyCode', -'Qcow2OverlapCheckFlags',

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