v3 -> v4:
* Patch 1/7:
- Replaced "since 8.3" with "since 9.0" as we're now at v9.0.0-rc0;
- Renamed the field to 'total-bytes-privileged';
- Got rid of the implementation details in the docs;
* Patch 6/7: added g_autoptr macro to local error declaration.
v3: https://lists.nongnu.o
Since the commit 25b5ff1a86 ("qga: add mountpoint usage info to
GuestFilesystemInfo") we have 2 values reported in guest-get-fsinfo:
used = (f_blocks - f_bfree), total = (f_blocks - f_bfree + f_bavail) as
returned by statvfs(3). While on Windows guests that's all we can get
with GetDiskFreeSpaceEx
Also remove the G_GNUC_UNUSED attribute added in the previous commit from
the helper.
Signed-off-by: Andrey Drobyshev
Reviewed-by: Daniel P. Berrangé
---
qga/commands-posix.c | 39 ++-
1 file changed, 6 insertions(+), 33 deletions(-)
diff --git a/qga/command
> -Original Message-
> From: Peter Xu
> Sent: Wednesday, March 20, 2024 11:35 PM
> To: Liu, Yuan1
> Cc: Daniel P. Berrangé ; faro...@suse.de; qemu-
> de...@nongnu.org; hao.xi...@bytedance.com; bryan.zh...@bytedance.com; Zou,
> Nanhai
> Subject: Re: [PATCH v5 5/7] migration/multifd: imple
On 3/20/24 09:39, Michael Roth wrote:
Some subsystems like VFIO might disable ram block discard for
uncoordinated cases. Since kvm_convert_memory()/guest_memfd don't
implement a RamDiscardManager handler to convey discard operations to
various listeners like VFIO. > Because of this, sequences lik
> -Original Message-
> From: Daniel P. Berrangé
> Sent: Wednesday, March 20, 2024 11:40 PM
> To: Liu, Yuan1
> Cc: pet...@redhat.com; faro...@suse.de; qemu-devel@nongnu.org;
> hao.xi...@bytedance.com; bryan.zh...@bytedance.com; Zou, Nanhai
>
> Subject: Re: [PATCH v5 7/7] tests/migration-t
On Mon, Mar 18, 2024 at 8:47 PM Sahil wrote:
>
> Hi,
>
> I was reading the "Virtqueues and virtio ring: How the data travels"
> article [1]. There are a few things that I have not understood in the
> "avail rings" section.
>
> Q1.
> Step 2 in the "Process to make a buffer available" diagram depict
On 3/20/24 09:39, Michael Roth wrote:
@@ -1842,6 +1842,17 @@ static void ram_block_add(RAMBlock *new_block, Error
**errp)
}
}
+if (kvm_enabled() && (new_block->flags & RAM_GUEST_MEMFD)) {
+assert(new_block->guest_memfd < 0);
+
+new_block->guest_memfd = kvm
'info tlb' and 'info mem' commands don't scale in heterogeneous
emulation. They will be reworked after the next release, hidden
behind the 'info mmu' command. It is not too late to deprecate
commands, so add the 'info mmu' command as wrapper to the other
ones, but already deprecate them.
Philippe
'info tlb' has been replaced by 'info mmu -t', and
'info mem' by 'info mmu -m'.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecated.rst| 10 ++
include/monitor/hmp-target.h | 2 ++
monitor/hmp-cmds-target.c| 20
target/i386/monitor.c| 4
Introduce the 'info mmu' command. For now it only
forward to the 'info tlb' and 'info mem' commands,
which will be deprecated.
Signed-off-by: Philippe Mathieu-Daudé
---
include/monitor/hmp-target.h | 1 +
monitor/hmp-cmds-target.c| 37
hmp-commands-info.
CSR hvictl (Hypervisor Virtual Interrupt Control) provides further flexibility
for injecting interrupts into VS level in situations not fully supported by the
facilities described thus far, but only with more active involvement of the
hypervisor.
A hypervisor must use hvictl for any of the follow
From: Vadim Shakirov
In the AIA specification in the paragraph "Virtual interrupts for VS level"
it is indicated for interrupts 13-63: if the bit in hideleg is enabled,
then the corresponding vsip and vsie bits are aliases to sip and sie
Signed-off-by: Vadim Shakirov
Reviewed-by: Alistair Franc
On 20/3/24 14:23, Peter Maydell wrote:
On Tue, 20 Feb 2024 at 15:09, Philippe Mathieu-Daudé wrote:
Only s390x was using the 'cpu_index' argument, but since the
previous commit it isn't anymore (it use the first cpu).
Since this argument is now completely unused, remove it. Have
the callback re
On Wed, 20 Mar 2024 at 16:40, Philippe Mathieu-Daudé wrote:
>
> 'info tlb' and 'info mem' commands don't scale in heterogeneous
> emulation. They will be reworked after the next release, hidden
> behind the 'info mmu' command. It is not too late to deprecate
> commands, so add the 'info mmu' comma
Cc'ing Marc & Stefan for commit 1053587c3f ("libqos: Added EVENT_IDX
support").
On 20/3/24 10:04, Zheyu Ma wrote:
In qvirtqueue_kick(), the 'flags' were previously being incorrectly read from
vq->avail instead of the correct vq->used location. This update ensures 'flags'
are read from the corre
;
> are available in the Git repository at:
>
> https://gitlab.com/kraxel/qemu.git tags/edk2-20240320-pull-request
>
> for you to fetch changes up to 4a1babe58a1b3cd2c493ee6e0d774e70f62ad9c3:
>
> update edk2 binaries for arm, risc-v a
On Wed, 20 Mar 2024 at 10:32, Paolo Bonzini wrote:
>
> The following changes since commit ba49d760eb04630e7b15f423ebecf6c871b8f77b:
>
> Merge tag 'pull-maintainer-final-130324-1' of
> https://gitlab.com/stsquad/qemu into staging (2024-03-13 15:12:14 +)
>
> are available in the Git repositor
On Wed, 20 Mar 2024 at 13:54, wrote:
>
> From: Marc-André Lureau
>
> The following changes since commit c62d54d0a8067ffb3d5b909276f7296d7df33fa7:
>
> Update version for v9.0.0-rc0 release (2024-03-19 19:13:52 +)
>
> are available in the Git repository at:
>
> https://gitlab.com/marcandre.
+Alex/Daniel
On 20/3/24 17:53, Peter Maydell wrote:
On Wed, 20 Mar 2024 at 16:40, Philippe Mathieu-Daudé wrote:
'info tlb' and 'info mem' commands don't scale in heterogeneous
emulation. They will be reworked after the next release, hidden
behind the 'info mmu' command. It is not too late to
On Wed, Mar 20, 2024 at 10:59 AM Paolo Bonzini wrote:
> I will now focus on reviewing patches 6-20. This way we can prepare a
> common tree for SEV_INIT2/SNP/TDX, for both vendors to build upon.
Ok, the attachment is the delta that I have. The only major change is
requiring discard (thus effecti
On 18/03/24 8:28 pm, Alex Williamson wrote:
External email: Use caution opening links or attachments
On Fri, 15 Mar 2024 23:22:22 +0530
Vinayak Kale wrote:
On 11/03/24 8:32 pm, Alex Williamson wrote:
External email: Use caution opening links or attachments
On Mon, 11 Mar 2024 17:45:19
On Wed, 20 Mar 2024 at 17:06, Philippe Mathieu-Daudé wrote:
>
> +Alex/Daniel
>
> On 20/3/24 17:53, Peter Maydell wrote:
> > On Wed, 20 Mar 2024 at 16:40, Philippe Mathieu-Daudé
> > wrote:
> >>
> >> 'info tlb' and 'info mem' commands don't scale in heterogeneous
> >> emulation. They will be rewor
From: Alexey Baturo
Zjpm v0.8 is almost frozen and it's much simplier compared to the existing one:
The newer version doesn't allow to specify custom mask or base for masking.
Instead it allows only certain options for masking top bits.
Signed-off-by: Alexey Baturo
Acked-by: Alistair Francis
From: Alexey Baturo
Hi,
Rebasing patches on current qemu branch and resubmitting them.
Thanks.
[v7]:
I'm terribly sorry, but previous rebase went wrong and somehow I missed it.
This time I double-checked rebased version.
This patch series is properly rebased on
https://github.com/alistair23/q
From: Alexey Baturo
Signed-off-by: Alexey Baturo
Reviewed-by: Alistair Francis
---
target/riscv/cpu.h | 8
target/riscv/cpu_bits.h | 3 +++
target/riscv/cpu_cfg.h | 3 +++
target/riscv/csr.c | 11 +++
target/riscv/machine.c | 10 +++---
target/riscv/pmp.c
From: Alexey Baturo
Signed-off-by: Alexey Baturo
Reviewed-by: Alistair Francis
---
target/riscv/cpu.h| 4 +++
target/riscv/cpu_helper.c | 58 +++
2 files changed, 62 insertions(+)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index b694cc62
From: Alexey Baturo
Signed-off-by: Alexey Baturo
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/translate.c | 22 --
target/riscv/vector_helper.c | 13 +
2 files changed, 29 insertions(+), 6 deletions(-)
diff --git a/target/
From: Alexey Baturo
Signed-off-by: Alexey Baturo
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/cpu.h| 3 +++
target/riscv/cpu_helper.c | 3 +++
target/riscv/translate.c | 5 +
3 files changed, 11 insertions(+)
diff --git a/target/riscv/cpu.h b/ta
On Mon, Mar 18, 2024 at 04:12:14PM +0100, Anthony Harivel wrote:
> The function qio_channel_get_peercred() returns a pointer to the
> credentials of the peer process connected to this socket.
>
> This credentials structure is defined in as follows:
>
> struct ucred {
> pid_t pid;/* Pro
From: Alexey Baturo
Signed-off-by: Alexey Baturo
Reviewed-by: Alistair Francis
---
target/riscv/cpu.c | 8
1 file changed, 8 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 73c69f3d0a..9e3bf6c5c5 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1
Need to convert mmu_idx to privilege mode for PMP function.
Signed-off-by: Irina Ryapolova
---
target/riscv/cpu_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index ce7322011d..fc090d729a 100644
--- a/target/risc
On Wed, Mar 20, 2024 at 05:15:06PM +0100, Cédric Le Goater wrote:
> Sure, or I will in a v6. Markus had a comment on 8/14.
Yeah, I can handle both if they're the only ones. Thanks,
--
Peter Xu
On Wed, 20 Mar 2024 at 09:10, Zheyu Ma wrote:
>
> In qvirtqueue_kick(), the 'flags' were previously being incorrectly read from
> vq->avail instead of the correct vq->used location. This update ensures
> 'flags'
> are read from the correct location as per the virtio standard.
>
> Signed-off-by: Z
On Wed, 2024-01-17 at 15:58 +0800, pet...@redhat.com wrote:
> From: Peter Xu
>
> When the migration frameworks fetches the exact pending sizes, it means
> this check:
>
> remaining_size < s->threshold_size
>
> Must have been done already, actually at migration_iteration_run():
>
> if (mu
On Wed, Mar 20, 2024 at 03:39:36AM -0500,
Michael Roth wrote:
> From: Brijesh Singh
>
> A recent version of OVMF expanded the reset vector GUID list to add
> SEV-specific metadata GUID. The SEV metadata describes the reserved
> memory regions such as the secrets and CPUID page used during the S
I cc'ed Juan, but it looks like he is no longer with Redhat.
On Wed, Mar 20, 2024 at 03:39:44AM -0500,
Michael Roth wrote:
> TODO: make this SNP-specific if TDX disables legacy ROMs in general
TDX disables pc.rom, not disable isa-bios. IIRC, TDX doesn't need pc pflash.
Xiaoyao can chime in.
Thanks,
>
> Current SNP guest kernels will attempt to access t
Daniel P. Berrangé pointed out that the coroutine
pool size heuristic is very conservative. Instead of halving
max_map_count, he suggested reserving 5,000 mappings for non-coroutine
users based on observations of guests he has access to.
Fixes: 86a637e48104 ("coroutine: cap per-thread local pool
From: Felipe Balbi
Hi all,
These two patches add support for STM32G0 family and nucleo-g071rb
board. Patches have been tested with minimal embedded rust examples.
Felipe Balbi (2):
hw/arm: Add support for stm32g000 SoC family
hw/arm: Add nucleo-g071rb board
hw/arm/Kconfig
From: Felipe Balbi
Minimal support with USARTs and SPIs working. This SoC will be used to
create and nucleo-g071rb board.
Signed-off-by: Felipe Balbi
---
hw/arm/Kconfig | 6 +
hw/arm/meson.build | 1 +
hw/arm/stm32g000_soc.c | 246 +++
From: Felipe Balbi
This board is based around STM32G071RB SoC, a Cortex-M0 based
device. More information can be found at:
https://www.st.com/en/product/nucleo-g071rb.html
Signed-off-by: Felipe Balbi
---
hw/arm/Kconfig | 6
hw/arm/meson.build | 1 +
hw/arm/nucleo-g071rb.c |
On Wed, Mar 20, 2024 at 06:51:26PM +0100, Nina Schoetterl-Glausch wrote:
> On Wed, 2024-01-17 at 15:58 +0800, pet...@redhat.com wrote:
> > From: Peter Xu
> >
> > When the migration frameworks fetches the exact pending sizes, it means
> > this check:
> >
> > remaining_size < s->threshold_size
>
Philippe Mathieu-Daudé writes:
> On 20/3/24 14:23, Peter Maydell wrote:
>> On Tue, 20 Feb 2024 at 15:09, Philippe Mathieu-Daudé
>> wrote:
>>>
>>> Only s390x was using the 'cpu_index' argument, but since the
>>> previous commit it isn't anymore (it use the first cpu).
>>> Since this argument is
Felipe Balbi writes:
> +qdev_prop_set_uint8(armv7m, "num-prio-bits", 4);
Hi Felipe.
This should be 2, not 4. From RM0454 section 11.1 on page 250: "4 programmable
priority levels (2 bits of interrupt priority are used)".
Sam
--
Samuel Tardieu
On Wed, 2024-03-20 at 14:57 -0400, Peter Xu wrote:
> On Wed, Mar 20, 2024 at 06:51:26PM +0100, Nina Schoetterl-Glausch wrote:
> > On Wed, 2024-01-17 at 15:58 +0800, pet...@redhat.com wrote:
> > > From: Peter Xu
> > >
> > > When the migration frameworks fetches the exact pending sizes, it means
>
On Wed, 20 Mar 2024 at 19:05, Markus Armbruster wrote:
>
> Philippe Mathieu-Daudé writes:
>
> > On 20/3/24 14:23, Peter Maydell wrote:
> >> On Tue, 20 Feb 2024 at 15:09, Philippe Mathieu-Daudé
> >> wrote:
> >>>
> >>> Only s390x was using the 'cpu_index' argument, but since the
> >>> previous co
On Wed, Mar 20, 2024 at 08:21:30PM +0100, Nina Schoetterl-Glausch wrote:
> On Wed, 2024-03-20 at 14:57 -0400, Peter Xu wrote:
> > On Wed, Mar 20, 2024 at 06:51:26PM +0100, Nina Schoetterl-Glausch wrote:
> > > On Wed, 2024-01-17 at 15:58 +0800, pet...@redhat.com wrote:
> > > > From: Peter Xu
> > >
On Wed, Mar 20, 2024 at 10:37:14AM +0100, David Hildenbrand wrote:
> On 20.03.24 09:39, Michael Roth wrote:
> > From: Xiaoyao Li
> >
> > When memory page is converted from private to shared, the original
> > private memory is back'ed by guest_memfd. Introduce
> > ram_block_discard_guest_memfd_ran
On Wed, Mar 20, 2024 at 05:26:00PM +0100, Paolo Bonzini wrote:
> On 3/20/24 09:39, Michael Roth wrote:
> > Some subsystems like VFIO might disable ram block discard for
> > uncoordinated cases. Since kvm_convert_memory()/guest_memfd don't
> > implement a RamDiscardManager handler to convey discard
On 20.03.24 18:38, Michael Roth wrote:
On Wed, Mar 20, 2024 at 10:37:14AM +0100, David Hildenbrand wrote:
On 20.03.24 09:39, Michael Roth wrote:
From: Xiaoyao Li
When memory page is converted from private to shared, the original
private memory is back'ed by guest_memfd. Introduce
ram_block_di
On 3/20/24 04:25, Max Chou wrote:
According v spec 18.4, only the vfwcvt.f.f.v and vfncvt.f.f.w
instructions will be affected by Zvfhmin extension.
And the vfwcvt.f.f.v and vfncvt.f.f.w instructions only support the
conversions of
* From 1*SEW(16/32) to 2*SEW(32/64)
* From 2*SEW(32/64) to 1*S
On 3/20/24 04:25, Max Chou wrote:
The require_scale_rvf function only checks the double width operator for
the vector floating point widen instructions, so most of the widen
checking functions need to add require_rvf for single width operator.
The vfwcvt.f.x.v and vfwcvt.f.xu.v instructions c
On 3/20/24 04:25, Max Chou wrote:
The opfv_narrow_check needs to check the single width float operator by
require_rvf.
Signed-off-by: Max Chou
---
Reviewed-by: Daniel Henrique Barboza
target/riscv/insn_trans/trans_rvv.c.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/r
On 3/20/24 04:25, Max Chou wrote:
If the checking functions check both the single and double width
operators at the same time, then the single width operator checking
functions (require_rvf[min]) will check whether the SEW is 8.
Signed-off-by: Max Chou
---
Reviewed-by: Daniel Henrique Barb
On 3/20/24 14:28, Irina Ryapolova wrote:
Need to convert mmu_idx to privilege mode for PMP function.
Please add:
Fixes: b297129ae1 ("target/riscv: propagate PMP permission to TLB page")
Signed-off-by: Irina Ryapolova
---
Reviewed-by: Daniel Henrique Barboza
target/riscv/cpu_helpe
Minimal support with USARTs and SPIs working. This SoC will be used to
create and nucleo-g071rb board.
Signed-off-by: Felipe Balbi
---
Changes since v1:
- Convert tabs to spaces (checkpatch.pl)
- Correct lines longer than 80 characters (checkpatch.pl)
- Correct num-prio-bits (Samuel
This board is based around STM32G071RB SoC, a Cortex-M0 based
device. More information can be found at:
https://www.st.com/en/product/nucleo-g071rb.html
Signed-off-by: Felipe Balbi
---
Changes since v1:
- Convert tabs to spaces (checkpatch.pl)
MAINTAINERS| 6
hw/arm/Kco
Hi all,
These two patches add support for STM32G0 family and nucleo-g071rb
board. Patches have been tested with minimal embedded rust examples.
Changes since v1:
- Patch 1:
- Convert tabs to spaces (checkpatch.pl)
- Correct lines longer than 80 characters (checkpatch.pl)
- Correct
On 3/19/2024 8:25 PM, Jason Wang wrote:
On Tue, Mar 19, 2024 at 6:06 AM Si-Wei Liu wrote:
On 3/17/2024 8:20 PM, Jason Wang wrote:
On Sat, Mar 16, 2024 at 2:33 AM Si-Wei Liu wrote:
On 3/14/2024 8:50 PM, Jason Wang wrote:
On Fri, Mar 15, 2024 at 5:39 AM Si-Wei Liu wrote:
There could b
On Wed, Mar 20, 2024 at 04:23:01PM +, Liu, Yuan1 wrote:
> let me explain here, during the decompression operation of IAA, the
> decompressed data can be directly output to the virtual address of the
> guest memory by IAA hardware. It can avoid copying the decompressed data
> to guest memory by
On Wed, Mar 20, 2024 at 03:46:44PM -0400, Peter Xu wrote:
> On Wed, Mar 20, 2024 at 08:21:30PM +0100, Nina Schoetterl-Glausch wrote:
> > On Wed, 2024-03-20 at 14:57 -0400, Peter Xu wrote:
> > > On Wed, Mar 20, 2024 at 06:51:26PM +0100, Nina Schoetterl-Glausch wrote:
> > > > On Wed, 2024-01-17 at 15
From: Dongwon Kim
QemuDmaBuf struct is defined and primarily used by ui/console/gl so it is
better to handle its creation, initialization and access within ui/console
rather than within hw modules such as hw/display/virtio-gpu and
hw/vfio/display.
To achieve this, new methods for allocating, ini
From: Dongwon Kim
This commit introduces new methods within ui/console to handle the allocation,
initialization, and field retrieval of QemuDmaBuf. By isolating these
operations within ui/console, it enhances safety and encapsulation of
the struct.
Cc: Philippe Mathieu-Daudé
Cc: Marc-André Lure
From: Dongwon Kim
QemuDmaBuf is an abstraction of dmabuf specifically for ui/console usage.
To enhance safety and maintainability, it is needed to centralizes its
creation and initialization within ui/console using newly introduced methods.
Cc: Philippe Mathieu-Daudé
Cc: Marc-André Lureau
Cc:
From: Dongwon Kim
QemuDmaBuf is an abstraction of dmabuf specifically for ui/console usage.
To enhance safety and maintainability, it is needed to centralizes its
creation and initialization within ui/console using newly introduced methods.
Cc: Philippe Mathieu-Daudé
Cc: Marc-André Lureau
Cc:
On 3/21/2024 1:08 AM, Paolo Bonzini wrote:
On Wed, Mar 20, 2024 at 10:59 AM Paolo Bonzini wrote:
I will now focus on reviewing patches 6-20. This way we can prepare a
common tree for SEV_INIT2/SNP/TDX, for both vendors to build upon.
Ok, the attachment is the delta that I have. The only majo
On 3/19/2024 8:27 PM, Jason Wang wrote:
On Tue, Mar 19, 2024 at 6:16 AM Si-Wei Liu wrote:
On 3/17/2024 8:22 PM, Jason Wang wrote:
On Sat, Mar 16, 2024 at 2:45 AM Si-Wei Liu wrote:
On 3/14/2024 9:03 PM, Jason Wang wrote:
On Fri, Mar 15, 2024 at 5:39 AM Si-Wei Liu wrote:
On setups wit
Hi,
This patch doesn't apply in master or alistair/riscv-to-apply.next. Can you
please re-send?
Thanks,
Daniel
On 3/20/24 13:42, Irina Ryapolova wrote:
CSR hvictl (Hypervisor Virtual Interrupt Control) provides further flexibility
for injecting interrupts into VS level in situations not fu
From: Peter Xu
On current code base I can observe extremely high sync count during
precopy, as long as one enables postcopy-ram=on before switchover to
postcopy.
To provide some context of when we decide to do a full sync: we check
must_precopy (which implies "data must be sent during precopy ph
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On Wed, 20 Mar 2024 at 17:06, Philippe Mathieu-Daudé
> wrote:
> >
> > +Alex/Daniel
> >
> > On 20/3/24 17:53, Peter Maydell wrote:
> > > On Wed, 20 Mar 2024 at 16:40, Philippe Mathieu-Daudé
> > > wrote:
> > >>
> > >> 'info tlb' and 'info mem' c
From: Aidan Leuck
* Fixed styling errors
* Moved from wcstombs to g_utf functions
* Removed unnecessary if checks on calls to free
* Fixed copyright headers
* Refactored create_acl functions into base function, admin function and user
function
* Removed unused user count function
* Split up refa
On Wed, Mar 20, 2024 at 11:44:13AM +, Daniel P. Berrangé wrote:
> On Wed, Mar 20, 2024 at 03:39:17AM -0500, Michael Roth wrote:
> > Currently all SEV/SEV-ES functionality is managed through a single
> > 'sev-guest' QOM type. With upcoming support for SEV-SNP, taking this
> > same approach won't
On Wed, Mar 20, 2024 at 11:58:57AM +, Daniel P. Berrangé wrote:
> On Wed, Mar 20, 2024 at 03:39:18AM -0500, Michael Roth wrote:
> > From: Brijesh Singh
> >
> > SEV-SNP support relies on a different set of properties/state than the
> > existing 'sev-guest' object. This patch introduces the 'se
On Wed, Mar 20, 2024 at 11:47:28AM +, Daniel P. Berrangé wrote:
> On Wed, Mar 20, 2024 at 03:39:17AM -0500, Michael Roth wrote:
> > Currently all SEV/SEV-ES functionality is managed through a single
> > 'sev-guest' QOM type. With upcoming support for SEV-SNP, taking this
> > same approach won't
On Wed, Mar 20, 2024 at 12:35:09PM +, Daniel P. Berrangé wrote:
> On Wed, Mar 20, 2024 at 03:39:19AM -0500, Michael Roth wrote:
> > Add a simple helper to check if the current guest type is SNP. Also have
> > SNP-enabled imply that SEV-ES is enabled as well, and fix up any places
> > where the
On Wed, Mar 20, 2024 at 10:46:29AM +0100, Paolo Bonzini wrote:
> On 3/20/24 09:39, Michael Roth wrote:
> > SEV uses these notifiers to register/pin pages prior to guest use, since
> > they could potentially be used for private memory where page migration
> > is not supported. But SNP only uses gues
On Wed, Mar 20, 2024 at 12:10:04PM +, Daniel P. Berrangé wrote:
> On Wed, Mar 20, 2024 at 03:39:27AM -0500, Michael Roth wrote:
> > Most of the current 'query-sev' command is relevant to both legacy
> > SEV/SEV-ES guests and SEV-SNP guests, with 2 exceptions:
> >
> > - 'policy' is a 64-bit f
On Wed, Mar 20, 2024 at 10:58:30AM +0100, Paolo Bonzini wrote:
> On 3/20/24 09:39, Michael Roth wrote:
> > From: Brijesh Singh
> >
> > The SNP_LAUNCH_START is called first to create a cryptographic launch
> > context within the firmware.
> >
> > Signed-off-by: Brijesh Singh
> > Signed-off-by: M
On Wed, Mar 20, 2024 at 10:55:35AM -0700, Isaku Yamahata wrote:
> On Wed, Mar 20, 2024 at 03:39:36AM -0500,
> Michael Roth wrote:
>
> > From: Brijesh Singh
> >
> > A recent version of OVMF expanded the reset vector GUID list to add
> > SEV-specific metadata GUID. The SEV metadata describes the
* Philippe Mathieu-Daudé (phi...@linaro.org) wrote:
> On 19/3/24 03:16, Shiyang Ruan via wrote:
> > From: Yao Xingtao
> >
> > In qemu monitor mode, when we use gpa2hva command to print the host
> > virtual address corresponding to a guest physical address, if the gpa is
> > not in RAM, the error
From: Aidan Leuck
Signed-off-by: Aidan Leuck
---
qga/commands-windows-ssh.c | 823 +
qga/commands-windows-ssh.h | 26 ++
qga/meson.build| 9 +-
qga/qapi-schema.json | 22 +-
4 files changed, 867 insertions(+), 13 deletions(-)
create mod
From: Aidan Leuck
Signed-off-by: Aidan Leuck
---
qga/commands-posix-ssh.c | 47 +---
qga/commands-ssh-core.c| 57 +
qga/commands-ssh-core.h| 15 +
qga/commands-windows-ssh.c | 64 --
qg
On Wed, Mar 20, 2024 at 12:15 AM Huang, Ying wrote:
>
> "Ho-Ren (Jack) Chuang" writes:
>
> > The current implementation treats emulated memory devices, such as
> > CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory
> > (E820_TYPE_RAM). However, these emulated devices have
> -Original Message-
> From: Peter Xu
> Sent: Thursday, March 21, 2024 4:32 AM
> To: Liu, Yuan1
> Cc: Daniel P. Berrangé ; faro...@suse.de; qemu-
> de...@nongnu.org; hao.xi...@bytedance.com; bryan.zh...@bytedance.com; Zou,
> Nanhai
> Subject: Re: [PATCH v5 5/7] migration/multifd: impleme
From: Dongwon Kim
It is required to ensure the current scanout frame is completed
before transitioning guest's run-state to save to prevent potential
guest waiting for the response on the resource flush of the old
scanout frame upon resume.
v2: Giving some time for the fence to be signaled befor
qemu-system-loongarch64 assert failed with the option '-d int',
the helper_idle() raise an exception EXCP_HLT, but the exception name is
undefined.
Signed-off-by: Song Gao
---
target/loongarch/cpu.c | 75 ++
1 file changed, 46 insertions(+), 29 deletions(
On 3/19/24 21:09, Philippe Mathieu-Daudé wrote:
On 19/3/24 22:05, Richard Henderson wrote:
On 3/19/24 05:42, Philippe Mathieu-Daudé wrote:
Convert cpu_get_tb_cpu_state() to TCGCPUOps::get_cpu_state().
Note, now s390x_get_cpu_state() is restricted to TCG.
Signed-off-by: Philippe Mathieu-Daudé
Paolo, ping!
On 3/13/24 09:30, Richard Henderson wrote:
On 3/7/24 05:53, Jonathan Cameron wrote:
From: Gregory Price
CXL emulation of interleave requires read and write hooks due to
requirement for subpage granularity. The Linux kernel stack now enables
using this memory as conventional memor
On 3/20/24 16:11, Song Gao wrote:
qemu-system-loongarch64 assert failed with the option '-d int',
the helper_idle() raise an exception EXCP_HLT, but the exception name is
undefined.
Signed-off-by: Song Gao
---
target/loongarch/cpu.c | 75 ++
1 file ch
在 2024/3/21 上午10:50, Richard Henderson 写道:
On 3/20/24 16:11, Song Gao wrote:
qemu-system-loongarch64 assert failed with the option '-d int',
the helper_idle() raise an exception EXCP_HLT, but the exception name
is undefined.
Signed-off-by: Song Gao
---
target/loongarch/cpu.c | 75 +
On Thu, Mar 21, 2024 at 5:03 AM Si-Wei Liu wrote:
>
>
>
> On 3/19/2024 8:27 PM, Jason Wang wrote:
> > On Tue, Mar 19, 2024 at 6:16 AM Si-Wei Liu wrote:
> >>
> >>
> >> On 3/17/2024 8:22 PM, Jason Wang wrote:
> >>> On Sat, Mar 16, 2024 at 2:45 AM Si-Wei Liu wrote:
>
> On 3/14/2024 9:03 P
In RVV and vcrypto instructions, the masked and tail elements are set to 1s
using vext_set_elems_1s function if the vma/vta bit is set. It is the element
agnostic policy.
However, this function can't deal the big endian situation. This patch fixes
the problem by adding handling of such case.
Sign
On Thu, Mar 21, 2024 at 4:29 AM Si-Wei Liu wrote:
>
>
>
> On 3/19/2024 8:25 PM, Jason Wang wrote:
> > On Tue, Mar 19, 2024 at 6:06 AM Si-Wei Liu wrote:
> >>
> >>
> >> On 3/17/2024 8:20 PM, Jason Wang wrote:
> >>> On Sat, Mar 16, 2024 at 2:33 AM Si-Wei Liu wrote:
>
> On 3/14/2024 8:50 P
On 2024/3/21 11:58, Huang Tao wrote:
In RVV and vcrypto instructions, the masked and tail elements are set to 1s
using vext_set_elems_1s function if the vma/vta bit is set. It is the element
agnostic policy.
However, this function can't deal the big endian situation. This patch fixes
the probl
Hardware clears the MSR[ME] bit when delivering a machine check
interrupt, so that is what QEMU does.
The spapr environment runs in supervisor mode though, and receives
machine check interrupts after they are processed by the hypervisor,
and MSR[ME] must always be enabled in supervisor mode (other
qemu-system-loongarch64 assert failed with the option '-d int',
the helper_idle() raise an exception EXCP_HLT, but the exception name is
undefined.
Signed-off-by: Song Gao
---
target/loongarch/cpu.c | 76 +++---
1 file changed, 42 insertions(+), 34 deletions(
Hi Dongwon,
On 20/3/24 21:50, dongwon@intel.com wrote:
From: Dongwon Kim
QemuDmaBuf struct is defined and primarily used by ui/console/gl so it is
better to handle its creation, initialization and access within ui/console
rather than within hw modules such as hw/display/virtio-gpu and
hw/v
Hi
On Wed, Mar 20, 2024 at 7:20 AM Akihiko Odaki wrote:
>
> On 2024/03/19 17:29, Marc-André Lureau wrote:
> > Hi Akihiko
> >
> > On Tue, Mar 19, 2024 at 7:09 AM Akihiko Odaki
> > wrote:
> >>
> >> ui/console has a concept of "active" console; the active console is used
> >> when NULL is set for
The following changes since commit ba49d760eb04630e7b15f423ebecf6c871b8f77b:
Merge tag 'pull-maintainer-final-130324-1' of https://gitlab.com/stsquad/qemu
into staging (2024-03-13 15:12:14 +)
are available in the Git repository at:
https://gitlab.com/kraxel/qemu.git tags/edk
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