[PATCH v2 0/2] hw/smbios: Fix option validation

This fixes qemu_smbios_type8_opts and qemu_smbios_type11_opts to have list terminators and elements for the type option. Signed-off-by: Akihiko Odaki --- Changes in v2: - Fixed messages. (Michael Tokarev) - Link to v1: https://lore.kernel.org/r/20240128-smbios-v1-0-c3a50499b...@daynix.com --- A

[PATCH v2 2/2] hw/smbios: Fix port connector option validation

qemu_smbios_type8_opts did not have the list terminator and that resulted in out-of-bound memory access. It also needs to have an element for the type option. Cc: qemu-sta...@nongnu.org Fixes: fd8caa253c56 ("hw/smbios: support for type 8 (port connector)") Signed-off-by: Akihiko Odaki Reviewed-by

[PATCH v2 1/2] hw/smbios: Fix OEM strings table option validation

qemu_smbios_type11_opts did not have the list terminator and that resulted in out-of-bound memory access. It also needs to have an element for the type option. Cc: qemu-sta...@nongnu.org Fixes: 2d6dcbf93fb0 ("smbios: support setting OEM strings table") Signed-off-by: Akihiko Odaki Reviewed-by: Mi

[RFC v1 0/3] Add cache structure table creation for PPTT table

This patch series adds cache structure table generation for the Processor Properties Topology Table (PPTT) to describe cache hierarchy information for ACPI guests. Both ARM and RISC-V virtual machines benefit from these enhancement. A 3-level cache topology is employed here, referring to the type

[RFC v1 2/3] hw/riscv/virt-acpi-build.c: Generate PPTT table

Generate the Processor Properties Topology Table (PPTT) with a cache type 1 structure for RISC-V virtual machine. A 3-layer cache topology is used. Signed-off-by: Sia Jee Heng --- hw/riscv/virt-acpi-build.c | 49 +- hw/riscv/virt.c| 1 + 2 files c

[RFC v1 3/3] hw/arm/virt-acpi-build.c: Enable CPU cache topology

Introduced a 3-layer cache for the ARM virtual machine. Signed-off-by: Sia Jee Heng --- hw/arm/virt-acpi-build.c | 44 +++- 1 file changed, 43 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 17aeec7a6f..c570

[RFC v1 1/3] hw/acpi/aml-build: Add cache structure table creation for PPTT table

Adds cache structure table generation for the Processor Properties Topology Table (PPTT) to describe cache hierarchy information for ACPI guests. A 3-level cache topology is employed here, referring to the type 1 cache structure according to ACPI spec v6.3. The L1 cache and L2 cache are private re

Re: [PATCH v1 1/3] hw/display/virtio-gpu.c: use reset_bh class method

On Fri, Jan 26, 2024 at 7:43 PM Manos Pitsidianakis wrote: > > While the VirtioGPU type has a reset_bh field to specify a reset > callback, it's never used. virtio_gpu_reset() calls the general > virtio_gpu_reset_bh() function for all devices that inherit from > VirtioGPU. > > While no devices ove

[PATCH v2 0/3] target/arm: Allow compilation without CONFIG_ARM_V7M

We've got a switch to disable v7m code since a long time - but it currently cannot be disabled since linking then fails due to missing functions. But thanks to the clean-ups that have been done during the past years, it's not that difficult anymore to finally make it possible to disable CONFIG_ARM_

[PATCH v2 3/3] target/arm/Kconfig: Stop requiring CONFIG_ARM_V7M

Now that we made sure that ARM_V7M code only gets compiled if really needed, we can drop the hard requirement for CONFIG_ARM_V7M in the Kconfig file. Tested-by: Fabiano Rosas Signed-off-by: Thomas Huth --- target/arm/Kconfig | 4 1 file changed, 4 deletions(-) diff --git a/target/arm/Kcon

[PATCH v2 1/3] target/arm: Move v7m-related code from cpu32.c into a separate file

Move the code to a separate file so that we do not have to compile it anymore if CONFIG_ARM_V7M is not set. Signed-off-by: Thomas Huth --- target/arm/tcg/cpu-v7m.c | 290 + target/arm/tcg/cpu32.c | 261 - target/arm/meson.

[PATCH v2 2/3] target/arm/tcg/m_helper.c: Include the full helpers only with CONFIG_ARM_V7M

If CONFIG_ARM_V7M is not set, we don't want to include the full-fledged helper functions that require additional functions for linking. The reduced set of the linux-user functions works fine as stubs in this case, so change the #ifdef statement accordingly. Signed-off-by: Thomas Huth --- target/

Re: [PATCH v1 2/3] virtio-gpu.c: add resource_destroy class method

Hi On Fri, Jan 26, 2024 at 10:20 PM Manos Pitsidianakis wrote: > > On Fri, 26 Jan 2024 at 17:22, Philippe Mathieu-Daudé > wrote: > > > > Hi Manos, > > > > On 26/1/24 15:41, Manos Pitsidianakis wrote: > > > When destroying/unrefing resources, devices such as virtio-gpu-rutabaga > > > need to do

[PULL 0/2] vfio queue

tags/pull-vfio-20240129 for you to fetch changes up to d2b668fca5652760b435ce812a743bba03d2f316: vfio/pci: Clear MSI-X IRQ index always (2024-01-29 08:26:25 +0100) vfio queue: * Array type cleanup * Fix for IRQ

[PULL 2/2] vfio/pci: Clear MSI-X IRQ index always

When doing device assignment of a physical device, MSI-X can be enabled with no vectors enabled and this sets the IRQ index to VFIO_PCI_MSIX_IRQ_INDEX. However, when MSI-X is disabled, the IRQ index is left untouched if no vectors are in use. Then, when INTx is enabled, the IRQ index value is consi

[PULL 1/2] vfio: use matching sizeof type

From: Paolo Bonzini Do not use uint64_t for the type of the declaration and __u64 when computing the number of elements in the array. Signed-off-by: Paolo Bonzini Reviewed-by: Philippe Mathieu-Daudé --- hw/vfio/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/vf

Re: [PATCH 5/5] migration: Add integration test for 'qatzip' compression method

On Sun, Dec 31, 2023 at 08:58:04PM +, Bryan Zhang wrote: > Adds an integration test for 'qatzip'. Please use "tests" as prefix of this patch. It can be "tests/migration:", "tests/migration-test:", etc. > > Signed-off-by: Bryan Zhang > Signed-off-by: Hao Xiang [...] > test_migrate_multi

[PATCH v2] target/riscv: mcountinhibit, mcounteren and scounteren always 32-bit

mcountinhibit, mcounteren and scounteren must always be 32-bit by privileged spec Signed-off-by: Vadim Shakirov --- target/riscv/cpu.h | 6 +++--- target/riscv/machine.c | 10 +- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h i

Re: [PATCH v2 1/3] target/arm: Move v7m-related code from cpu32.c into a separate file

On 1/29/24 09:18, Thomas Huth wrote: Move the code to a separate file so that we do not have to compile it anymore if CONFIG_ARM_V7M is not set. Signed-off-by: Thomas Huth --- target/arm/tcg/cpu-v7m.c | 290 + target/arm/tcg/cpu32.c | 261 ---

Re: [RESEND v2 1/2] hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location

On Sun, Jan 28, 2024 at 06:14:39PM -0800, Sia Jee Heng wrote: > RISC-V should also generate the SPCR in a manner similar to ARM. > Therefore, instead of replicating the code, relocate this function > to the common AML build. > > Signed-off-by: Sia Jee Heng > --- > hw/acpi/aml-build.c | 5

Re: [PATCH v2 0/9] hw/core: Cleanup and reorder headers

Hi Philippe, Thanks for picking the 1st patch. Could you take time for further review on other patches? Thanks, Zhao On Tue, Jan 16, 2024 at 03:46:38PM +0800, Zhao Liu wrote: > Date: Tue, 16 Jan 2024 15:46:38 +0800 > From: Zhao Liu > Subject: [PATCH v2 0/9] hw/core: Cleanup and reorder headers

Re: [PATCH 0/8] tests/unit/test-smp-parse.c: Add more CPU topology test cases

Hi Philippe, A kindly ping. Thanks, Zhao On Thu, Jan 18, 2024 at 10:48:49PM +0800, Zhao Liu wrote: > Date: Thu, 18 Jan 2024 22:48:49 +0800 > From: Zhao Liu > Subject: [PATCH 0/8] tests/unit/test-smp-parse.c: Add more CPU topology > test cases > X-Mailer: git-send-email 2.34.1 > > From: Zhao L

Re: [PATCH v2 0/2] Two minor fixes on virtio-iommu and smmu

Hi Zhenzhong, On 1/25/24 08:37, Zhenzhong Duan wrote: > Hi, > > PATCH1 fixes a potential issue with vfio devices when reboot to a > different OS which set bus number differently from previous OS. > I didn't reproduce the issue in reality, but it's still possible > in theory. VTD doesn't have same

Re: [PATCH v2] target/riscv: mcountinhibit, mcounteren and scounteren always 32-bit

On Mon, Jan 29, 2024 at 11:47:28AM +0300, Vadim Shakirov wrote: > mcountinhibit, mcounteren and scounteren must always be 32-bit by > privileged spec We should also change hcounteren. Thanks, drew > > Signed-off-by: Vadim Shakirov > --- > target/riscv/cpu.h | 6 +++--- > target/riscv/mac

Re: [PATCH 1/2] docs: introduce dedicated page about code provenance / sign-off

On Sat, Jan 27, 2024 at 10:36:24PM +0800, Zhao Liu wrote: > Hi Daniel, > > On Thu, Nov 23, 2023 at 11:40:25AM +, Daniel P. Berrangé wrote: > > +Multiple authorship > > +~~~ > > + > > +It is not uncommon for a patch to have contributions from multiple > > +authors. In such a sce

[PATCH v4 1/3] linux-user: Allow gdbstub to ignore page protection

gdbserver ignores page protection by virtue of using /proc/$pid/mem. Teach qemu gdbstub to do this too. This will not work if /proc is not mounted; accept this limitation. One alternative is to temporarily grant the missing PROT_* bit, but this is inherently racy. Another alternative is self-debug

[PATCH v4 3/3] tests/tcg: Add the PROT_NONE gdbstub test

Make sure that qemu gdbstub, like gdbserver, allows reading from and writing to PROT_NONE pages. Signed-off-by: Ilya Leoshkevich --- tests/tcg/multiarch/Makefile.target | 9 +- tests/tcg/multiarch/gdbstub/prot-none.py | 36 + tests/tcg/multiarch/prot-none.c

[PATCH v4 0/3] linux-user: Allow gdbstub to ignore page protection

v3: https://lists.gnu.org/archive/html/qemu-devel/2024-01/msg02907.html v3 -> v4: Hide InteractiveConsole behind QEMU_TEST_INTERACTIVE (Alex). Probe /proc/self/mem in the PROT_NONE test. v2: https://lists.gnu.org/archive/html/qemu-devel/2024-01/msg01592.html v2 -> v3: Add Richard's R-b o

[PATCH v4 2/3] tests/tcg: Factor out gdbstub test functions

Both the report() function as well as the initial gdbstub test sequence are copy-pasted into ~10 files with slight modifications. This indicates that they are indeed generic, so factor them out. While at it, add a few newlines to make the formatting closer to PEP-8. Signed-off-by: Ilya Leoshkevich

Re: [PATCH 14/33] tests/tcg: Factor out gdbstub test functions

On Sun, Jan 28, 2024 at 02:41:54PM +1000, Richard Henderson wrote: > From: Ilya Leoshkevich > > Both the report() function as well as the initial gdbstub test sequence > are copy-pasted into ~10 files with slight modifications. This > indicates that they are indeed generic, so factor them out. Wh

RE: [PATCH v2 0/2] Two minor fixes on virtio-iommu and smmu

>-Original Message- >From: Eric Auger >Subject: Re: [PATCH v2 0/2] Two minor fixes on virtio-iommu and smmu > >Hi Zhenzhong, > >On 1/25/24 08:37, Zhenzhong Duan wrote: >> Hi, >> >> PATCH1 fixes a potential issue with vfio devices when reboot to a >> different OS which set bus number diff

Re: [PATCH 1/2] docs: introduce dedicated page about code provenance / sign-off

Daniel P. Berrangé writes: Is there any requirement for the order of tags? My previous understanding was that if the Reviewed-by/Tested-by tags were obtained by the author within his company, then those tags should be placed before the signed-off-by of the author. If the Reviewed-by/ Test

Re: [PATCH] hw/riscv/virt-acpi-build.c: Add SRAT and SLIT ACPI tables

On Mon, Jan 29, 2024 at 05:42:00PM +0800, Haibo Xu wrote: > Enable ACPI NUMA support by adding the following 2 ACPI tables: > SRAT: provides the association for memory/Harts and Proximity Domains > SLIT: provides the relative distance between Proximity Domains > > The SRAT RINTC Affinity Structure

Re: [PULL 02/60] semihosting: Return failure from softmmu-uaccess.h functions

On 28/6/22 06:53, Richard Henderson wrote: We were reporting unconditional success for these functions; pass on any failure from cpu_memory_rw_debug. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- include/semihosting/softmmu-uaccess.h | 91 --- 1 fil

Re: [PATCH v3 01/33] accel/tcg: Remove qemu_host_page_size from page_protect/page_unprotect

On Tue, Jan 02, 2024 at 12:57:36PM +1100, Richard Henderson wrote: > Use qemu_real_host_page_size instead. Except for the final mprotect > within page_protect, we already handled host < target page size. > > Signed-off-by: Richard Henderson > --- > accel/tcg/user-exec.c | 18 ++

Re: [PATCH v3 02/33] linux-user: Adjust SVr4 NULL page mapping

On Tue, Jan 02, 2024 at 12:57:37PM +1100, Richard Henderson wrote: > Use TARGET_PAGE_SIZE and MAP_FIXED_NOREPLACE. > > We really should be attending to this earlier during > probe_guest_base, as well as better detection and > emulation of various Linux personalities. > > Signed-off-by: Richard He

Re: [PATCH v2 01/14] plugins: implement inline operation relative to cpu_index

On 1/26/24 16:07, Alex Bennée wrote: Pierrick Bouvier writes: Instead of working on a fixed memory location, allow to address it based on cpu_index, an element size and a given offset. Result address: ptr + offset + cpu_index * element_size. With this, we can target a member in a struct array

Re: [PATCH v3 03/33] linux-user: Remove qemu_host_page_{size, mask} in probe_guest_base

On Tue, Jan 02, 2024 at 12:57:38PM +1100, Richard Henderson wrote: > The host SHMLBA is by definition a multiple of the host page size. > Thus the remaining component of qemu_host_page_size is the > target page size. > > Signed-off-by: Richard Henderson > --- > linux-user/elfload.c | 4 ++-- > 1

Re: [PATCH v3 04/33] linux-user: Remove qemu_host_page_size from create_elf_tables

On Tue, Jan 02, 2024 at 12:57:39PM +1100, Richard Henderson wrote: > AT_PAGESZ is supposed to advertise the guest page size. > The random adjustment made here using qemu_host_page_size > does not match anything else within linux-user. > > The idea here is good, but should be done more systemically

Re: [PATCH v3 05/33] linux-user/hppa: Simplify init_guest_commpage

On Tue, Jan 02, 2024 at 12:57:40PM +1100, Richard Henderson wrote: > If reserved_va, then we have already reserved the entire > guest virtual address space; no need to remap page. > If !reserved_va, then use MAP_FIXED_NOREPLACE. > > Signed-off-by: Richard Henderson > --- > linux-user/elfload.c |

Re: [PATCH 08/10] cxl: Clean up includes

On Thu, 25 Jan 2024 16:34:06 + Peter Maydell wrote: > This commit was created with scripts/clean-includes. > > All .c should include qemu/osdep.h first. The script performs three > related cleanups: > > * Ensure .c files include qemu/osdep.h first. > * Including it in a .h is redundant, si

Re: [PATCH v2 1/3] target/arm: Move v7m-related code from cpu32.c into a separate file

On Mon, 29 Jan 2024 at 08:54, Paolo Bonzini wrote: > > On 1/29/24 09:18, Thomas Huth wrote: > > +static const ARMCPUInfo arm_v7m_cpus[] = { > > +{ .name = "cortex-m0", .initfn = cortex_m0_initfn, > > + .class_init = arm_v7m_class_init }, > > +{ .name = "cortex

[RESEND RFC 0/3] Add cache structure table creation for PPTT table

This patch series adds cache structure table generation for the Processor Properties Topology Table (PPTT) to describe cache hierarchy information for ACPI guests. Both ARM and RISC-V virtual machines benefit from these enhancement. A 3-level cache topology is employed here, referring to the type

Re: [PATCH 1/2] docs: introduce dedicated page about code provenance / sign-off

On Mon, 29 Jan 2024 at 09:47, Samuel Tardieu wrote: > However, this is not what QEMU has been using as far as I can see, > as S-o-b tend to stay in their original positions. I even opened > an issue on b4 a few weeks ago because of this > , and I reverted to

[RESEND RFC 2/3] hw/riscv/virt-acpi-build.c: Generate PPTT table

Generate the Processor Properties Topology Table (PPTT) with a cache type 1 structure for RISC-V virtual machine. A 3-layer cache topology is used. Signed-off-by: Sia Jee Heng --- hw/riscv/virt-acpi-build.c | 49 +- hw/riscv/virt.c| 1 + 2 files c

[RESEND RFC 1/3] hw/acpi/aml-build: Add cache structure table creation for PPTT table

Adds cache structure table generation for the Processor Properties Topology Table (PPTT) to describe cache hierarchy information for ACPI guests. A 3-level cache topology is employed here, referring to the type 1 cache structure according to ACPI spec v6.3. The L1 cache and L2 cache are private re

[RESEND RFC 3/3] hw/arm/virt-acpi-build.c: Enable CPU cache topology

Introduced a 3-layer cache for the ARM virtual machine. Signed-off-by: Sia Jee Heng --- hw/arm/virt-acpi-build.c | 44 +++- 1 file changed, 43 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 17aeec7a6f..c570

Re: [PATCH v3 0/4] Live Migration Acceleration with IAA Compression

On Wed, Jan 03, 2024 at 07:28:47PM +0800, Yuan Liu wrote: > Hi, Hi, Yuan, I have a few comments and questions. Many of them can be pure questions as I don't know enough on these new technologies. > > I am writing to submit a code change aimed at enhancing live migration > acceleration by lever

Re: Re: [PATCH v3 05/33] linux-user/hppa: Simplify init_guest_commpage

On Mon, Jan 29, 2024 at 11:28:59AM +0100, Ilya Leoshkevich wrote: > On Tue, Jan 02, 2024 at 12:57:40PM +1100, Richard Henderson wrote: > > If reserved_va, then we have already reserved the entire > > guest virtual address space; no need to remap page. > > If !reserved_va, then use MAP_FIXED_NOREPLA

Re: [PATCH v3 08/33] linux-user: Remove qemu_host_page_{size, mask} from mmap.c

On Tue, Jan 02, 2024 at 12:57:43PM +1100, Richard Henderson wrote: > Use qemu_real_host_page_size instead. > > Signed-off-by: Richard Henderson > --- > linux-user/mmap.c | 66 +++ > 1 file changed, 33 insertions(+), 33 deletions(-) Reviewed-by: Ilya L

Re: [PATCH v3 09/33] linux-user: Remove REAL_HOST_PAGE_ALIGN from mmap.c

On Tue, Jan 02, 2024 at 12:57:44PM +1100, Richard Henderson wrote: > We already have qemu_real_host_page_size() in a local variable. > > Reviewed-by: Philippe Mathieu-Daudé > Signed-off-by: Richard Henderson > --- > linux-user/mmap.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Revi

Re: [PATCH v3 10/33] linux-user: Remove HOST_PAGE_ALIGN from mmap.c

On Tue, Jan 02, 2024 at 12:57:45PM +1100, Richard Henderson wrote: > This removes a hidden use of qemu_host_page_size, using instead > the existing host_page_size local within each function. > > Signed-off-by: Richard Henderson > --- > linux-user/mmap.c | 13 ++--- > 1 file changed, 6 in

Re: [PATCH v3 11/33] migration: Remove qemu_host_page_size

On Tue, Jan 02, 2024 at 12:57:46PM +1100, Richard Henderson wrote: > Replace with the maximum of the real host page size > and the target page size. This is an exact replacement. > > Signed-off-by: Richard Henderson > --- > migration/ram.c | 22 ++ > 1 file changed, 18 inser

Re: [PATCH 1/2] docs: introduce dedicated page about code provenance / sign-off

On Mon, Jan 29, 2024 at 10:41:38AM +, Peter Maydell wrote: > On Mon, 29 Jan 2024 at 09:47, Samuel Tardieu wrote: > > However, this is not what QEMU has been using as far as I can see, > > as S-o-b tend to stay in their original positions. I even opened > > an issue on b4 a few weeks ago becaus

Re: [RFC v1 1/3] hw/acpi/aml-build: Add cache structure table creation for PPTT table

On Mon, 29 Jan 2024 00:14:21 -0800 Sia Jee Heng wrote: > Adds cache structure table generation for the Processor Properties > Topology Table (PPTT) to describe cache hierarchy information for > ACPI guests. > > A 3-level cache topology is employed here, referring to the type 1 cache > structure

Re: [PATCH v3 12/33] hw/tpm: Remove HOST_PAGE_ALIGN from tpm_ppi_init

On Tue, Jan 02, 2024 at 12:57:47PM +1100, Richard Henderson wrote: > The size of the allocation need not match the alignment. > > Signed-off-by: Richard Henderson > --- > hw/tpm/tpm_ppi.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) Reviewed-by: Ilya Leoshkevich

Re: [RFC v1 3/3] hw/arm/virt-acpi-build.c: Enable CPU cache topology

On Mon, 29 Jan 2024 00:14:23 -0800 Sia Jee Heng wrote: > Introduced a 3-layer cache for the ARM virtual machine. > > Signed-off-by: Sia Jee Heng There are a bunch of CPU registers that also need updating to reflect the described cache. https://lore.kernel.org/qemu-devel/20230808115713.2613-3-j

Re: [PATCH 0/3] monitor: only run coroutine commands in qemu_aio_context

On Tue, 16 Jan 2024 at 19:01, Stefan Hajnoczi wrote: > > Several bugs have been reported related to how QMP commands are rescheduled in > qemu_aio_context: > - https://gitlab.com/qemu-project/qemu/-/issues/1933 > - https://issues.redhat.com/browse/RHEL-17369 > - https://bugzilla.redhat.com/show_bu

[PATCH 5/5] qga/qapi-schema: Move command description right after command name

Documentation of commands guest-ssh-get-authorized-keys, guest-ssh-add-authorized-keys, and guest-ssh-remove-authorized-keys describes the command's purpose after its arguments. Everywhere else, we do it the other way round. Move it for consistency. Signed-off-by: Markus Armbruster --- qga/qap

[PATCH 1/5] qapi: Drop redundant documentation of inherited members

Documentation generated for SchemaInfo looks like The members of "SchemaInfoBuiltin" when "meta-type" is ""builtin"" The members of "SchemaInfoEnum" when "meta-type" is ""enum"" The members of "SchemaInfoArray" when "meta-type" is ""array"" The members of "SchemaInfoObject" when "m

[PATCH 0/5] qmp: Documentation cleanups

Markus Armbruster (5): qapi: Drop redundant documentation of inherited members qapi: Drop redundant documentation of conditional qapi: Elide "Potential additional modes" from generated docs qga: Move type description right after type name qga/qapi-schema: Move command description right af

[PATCH 4/5] qga: Move type description right after type name

Documentation of type BlockdevOptionsIscsi describes the type's purpose after its members. Everywhere else, we do it the other way round. Move it for consistency. Signed-off-by: Markus Armbruster --- qapi/block-core.json | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/q

[PATCH 3/5] qapi: Elide "Potential additional modes" from generated docs

Documentation of BlockExportRemoveMode has Potential additional modes to be added in the future: hide: Just hide export from new clients, leave existing connections as is. Remove export after all clients are disconnected. soft: Hide export from new clients, answer with ESHUTDOWN

[PATCH 2/5] qapi: Drop redundant documentation of conditional

Documentation generated for dump-skeys contains This command is only supported on s390 architecture. and If ~~ "TARGET_S390X" The former became redundant in commit 901a34a400a (qapi: add 'If:' section to generated documentation) added the latter. Drop the former. Signed-off-b

[PATCH] kconfig: use "select" to enable semihosting

Just like all other dependencies, these can be expressed in Kconfig files rather than in the default configurations. Signed-off-by: Paolo Bonzini --- configs/devices/m68k-softmmu/default.mak| 2 -- configs/devices/mips-softmmu/common.mak | 3 --- configs/devices/nios2-softmmu/default.mak

[PATCH] mips: remove unnecessary "select PTIMER"

There is no use of ptimer functions in mips_cps.c or any other related code. Signed-off-by: Paolo Bonzini --- hw/mips/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index 505381a0bba..ab61af209a0 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@

[PATCH] mips: allow compiling out CONFIG_MIPS_ITU

itu_reconfigure() is referenced from TCG, provide a stub if needed. Signed-off-by: Paolo Bonzini --- hw/mips/mips_itu-stub.c | 26 ++ hw/mips/meson.build | 1 + 2 files changed, 27 insertions(+) create mode 100644 hw/mips/mips_itu-stub.c diff --git a/hw/mips/mips_i

Re: [PULL 06/15] tests/qtest/migration: Don't use -cpu max for aarch64

Peter Xu writes: > On Fri, Jan 26, 2024 at 11:54:32AM -0300, Fabiano Rosas wrote: >> Peter Maydell writes: >> >> > On Fri, 26 Jan 2024 at 14:36, Fabiano Rosas wrote: >> >> >> >> pet...@redhat.com writes: >> >> >> >> > From: Fabiano Rosas >> >> > >> >> > The 'max' cpu is not expected to be sta

Re: [PATCH 04/17] migration/multifd: Set p->running = true in the right place

On 29/01/2024 6:17, Peter Xu wrote: External email: Use caution opening links or attachments On Sun, Jan 28, 2024 at 05:43:52PM +0200, Avihai Horon wrote: On 25/01/2024 22:57, Fabiano Rosas wrote: External email: Use caution opening links or attachments Avihai Horon writes: The commit

Re: [PATCH 0/3] VIRTIO-IOMMU: Introduce an aw-bits option

Hi Eric, On Tue, Jan 23, 2024 at 07:15:54PM +0100, Eric Auger wrote: > In [1] and [2] we attempted to fix a case where a VFIO-PCI device > protected with a virtio-iommu is assigned to an x86 guest. On x86 > the physical IOMMU may have an address width (gaw) of 39 or 48 bits > whereas the virtio-io

Re: [PATCH 04/17] migration/multifd: Set p->running = true in the right place

Peter Xu writes: > On Sun, Jan 28, 2024 at 05:43:52PM +0200, Avihai Horon wrote: >> >> On 25/01/2024 22:57, Fabiano Rosas wrote: >> > External email: Use caution opening links or attachments >> > >> > >> > Avihai Horon writes: >> > >> > > The commit in the fixes line moved multifd thread cre

Re: [PATCH 1/5] migration/multifd: Separate compression ops from non-compression

Peter Xu writes: > On Fri, Jan 26, 2024 at 07:19:39PM -0300, Fabiano Rosas wrote: >> +static MultiFDMethods multifd_socket_ops = { >> +.send_setup = multifd_socket_send_setup, >> +.send_cleanup = multifd_socket_send_cleanup, >> +.send_prepare = multifd_socket_send_prepare, > > Here it

Re: [PATCH 0/5] migration/multifd: Prerequisite cleanups for ongoing work

Peter Xu writes: > On Mon, Jan 29, 2024 at 01:41:01AM +, Liu, Yuan1 wrote: >> Because this change has an impact on the previous live migration >> With IAA Patch, does the submission of the next version needs >> to be submitted based on this change? > > I'd say hold off a little while until

Re: NVME hotplug support ?

On 1/24/24 08:47, Hannes Reinecke wrote: On 1/24/24 07:52, Philippe Mathieu-Daudé wrote: Hi Hannes, [+Markus as QOM/QDev rubber duck] On 23/1/24 13:40, Hannes Reinecke wrote: On 1/23/24 11:59, Damien Hedde wrote: Hi all, We are currently looking into hotplugging nvme devices and it is c

Re: [PATCH] iotests/iothreads-stream: Use the right TimeoutError

On Thu, Jan 25, 2024 at 04:21:50PM +0100, Kevin Wolf wrote: > Since Python 3.11 asyncio.TimeoutError is an alias for TimeoutError, but > in older versions it's not. We really have to catch asyncio.TimeoutError > here, otherwise a slow test run will fail (as has happened multiple > times on CI recen

Re: [PATCH 2/2] virtio: Keep notifications disabled during drain

On Thu, Jan 25, 2024 at 07:32:12PM +0100, Hanna Czenczek wrote: > On 25.01.24 19:18, Hanna Czenczek wrote: > > On 25.01.24 19:03, Stefan Hajnoczi wrote: > > > On Wed, Jan 24, 2024 at 06:38:30PM +0100, Hanna Czenczek wrote: > > [...] > > > > > @@ -3563,6 +3574,13 @@ void > > > > virtio_queue_aio_a

[PATCH 1/2] net: parameterize the removing client from nc list

This change is used in later commits so we can avoid the removal of the netclient if it is delayed. No functional change intended. Signed-off-by: Eugenio Pérez --- net/net.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/net/net.c b/net/net.c index 0520bc1681.

[PATCH 0/2] Move net backend cleanup to NIC cleanup

Commit a0d7215e33 ("vhost-vdpa: do not cleanup the vdpa/vhost-net structures if peer nic is present") effectively delayed the backend cleanup, allowing the frontend or the guest to access it resources as long as the frontend NIC is still visible to the guest. However it does not clean up the resou

[PATCH 2/2] net: move backend cleanup to NIC cleanup

Commit a0d7215e33 ("vhost-vdpa: do not cleanup the vdpa/vhost-net structures if peer nic is present") effectively delayed the backend cleanup, allowing the frontend or the guest to access it resources as long as the frontend is still visible to the guest. However it does not clean up the resources

Re: [PATCH] mips: remove unnecessary "select PTIMER"

On 29/1/24 12:58, Paolo Bonzini wrote: There is no use of ptimer functions in mips_cps.c or any other related code. Signed-off-by: Paolo Bonzini --- hw/mips/Kconfig | 1 - 1 file changed, 1 deletion(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH] mips: allow compiling out CONFIG_MIPS_ITU

Hi Paolo, On 29/1/24 13:13, Paolo Bonzini wrote: itu_reconfigure() is referenced from TCG, provide a stub if needed. s/itu_reconfigure/itc_reconfigure/ What are you trying to achieve? Signed-off-by: Paolo Bonzini --- hw/mips/mips_itu-stub.c | 26 ++ hw/mips/meson

Re: [PATCH] mips: allow compiling out CONFIG_MIPS_ITU

On Mon, Jan 29, 2024 at 2:30 PM Philippe Mathieu-Daudé wrote: > > Hi Paolo, > > On 29/1/24 13:13, Paolo Bonzini wrote: > > itu_reconfigure() is referenced from TCG, provide a stub if needed. > > s/itu_reconfigure/itc_reconfigure/ > > What are you trying to achieve? I'm trying to build all MIPS bo

[PATCH] isa-superio: validate floppy.count value

Ensure that the value is valid; it can only be zero or one. And never create a floppy disk controller if it is zero. Signed-off-by: Paolo Bonzini --- hw/isa/isa-superio.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c index 80e0

[PATCH] smc37c669: remove useless is_enabled functions

Calls to is_enabled are bounded to indices that actually exist in the SuperIO device. Therefore, the is_enabled functions in smc37c669 are not doing anything and they can be removed. Signed-off-by: Paolo Bonzini --- hw/isa/smc37c669-superio.c | 18 -- 1 file changed, 18 deletion

Re: [PATCH] isa-superio: validate floppy.count value

On 29/1/24 14:32, Paolo Bonzini wrote: Ensure that the value is valid; it can only be zero or one. And never create a floppy disk controller if it is zero. Signed-off-by: Paolo Bonzini --- hw/isa/isa-superio.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) Reviewed-by: Philippe M

[PATCH] configure: do not create legacy symlinks

With more than three years since Meson was introduced in the build system, people have had quite some time to move away from the foo-softmmu/qemu-system-* and foo-linux-user/qemu-* symbolic links. Remove them, and with them another instance of the "softmmu" name for system emulators. Signed-off-

Re: NVME hotplug support ?

On Jan 29 14:13, Damien Hedde wrote: > > > On 1/24/24 08:47, Hannes Reinecke wrote: > > On 1/24/24 07:52, Philippe Mathieu-Daudé wrote: > > > Hi Hannes, > > > > > > [+Markus as QOM/QDev rubber duck] > > > > > > On 23/1/24 13:40, Hannes Reinecke wrote: > > > > On 1/23/24 11:59, Damien Hedde wrot

[PATCH 4/4] mips: do not list individual devices from configs/

Add new "select" and "imply" directives if needed. The resulting config-devices.mak files are the same as before. Signed-off-by: Paolo Bonzini --- configs/devices/mips-softmmu/common.mak | 28 +++- configs/devices/mips64el-softmmu/default.mak | 3 --- hw/mips/loongson3_vir

[PATCH 3/4] usb: inline device creation functions

Allow boards to use the device creation functions even if USB itself is not available; of course the functions will fail inexorably, but this can be okay if the calls are conditional on the existence of some USB host controller device. This is for example the case for hw/mips/loongson3_virt.c. Si

[PATCH 1/4] isa: clean up Kconfig selections for ISA_SUPERIO

All users of ISA_SUPERIO include a floppy disk controller, serial port and parallel port via the automatic creation mechanism of isa-superio.c. Select the symbol and remove it from the dependents. Signed-off-by: Paolo Bonzini --- hw/isa/Kconfig | 13 - 1 file changed, 4 insertions(+

[PATCH 2/4] isa: extract FDC37M81X to a separate file

isa-superio.c currently defines a SuperIO chip that depends on CONFIG_IDE_ISA, but not all users of isa-superio.c depend on that symbol. Extract the chip to a separate file so that there is an obvious place to select IDE_ISA. Signed-off-by: Paolo Bonzini --- hw/isa/fdc37m81x-superio.c | 37

[PATCH 0/4] mips: do not list individual devices from configs/

Back when Kconfig was introduced, the individual dependencies for MIPS boards were never added to hw/mips/Kconfig. Do it now. To simplify the task, include a couple cleanups to the SuperIO chip configuration symbols, as well as a change that makes USB device creation available even when building

Re: [PATCH v2 0/2] Initialize backend memory objects in parallel

Ping. Any comments? Thanks/regards, -Mark On 1/22/24 9:32 AM, Mark Kanda wrote: v2: - require MADV_POPULATE_WRITE (simplify the implementation) - require prealloc context threads to ensure optimal thread placement - use machine phase 'initialized' to detremine when to allow parallel init QEMU

Re: [PATCH v2 0/2] Initialize backend memory objects in parallel

On 29.01.24 14:39, Mark Kanda wrote: Ping. Any comments? Sorry, fell through the cracks, will review this soonish. -- Cheers, David / dhildenb

Re: [PATCH] migration/docs: Explain two solutions for VMSD compatibility

Peter Xu writes: > On Mon, Jan 22, 2024 at 12:39:06PM -0300, Fabiano Rosas wrote: >> pet...@redhat.com writes: >> >> > From: Peter Xu >> > >> > The current article is not extremely easy to follow, and may contain too >> > much information for someone looking for solutions on VMSD compatibility

Re: [PATCH] configure: do not create legacy symlinks

On 29/01/2024 14.36, Paolo Bonzini wrote: With more than three years since Meson was introduced in the build system, people have had quite some time to move away from the foo-softmmu/qemu-system-* and foo-linux-user/qemu-* symbolic links. Remove them, and with them another instance of the "soft

Re: [PATCH] configure: do not create legacy symlinks

On Mon, Jan 29, 2024 at 2:46 PM Thomas Huth wrote: > > On 29/01/2024 14.36, Paolo Bonzini wrote: > > With more than three years since Meson was introduced in the build system, > > people > > have had quite some time to move away from the foo-softmmu/qemu-system-* and > > foo-linux-user/qemu-* sym

[PATCH] configure: put all symlink creation together

Based-on: <20240129133651.1106552-1-pbonz...@redhat.com> Signed-off-by: Paolo Bonzini --- configure | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/configure b/configure index 9cdb5a6818b..3cd736b139f 100755 --- a/configure +++ b/configure @@ -1538,6 +1538,11 @@ for

Re: [PATCH] configure: put all symlink creation together

On 29/01/2024 14.48, Paolo Bonzini wrote: Based-on: <20240129133651.1106552-1-pbonz...@redhat.com> Signed-off-by: Paolo Bonzini --- configure | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/configure b/configure index 9cdb5a6818b..3cd736b139f 100755 --- a/config

[PATCH] hw/riscv/virt-acpi-build.c: Add SRAT and SLIT ACPI tables

Enable ACPI NUMA support by adding the following 2 ACPI tables: SRAT: provides the association for memory/Harts and Proximity Domains SLIT: provides the relative distance between Proximity Domains The SRAT RINTC Affinity Structure definition[1] was based on the recently approved ACPI CodeFirst ECR

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