Re: Re: [PATCH v3 01/21] hw/riscv: Use misa_mxl instead of misa_mxl_max

On Wed, Jan 24, 2024 at 12:08:33PM +0900, Akihiko Odaki wrote: > On 2024/01/23 17:20, Andrew Jones wrote: > > On Mon, Jan 22, 2024 at 02:55:50PM +, Alex Bennée wrote: > > > From: Akihiko Odaki > > > > > > The effective MXL value matters when booting. > > > > I'd prefer this commit message ge

[PATCH] tests/qtest: Bump timeouts of boot_sector_test()-based tests to 610 seconds

We're still seeing timeouts in qtests that use a TCG payload with TCI on a slow k8s runner: https://gitlab.com/qemu-project/qemu/-/jobs/5990992722 So we should bump the timeout of cdrom-test to see whether that fixes the issue. Now, cdrom-test, as bios-tables-test, pxe-test and vmgenid-test use

Re: [PATCH] tests/qtest: Bump timeouts of boot_sector_test()-based tests to 610 seconds

On Wed, Jan 24, 2024 at 09:44:12AM +0100, Thomas Huth wrote: > We're still seeing timeouts in qtests that use a TCG payload with TCI > on a slow k8s runner: > > https://gitlab.com/qemu-project/qemu/-/jobs/5990992722 > > So we should bump the timeout of cdrom-test to see whether that > fixes the

Re: [NOTFORMERGE PATCH 2/2] gitlab: Add Loongarch64 KVM-only build

Hi, 在 2024/1/11 下午7:26, Philippe Mathieu-Daudé 写道: On 11/1/24 10:51, gaosong wrote: 在 2024/1/11 下午5:04, Thomas Huth 写道: On 11/01/2024 09.50, gaosong wrote: 在 2024/1/11 下午4:20, Thomas Huth 写道: On 11/01/2024 08.37, gaosong wrote: LoongArch no support these cmds  or some problems . -    "gva

Re: [PULL 03/15] tests/acpi/bios-tables-test: do not write new blobs unless there are changes

On Fri, 1 Dec 2023 12:15:16 -0500 "Michael S. Tsirkin" wrote: > From: Ani Sinha > > When dumping table blobs using rebuild-expected-aml.sh, table blobs from all > test variants are dumped regardless of whether there are any actual changes to > the tables or not. This creates lot of new files fo

Re: [PATCH 3/6] hw/display/virtio-gpu-udmabuf: Use RCU_READ macro

On Wed, 24 Jan 2024 09:41, Philippe Mathieu-Daudé wrote: Replace the manual rcu_read_(un)lock calls by the WITH_RCU_READ_LOCK_GUARD macro (See commit ef46ae67ba "docs/style: call out the use of GUARD macros"). Signed-off-by: Philippe Mathieu-Daudé --- hw/display/virtio-gpu-udmabuf.c | 6 +++---

Re: [PATCH 6/6] hw/virtio/vhost: Use RCU_READ macro

On Wed, 24 Jan 2024 09:42, Philippe Mathieu-Daudé wrote: Replace the manual rcu_read_(un)lock calls by the WITH_RCU_READ_LOCK_GUARD macro (See commit ef46ae67ba "docs/style: call out the use of GUARD macros"). Signed-off-by: Philippe Mathieu-Daudé --- hw/virtio/vhost.c | 6 +++--- 1 file change

Re: [PATCH 4/6] hw/scsi/virtio-scsi: Use RCU_READ macro

On Wed, 24 Jan 2024 09:41, Philippe Mathieu-Daudé wrote: Replace the manual rcu_read_(un)lock calls by the WITH_RCU_READ_LOCK_GUARD macro (See commit ef46ae67ba "docs/style: call out the use of GUARD macros"). Signed-off-by: Philippe Mathieu-Daudé --- hw/scsi/virtio-scsi.c | 12 ++-- 1

RE: [PATCH rfcv1 2/6] hw/pci: introduce pci_device_set/unset_iommu_device()

>-Original Message- >From: Eric Auger >Subject: Re: [PATCH rfcv1 2/6] hw/pci: introduce >pci_device_set/unset_iommu_device() > > > >On 1/23/24 10:25, Duan, Zhenzhong wrote: >> >>> -Original Message- >>> From: Cédric Le Goater >>> Subject: Re: [PATCH rfcv1 2/6] hw/pci: introduce

RE: [PATCH rfcv1 4/6] vfio: initialize IOMMUFDDevice and pass to vIOMMU

>-Original Message- >From: Cédric Le Goater >Subject: Re: [PATCH rfcv1 4/6] vfio: initialize IOMMUFDDevice and pass to >vIOMMU > >On 1/23/24 10:46, Duan, Zhenzhong wrote: >> >> >>> -Original Message- >>> From: Cédric Le Goater >>> Subject: Re: [PATCH rfcv1 4/6] vfio: initialize

Re: [PATCH 5/6] hw/vfio/common: Use RCU_READ macros

On Wed, 24 Jan 2024 09:42, Philippe Mathieu-Daudé wrote: Replace the manual rcu_read_(un)lock calls by the *RCU_READ_LOCK_GUARD macros (See commit ef46ae67ba "docs/style: call out the use of GUARD macros"). Signed-off-by: Philippe Mathieu-Daudé --- hw/vfio/common.c | 34 ---

Re: [PATCH 1/6] accel/tcg/cpu-exec: Use RCU_READ macro

On Wed, 24 Jan 2024 09:41, Philippe Mathieu-Daudé wrote: Replace the manual rcu_read_(un)lock calls by the WITH_RCU_READ_LOCK_GUARD macro (See commit ef46ae67ba "docs/style: call out the use of GUARD macros"). Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/cpu-exec.c | 24

Re: [PULL 03/15] tests/acpi/bios-tables-test: do not write new blobs unless there are changes

> On 24-Jan-2024, at 14:28, Igor Mammedov wrote: > > On Fri, 1 Dec 2023 12:15:16 -0500 > "Michael S. Tsirkin" wrote: > >> From: Ani Sinha >> >> When dumping table blobs using rebuild-expected-aml.sh, table blobs from all >> test variants are dumped regardless of whether there are any actua

[PATCH 0/9] accel/tcg: Extract some x86-specific code

accel/tcg/ ought to be target agnostic. This series remove some x86 code, addressing part of "Work still remains" from Anjo's series: https://lore.kernel.org/qemu-devel/20240119144024.14289-1-a...@rev.ng/ Based-on: <20240124075609.14756-1-phi...@linaro.org> "Move perf and debuginfo suppo

[PATCH 1/9] accel/tcg: Rename tcg_ss[] -> tcg_specific_ss[] in meson

tcg_ss[] source set contains target-specific units. Rename it as 'tcg_specific_ss[]' for clarity. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/meson.build | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build index 4

[PATCH 2/9] accel/tcg: Rename tcg_cpus_destroy() -> tcg_cpu_destroy()

tcg_cpus_destroy() operates on a single vCPU, rename it as 'tcg_cpu_destroy'. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/tcg-accel-ops.h | 2 +- accel/tcg/tcg-accel-ops-mttcg.c | 2 +- accel/tcg/tcg-accel-ops-rr.c| 2 +- accel/tcg/tcg-accel-ops.c | 2 +- 4 files changed,

[PATCH 3/9] accel/tcg: Rename tcg_cpus_exec() -> tcg_cpu_exec()

tcg_cpus_exec() operates on a single vCPU, rename it as 'tcg_cpu_exec'. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/tcg-accel-ops.h | 2 +- accel/tcg/tcg-accel-ops-mttcg.c | 2 +- accel/tcg/tcg-accel-ops-rr.c| 2 +- accel/tcg/tcg-accel-ops.c | 2 +- 4 files changed, 4 ins

[PATCH 5/9] accel/tcg: Hoist CPUClass arg to functions with external linkage

Hoist the CPUClass argument from most of these internal helpers: - check_for_breakpoints_slow - check_for_breakpoints() - cpu_tb_exec() - cpu_exec_enter() - cpu_exec_exit() - cpu_handle_halt() - cpu_handle_debug_exception() - cpu_handle_exception() - need_replay_interrupt() - cpu_handle_

[PATCH 8/9] accel/tcg: Introduce TCGCPUOps::cpu_exec_halt() handler

In order to make accel/tcg/ target agnostic, introduce the cpu_exec_halt() handler. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/tcg-cpu-ops.h | 2 ++ accel/tcg/cpu-exec.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/cor

Re: [PATCH 0/9] accel/tcg: Extract some x86-specific code

On 24/1/24 11:16, Philippe Mathieu-Daudé wrote: accel/tcg/ ought to be target agnostic. This series remove some x86 code, addressing part of "Work still remains" from Anjo's series: Oops, s/Anjo/Anton/ https://lore.kernel.org/qemu-devel/20240119144024.14289-1-a...@rev.ng/ Based-on: <20240124

[PATCH 4/9] accel/tcg: Un-inline icount_exit_request() for clarity

Convert packed logic to dumb icount_exit_request() helper. No functional change intended. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/cpu-exec.c | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 6b3f669

[PATCH 6/9] accel/tcg: Introduce TCGCPUOps::need_replay_interrupt() handler

In order to make accel/tcg/ target agnostic, introduce the need_replay_interrupt() handler. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/tcg-cpu-ops.h | 5 + accel/tcg/cpu-exec.c | 5 - 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/include/hw/core/tc

[PATCH 9/9] target/i386: Extract x86_cpu_exec_halt() from accel/tcg/

Move this x86-specific code out of the generic accel/tcg/. Reported-by: Anton Johansson Signed-off-by: Philippe Mathieu-Daudé --- target/i386/tcg/helper-tcg.h| 1 + accel/tcg/cpu-exec.c| 12 target/i386/tcg/sysemu/seg_helper.c | 13 + target/i38

[PATCH 7/9] target/i386: Extract x86_need_replay_interrupt() from accel/tcg/

Move this x86-specific code out of the generic accel/tcg/. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/tcg/helper-tcg.h| 1 + accel/tcg/cpu-exec.c| 9 - target/i386/tcg/sysemu/seg_helper.c | 10 ++ target/i386/tcg/tcg-cpu.c | 1 + 4

Re: [PATCH 4/6] hw/scsi/virtio-scsi: Use RCU_READ macro

On 24/1/24 10:17, Manos Pitsidianakis wrote: On Wed, 24 Jan 2024 09:41, Philippe Mathieu-Daudé wrote: Replace the manual rcu_read_(un)lock calls by the WITH_RCU_READ_LOCK_GUARD macro (See commit ef46ae67ba "docs/style: call out the use of GUARD macros"). Signed-off-by: Philippe Mathieu-Daudé

[PATCH v2 1/2] igb: fix link state on resume

On resume igb_vm_state_change() always calls igb_autoneg_resume() that sets link_down to false, and thus activates the link even if we have disabled it. The problem can be reproduced starting qemu in paused state (-S) and then set the link to down. When we resume the machine the link appears to be

[PULL 7/7] util/uri: Remove unused macros ISA_RESERVED() and ISA_GEN_DELIM()

They are not used anywhere, so there's no need to keep them around. Reviewed-by: Stefan Weil Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: "Daniel P. Berrangé" Message-ID: <20240123182247.432642-5-th...@redhat.com> Reviewed-by: Richard Henderson Signed-off-by: Thomas Huth --- util/uri.c |

[PULL 1/7] tests/qtest: Bump timeout of the boot-serial-test to 360 seconds

On the slow k8s CI runner, the test sometimes takes more than 240 seconds. See for example this run here where it took ~ 267 seconds: https://gitlab.com/qemu-project/qemu/-/jobs/5806087027#L4769 Thus we have to bump the timeout here even further to be on the safe side. Let's use 360 seconds whic

[PULL 5/7] util/uri: Remove unused functions uri_resolve() and uri_resolve_relative()

These rather complex functions have never been used since they've been introduced in 2012, so looks like they are not really useful for QEMU. And since the static normalize_uri_path() function is also only used by uri_resolve(), we can remove that function now, too. Reviewed-by: Stefan Weil Revie

[PULL 3/7] tests/qtest: Bump timeouts of boot_sector_test()-based tests to 610 seconds

We're still seeing timeouts in qtests that use a TCG payload with TCI on a slow k8s runner: https://gitlab.com/qemu-project/qemu/-/jobs/5990992722 So we should bump the timeout of cdrom-test to see whether that fixes the issue. Now, cdrom-test, as bios-tables-test, pxe-test and vmgenid-test use

[PULL 6/7] util/uri: Remove the uri_string_escape() function

Now that uri_resolve_relative() has been removed, this function is not used in QEMU anymore - and if somebody needs this functionality, they can simply use g_uri_escape_string() from the glib instead. Reviewed-by: Stefan Weil Reviewed-by: "Daniel P. Berrangé" Message-ID: <20240123182247.432642-4

[PULL 2/7] tests/unit/test-iov: Fix timeout problem on NetBSD and OpenBSD

The test-iov code uses usleep() with small values (<= 30) in some nested loops with many iterations. This causes a small delay on OSes like Linux that have a precise sleeping mechanism, but on systems like NetBSD and OpenBSD, each usleep() call takes multiple microseconds, which then sum up in a to

[PULL 0/7] Test timeout fixes and URI code clean up

Hi Peter! The following changes since commit 09be34717190c1620f0c6e5c8765b8da354aeb4b: Merge tag 'pull-request-2024-01-19' of https://gitlab.com/thuth/qemu into staging (2024-01-20 17:22:16 +) are available in the Git repository at: https://gitlab.com/thuth/qemu.git tags/pull-request-

[PULL 4/7] util/uri: Remove uri_string_unescape()

uri_string_unescape() basically does the same as the glib function g_uri_unescape_segment(). So we can get rid of our implementation completely by simply using the glib function instead. Suggested-by: Stefan Weil Suggested-by: Paolo Bonzini Message-ID: <20240123182247.432642-2-th...@redhat.com>

[PATCH v2 2/2] e1000e: fix link state on resume

On resume e1000e_vm_state_change() always calls e1000e_autoneg_resume() that sets link_down to false, and thus activates the link even if we have disabled it. The problem can be reproduced starting qemu in paused state (-S) and then set the link to down. When we resume the machine the link appears

[PATCH v3 2/2] ui/clipboard: add asserts for update and request

Should an issue like CVE-2023-6683 ever appear again in the future, it will be more obvious which assumption was violated. Suggested-by: Marc-André Lureau Signed-off-by: Fiona Ebner --- Changes in v3: * Turn check for update into an assertion. * Split out into a separate patch. ui/cli

[PATCH v3 1/2] ui/clipboard: mark type as not available when there is no data

With VNC, a client can send a non-extended VNC_MSG_CLIENT_CUT_TEXT message with len=0. In qemu_clipboard_set_data(), the clipboard info will be updated setting data to NULL (because g_memdup(data, size) returns NULL when size is 0). If the client does not set the VNC_ENCODING_CLIPBOARD_EXT feature

Re: [PATCH v3 2/2] ui/clipboard: add asserts for update and request

On Wed, Jan 24, 2024 at 2:59 PM Fiona Ebner wrote: > > Should an issue like CVE-2023-6683 ever appear again in the future, > it will be more obvious which assumption was violated. > > Suggested-by: Marc-André Lureau > Signed-off-by: Fiona Ebner Reviewed-by: Marc-André Lureau thanks > --- > >

Re: [PATCH v3 1/2] ui/clipboard: mark type as not available when there is no data

On Wed, Jan 24, 2024 at 2:59 PM Fiona Ebner wrote: > > With VNC, a client can send a non-extended VNC_MSG_CLIENT_CUT_TEXT > message with len=0. In qemu_clipboard_set_data(), the clipboard info > will be updated setting data to NULL (because g_memdup(data, size) > returns NULL when size is 0). If t

Re: [PATCH 04/31] docs: mark CRIS support as deprecated

On 25/9/23 19:17, Edgar E. Iglesias wrote: On Mon, Sep 25, 2023 at 7:00 PM Alex Bennée > wrote: Daniel P. Berrangé mailto:berra...@redhat.com>> writes: > On Mon, Sep 25, 2023 at 03:48:27PM +0100, Alex Bennée wrote: >> This might be premature but w

[PATCH] configure: run plugin TCG tests again

Commit 39fb3cfc28b ("configure: clean up plugin option handling", 2023-10-18) dropped the CONFIG_PLUGIN line from tests/tcg/config-host.mak, due to confusion caused by the shadowing of $config_host_mak. However, TCG tests were still expecting it. Oops. Put it back, in the meanwhile the shadowing

Re: [PATCH v2] target/i386/host-cpu: Use iommu phys_bits with VFIO assigned devices on Intel h/w

On 1/18/24 20:20, Vivek Kasireddy wrote: Recent updates in OVMF and Seabios have resulted in MMIO regions being placed at the upper end of the physical address space. As a result, when a Host device is assigned to the Guest via VFIO, the following mapping failures occur when VFIO tries to map the

[PATCH] target/riscv/cpu.h: mcountinhibit, mcounteren and scounteren always 32-bit

mcountinhibit, mcounteren and scounteren must always be 32-bit by privileged spec Signed-off-by: Vadim Shakirov --- target/riscv/cpu.h | 6 +++--- target/riscv/machine.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 5

Re: [PULL 11/33] scsi: only access SCSIDevice->requests from one thread

On 23.01.24 18:10, Kevin Wolf wrote: Am 23.01.2024 um 17:40 hat Hanna Czenczek geschrieben: On 21.12.23 22:23, Kevin Wolf wrote: From: Stefan Hajnoczi Stop depending on the AioContext lock and instead access SCSIDevice->requests from only one thread at a time: - When the VM is running only the

[PATCH] target/riscv/csr: Added the ability to delegate LCOFI to VS

In the AIA specification in the paragraph "Virtual interrupts for VS level" it is indicated for interrupts 13-63: if the bit in hideleg is enabled, then the corresponding vsip and vsie bits are aliases to sip and sie Signed-off-by: Vadim Shakirov --- target/riscv/csr.c | 2 +- 1 file changed, 1

Re: [PATCH] target/riscv/cpu.h: mcountinhibit, mcounteren and scounteren always 32-bit

Hi Vadim, On 24/1/24 13:06, Vadim Shakirov wrote: mcountinhibit, mcounteren and scounteren must always be 32-bit by privileged spec Signed-off-by: Vadim Shakirov --- target/riscv/cpu.h | 6 +++--- target/riscv/machine.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff

[PATCH 00/12 qemu] CXL emulation fixes and minor cleanup.

This set includes the majority of fixes I currently have queued up for the CXL emulation. Most have been posted and reviewed before so this is just rebases of those. I've included the _STA fix as that's fairly trivial and didn't seem worth a separate posting. Also included dropping some pointless

[PATCH 01/12] cxl/cdat: Handle cdat table build errors

From: Ira Weiny The callback for building CDAT tables may return negative error codes. This was previously unhandled and will result in potentially huge allocations later on in ct3_build_cdat() Detect the negative error code and defer cdat building. Fixes: f5ee7413d592 ("hw/mem/cxl-type3: Add C

[PATCH 02/12] hw/mem/cxl_type3: Drop handling of failure of g_malloc0()

As g_malloc0 will just exit QEMU on failure there is no point in checking for it failing. Signed-off-by: Jonathan Cameron --- hw/mem/cxl_type3.c | 52 +++--- 1 file changed, 7 insertions(+), 45 deletions(-) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_typ

[PATCH 03/12] hw/pci-bridge/cxl_upstream: Drop g_malloc0() failure handling

As a failure of g_malloc0() will result in QEMU exiting, it won't return a NULL to check. As such, drop the incorrect handling of such NULL returns in the cdat table building code. Signed-off-by: Jonathan Cameron --- hw/pci-bridge/cxl_upstream.c | 6 -- 1 file changed, 6 deletions(-) diff

[PATCH 04/12] cxl/cdat: Fix header sum value in CDAT checksum

From: Ira Weiny The addition of the DCD support for CXL type-3 devices extended the CDAT table large enough that the checksum being returned was incorrect.[1] This was because the checksum value was using the header length field rather than each of the 4 bytes of the length field. This was prev

[PATCH 05/12] hw/cxl/mbox: Remove dead code

From: Davidlohr Bueso Two functions were reported to have dead code, remove the bogus branches altogether, as well as a misplaced qemu_log call. Reported-by: Peter Maydell Signed-off-by: Davidlohr Bueso Signed-off-by: Jonathan Cameron --- hw/cxl/cxl-mailbox-utils.c | 43 +

[PATCH 06/12] hw/cxl/device: read from register values in mdev_reg_read()

From: Hyeonggon Yoo <42.hye...@gmail.com> In the current mdev_reg_read() implementation, it consistently returns that the Media Status is Ready (01b). This was fine until commit 25a52959f99d ("hw/cxl: Add support for device sanitation") because the media was presumed to be ready. However, as per

[PATCH 07/12] hw/cxl: Pass CXLComponentState to cache_mem_ops

From: Li Zhijian cache_mem_ops.{read,write}() interprets opaque as CXLComponentState(cxl_cstate) instead of ComponentRegisters(cregs). Fortunately, cregs is the first member of cxl_cstate, so their values are the same. Fixes: 9e58f52d3f8 ("hw/cxl/component: Introduce CXL components (8.1.x, 8.2.

[PATCH 08/12] hw/cxl: Pass NULL for a NULL MemoryRegionOps

From: Li Zhijian a NULL parameter is enough for a NULL MemoryRegionOps Signed-off-by: Li Zhijian Signed-off-by: Jonathan Cameron --- hw/cxl/cxl-component-utils.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c ind

[PATCH 09/12] hw/mem/cxl_type3: Fix potential divide by zero reported by coverity

Fixes Coverity ID 1522368. Currently error_fatal is set if interleave_ways_dec() is going to return 0 but we should handle that zero return explicitly. Reported-by: Stefan Hajnoczi Signed-off-by: Jonathan Cameron --- Note this is a stop gap until a more complex HDM decoder verification series.

[PATCH 10/12] tests/acpi: Allow update of DSDT.cxl

The _STA value returned currently indicates the ACPI0017 device is not enabled. Whilst this isn't a real device, setting _STA like this may prevent an OS from enumerating it correctly and hence from parsing the CEDT table. Signed-off-by: Jonathan Cameron --- tests/qtest/bios-tables-test-allowed

[PATCH 11/12] hw/i386: Fix _STA return value for ACPI0017

Found whilst testing a series for the linux kernel that actually bothers to check if enabled is set. 0xB is the option used for vast majority of DSDT entries in QEMU. It is a little odd for a device that doesn't really exist and is simply a hook to tell the OS there is a CEDT table but 0xB seems a

[PATCH 12/12] tests/acpi: Update DSDT.cxl to reflect change _STA return value.

_STA will now return 0xB (in common with most other devices) rather than not setting the bits to indicate this fake device has not been enabled, and self tests haven't passed. Signed-off-by: Jonathan Cameron --- tests/qtest/bios-tables-test-allowed-diff.h | 1 - tests/data/acpi/q35/DSDT.cxl

qemu riscv, thead c906, Linux boot regression

Hi! I bumped the RISC-V Linux kernel CI to use qemu 8.2.0, and realized that thead c906 didn't boot anymore. Bisection points to commit d6a427e2c0b2 ("target/riscv/cpu.c: restrict 'marchid' value") Reverting that commit, or the hack below solves the boot issue: --8<-- diff --git a/target/riscv/c

Re: Call for GSoC/Outreachy internship project ideas

On Tue, 23 Jan 2024 at 22:47, Gurchetan Singh wrote: > Title: > - Improve display integration for upstream virtualized graphics > > Summary: > - The Rutabaga Virtual Graphics interface's UI integration upstream is very > simple, but in deployment it will be complex. This project aims to bridge

[PATCH v4 1/2] target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG_BITS

From: Conor Dooley A cpu may not have the same xlen as the compile time target, and misa_mxl_max is the source of truth for what the hart supports. The conversion from misa_mxl_max to xlen already has one user, so introduce a helper and use that to populate the isa string. Link: https://lore.ke

[PATCH v4 0/2] riscv: support new isa extension detection devicetree properties

From: Conor Dooley Making it a series to keep the standalone change to riscv_isa_string() that Drew reported separate. Changes in v4: - Other than a rebase, add a helper for the mxl_max to xlen conversion Changes in v3: - g_free() isa_extensions too - use misa_mxl_max rather than the compile ta

[PATCH v4 2/2] target/riscv: support new isa extension detection devicetree properties

From: Conor Dooley A few months ago I submitted a patch to various lists, deprecating "riscv,isa" with a lengthy commit message [0] that is now commit aeb71e42caae ("dt-bindings: riscv: deprecate riscv,isa") in the Linux kernel tree. Primarily, the goal was to replace "riscv,isa" with a new set o

Re: [PATCH v2] target/i386/host-cpu: Use iommu phys_bits with VFIO assigned devices on Intel h/w

On 24/1/24 12:53, Cédric Le Goater wrote: On 1/18/24 20:20, Vivek Kasireddy wrote: Recent updates in OVMF and Seabios have resulted in MMIO regions being placed at the upper end of the physical address space. As a result, when a Host device is assigned to the Guest via VFIO, the following mappin

Re: [PATCH] hw/i386/pc_piix: Make piix_intx_routing_notifier_xen() more device independent

On 14/1/24 13:25, Michael S. Tsirkin wrote: On Sun, Jan 14, 2024 at 12:21:59PM +, Bernhard Beschow wrote: Am 7. Januar 2024 23:16:23 UTC schrieb Bernhard Beschow : This is a follow-up on commit 89965db43cce "hw/isa/piix3: Avoid Xen-specific variant of piix3_write_config()" which introduce

Re: [PATCH 1/9] gitlab: fix s390x tag for avocado-system-centos

On 7/1/24 18:01, Nicholas Piggin wrote: The 390x tag should be s390x. Signed-off-by: Nicholas Piggin --- .gitlab-ci.d/buildtest.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) FTR this has been merged as commit cdd30f369a.

Re: qemu riscv, thead c906, Linux boot regression

On Wed, Jan 24, 2024 at 01:49:51PM +0100, Björn Töpel wrote: > Hi! > > I bumped the RISC-V Linux kernel CI to use qemu 8.2.0, and realized that > thead c906 didn't boot anymore. Bisection points to commit d6a427e2c0b2 > ("target/riscv/cpu.c: restrict 'marchid' value") > > Reverting that commit, o

Re: [PATCH v4 1/2] target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG_BITS

On Wed, Jan 24, 2024 at 12:55:49PM +, Conor Dooley wrote: > From: Conor Dooley > > A cpu may not have the same xlen as the compile time target, and > misa_mxl_max is the source of truth for what the hart supports. > > The conversion from misa_mxl_max to xlen already has one user, so > introd

Re: [PATCH v3 00/46] Rework matching of network devices to -nic options

Hi Jason, I think this series probably lives or dies with you. I think it's a worthwhile cleanup, but I no longer have an immediate need for it; I shipped a slightly ugly workaround in QEMU 8.2. Please could you let me know if it's worth persisting with it? Thanks. On Mon, 2024-01-08 at 20:26 +

Re: [PATCH] tests/avocado/mem-addr-space-check: Replace assertEquals() for Python 3.12

On 16/11/23 07:19, Thomas Huth wrote: assertEquals() has been removed in Python 3.12 and should be replaced by assertEqual(). See: https://docs.python.org/3.12/whatsnew/3.12.html#id3 Signed-off-by: Thomas Huth --- Note: The test has just been merged, that's why I missed this file in my earl

Re: [PATCH 1/3] virtio-iommu: Add an option to define the input range width

Hi Alex, On 1/24/24 00:51, Alex Williamson wrote: > On Tue, 23 Jan 2024 19:15:55 +0100 > Eric Auger wrote: > >> aw-bits is a new option that allows to set the bit width of >> the input address range. This value will be used as a default for >> the device config input_range.end. By default it is s

Re: [PATCH 2/6] hw/9pfs/9p-synth: Use RCU_READ macro

On Wednesday, January 24, 2024 8:41:57 AM CET Philippe Mathieu-Daudé wrote: > Replace the manual rcu_read_(un)lock calls by the > WITH_RCU_READ_LOCK_GUARD macro (See commit ef46ae67ba > "docs/style: call out the use of GUARD macros"). > > Signed-off-by: Philippe Mathieu-Daudé > --- Acked-by: Chr

Re: qemu riscv, thead c906, Linux boot regression

Conor Dooley writes: > On Wed, Jan 24, 2024 at 01:49:51PM +0100, Björn Töpel wrote: >> Hi! >> >> I bumped the RISC-V Linux kernel CI to use qemu 8.2.0, and realized that >> thead c906 didn't boot anymore. Bisection points to commit d6a427e2c0b2 >> ("target/riscv/cpu.c: restrict 'marchid' value")

[PATCH] tests/qemu-iotests: Bump timeout of iothreads-stream test

Current value of timeout=0.1 is sometimes too tight. Bump timeout to 0.3 to avoid test failures. Signed-off-by: Saif Abrar --- tests/qemu-iotests/tests/iothreads-stream | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/qemu-iotests/tests/iothreads-stream b/tests/qemu-iot

Re: [PATCH 1/3] virtio-iommu: Add an option to define the input range width

On Wed, 24 Jan 2024 14:14:19 +0100 Eric Auger wrote: > Hi Alex, > > On 1/24/24 00:51, Alex Williamson wrote: > > On Tue, 23 Jan 2024 19:15:55 +0100 > > Eric Auger wrote: > > > >> aw-bits is a new option that allows to set the bit width of > >> the input address range. This value will be used

Re: qemu riscv, thead c906, Linux boot regression

On 1/24/24 09:49, Björn Töpel wrote: Hi! I bumped the RISC-V Linux kernel CI to use qemu 8.2.0, and realized that thead c906 didn't boot anymore. Bisection points to commit d6a427e2c0b2 ("target/riscv/cpu.c: restrict 'marchid' value") Reverting that commit, or the hack below solves the boot

[PATCH 0/5 qemu] hw/cxl: Update CXL emulation to reflect and reference r3.1

Last year a reviewer requested that the versioning and references in the CXL code pointed out at a specific available specification revision (Sorry I can't remember who!) That drew my attention to the complete mess of versioning with many comments not calling out which version of CXL they were ref

[PATCH 1/5] hw/cxl: Update HDM Decoder capability to version 3

Part of standardizing the QEMU code on CXL r3.1. No fuctional changes as everything added is optional and it is set as not implemented. Signed-off-by: Jonathan Cameron --- include/hw/cxl/cxl_component.h | 16 ++-- hw/cxl/cxl-component-utils.c | 10 +- 2 files changed, 23 in

[PATCH 2/5] hw/cxl: Update link register definitions.

Not actually implemented, but we need to reserve more space for the larger version of the structure in CXL r3.1. Signed-off-by: Jonathan Cameron --- include/hw/cxl/cxl_component.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/cxl/cxl_component.h b/include/hw/

Re: qemu riscv, thead c906, Linux boot regression

o,zero > | 0x80201044: 18051073 csrrw zero,satp,a0 > | > | riscv_cpu_do_interrupt: hart:0, async:0, cause:000c, > epc:0x80201048, tval:0x80201048, desc=exec_page_fault > | riscv_cpu_do_interrupt: hart:0, async:0, cause:00

[PATCH 3/5] hw/cxl: Update RAS Capability Definitions for version 3.

Part of bringing all of CXL emulation inline with CXL r3.1. No functional changes. Signed-off-by: Jonathan Cameron --- include/hw/cxl/cxl_component.h | 5 - hw/cxl/cxl-component-utils.c | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/include/hw/cxl/cxl_component.h b/

[PATCH 4/5] hw/cxl: Update mailbox status registers.

Whilst the reported version was 1 so there should be no changes, a couple of fields (where the value 0 was valid) were not defined. Make those explicit and update references to be based on CXL r3.1. Signed-off-by: Jonathan Cameron --- include/hw/cxl/cxl_device.h | 17 ++--- hw/cxl/cx

[PATCH 5/5] hw/cxl: Standardize all references on CXL r3.1 and minor updates

Previously not all references mentioned any spec version at all. Given r3.1 is the current specification available for evaluation at www.computeexpresslink.org update references to refer to that. Hopefully this won't become a never ending job. A few structure definitions have been updated to add n

Re: [PATCH 1/3] virtio-iommu: Add an option to define the input range width

Hi Alex, On 1/24/24 14:37, Alex Williamson wrote: > On Wed, 24 Jan 2024 14:14:19 +0100 > Eric Auger wrote: > >> Hi Alex, >> >> On 1/24/24 00:51, Alex Williamson wrote: >>> On Tue, 23 Jan 2024 19:15:55 +0100 >>> Eric Auger wrote: >>> aw-bits is a new option that allows to set the bit width

Re: [PATCH 04/31] docs: mark CRIS support as deprecated

On Wed, Jan 24, 2024 at 12:06 PM Philippe Mathieu-Daudé wrote: > On 25/9/23 19:17, Edgar E. Iglesias wrote: > > > > On Mon, Sep 25, 2023 at 7:00 PM Alex Bennée > > wrote: > > > > > > Daniel P. Berrangé > > writes: > > > > >

Re: [PATCH 5/6] hw/vfio/common: Use RCU_READ macros

On 24/1/24 10:25, Manos Pitsidianakis wrote: On Wed, 24 Jan 2024 09:42, Philippe Mathieu-Daudé wrote: Replace the manual rcu_read_(un)lock calls by the *RCU_READ_LOCK_GUARD macros (See commit ef46ae67ba "docs/style: call out the use of GUARD macros"). Signed-off-by: Philippe Mathieu-Daudé ---

Re: [PATCH v3 1/2] ui/clipboard: mark type as not available when there is no data

Tested the two paths that could lead to this segfault. KRDC and noVNC running simultaneously on wayland and both running on Xorg when the clipboard is cleared. Everything worked fine and no segfault happens. On 2024-01-24 11:57, Fiona Ebner wrote: With VNC, a client can send a non-extended VNC

Re: [PATCH 1/3] virtio-iommu: Add an option to define the input range width

On Wed, 24 Jan 2024 14:57:41 +0100 Eric Auger wrote: > Hi Alex, > > On 1/24/24 14:37, Alex Williamson wrote: > > On Wed, 24 Jan 2024 14:14:19 +0100 > > Eric Auger wrote: > > > >> Hi Alex, > >> > >> On 1/24/24 00:51, Alex Williamson wrote: > >>> On Tue, 23 Jan 2024 19:15:55 +0100 > >>> Eric

Re: [PATCH v2] target/i386/host-cpu: Use iommu phys_bits with VFIO assigned devices on Intel h/w

On 1/24/24 13:58, Philippe Mathieu-Daudé wrote: > On 24/1/24 12:53, Cédric Le Goater wrote: >> On 1/18/24 20:20, Vivek Kasireddy wrote: >>> Recent updates in OVMF and Seabios have resulted in MMIO regions >>> being placed at the upper end of the physical address space. As a >>> result, when a Host

Re: [PATCH v3 2/9] hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support

On Tue, 7 Nov 2023 10:07:06 -0800 nifan@gmail.com wrote: > From: Fan Ni > > Per cxl spec 3.0, add dynamic capacity region representative based on > Table 8-126 and extend the cxl type3 device definition to include dc region > information. Also, based on info in 8.2.9.8.9.1, add 'Get Dynamic

Re: Why invtsc (CPUID_APM_INVTSC) is unmigratable?

On 1/23/2024 11:39 PM, Marcelo Tosatti wrote: On Sat, Jan 20, 2024 at 05:44:07PM +0800, Xiaoyao Li wrote: On 1/20/2024 12:14 AM, Marcelo Tosatti wrote: On Fri, Jan 19, 2024 at 02:46:22PM +0800, Xiaoyao Li wrote: I'm wondering why CPUID_APM_INVTSC is set as unmigratable_flags. Could anyone expl

Re: [PATCH v3 3/9] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices

On Tue, 7 Nov 2023 10:07:07 -0800 nifan@gmail.com wrote: > From: Fan Ni > > Rename mem_size as static_mem_size for type3 memdev to cover static RAM and > pmem capacity, preparing for the introduction of dynamic capacity to support > dynamic capacity devices. > > Signed-off-by: Fan Ni Hi F

Re: [PATCH v2 3/4] qapi: blockdev-backup: add discard-source parameter

Am 17.01.24 um 17:07 schrieb Vladimir Sementsov-Ogievskiy: > Add a parameter that enables discard-after-copy. That is mostly useful > in "push backup with fleecing" scheme, when source is snapshot-access > format driver node, based on copy-before-write filter snapshot-access > API: > > [guest]

hexagon: modeling a shared lock state

Philippe, For hexagon sysemu, while internally reviewing patches to be upstreamed we noticed that our design for a lock instruction is not quite suitable. The k0lock instruction will halt if some other hexagon hardware CPU has already claimed the kernel lock, only to continue executing once so

Re: [PATCH 1/3] virtio-iommu: Add an option to define the input range width

Hi Alex, On 1/24/24 15:15, Alex Williamson wrote: > On Wed, 24 Jan 2024 14:57:41 +0100 > Eric Auger wrote: > >> Hi Alex, >> >> On 1/24/24 14:37, Alex Williamson wrote: >>> On Wed, 24 Jan 2024 14:14:19 +0100 >>> Eric Auger wrote: >>> Hi Alex, On 1/24/24 00:51, Alex Williamson wrot

Re: [PATCH v3 4/9] hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices

On Tue, 7 Nov 2023 10:07:08 -0800 nifan@gmail.com wrote: > From: Fan Ni > > With the change, when setting up memory for type3 memory device, we can > create DC regions. > A property 'num-dc-regions' is added to ct3_props to allow users to pass the > number of DC regions to create. To make i

Re: [PATCH v2] cpu-exec: simplify jump cache management

On Tue, Jan 23, 2024 at 11:02 PM Alex Bennée wrote: > However I would note that TranslationBlock has the comment: > > * jmp_lock also protects the CF_INVALID cflag; a jump must not be chained > * to a destination TB that has CF_INVALID set. > > which I don't think holds true. It does, b

Re: [PATCH v3 5/9] hw/mem/cxl_type3: Add host backend and address space handling for DC regions

On Tue, 7 Nov 2023 10:07:09 -0800 nifan@gmail.com wrote: > From: Fan Ni > > Add (file/memory backed) host backend, all the dynamic capacity regions > will share a single, large enough host backend. Set up address space for > DC regions to support read/write operations to dynamic capacity fo

Re: [PATCH v3 2/9] hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support

> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h > index 4f2ef0b899..334c51fddb 100644 > --- a/include/hw/cxl/cxl_device.h > +++ b/include/hw/cxl/cxl_device.h > @@ -235,6 +235,7 @@ typedef struct cxl_device_state { > uint64_t mem_size; > uint64_t pmem_size; >

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