This series has also been successfully tested in x86_64.
Tested-by: Mario Casquero
On Thu, Jan 18, 2024 at 4:08 AM Zhenyu Zhang wrote:
>
> [PATCH v1 2/2] memory-device: reintroduce memory region size check
>
> Test on 64k basic page size aarch64
> The patches work well on my Ampere host.
> The
Hello Nick,
On 1/18/24 16:06, Nicholas Piggin wrote:
This is mostly TCG core emulation improvements and fixes. I
got the chiptod model in there because it's intertwined with
TFMR SPR.
Other non-TCG patches are spapr MSR entry point change which
goes together with the other machine check / MSR[M
On 1/18/24 15:09, Nicholas Piggin wrote:
This includes a number of improvements and fixes. Importantly there
is a change for QEMU platforms to permit the ChipTOD to be initialised
if it is present in the device tree. This will facilitate ChipTOD
enablement in pnv.
Signed-off-by: Nicholas Piggin
On 1/18/24 15:14, Nicholas Piggin wrote:
POWER10 is the latest IBM Power machine. Although it is not offered in
"OPAL mode" (i.e., powernv configuration), so there is a case that it
should remain at powernv9, most of the development work is going into
powernv10 at the moment.
Signed-off-by: Nich
Fabiano,
On Thu, Jan 18, 2024 at 01:49:48PM -0300, Fabiano Rosas wrote:
> Here's the second half of adding a migration compatibility test to CI.
>
> We've already added support for running the full set of migration
> tests with two QEMU binaries since commit 5050ad2a380
> ("tests/qtest/migration:
On Fri, Jan 19, 2024 at 10:12:37AM +0300, Michael Tokarev wrote:
> 17.01.2024 19:42, Fabiano Rosas :
> > Avocado needs sqlite3:
>
> > --- a/tests/docker/dockerfiles/opensuse-leap.docker
> > +++ b/tests/docker/dockerfiles/opensuse-leap.docker
> > @@ -90,6 +90,7 @@ RUN zypper update -y && \
> >
On Tue, 16 Jan 2024 at 07:57, Thomas Huth wrote:
>
> Hi Peter!
>
> The following changes since commit 977542ded7e6b28d2bc077bcda24568c716e393c:
>
> Merge tag 'pull-testing-updates-120124-2' of
> https://gitlab.com/stsquad/qemu into staging (2024-01-12 14:02:53 +)
>
> are available in the G
On Wed, 17 Jan 2024 at 09:43, Daniel P. Berrangé wrote:
>
> On Wed, Jan 17, 2024 at 09:55:56AM +0530, Ani Sinha wrote:
> > By default, the timeout to receive any specified event from the QEMU VM is
> > 60
> > seconds set by the python avocado test framework. Please see event_wait()
> > and
> > e
On Thu, 18 Jan 2024 at 12:45, Peter Maydell wrote:
>
> v2: dropped the nuvoton changes as the tests didn't pass
> on big-endian hosts.
>
> -- PMM
>
> The following changes since commit 977542ded7e6b28d2bc077bcda24568c716e393c:
>
> Merge tag 'pull-testing-updates-120124-2' of
> https://gitlab.co
Am 11.01.2024 um 11:08 hat Philippe Mathieu-Daudé geschrieben:
> On 11/1/24 10:47, Marc Zyngier wrote:
> > On Thu, 11 Jan 2024 09:39:18 +,
> > Philippe Mathieu-Daudé wrote:
> > >
> > > On 10/1/24 20:53, Philippe Mathieu-Daudé wrote:
> > > > The "aarch64" property is added to ARMCPU when the
>
On Fri, Jan 19, 2024 at 7:42 AM Wentao Jia wrote:
>
>
> VIRTIO_F_IN_ORDER and VIRTIO_F_NOTIFICATION_DATA feature are important feature
> for dpdk vdpa packets transmitting performance, add the 2 features at
> vhost-user
> front-end to negotiation with backend.
>
> Signed-off-by: Kyle Xu
> Signed
On Fri, Jan 19, 2024 at 08:12:18AM +1100, Richard Henderson wrote:
> On 1/16/24 07:21, Ilya Leoshkevich wrote:
> > CVDG is the same as CVD, except that it converts 64 bits into 128,
> > rather than 32 into 64. Use larger data types in the CVD helper and
> > reuse it.
> >
> > Reported-by: Ido Plat
On Wed, Jan 17, 2024 at 11:29:08AM +0100, Eric Auger wrote:
> Hi Peter,
Hi, Eric,
Thanks for the reviews!
>
> On 1/17/24 10:15, pet...@redhat.com wrote:
> > From: Peter Xu
> >
> > There're issue reported that when syetem_reset the VM with an intel iommu
> system_reset
> > device and MT2892 PF(
Hello, Phil, PeterM,
On Thu, Jan 18, 2024 at 04:53:42PM +0100, Philippe Mathieu-Daudé wrote:
> I concur. Devices reset is hard, but bus reset is even harder.
> Having a quick look, the issues tracked by Alex & Peter might
> come from the PCI bridges using the legacy DeviceReset.
The challenges w
On Thu, 2024-01-18 at 16:49 -0300, Daniel Henrique Barboza wrote:
>
>
> On 1/15/24 13:25, Rob Bradford wrote:
> > Following the pattern for 'M' and Zmmul check if either the 'A'
> > extension is enabled or the appropriate split extension for the
> > instruction.
> >
> > Also remove the assumptio
This series changes some printfs to use the trace event framework.
Additionally, it converts some error/warning reporting fprintfs to
error_report/warn_report.
Manos Pitsidianakis (6):
hw/arm/z2: convert DPRINTF to tracepoints
hw/arm/strongarm.c: convert DPRINTF to tracepoints
hw/arm/xen_a
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Signed-off-b
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Signed-off-b
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Signed-off-b
According to the QEMU Coding Style document:
> Do not use printf(), fprintf() or monitor_printf(). Instead, use
> error_report() or error_vreport() from error-report.h. This ensures the
> error is reported in the right place (current monitor or stderr), and in
> a uniform format.
> Use error_print
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Signed-off-b
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Signed-off-b
Following the pattern for 'M' and Zmmul check if either the 'A'
extension is enabled or the appropriate split extension for the
instruction.
Signed-off-by: Rob Bradford
---
target/riscv/insn_trans/trans_rva.c.inc | 56 +++--
1 file changed, 34 insertions(+), 22 deletions(-)
Introduce support for the proposed new (fast-track) Zaamo and Zalrsc
extensions [1] which represent the AMO and LR/SC subsets of the A
extension.
The motivation for the subsets being available separately is that
certain classes of CPUs may choose to only implement a subset for
architectural conv
These extensions represent the atomic operations from A (Zaamo) and the
Load-Reserved/Store-Conditional operations from A (Zalrsc)
Signed-off-by: Rob Bradford
Reviewed-by: Daniel Henrique Barboza
---
target/riscv/cpu.c | 5 +
target/riscv/cpu_cfg.h | 2 ++
2 files changed, 7 insertions(
Peter Maydell writes:
> Convert the musicpal key input device to use
> qemu_add_kbd_event_handler(). This lets us simplify it because we no
> longer need to track whether we're in the middle of a PS/2 multibyte
> key sequence.
>
> In the conversion we move the keyboard handler registration from
'tcg_cflags' is specific to TCG.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231130075958.21285-1-phi...@linaro.org>
---
target/arm/cpu.c | 2 +-
target/i386/cpu.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.c b/
pmu_init() register its event checking the pm_event::supported()
handler. For INST_RETIRED, the event is only registered and the
bit enabled in the PMU Common Event Identification register when
icount is enabled as ICOUNT_PRECISE.
PMU events are TCG-only, hardware accelerators handle them
directly
From: Samuel Tardieu
The shix machine has been designed and used at Télécom Paris from 2003
to 2010. It had been added to QEMU in 2005 and has not been maintained
since. Since nobody is using the physical board anymore nor interested
in maintaining the QEMU port, it is time to deprecate it.
Sign
Since the CPUState::start-powered-off property is irrelevant
to user emulation, restrict it to system emulation.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <2024061817.43150-1-phi...@linaro.org>
---
cpu-target.c | 7 ++-
1 file changed, 6 insertions
Except helper_load_pcc(), all helpers from sys_helper.c
are system-emulation specific. In preparation of restricting
sys_helper.c to system emulation, extract helper_load_pcc()
to clk_helper.c.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231207105426.49339
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-ID: <20231208113529.74067-7-phi...@linaro.org>
---
include/sysemu/cpu-timers.h | 2 +-
include/sysemu/replay.h | 11 ---
stubs/icount.c | 19 ---
3 files changed, 9 insertions(+
From: Max Filippov
When icount and ibreak exceptions are due to happen on the same address
icount has higher precedence.
Signed-off-by: Max Filippov
Acked-by: Richard Henderson
Message-ID: <20231130171920.3798954-3-jcmvb...@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé
---
tests/tcg/xtens
From: Samuel Tardieu
The 16MiB flash device is only used by the deprecated shix machine.
Its code it old and unmaintained, and has never been adapted to the
QOM architecture. It still contains debug statements and uses global
variables. It is time to deprecate it.
Signed-off-by: Samuel Tardieu
From: Gerd Hoffmann
Move the offset calculation, do it once at the start of the function and
let the 'p' variable point directly to the memory location which should
be updated. This makes it simpler to update other buffers than
pfl->storage in an upcoming patch. No functional change.
Signed-of
From: Bernhard Beschow
This is a follow-up on commit 89965db43cce "hw/isa/piix3: Avoid Xen-specific
variant of piix3_write_config()" which introduced
piix_intx_routing_notifier_xen(). This function is implemented in board code but
accesses the PCI configuration space of the PIIX ISA function to d
From: Daniel Hoffman
This conversion is pretty straight-forward. Standardized some formatting
so the +0 and +4 offset cases can recycle the same message.
Signed-off-by: Daniel Hoffman
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20231118231129.2840388-1-dhoff...@gmail.com>
[PMD: Fixed few
Since previous commit, tb_invalidate_phys_page() is not used
anymore in system emulation. Make it static for user emulation
and remove its public declaration in "exec/translate-all.h".
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20231130205600.35727-1-phi...@linaro.org>
Reviewed-by: Richar
Commit e3f7c801f1 introduced the TCGCPUOps::debug_check_breakpoint()
handler, and commit 10c37828b2 "moved breakpoint recognition outside
of translation", so "we no longer need to flush any TBs when changing
BPs".
The last target using tb_invalidate_phys_addr() was converted to the
debug_check_bre
Both cryptodev_backend_set_throttle() and CryptoDevBackendClass::init()
can set their Error** argument. Do not ignore them, return early
on failure. Without that, running into another failure trips
error_setv()'s assertion. Use the ERRP_GUARD() macro as suggested
in commit ae7c80a7bd ("error: New m
'can_do_io' is specific to TCG. It was added to other
accelerators in 626cf8f4c6 ("icount: set can_do_io outside
TB execution"), then likely copy/pasted in commit c97d6d2cdf
("i386: hvf: add code base from Google's QEMU repository").
Having it set in non-TCG code is confusing, so remove it from
QTe
The tcg_cpu_FOO() names are riscv specific, so rename
them as riscv_tcg_cpu_FOO() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Message-ID: <2024020221.35072-6-phi...@linaro
From: Gerd Hoffmann
Add an update buffer where all block updates are staged.
Flush or discard updates properly, so we should never see
half-completed block writes in pflash storage.
Drop a bunch of FIXME comments ;)
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Message-ID:
From: Mark Cave-Ayland
The current code in esp_pci_dma_memory_rw() sets the DMA address to the value
of the DMA_SPA (Starting Physical Address) register which is incorrect: this
means that for each callback from the SCSI layer the DMA address is set back
to the starting address.
In the case wher
From: Raphael Norwitz
I will be leaving Nutanix so updating my email in MAINTAINERS to my
personal email for now.
Signed-off-by: Raphael Norwitz
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <2024092846.111699-1-raphael.norw...@nutanix.com>
Signed-off-by: Philippe Mathieu-Daudé
---
MAI
accel_init_ops_interfaces() is system specific, so
rename it as accel_system_init_ops_interfaces() to
ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Message-ID: <2024020221.35072-2-phi...@linaro.org>
---
ac
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231207105426.49339-3-phi...@linaro.org>
---
target/alpha/sys_helper.c | 3 ---
target/alpha/meson.build | 6 --
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/target/alpha/sys_helper.c b/targ
From: Bibo Mao
When compiling qemu with system KVM mode for LoongArch, header files
in directory linux-headers/asm-loongarch should be used firstly.
Otherwise it fails to find kvm.h on system with old glibc, since
latest kernel header files are not installed.
This patch adds linux_arch definitio
From: Mark Cave-Ayland
The am53c974/dc390 PCI interrupt has two separate sources: the first is from the
internal ESP device, and the second is from the PCI DMA transfer logic.
Update the ESP interrupt handler so that it sets DMA_STAT_SCSIINT rather than
driving the PCI IRQ directly, and introduc
Manos Pitsidianakis writes:
> Tracing DPRINTFs to stderr might not be desired. A developer that relies
> on tracepoints should be able to opt-in to each tracepoint and rely on
> QEMU's log redirection, instead of stderr by default.
>
> This commit converts DPRINTFs in this file that are used for
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have icount_configure()
return a boolean indicating whether an error is set or not.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-ID: <20231208113529.74067-2-phi...@
From: Zhao Liu
The hw/core/cpu.c was split as hw/core/cpu-common.c and
hw/core/cpu-sysemu.c in the commit df4fd7d5c8a3 ("cpu: Split as
cpu-common / cpu-sysemu").
Update the related entry.
Signed-off-by: Zhao Liu
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20240115094852.3597165-2-zhao1..
From: Mark Cave-Ayland
Even though the BLAST command isn't fully implemented in QEMU, the
DMA_STAT_BCMBLT
bit should be set after the command has been issued to indicate that the command
has completed.
This fixes an issue with the DC390 DOS driver which issues the BLAST command as
part of its n
it tags/hw-cpus-20240119
for you to fetch changes up to 7ec5d7d91215815e885d2b38e62256e8fd8e2bce:
configure: Add linux header compile support for LoongArch (2024-01-19
12:28:59 +0100)
HW core patch queue
. Deprecate unmaint
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-ID: <20231208113529.74067-6-phi...@linaro.org>
---
accel/tcg/icount-common.c | 4 +++-
stubs/icount.c| 2 +-
util/async.c | 16 +---
3 files changed, 13 insertions(+), 9 deletions(
Rather than having to lookup for what the 0, 1, 2, ...
icount values are, use a enum definition.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-ID: <20231208113529.74067-4-phi...@linaro.org>
---
include/sysemu/cpu-timers.h | 20 +---
accel/tcg/icoun
The tcg_cpu_FOO() names are x86 specific, so rename
them as x86_tcg_cpu_FOO() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Michael Tokarev
Message-ID: <2024020221.35072-5-phi...@linaro.org>
---
target/i386/tcg/tcg-cpu.c | 32 +
cpu_class_init() is specific to s390x SCLP, so rename
it as sclp_cpu_class_init() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Eric Farman
Message-ID: <2024020221.35072-4-phi...@linaro.org>
---
hw/s39
Keep system/watchpoint.c accelerator-agnostic by moving
TCG specific code to accel/tcg/watchpoint.c. Update meson.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <2024062032.43378-1-phi...@linaro.org>
---
accel/tcg/watchpoint.c | 143 +++
From: Bin Meng
Some ELF files really do have segments of zero size, e.g.:
Program Headers:
Type Offset VirtAddr PhysAddr
FileSizMemSiz Flags Align
RISCV_ATTRIBUT 0x25b8 0x 0x000
cpu_class_init() is common, so rename it as cpu_common_class_init()
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel Henrique Barboza
Message-ID: <2024020221.35072-3-phi...@linaro.org>
---
hw/core/cpu-common.c | 4 ++--
1 file changed, 2 insertions(+),
From: Mark Cave-Ayland
The setting of DMA_STAT_DONE at the end of a DMA transfer can be configured to
generate an interrupt, however the Linux driver manually checks for
DMA_STAT_DONE
being set and if it is, considers that a DMA transfer has completed.
If DMA_STAT_DONE is set but the ESP device
From: Gerd Hoffmann
Use the helper functions we have to read/write multi-byte values
in correct byte order.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20240108160900.104835-3-kra...@redhat.com>
Signed-off-by: Philippe Mat
From: Max Filippov
Don't embed ibreak exception generation into TB and don't invalidate TB
on ibreak address change. Add CPUBreakpoint pointers to xtensa
CPUArchState, use cpu_breakpoint_insert/cpu_breakpoint_remove_by_ref to
manage ibreak breakpoints and provide TCGCPUOps::debug_check_breakpoint
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv1 6/6] intel_iommu: add a framework to check and
>sync host IOMMU cap/ecap
>
>
>
>On 1/18/24 10:30, Duan, Zhenzhong wrote:
>> Hi Eric,
>>
>>> -Original Message-
>>> From: Eric Auger
>>> Subject: Re: [PATCH rfcv1 6/6]
Manos Pitsidianakis writes:
> Tracing DPRINTFs to stderr might not be desired. A developer that relies
> on tracepoints should be able to opt-in to each tracepoint and rely on
> QEMU's log redirection, instead of stderr by default.
>
> This commit converts DPRINTFs in this file that are used for
Manos Pitsidianakis writes:
> Tracing DPRINTFs to stderr might not be desired. A developer that relies
> on tracepoints should be able to opt-in to each tracepoint and rely on
> QEMU's log redirection, instead of stderr by default.
>
> This commit converts DPRINTFs in this file that are used for
Hi,
I have some code style comments:
On 1/12/24 06:43, Ethan Chen wrote:
Support specification Version 1.0.0-draft4 rapid-k model.
The specification url:
https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf
The memory transaction from source devices connected to
On 1/12/24 06:43, Ethan Chen wrote:
If a source device is connected to the IOPMP device, its memory
transaction will be checked by the IOPMP rule.
When using RISC-V virt machine option "iopmp=on", the generic PCIe host
bridge connects to IOPMP. The PCI devices on the brigde will connets to
On 1/19/24 08:21, Rob Bradford wrote:
Following the pattern for 'M' and Zmmul check if either the 'A'
extension is enabled or the appropriate split extension for the
instruction.
Signed-off-by: Rob Bradford
---
Reviewed-by: Daniel Henrique Barboza
target/riscv/insn_trans/trans_rva.c.i
If you build QEMU with support for the sh4 target only
(configure --target-list=sh4-softmmu) then 'make check' fails
in the iotests, because some iotests, including for instance 040,
try to create a machine with a virtio-scsi device, but they don't
do anything to ensure that the machine they create
Peter Xu writes:
> On Tue, Jan 16, 2024 at 05:25:03PM -0300, Fabiano Rosas wrote:
>> Peter Xu writes:
>>
>> > On Mon, Nov 27, 2023 at 05:26:00PM -0300, Fabiano Rosas wrote:
>> >> Currently multifd does not need to have knowledge of pages on the
>> >> receiving side because all the information n
Peter Xu writes:
> Fabiano,
>
> On Thu, Jan 18, 2024 at 01:49:48PM -0300, Fabiano Rosas wrote:
>> Here's the second half of adding a migration compatibility test to CI.
>>
>> We've already added support for running the full set of migration
>> tests with two QEMU binaries since commit 5050ad2a38
Peter Xu writes:
> On Thu, Jan 18, 2024 at 01:49:51PM -0300, Fabiano Rosas wrote:
>> Until 9.0 is out, we need to keep the aarch64 job disabled because the
>> tests always use the n-1 version of migration-test. That happens to be
>> broken for aarch64 in 8.2. Once 9.0 is out, it will become the n
pet...@redhat.com writes:
> From: Peter Xu
>
> RAM_SAVE_FLAG_MEM_SIZE contains the total length of ramblock idstr to know
> whether scanning of ramblocks is complete. Drop the trick.
>
> Signed-off-by: Peter Xu
Reviewed-by: Fabiano Rosas
According to the QEMU Coding Style document:
> Do not use printf(), fprintf() or monitor_printf(). Instead, use
> error_report() or error_vreport() from error-report.h. This ensures the
> error is reported in the right place (current monitor or stderr), and in
> a uniform format.
> Use error_print
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on trace events should be able to opt-in to each trace event and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into trace events. DPRINTFs t
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Signed-off-b
pet...@redhat.com writes:
> From: Peter Xu
>
> When the migration frameworks fetches the exact pending sizes, it means
> this check:
>
> remaining_size < s->threshold_size
>
> Must have been done already, actually at migration_iteration_run():
>
> if (must_precopy <= s->threshold_size) {
>
This series changes some printfs to use the trace event framework.
Additionally, it converts some error/warning reporting fprintfs to
error_report/warn_report.
Differences from v1
:
- addressed Alex's review
Manos Pitsidianakis (5):
hw/arm/z2: convert DPRINTF to trace events and guest er
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Signed-off-b
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on trace events should be able to opt-in to each trace event and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into trace events. Errors or
pet...@redhat.com writes:
> From: Peter Xu
>
> It's always used to compare against another uint64_t. Make it always clear
> that it's never a negative.
>
> Signed-off-by: Peter Xu
Reviewed-by: Fabiano Rosas
Kevin Wolf identified some issues with the virtio-blk iothread-vq-mapping patch
series that was merged at the end of 2023:
1. s->rq is restarted from one AioContext and races with the other
iothread-vq-mapping AioContexts.
2. Failure to set the AioContext is no longer fatal since the IO_CODE API
A virtio-blk device with the iothread-vq-mapping parameter has
per-virtqueue AioContexts. It is not thread-safe to process s->rq
requests in the BlockBackend AioContext since that may be different from
the virtqueue's AioContext to which this request belongs. The code
currently races and could cras
virtio_blk_data_plane_create() and virtio_blk_data_plane_destroy() are
actually about s->vq_aio_context[] rather than managing
dataplane-specific state.
As a prerequisite to using s->vq_aio_context[] in all code paths (even
when dataplane is not used), rename these functions to reflect that they
j
The dataplane code is really about using ioeventfd. It's used both for
IOThreads (what we think of as dataplane) and for the core virtio-pci
code's ioeventfd feature (which is enabled by default and used when no
IOThread has been specified). Rename the code to reflect this.
Signed-off-by: Stefan H
On Thu, Dec 21, 2023 at 02:40:19PM +0100, Kevin Wolf wrote:
> Am 20.12.2023 um 14:47 hat Stefan Hajnoczi geschrieben:
> > Add the iothread-vq-mapping parameter to assign virtqueues to IOThreads.
> > Store the vq:AioContext mapping in the new struct
> > VirtIOBlockDataPlane->vq_aio_context[] field a
The dataplane code used to be significantly different from the
non-dataplane code and therefore had a separate source file.
Over time the difference has gotten smaller because the I/O code paths
were unified. Nowadays the distinction between the VirtIOBlock and
VirtIOBlockDataPlane structs is more
We no longer rely on setting the AioContext since the block layer
IO_CODE APIs can be called from any thread. Now it's just a hint to help
block jobs and other operations co-locate themselves in a thread with
the guest I/O requests. Keep going if setting the AioContext fails.
Suggested-by: Kevin W
When starting ioeventfd it is common practice to set the event notifier
so that the ioeventfd handler is triggered to run immediately. There may
be no requests waiting to be processed, but the idea is that if a
request snuck in then we guarantee that it will be detected.
One scenario where self-tr
So finally tested with this:
-cpu host,hv_relaxed,hv_spinlocks=0x1fff,hv_vapic,hv_time,-vmx
The used hyper-v enhancements are the ones generally recommended for
Windows vms.
Overall it seemed to really work: the performance was like bare metal,
and the BSOD second problem was also gone (for th
From: owl
Octeon+
- SAA
- SAAD
Octeon2
- LAI
- LAID
- LAD
- LADD
- LAS
- LASD
- LAC
- LACD
- LAA
- LAAD
- LAW
- LAWD
- LWX
- LHX
- LDX
- LBUX
- LWUX
- LHUX
- LBX
Signed-off-by: owl
---
target/mips/tcg/octeon.decode | 35
target/mips/tcg/octeon_translate.c | 281
Hi Eugenio,
Thanks for your comments. Very helpful. Wentao and I will discuss and get back
to you later.
Also welcome for any comments from other guys.
Best Regards,
Rick Zhong
-邮件原件-
发件人: Eugenio Perez Martin
发送时间: 2024年1月19日 18:26
收件人: Wentao Jia
抄送: qemu-devel@nongnu.org; m...@re
Am 19.01.2024 um 13:55 hat Peter Maydell geschrieben:
> If you build QEMU with support for the sh4 target only
> (configure --target-list=sh4-softmmu) then 'make check' fails
> in the iotests, because some iotests, including for instance 040,
> try to create a machine with a virtio-scsi device, but
On Mon, 15 Jan 2024 at 04:34, Bin Meng wrote:
>
> By default QEMU generates a 1 MiB sized device tree. Let's pack it
> to save some room.
>
> Signed-off-by: Bin Meng
> ---
>
> hw/arm/boot.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/hw/arm/boot.c b/hw/arm/boot.c
> inde
On Mon, 15 Jan 2024 at 04:35, Bin Meng wrote:
>
> The Arm dtb changes caused an address change:
>
> DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x0001)
> {
> [ ... ]
> -Name (MEMA, 0x43C8)
> +Name (MEMA, 0x43D8)
> }
>
> Signed-off-by: Bin Meng
>
> ---
You shou
Prepares target for typedef'ing abi_ptr to vaddr. Fixes sign extension
bug that would result from abi_ptr being unsigned in the future.
Necessary to make memory access function signatures target agnostic.
Signed-off-by: Anton Johansson
---
target/tricore/op_helper.c | 8
1 file change
[NOTE: We could also use target_long_bits(), which is introduced later]
Signed-off-by: Anton Johansson
---
include/exec/cpu_ldst.h | 31 ---
accel/tcg/cputlb.c | 34 --
2 files changed, 36 insertions(+), 29 deletions(-)
diff --git
Required to compile accel/tcg/translate-all.c once for softmmu targets.
The function gets quite big for some targets so uninlining makes sense.
Signed-off-by: Anton Johansson
---
include/exec/cpu-common.h | 4 +++
target/alpha/cpu.h| 11 ---
target/arm/cpu.h | 3 --
target
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