Implement loongarch kvm set vcpu interrupt interface,
when a irq is set in vcpu, we use the KVM_INTERRUPT
ioctl to set intr into kvm.
Signed-off-by: Tianrui Zhao
Signed-off-by: xianglai li
Reviewed-by: Song Gao
---
target/loongarch/cpu.c | 34 +---
target/
Implement kvm_arch_get/set_registers interfaces, many regs
can be get/set in the function, such as core regs, csr regs,
fpu regs, mp state, etc.
Signed-off-by: Tianrui Zhao
Signed-off-by: xianglai li
Reviewed-by: Song Gao
Change-Id: Ia8fc48fe08b1768853f7729e77d37cdf270031e4
---
meson.build
Supplement vcpu env initial when vcpu reset, including
init vcpu CSR_CPUID,CSR_TID to cpu->cpu_index. The two
regs will be used in kvm_get/set_csr_ioctl.
Signed-off-by: Tianrui Zhao
Signed-off-by: xianglai li
Reviewed-by: Song Gao
---
target/loongarch/cpu.c | 2 ++
target/loongarch/cpu.h | 2 +
Implement kvm_arch_handle_exit for loongarch. In this
function, the KVM_EXIT_LOONGARCH_IOCSR is handled,
we read or write the iocsr address space by the addr,
length and is_write argument in kvm_run.
Signed-off-by: Tianrui Zhao
Signed-off-by: xianglai li
Reviewed-by: Richard Henderson
Reviewed-
Add kvm.c into meson.build to compile it when kvm
is configed. Meanwhile in meson.build, we set the
kvm_targets to loongarch64-softmmu when the cpu is
loongarch. And fix the compiling error when config
is enable-kvm,disable-tcg.
Signed-off-by: Tianrui Zhao
Signed-off-by: xianglai li
Reviewed-by:
Implement kvm_arch_init_vcpu interface for loongarch,
in this function, we register VM change state handler.
And when VM state changes to running, the counter value
should be put into kvm to keep consistent with kvm,
and when state change to stop, counter value should be
refreshed from kvm.
Signed
Use the scripts/update-linux-headers.sh to synchronize linux
headers from linux v6.7.0-rc8. We mainly want to add the
loongarch linux headers and then add the loongarch kvm support
based on it.
Signed-off-by: Tianrui Zhao
Acked-by: Song Gao
---
include/standard-headers/drm/drm_fourcc.h |
The linux headers in this patch synchronized from linux kernel
v6.7.0-rc8, and the loongarch kvm part of this patch series
based on the header files. And the linux kernel has added the
loongarch kvm support in master branch.
This series add loongarch kvm support, mainly implement
some interfaces u
Define some functions in target/loongarch/kvm/kvm.c,
such as kvm_arch_put_registers, kvm_arch_get_registers
and kvm_arch_handle_exit, etc. which are needed by
kvm/kvm-all.c. Now the most functions has no content
and they will be implemented in the next patches.
Signed-off-by: Tianrui Zhao
Signed-
Implement the kvm_arch_init of loongarch, in the function, the
KVM_CAP_MP_STATE cap is checked by kvm ioctl.
Signed-off-by: Tianrui Zhao
Signed-off-by: xianglai li
Reviewed-by: Richard Henderson
Reviewed-by: Song Gao
---
target/loongarch/kvm/kvm.c | 1 +
1 file changed, 1 insertion(+)
diff -
From: Zhao Liu
Add two spelling check options (--codespell and --codespellfile) to
enhance spelling check through dictionary, which copied the Linux
kernel's implementation in checkpatch.pl.
This check uses the dictionary at "/usr/share/codespell/dictionary.txt"
by default, if there is no dictio
Generate Serial Port Console Redirection Table (SPCR) for RISC-V
virtual machine.
Signed-off-by: Sia Jee Heng
---
hw/riscv/virt-acpi-build.c | 39 ++
1 file changed, 39 insertions(+)
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index d
This series focuses on enabling the Serial Port Console Redirection (SPCR)
table for the RISC-V virt platform. Considering that ARM utilizes the same
function, the initial patch involves migrating the build_spcr function to
common code. This consolidation ensures that RISC-V avoids duplicating the
RISC-V should also generate the SPCR in a manner similar to ARM.
Therefore, instead of replicating the code, relocate this function
to the common AML build.
Signed-off-by: Sia Jee Heng
---
hw/acpi/aml-build.c | 51
hw/arm/virt-acpi-build.c| 68 +++
On 4/1/24 22:09, Alex Bennée wrote:
Lets keep a cleaner split between the base class and the derived
vhost-user-device which we can use for generic vhost-user stubs. This
includes an update to introduce the vq_size property so the number of
entries in a virtq can be defined.
Signed-off-by: Alex
Hi
On Fri, Jan 5, 2024 at 12:35 AM Volker Rümelin wrote:
>
> All code in virtio-snd.c runs with the BQL held. Remove the
> command queue mutex and the stream queue mutexes. The qatomic
> functions are also not needed.
I am not comfortable with this assertion. Someone more familiar with
virtio.c
(+Mark & Eduardo)
On 4/1/24 14:37, inesvarhol wrote:
Le jeudi 4 janvier 2024 à 14:05, Philippe Mathieu-Daudé a
écrit :
Hello,
+static void test_edge_selector(void)
+{
+ enable_nvic_irq(EXTI0_IRQ);
+
+ / Configure EXTI line 0 irq on rising edge */
+ qtest_set_irq_in(global_qtest, "/machine/
On 1/2/24 02:57, Richard Henderson wrote:
Changes for v3:
* Rebase.
Blurb from v1:
While working on mmap issues for 8.1, I noticed a lot of corner
cases of host != guest page size that we implement poorly.
This seems to be particularly visible on Apple M1 with 16k pages,
more so than Power w
On 5/1/24 11:13, Philippe Mathieu-Daudé wrote:
(+Mark & Eduardo)
On 4/1/24 14:37, inesvarhol wrote:
Le jeudi 4 janvier 2024 à 14:05, Philippe Mathieu-Daudé
a écrit :
Hello,
+static void test_edge_selector(void)
+{
+ enable_nvic_irq(EXTI0_IRQ);
+
+ / Configure EXTI line 0 irq on rising ed
On Thu, Jan 04, 2024 at 01:37:22PM +, inesvarhol wrote:
>
> Le jeudi 4 janvier 2024 à 14:05, Philippe Mathieu-Daudé a
> écrit :
>
> Hello,
>
> > > +static void test_edge_selector(void)
> > > +{
> > > + enable_nvic_irq(EXTI0_IRQ);
> > > +
> > > + / Configure EXTI line 0 irq on rising edge *
Now that SMP is possible, the asr17 must be checked in the little boot code
or the secondary CPU will reinitialize the Timer and the Uart.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/sparc/leon3.c | 22 --
1 file changed, 20 insertions(+), 2 deletio
Now there is an ncpus property, use it in order to deliver the IRQ to
multiple CPU.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/intc/grlib_irqmp.c | 43 ++-
hw/sparc/leon3.c | 3 ++-
include/hw/intc/grlib_irqmp.h |
This is a simple cleanup, since env is passed to qemu_irq_ack it can be
accessed from inside qemu_irq_ack. Just drop this parameter.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/sparc/leon3.c| 8
target/sparc/cpu.h | 2 +-
target/sparc/int
CC: Fabien Chouteau
Signed-off-by: Clément Chigot
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 395f26ba86..a065e0b21f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1694,7 +1694,7 @@ F: hw/rtc/sun4v-rtc.c
F: include/hw/rtc/s
... and move them in their right hardware directory.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/char/grlib_apbuart.c | 4 +--
hw/intc/grlib_irqmp.c | 4 +--
hw/sparc/leon3.c | 6 ++--
hw/tim
This implements the multiprocessor status register in grlib-irqmp and bind
it to a start signal, which will be later wired in leon3-generic to
start a cpu.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/intc/grlib_irqmp.c | 22 +++---
1 file changed, 19 in
This series allows leon3 emulations to record up 4 CPUs.
It requires some enhancements in the grlib_irqmp device and adding the
cpu_index field in the asr17 instruction.
It has been tested locally with various bareboard runtimes and through
the Gitlab CI: https://gitlab.com/Helflym/qemu/-/pipelin
This allows to register more than one CPU on the leon3_generic machine.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/sparc/leon3.c | 106 +--
1 file changed, 74 insertions(+), 32 deletions(-)
diff --git a/hw/sparc/leon3.c b/h
This adds a "ncpus" property to the "grlib-irqmp" device to be used later,
this required a little refactoring of how we initialize the device (ie: use
realize instead of init).
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/intc/grlib_irqmp.c | 30 +---
This allows the guest program to know its cpu id.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
target/sparc/helper.c| 16
target/sparc/helper.h| 1 +
target/sparc/translate.c | 13 +++--
3 files changed, 20 insertions(+), 10 deletions(-)
On Fri, Jan 5, 2024 at 11:24 AM Clément Chigot wrote:
>
> CC: Fabien Chouteau
Typo here... Should have been chout...@adacore.com...
I'll update it in v2 if one is needed. Otherwise, could the one
pushing these patches make the change for me ? Thanks and sorry for
that.
> Signed-off-by: Clément
On 1/4/24 19:36, del...@kernel.org wrote:
From: Helge Deller
The physical hardware allows DIMMs of 4 MB size and above, allowing up
to 3840 MB of memory, but is restricted by setup code to 3 GB.
Increase the limit to allow up to the maximum amount of memory.
Btw. the memory area from 0xf000.00
Hello Alex,
just reporting below what might be a riscv only oddity (also applies to
patch 41 but easier to report here).
Le 03/01/2024 à 18:33, Alex Bennée a écrit :
With the new plugin register API we can now track changes to register
values. Currently the implementation is fairly dumb whi
Hi
On Fri, Jan 5, 2024 at 12:34 AM Volker Rümelin wrote:
>
> It is much easier to migrate an array of structs than individual
> structs that are accessed via a pointer to a pointer to an array
> of pointers to struct, where some pointers can also be NULL.
>
> For this reason, the audio streams ar
On Fri, Jan 5, 2024 at 12:34 AM Volker Rümelin wrote:
>
> Split out virtio_snd_pcm_start_stop(). This is a preparation
> for the next patch so that it doesn't become too big.
>
> Signed-off-by: Volker Rümelin
Reviewed-by: Marc-André Lureau
> ---
> hw/audio/trace-events | 3 ++-
> hw/audio/vi
On 4/12/23 01:47, Gavin Shan wrote:
Functions that use an Error **errp parameter to return errors should
not also report them to the user, because reporting is the caller's
job. The principle is violated by machine_run_board_init() because
it calls error_report(), error_printf(), and exit(1) when
On 4/12/23 00:13, Gavin Shan wrote:
Hi Phil,
On 12/1/23 20:53, Philippe Mathieu-Daudé wrote:
On 29/11/23 05:20, Gavin Shan wrote:
The logic, to check if the specified CPU type is supported in
machine_run_board_init(), is independent enough. Factor it out into
helper is_cpu_type_supported(). ma
On 5/1/24 11:24, Clément Chigot wrote:
This adds a "ncpus" property to the "grlib-irqmp" device to be used later,
this required a little refactoring of how we initialize the device (ie: use
realize instead of init).
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/intc/g
Hi Clément,
On 5/1/24 11:24, Clément Chigot wrote:
This implements the multiprocessor status register in grlib-irqmp and bind
it to a start signal, which will be later wired in leon3-generic to
start a cpu.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/intc/grlib_irq
On 5/1/24 11:24, Clément Chigot wrote:
This is a simple cleanup, since env is passed to qemu_irq_ack it can be
accessed from inside qemu_irq_ack. Just drop this parameter.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/sparc/leon3.c| 8
target/sp
Hi
On Fri, Jan 5, 2024 at 12:34 AM Volker Rümelin wrote:
>
> The payload size returned by command VIRTIO_SND_R_PCM_INFO is
> wrong. The code in process_cmd() assumes that all commands
> return only a virtio_snd_hdr payload, but some commands like
> VIRTIO_SND_R_PCM_INFO may return an additional p
Philippe Mathieu-Daudé writes:
> On 4/1/24 22:09, Alex Bennée wrote:
>> Lets keep a cleaner split between the base class and the derived
>> vhost-user-device which we can use for generic vhost-user stubs. This
>> includes an update to introduce the vq_size property so the number of
>> entries in
On Fri, Jan 5, 2024 at 12:34 AM Volker Rümelin wrote:
>
> Split out the function virtio_snd_pcm_open() from
> virtio_snd_pcm_prepare(). A later patch also needs
> the new function. There is no functional change.
>
> Signed-off-by: Volker Rümelin
Reviewed-by: Marc-André Lureau
> ---
> hw/audio
On Fri, Jan 5, 2024 at 12:34 AM Volker Rümelin wrote:
>
> Split out the function virtio_snd_pcm_set_active() from
> virtio_snd_pcm_start_stop(). A later patch also needs this
> new funcion. There is no functional change.
>
> Signed-off-by: Volker Rümelin
Reviewed-by: Marc-André Lureau
> ---
>
On 1/5/24 06:06, Sia Jee Heng wrote:
RISC-V should also generate the SPCR in a manner similar to ARM.
Therefore, instead of replicating the code, relocate this function
to the common AML build.
Signed-off-by: Sia Jee Heng
---
hw/acpi/aml-build.c | 51
On 1/5/24 06:06, Sia Jee Heng wrote:
Generate Serial Port Console Redirection Table (SPCR) for RISC-V
virtual machine.
Signed-off-by: Sia Jee Heng
---
hw/riscv/virt-acpi-build.c | 39 ++
1 file changed, 39 insertions(+)
diff --git a/hw/riscv/virt-acpi-
On Sun, 31 Dec 2023 at 08:50, Paolo Bonzini wrote:
>
> The following changes since commit 191710c221f65b1542f6ea7fa4d30dde6e134fd7:
>
> Merge tag 'pull-request-2023-12-20' of https://gitlab.com/thuth/qemu into
> staging (2023-12-20 09:40:16 -0500)
>
> are available in the Git repository at:
>
>
On Fri, Jan 5, 2024 at 12:32 PM Philippe Mathieu-Daudé
wrote:
>
> Hi Clément,
>
> On 5/1/24 11:24, Clément Chigot wrote:
> > This implements the multiprocessor status register in grlib-irqmp and bind
> > it to a start signal, which will be later wired in leon3-generic to
> > start a cpu.
> >
> > C
Huang Rui writes:
> From: Robert Beckett
>
> This relies on a virglrenderer change to include the dmabuf fd when
> returning resource info.
>
> +static void virgl_cmd_set_scanout_blob(VirtIOGPU *g,
> + struct virtio_gpu_ctrl_command *cmd)
> +{
> +struct
Git repository at:
>
> https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240105
>
> for you to fetch changes up to 0cd8b379081fa71c23836052feb65da4685f8ec7:
>
> target/loongarch: move translate modules to tcg/ (2024-01-05 09:31:05 +0800)
>
> --
On 5/1/24 14:23, Clément Chigot wrote:
On Fri, Jan 5, 2024 at 12:32 PM Philippe Mathieu-Daudé
wrote:
Hi Clément,
On 5/1/24 11:24, Clément Chigot wrote:
This implements the multiprocessor status register in grlib-irqmp and bind
it to a start signal, which will be later wired in leon3-generic
Am 03.01.24 um 14:35 schrieb Paolo Bonzini:
> On 1/3/24 12:40, Fiona Ebner wrote:
>> I'm happy to report that I cannot reproduce the CPU-usage-spike issue
>> with the patch, but I did run into an assertion failure when trying to
>> verify that it fixes my original stuck-guest-IO issue. See below fo
On 27/12/23 08:15, peng...@smartx.com wrote:
From: Peng Ji
When a volume has more than one disk, all disks cannot be
returned correctly because there is not enough malloced memory
for disk extents, so before executing DeviceIoControl for the
second time, get the correct size of the required mem
Cc'ing Pierrick
On 2/1/24 02:57, Richard Henderson wrote:
Changes for v3:
* Rebase.
Blurb from v1:
While working on mmap issues for 8.1, I noticed a lot of corner
cases of host != guest page size that we implement poorly.
This seems to be particularly visible on Apple M1 with 16k pages,
mor
Add an update buffer where all block updates are staged.
Flush or discard updates properly, so we should never see
half-completed block writes in pflash storage.
Drop a bunch of FIXME comments ;)
Signed-off-by: Gerd Hoffmann
---
hw/block/pflash_cfi01.c | 104 ++--
Move the offset calculation, do it once at the start of the function and
let the 'p' variable point directly to the memory location which should
be updated. This makes it simpler to update other buffers than
pfl->storage in an upcoming patch. No functional change.
Signed-off-by: Gerd Hoffmann
-
When running qemu with edk2 efi firmware on aarch64 the efi
variable store in pflash can get corrupted. qemu not doing
proper block writes -- flush all or nothing to storage -- is
a hot candidate for being the root cause.
This little series tries to fix that with an update buffer
where block writ
On 5/1/24 11:24, Clément Chigot wrote:
... and move them in their right hardware directory.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/char/grlib_apbuart.c | 4 +--
hw/intc/grlib_irqmp.c | 4 +--
hw/sparc/leon3.c
On 5/1/24 14:58, Gerd Hoffmann wrote:
Move the offset calculation, do it once at the start of the function and
let the 'p' variable point directly to the memory location which should
be updated. This makes it simpler to update other buffers than
pfl->storage in an upcoming patch. No functional
On Thu, 4 Jan 2024 at 17:17, Michael Tokarev wrote:
>
> 04.01.2024 19:25, Michael Tokarev wrote:
> ...
> > this archive contains kernel+initrd. I run it this way:
> >
> > qemu-system-arm -append root=LABEL=debvm -nographic -machine type=virt \
> > -drive media=disk,format=raw,file=vmlinuz,if=vi
On Fri, Jan 5, 2024 at 2:37 PM Philippe Mathieu-Daudé wrote:
>
> On 5/1/24 14:23, Clément Chigot wrote:
> > On Fri, Jan 5, 2024 at 12:32 PM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Hi Clément,
> >>
> >> On 5/1/24 11:24, Clément Chigot wrote:
> >>> This implements the multiprocessor status regi
On 5/1/24 11:24, Clément Chigot wrote:
Now there is an ncpus property, use it in order to deliver the IRQ to
multiple CPU.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/intc/grlib_irqmp.c | 43 ++-
hw/sparc/leon3.c
Am 05.01.24 um 14:43 schrieb Fiona Ebner:
> Am 03.01.24 um 14:35 schrieb Paolo Bonzini:
>> On 1/3/24 12:40, Fiona Ebner wrote:
>>> I'm happy to report that I cannot reproduce the CPU-usage-spike issue
>>> with the patch, but I did run into an assertion failure when trying to
>>> verify that it fixe
On Fri, Jan 5, 2024 at 3:00 PM Philippe Mathieu-Daudé wrote:
>
> On 5/1/24 11:24, Clément Chigot wrote:
> > ... and move them in their right hardware directory.
> >
> > Co-developed-by: Frederic Konrad
> > Signed-off-by: Clément Chigot
> > ---
> > hw/char/grlib_apbuart.c
On 21/11/23 13:10, Manos Pitsidianakis wrote:
On Mon, 20 Nov 2023 23:32, Philippe Mathieu-Daudé
wrote:
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have cpu_exec_realizefn()
return a boolean indicating whether an error is set or not.
Signe
Dear Experts,
I am writing to seek your assistance about CXL emulation in QEMU. I am Zhou
Tong and I am researching how to use QEMU to simulate CXL over Ethernet??
I want to implement remote registration of CXL.mem devices based on the QOM
model. The general idea is: the CXL slave side notifies
Dear Experts,
I am writing to seek your assistance about CXL emulation in QEMU. I am Zhou
Tong and I am researching how to use QEMU to simulate CXL over Ethernet??
I want to implement remote registration of CXL.mem devices based on the QOM
model. The general idea is: the CXL slave side notifies
Looks good Clement.
Reviewed-by: Fabien Chouteau
--
Fabien Chouteau
On Fri, 5 Jan 2024 at 14:46, Philippe Mathieu-Daudé wrote:
>
> On 21/11/23 13:10, Manos Pitsidianakis wrote:
> > On Mon, 20 Nov 2023 23:32, Philippe Mathieu-Daudé
> > wrote:
> >> Following the example documented since commit e3fe3988d7 ("error:
> >> Document Error API usage rules"), have cpu_exec
On 22/11/23 08:38, Manos Pitsidianakis wrote:
On Mon, 20 Nov 2023 23:32, Philippe Mathieu-Daudé
wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
Commit message missing but indeed there's not much to say
I amended:
Since qemu_prealloc_mem() returns whether or not an error
occured, we d
From: Gavin Shan
Add generic cpu_list() to replace the individual target's implementation
in the subsequent commits. Currently, there are 3 targets with no cpu_list()
implementation: microblaze and nios2. With this applied, those two targets
switch to the generic cpu_list().
[gshan@gshan q]$ ./b
From: Gavin Shan
'ev67' CPU class will be returned to match everything, which makes
no sense as mentioned in the comments. Remove the logic to fall
back to 'ev67' CPU class to match everything.
Signed-off-by: Gavin Shan
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Messag
From: Gavin Shan
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
Available CPUs:
ev4-alpha-cpu
ev5-alpha-cpu
ev56-alpha-cpu
ev6-alpha-cpu
ev67-alpha-cpu
ev68-alpha-cpu
pca56-alpha-cpu
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
Ava
For all targets, the CPU class returned from CPUClass::class_by_name()
and object_class_dynamic_cast(oc, CPU_RESOLVING_TYPE) need to be
compatible. Lets apply the check in cpu_class_by_name() for once,
instead of having the check in CPUClass::class_by_name() for individual
target.
Signed-off-by: P
From: Gavin Shan
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
avr5-avr-cpu
avr51-avr-cpu
avr6-avr-cpu
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
Available CPUs:
avr5
avr51
avr6
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daud
From: Gavin Shan
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
la132-loongarch-cpu
la464-loongarch-cpu
max-loongarch-cpu
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
Available CPUs:
la132
la464
max
Signed-off-by: Gavin Shan
From: Gavin Shan
No changes in the output from the following command.
[gshan@gshan q]$ ./build/qemu-system-hppa -cpu ?
Available CPUs:
hppa
hppa64
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-ID: <20231114235628.534334-13-gs...@redh
From: Gavin Shan
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
Available CPUs:
crisv8
crisv9
crisv10
crisv11
crisv17
crisv32
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
Available CPUs:
crisv10
crisv11
crisv17
crisv32
crisv8
From: Gavin Shan
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
Available CPUs:
rx62n-rx-cpu
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
Available CPUs:
rx62n
Signed-off-by: Gavin Shan
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathi
From: Gavin Shan
Since commit 3a9d0d7b64 ("hw/cpu: Call object_class_is_abstract()
once in cpu_class_by_name()"), there is no need to check if @oc is
abstract because it has been covered by cpu_class_by_name().
Signed-off-by: Gavin Shan
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Math
Allow building a qemu-system-foo binary with target-agnostic
only HW models.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20231121203129.67999-1-phi...@linaro.org>
---
meson.build | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/meson.build b/meson.build
index 5
The following changes since commit 05470c3979d5485003e129ff4b0c2ef98af91d86:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2024-01-04 19:55:20 +)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/hw-cpus-20240105
From: Gavin Shan
No changes of the output from the following command before and
after it's applied.
[gshan@gshan q]$ ./build/qemu-system-aarch64 -cpu ?
Available CPUs:
a64fx
arm1026
arm1136
arm1136-r2
arm1176
arm11mpcore
arm926
arm946
cortex-a15
cortex-a35
cortex-a53
cort
From: Gavin Shan
Use generic cpu_model_from_type() when the CPU model name needs to
be extracted from the CPU type name.
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-ID: <20231114235628.534334-23-gs...@redhat.com>
Signed-off-by: Philippe
From: Gavin Shan
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
MIPS '4Kc'
MIPS '4Km'
MIPS '4KEcR1'
MIPS 'XBurstR1'
MIPS '4KEmR1'
MIPS '4KEc'
MIPS '4KEm'
MIPS '24Kc'
MIPS '24KEc'
MIPS '24Kf'
MIPS '34Kf'
MIPS '74Kf'
MIPS 'XBurstR2'
MIPS 'M14K'
MIPS 'M14Kc'
MIPS 'P5600'
MI
From: Gavin Shan
The 'host' CPU model isn't available until KVM or HVF is enabled.
For example, the following error messages are seen when the guest
is started with option '-cpu cortex-a8' on tcg after the next commit
is applied to check the CPU type in machine_run_board_init().
ERROR:../hw/co
From: Gavin Shan
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
Available CPUs:
test_mmuhifi_c3
sample_controller
lx106
dsp3400
de233_fpu
de212
dc233c
dc232b
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
Available CPUs:
dc232b
From: Gavin Shan
It's no sense to check the CPU type when mc->valid_cpu_types[0] is
NULL, which is a program error. Raise an assert on this.
A precise hint for the error message is given when mc->valid_cpu_types[0]
is the only valid entry. Besides, enumeration on mc->valid_cpu_types[0]
when we h
From: Gavin Shan
No changes in the output from the following command.
[gshan@gshan q]$ ./build/qemu-system-tricore -cpu ?
Available CPUs:
tc1796
tc1797
tc27x
tc37x
Signed-off-by: Gavin Shan
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20231114235628
From: Gavin Shan
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20231204004726.483558-10-gs...@redhat.com>
Signed-off-by: Phil
From: Gavin Shan
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
sh7750r
sh7751r
sh7785
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
Available CPUs:
sh7750r
sh7751r
sh7785
Signed-off-by: Gavin Shan
Reviewed-by: Richard Henderson
Reviewed-by:
From: Zhao Liu
Remove unused header (qemu/module.h and qemu/cutils.h) in cluster.c,
and reorder the remaining header files (except qemu/osdep.h) in
alphabetical order.
Tested by "./configure" and then "make".
Signed-off-by: Zhao Liu
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20231127145
From: Gavin Shan
Add helper cpu_model_from_type() to extract the CPU model name from
the CPU type name in two circumstances: (1) The CPU type name is the
combination of the CPU model name and suffix. (2) The CPU type name
is same to the CPU model name.
The helper will be used in the subsequent c
From: Gavin Shan
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Leif Lindholm
Reviewed-by: Richard Henderson
Message-ID: <20
From: Gavin Shan
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it by
ourselves.
Signed-off-by: Gavin Shan
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20231204004726.483558-9-gs...@
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_rom_device
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Xu
Reviewed-by: Gavin Shan
Message-Id: <202
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have memory_region_init_rom_nomigrate
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Xu
Reviewed-by: Gavin Shan
Message-Id: <
Since commit f7b4f61f63 ("qdev/isa: convert soundblaster") these
fields have been converted to qdev properties, so don't need to
be migrated:
static Property sb16_properties[] = {
DEFINE_AUDIO_PROPERTIES(SB16State, card),
DEFINE_PROP_UINT32 ("version", SB16State, ver, 0x0405), /* 4.
'next_cpu' was converted to 'node' in commit bdc44640cb
("cpu: Use QTAILQ for CPU list").
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231129183243.15859-1-phi...@linaro.org>
---
include/hw/core/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
CPUState::start_powered_off field is part of the internal
implementation of a QDev CPU. It is exposed as the QDev
"start-powered-off" property. External components should
use the qdev properties API to access it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Harsh Prateek Bora
Message-Id: <
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