On 2023/12/12 1:36, Philippe Mathieu-Daudé wrote:
On 8/12/23 20:09, Cleber Rosa wrote:
The asset used in the mentioned test gets truncated before it's used
in the test. This means that the file gets modified, and thus the
asset's expected hash doesn't match anymore. This causes cache misses
an
On 2023/12/12 2:01, Alex Bennée wrote:
Cleber Rosa writes:
Based on many runs, the average run time for these 4 tests is around
250 seconds, with 320 seconds being the ceiling. In any way, the
default 120 seconds timeout is inappropriate in my experience.
I would rather see these tests upda
On 2023/12/12 17:04, Marek Glogowski wrote:
Hi
I checked on the emulation "qemu-system-ppc -machine pegasos".
Full-screen seems to work fine. The screen is correctly initialised in
full-screen mode and there are no problems with closing the window when
the session is suspended.
With this serie
On Mon, Dec 11, 2023 at 08:31:17AM -0500, Steven Sistare wrote:
> On 12/11/2023 1:56 AM, Peter Xu wrote:
> > On Wed, Dec 06, 2023 at 12:30:02PM -0500, Steven Sistare wrote:
> >> cpus: stop vm in suspended runstate
> >
> > This patch still didn't copy the QAPI maintainers, please remember to do
On 2023/12/12 13:12, Jason Wang wrote:
On Mon, Dec 11, 2023 at 4:29 PM Akihiko Odaki wrote:
On 2023/12/11 16:26, Jason Wang wrote:
On Mon, Dec 11, 2023 at 1:30 PM Akihiko Odaki wrote:
On 2023/12/11 11:52, Jason Wang wrote:
On Sun, Dec 10, 2023 at 12:06 PM Akihiko Odaki wrote:
Introduct
On 12/8/23 16:19, Chalapathi V wrote:
A POWER10 chip is divided into logical units called chiplets. Chiplets
are broadly divided into "core chiplets" (with the processor cores) and
"nest chiplets" (with everything else). Each chiplet has an attachment
to the pervasive bus (PIB) and with chiplet-s
On 12/8/23 16:19, Chalapathi V wrote:
The N1 chiplet handle the high speed i/o traffic over PCIe and others.
The N1 chiplet consists of PowerBus Fabric controller,
nest Memory Management Unit, chiplet control unit and more.
This commit creates a N1 chiplet model and initialize and realize the
pe
On 12/8/23 16:19, Chalapathi V wrote:
This part of the patchset connects the nest1 chiplet model to p10 chip.
Signed-off-by: Chalapathi V
Reviewed-by: Cédric Le Goater
Thanks,
C.
On 10/12/23 05:05, Akihiko Odaki wrote:
The device realization code may enable PCI multifunction for SR-IOV.
Signed-off-by: Akihiko Odaki
---
hw/pci/pci.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
Am 11.12.2023 um 16:32 hat Markus Armbruster geschrieben:
> Kevin Wolf writes:
>
> > Am 18.09.2023 um 18:16 hat Stefan Hajnoczi geschrieben:
> >> virtio-blk and virtio-scsi devices will need a way to specify the
> >> mapping between IOThreads and virtqueues. At the moment all virtqueues
> >> are
On 10/12/23 05:05, Akihiko Odaki wrote:
It is no longer used.
Since commit f3558b1b76 ("qdev: Base object creation on QDict rather
than QemuOpts")?
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Akihiko Odaki
---
include/hw/qdev-core.h | 4
hw/core/qdev.c | 1 -
syst
On 12/12/23 02:18, Richard Henderson wrote:
On 12/11/23 13:19, Philippe Mathieu-Daudé wrote:
The abi_ptr type is declared in "exec/cpu_ldst.h" with all
the load/store helpers. Some source files requiring abi_ptr
type don't need the load/store helpers. In order to simplify,
create a new "tcg/abi_
On 12/12/23 00:29, Richard Henderson wrote:
On 12/11/23 13:19, Philippe Mathieu-Daudé wrote:
First, "exec/user/abitypes.h" is missing the following
includes (they are included by "cpu.h"):
- "exec/target_long.h"
- "exec/cpu-all.h"
- "exec/tswap.h"
Second, it only requires the definitions f
A misspelled condition in xen_native.h is hiding a bug in the enablement of
Xen for qemu-system-aarch64. The bug becomes apparent when building for
Xen 4.18.
While the i386 emulator provides the xenpv machine type for multiple
architectures,
and therefore can be compiled with Xen enabled even wh
The following changes since commit abf635ddfe3242df907f58967f3c1e6763bbca2d:
Update version for v8.2.0-rc2 release (2023-11-28 16:31:16 -0500)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to 94353dcc5f9a91d111e264d
GUEST_VIRTIO_MMIO_* was added in Xen 4.17, so only define them
for CONFIG_XEN_CTRL_INTERFACE_VERSIONs up to 4.16.
Reported-by: Daniel P. Berrangé
Signed-off-by: Paolo Bonzini
---
include/hw/xen/xen_native.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/xen/xen_n
On Tue, 12 Dec 2023 at 01:43, Tomoyuki Hirose
wrote:
>
> Thanks for comment.
>
> On Mon, Dec 11, 2023 at 10:57 PM Peter Maydell
> wrote:
> > We should definitely look at fixing the unaligned access
> > stuff, but the linked bug report is not trying to do an
> > unaligned access -- it wants to do
On 12/12/23 11:15, Philippe Mathieu-Daudé wrote:
On 12/12/23 00:29, Richard Henderson wrote:
On 12/11/23 13:19, Philippe Mathieu-Daudé wrote:
First, "exec/user/abitypes.h" is missing the following
includes (they are included by "cpu.h"):
- "exec/target_long.h"
- "exec/cpu-all.h"
- "exec/t
Added xATP_MODE validation for vsatp/hgatp CSRs.
The xATP register is an SXLEN-bit read/write WARL register, so
the legal value must be returned (See riscv-privileged-20211203,
SATP/VSATP/HGATP CSRs).
Signed-off-by: Irina Ryapolova
---
target/riscv/csr.c | 52 ++-
[Changes since v1]
used satp_mode.map instead of satp_mode.supported
[Original cover]
The SATP register is an SXLEN-bit read/write WARL register. It means that CSR
fields are only defined
for a subset of bit encodings, but allow any value to be written while
guaranteeing to return a legal
value
On 12/12/23 01:34, Ilya Leoshkevich wrote:
Stop using TARGET_PAGE_MASK in order to make perf.c more
target-agnostic.
Signed-off-by: Ilya Leoshkevich
---
accel/tcg/perf.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
On 2023/12/12 19:04, Philippe Mathieu-Daudé wrote:
On 10/12/23 05:05, Akihiko Odaki wrote:
It is no longer used.
Since commit f3558b1b76 ("qdev: Base object creation on QDict rather
than QemuOpts")?
One usage still remains and it will be removed with an earlier patch,
"[PATCH RFC v2 04/12]
Akihiko Odaki writes:
> On 2023/12/12 2:01, Alex Bennée wrote:
>> Cleber Rosa writes:
>>
>>> Based on many runs, the average run time for these 4 tests is around
>>> 250 seconds, with 320 seconds being the ceiling. In any way, the
>>> default 120 seconds timeout is inappropriate in my experien
Ilya Leoshkevich writes:
> Stop using TARGET_PAGE_MASK in order to make perf.c more
> target-agnostic.
>
> Signed-off-by: Ilya Leoshkevich
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Add missing header and restrict to sysemu.
Philippe Mathieu-Daudé (2):
system/qtest: Include missing 'hw/core/cpu.h' header
system/qtest: Restrict QTest API to system emulation
include/sysemu/qtest.h | 2 ++
system/qtest.c | 1 +
2 files changed, 3 insertions(+)
--
2.41.0
Outside of system emulation, only qtest_enabled() can be used.
Signed-off-by: Philippe Mathieu-Daudé
---
include/sysemu/qtest.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/sysemu/qtest.h b/include/sysemu/qtest.h
index 85f05b0e46..b5d5fd3463 100644
--- a/include/sysemu/qtest.h
+
"hw/core/cpu.h" declares 'first_cpu'. Include it to avoid
when unrelated headers are refactored:
system/qtest.c:548:33: error: use of undeclared identifier 'first_cpu'
address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
^
Signed-off-by: P
Philippe Mathieu-Daudé (4):
hw/ppc/spapr_hcall: Remove unused 'exec/exec-all.h' included header
hw/misc/mips_itu: Remove unnecessary 'exec/exec-all.h' header
hw/s390x/ipl: Remove unused 'exec/exec-all.h' included header
target: Restrict 'sysemu/reset.h' to system emulation
hw/misc/mips
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ppc/spapr_hcall.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 522a2396c7..fcefd1d1c7 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -8,7 +8,6 @@
#include "qemu/main-loop.h"
#in
mips_itu.c only requires declarations from "hw/core/cpu.h"
and "cpu.h". Avoid including the huge "exec/exec-all.h" header.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/mips_itu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c
in
vCPU "reset" is only possible with system emulation.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
Reviewed-by: Song Gao
---
target/i386/cpu.c | 2 +-
target/loongarch/cpu.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i
Signed-off-by: Philippe Mathieu-Daudé
---
hw/s390x/ipl.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index 515dcf51b5..62182d81a0 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -35,7 +35,6 @@
#include "qemu/cutils.h"
#include "qemu/option.h"
#include
On 12/12/23 00:00, Richard Henderson wrote:
On 12/11/23 13:19, Philippe Mathieu-Daudé wrote:
Nothing in guestfd.c requires "semihosting/uaccess.h".
Signed-off-by: Philippe Mathieu-Daudé
---
semihosting/guestfd.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/semihosting/guestfd.c b/semi
Mikhail Tyutin writes:
> TCG Plugin callback to notify plugins when interrupt is triggered for
> a vCpu. The plugin can optionally use this notification to see reason
> of aborted instruction execution.
>
> Signed-off-by: Mikhail Tyutin
> ---
> accel/tcg/cpu-exec.c | 5 +
> include
On 12/12/2023 12.30, Philippe Mathieu-Daudé wrote:
"hw/core/cpu.h" declares 'first_cpu'. Include it to avoid
when unrelated headers are refactored:
system/qtest.c:548:33: error: use of undeclared identifier 'first_cpu'
address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFI
From: Richard Henderson
Perform the loop increment unconditionally, not nested
within the predication.
Cc: qemu-sta...@nongnu.org
Fixes: 3916841ac75 ("target/arm: Implement FMOPA, FMOPS (widening)")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1985
Signed-off-by: Richard Henderson
Re
The following patches are queued for QEMU stable v8.1.4:
https://gitlab.com/qemu-project/qemu/-/commits/staging-8.1
Patch freeze is 2023-12-20, and the release is planned for 2023-12-22:
https://wiki.qemu.org/Planning/8.1
Please respond here or CC qemu-sta...@nongnu.org on any additional pa
From: Niklas Cassel
Legacy software contains a standard mechanism for generating a reset to a
Serial ATA device - setting the SRST (software reset) bit in the Device
Control register.
Serial ATA has a more robust mechanism called COMRESET, also referred to
as port reset. A port reset is the pref
From: Peter Maydell
The syndrome register value always has an IL field at bit 25, which
is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32
bit instruction (or for exceptions which aren't traps on a known
instruction, like PC alignment faults). This means that our
syn_*() functions
From: Daniel Henrique Barboza
Commit 49554856f0 fixed a problem, where TPM devices were not appearing
in the FDT, by delaying the FDT creation up until virt_machine_done().
This create a side effect (see gitlab #1925) - devices that need access
to the '/chosen' FDT node during realize() stopped w
From: Román Cárdenas
If you check the manual of SiFive E310
(https://cdn.sparkfun.com/assets/7/f/0/2/7/fe310-g002-manual-v19p05.pdf),
you can see in Figure 1 that the CLINT is connected to the real time clock,
which also feeds the AON peripheral (they share the same clock).
In page 43, the docs
From: Palmer Dabbelt
Support for probing the Zicboz block size landed in Linux 6.6, which was
released a few weeks ago. This provides the user-configured block size
when Zicboz is enabled.
Signed-off-by: Palmer Dabbelt
Reviewed-by: Alistair Francis
Reviewed-by: Daniel Henrique Barboza
Messag
From: Peter Maydell
In commit edac4d8a168 back in 2015 when we added support for
the virtual timer offset CNTVOFF_EL2, we didn't correctly update
the timer-recalculation code that figures out when the timer
interrupt is next going to change state. We got it wrong in
two ways:
* for the 0->1 tran
From: Akihiko Odaki
Recently MemReentrancyGuard was added to DeviceState to record that the
device is engaging in I/O. The network device backend needs to update it
when delivering a packet to a device.
In preparation for such a change, add MemReentrancyGuard * as a
parameter of qemu_new_nic().
From: Gihun Nam
The current implementation initializes the stack pointer of AVR devices
to 0. Although older AVR devices used to be like that, newer ones set
it to RAMEND.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1525
Signed-off-by: Gihun Nam
Reviewed-by: Philippe Mathieu-Daudé
From: Richard Henderson
The file offset of the load segment is not relevant to the
low address, only the beginning of the virtual address page.
Cc: qemu-sta...@nongnu.org
Fixes: a93934fecd4 ("elf: take phdr offset into account when calculating the
program load address")
Resolves: https://gitlab
From: Max Filippov
In FDPIC signal handlers are passed around as FD pointers. Actual code
address and GOT pointer must be fetched from memory by the QEMU code
that implements kernel signal delivery functionality. This change is
equivalent to the following kernel change:
9c2cc74fb31e ("xtensa: fix
From: Thomas Huth
assertEquals() has been removed in Python 3.12 and should be replaced by
assertEqual(). See: https://docs.python.org/3.12/whatsnew/3.12.html#id3
Message-ID: <20231114134326.287242-1-th...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Thomas Huth
(cherry picke
From: Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties")
added the DEFINE_PROP_ARRAY() macro with the following comment:
* It is the responsibility of the device deinit code to free the
* @_arrayfield memory.
Commit 68fbcc344e added:
DEFINE_PROP
From: Ivan Klokov
According to RISCV privileged spec sect. 5.3.2 Virtual Address Translation
Process
access-fault exceptions may raise only after PMA/PMP check. Current
implementation
generates an access-fault for mbare mode even if there were no PMA/PMP errors.
This patch removes the erroneous
From: Fam Zheng
If the text description file is larger than DESC_SIZE, we force the last
byte in the buffer to be 0 and write it out.
This results in a corruption.
Try to allocate a big buffer in this case.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1923
Signed-off-by: Fam Zheng
From: Ivan Klokov
According to RISCV Specification sect 9.5 on two stage translation when
V=1 the vsstatus(mstatus in QEMU's terms) field MXR, which makes
execute-only pages readable, only overrides VS-stage page protection.
Setting MXR at HS-level(mstatus_hs), however, overrides both VS-stage
an
From: Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties")
added the DEFINE_PROP_ARRAY() macro with the following comment:
* It is the responsibility of the device deinit code to free the
* @_arrayfield memory.
Commit 9e4aa1fafe added:
DEFINE_PROP
Mikhail Tyutin writes:
> In system mode emulation, some of translation blocks could be
> interrupted on memory I/O operation. That leads to artificial
> construction of another translation block that contains memory
> operation only. If TCG plugin is not aware of that TB kind, it
> attempts to in
From: Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties")
added the DEFINE_PROP_ARRAY() macro with the following comment:
* It is the responsibility of the device deinit code to free the
* @_arrayfield memory.
Commit 4fb013afcc added:
DEFINE_PROP
From: Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties")
added the DEFINE_PROP_ARRAY() macro with the following comment:
* It is the responsibility of the device deinit code to free the
* @_arrayfield memory.
Commit 8077b8e549 added:
DEFINE_PROP
From: Akihiko Odaki
Recently MemReentrancyGuard was added to DeviceState to record that the
device is engaging in I/O. The network device backend needs to update it
when delivering a packet to a device.
This implementation follows what bottom half does, but it does not add
a tracepoint for the c
On 12/12/23 00:16, Richard Henderson wrote:
On 12/11/23 13:19, Philippe Mathieu-Daudé wrote:
Nothing is required from the "qemu/thread.h" and
"hw/core/cpu.h" headers.
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/cpu-all.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/includ
From: Philippe Mathieu-Daudé
assertRegexpMatches() has been removed in Python 3.12 and should be replaced by
assertRegex(). See: https://docs.python.org/3.12/whatsnew/3.12.html#id3
Inspired-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Message-ID: <20231114144832.71612-1-phi...@linaro.
From: Philippe Mathieu-Daudé
The VirtioPCIDeviceTypeInfo structure, added in commit a4ee4c8baa
("virtio: Helper for registering virtio device types") got extended
in commit 8ea90ee690 ("virtio: add class_size") with the @class_size
field. Do similarly with the @instance_finalize field.
Signed-of
From: Volker Rümelin
After a relatively short time, there is an multiplication overflow
when multiplying (now - buft_start) with hda_bytes_per_second().
While the uptime now - buft_start only overflows after 2**63 ns
= 292.27 years, this happens hda_bytes_per_second() times faster
with the multip
Functions such gdb_get_cpu_pid() dereference CPUState so
require the structure declaration from "hw/core/cpu.h":
static uint32_t gdb_get_cpu_pid(CPUState *cpu)
{
...
return cpu->cluster_index + 1;
}
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
---
gdbstub/gdbstu
Hi,
These patches are extracted from a bigger work where
"exec/{exec,cpu,translate}-all.h" are split in various
specific APIs. This helped:
- differenciate/build:
. user VS system
. target-specific VS generic
which is necessary for heterogeneous build
- reduced header pressure
tcg_cpu_init_cflags() accesses CPUState fields, so requires
"hw/core/cpu.h" to get its structure definition.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/tcg-accel-ops.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index 1b572
Nothing is required from the "qemu/thread.h".
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 9a7b5737d3..26b44ca125 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cp
Nothing in guestfd.c requires "semihosting/uaccess.h" nor "qemu.h".
Signed-off-by: Philippe Mathieu-Daudé
---
semihosting/guestfd.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/semihosting/guestfd.c b/semihosting/guestfd.c
index 955c2efbd0..d3241434c5 100644
--- a/semi
Last use of tswapls() was removed 2 years ago in commit
aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64").
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/cpu-all.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 5b537
qatomic_cmpxchg__nocheck(), qatomic_read__nocheck(),
qatomic_set__nocheck() are defined in "qemu/atomic.h".
Include it in order to avoid:
In file included from include/exec/helper-proto.h:10:
In file included from include/exec/helper-proto-common.h:10:
In file included from include/qemu/atom
"semihosting/uaccess.h" only requires declarations
from "exec/cpu-defs.h". Avoid including the huge "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
include/semihosting/uaccess.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/semihos
"exec/cpu-all.h" doesn't need definitions from "qemu/rcu.h",
however "exec/ram_addr.h" does.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
include/exec/cpu-all.h | 1 -
include/exec/ram_addr.h | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/includ
User-only objects might benefit from the "exec/target_page.h"
API, which allows to build some objects once for all targets.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
Reviewed-by: Richard Henderson
---
meson.build | 2 +-
page-target.c| 43
Extract page-protection definitions from "exec/cpu-all.h"
to "exec/page-prot-common.h".
The list of files requiring the new header was generated
using:
$ git grep -wE \
'PAGE_(READ|WRITE|EXEC|BITS|VALID|ANON|RESERVED|TARGET_.|PASSTHROUGH)'
Signed-off-by: Philippe Mathieu-Daudé
---
bsd-user/b
'abi_ptr' is a user specific type. The system emulation
equivalent is 'target_ulong'. Use it in ppc_ldl_code()
to emphasis this is not an user emulation function.
Signed-off-by: Philippe Mathieu-Daudé
---
target/ppc/excp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
We usually check target endianess before swapping values,
so target_words_bigendian() declaration makes sense in
"exec/tswap.h" with the target swapping helpers.
Remove "hw/core/cpu.h" when it was only included to get
the target_words_bigendian() declaration.
Signed-off-by: Philippe Mathieu-Daudé
set_helper_retaddr() is only used in accel/tcg/user-exec.c.
clear_helper_retaddr() is only used in accel/tcg/user-exec.c
and accel/tcg/user-exec.c.
No need to expose their definitions to all user-emulation
files including "exec/cpu_ldst.h", move them to a new
"user-retaddr.h" header (restricted t
accel/tcg/ files requires the following definitions:
- TARGET_LONG_BITS
- TARGET_PAGE_BITS
- TARGET_PHYS_ADDR_SPACE_BITS
- TCG_GUEST_DEFAULT_MO
The first 3 are defined in "cpu-param.h". The last one
in "cpu.h", with a bunch of definitions irrelevant for
TCG. By moving the TCG_GUEST_DEFAUL
Declare 'have_guest_base' in "exec/user/guest-base.h".
Very few files require this header, so explicitly include
it there instead of "exec/cpu-all.h" which is used in many
source files.
Assert this user-specific header is only included from user
emulation.
Signed-off-by: Philippe Mathieu-Daudé
Re
tswapl() and bswaptls() are target-dependent and only used
by user emulation. Move their definitions to a new header:
"exec/user/tswap-target.h".
Signed-off-by: Philippe Mathieu-Daudé
---
bsd-user/freebsd/target_os_elf.h | 1 +
bsd-user/freebsd/target_os_stack.h | 1 +
bsd-user/netbsd/target
The XRSTOR instruction ends calling tlb_flush(), declared
in "exec/exec-all.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/i386/tcg/fpu_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
i
The abi_ptr type is declared in "exec/cpu_ldst.h" with all
the load/store helpers. Some source files requiring abi_ptr
type don't need the load/store helpers. In order to simplify,
create a new "exec/abi_ptr.h" header.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
inc
"exec/cpu_ldst.h" doesn't need to huge "cpu.h" header,
but simply:
- exec/cpu-defs.h (TARGET_LONG_BITS)
- exec/tlb-common.h (CPUTLBEntry)
- exec/user/abitypes.h (abi_ulong)
- exec/user/guest-base.h(guest_base)
- exec/cpu-all.h(GUEST_ADDR_MAX and env_cpu
CPUArchState 'env' field is defined within the ArchCPU structure,
so we need to include each target "cpu.h" header which defines it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
---
include/exec/cpu-all.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --g
"exec/user/abitypes.h" requires:
- "exec/cpu-defs.h" (TARGET_LONG_BITS)
- "exec/tswap.h" (tswap32)
In order to avoid "cpu.h", pick the minimum required headers.
Assert this user-specific header is only included from user
emulation.
Signed-off-by: Philippe Mathieu-Daudé
On Wed, 25 Oct 2023 at 10:29, Song Gao wrote:
>
> The result of the LSX instruction is in the low 128 bits
> of the vreg register. We use clean_lsx_result() to clean up
> the high 128 bits of the vreg register.
>
> Signed-off-by: Song Gao
> ---
> loongarch64.risu | 2121 +++
On Fri, 24 Nov 2023 at 08:26, gaosong wrote:
>
> Ping !!
>
> Since [1] series had merged into master three weeks ago,
>
> I ping this series again.
Apologies for taking so long with this, I think I
lost track of it and then we've had the release period.
I have no particular issues with the first
Theses files call cpu_ldl_code() which is declared
in "exec/cpu_ldst.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
accel/tcg/translator.c| 1 +
target/hexagon/translate.c| 1 +
target/microblaze/cpu.c | 1 +
target/microblaze/translate.c | 1 +
t
int128_make128(), int128_getlo() and int128_urshift() are
declared in "qemu/int128.h". qatomic_read__nocheck() is
declared in "qemu/atomic.h".
Signed-off-by: Philippe Mathieu-Daudé
---
host/include/generic/host/load-extract-al16-al8.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/host/i
On 12/12/23 13:33, Philippe Mathieu-Daudé wrote:
Philippe Mathieu-Daudé (23):
exec/cpu-all: Remove unused tswapls() definitions
exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h'
target/ppc/excp_helper: Avoid 'abi_ptr' in system emulation
accel/tcg: Un-inline retadd
On Wed, 22 Nov 2023 at 12:17, Mikhail Tyutin wrote:
>
> In system mode emulation, some of translation blocks could be
> interrupted on memory I/O operation. That leads to artificial
> construction of another translation block that contains memory
> operation only. If TCG plugin is not aware of tha
Hi all,
I tried to implement the RCC (Reset and Clock Control) for the STM32L4x5_SoC
but ran into some problems regarding clock emulation in Qemu.
In this SoC, it is possible to change the source of several clocks used for
devices like the CPU, the USART, and approximately every other device on
Am 12.12.23 um 12:36 schrieb Philippe Mathieu-Daudé:
Signed-off-by: Philippe Mathieu-Daudé
---
hw/s390x/ipl.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index 515dcf51b5..62182d81a0 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -35,7 +35,6 @@
On 12/12/2023 12.30, Philippe Mathieu-Daudé wrote:
Outside of system emulation, only qtest_enabled() can be used.
Signed-off-by: Philippe Mathieu-Daudé
---
include/sysemu/qtest.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/sysemu/qtest.h b/include/sysemu/qtest.h
index 85f05
On Mon, Dec 11, 2023 at 04:32:06PM +0100, Markus Armbruster wrote:
> Kevin Wolf writes:
>
> > Am 18.09.2023 um 18:16 hat Stefan Hajnoczi geschrieben:
> >> virtio-blk and virtio-scsi devices will need a way to specify the
> >> mapping between IOThreads and virtqueues. At the moment all virtqueues
StringOutputVisitor crashes when it visits a struct because
->start_struct() is NULL.
Show "" instead of crashing. This is necessary because the
virtio-blk-pci iothread-vq-mapping parameter that I'd like to introduce
soon is a list of IOThreadMapping structs.
This patch is a quick fix to solve th
On Wednesday, November 15, 2023 3:14 PM, Xiaoyao Li wrote:
> Introduce the helper functions to set the attributes of a range of memory to
> private or shared.
>
> This is necessary to notify KVM the private/shared attribute of each gpa
> range.
> KVM needs the information to decide the GPA needs
Hi
I checked on the emulation "qemu-system-ppc -machine pegasos".
Full-screen seems to work fine. The screen is correctly initialised in
full-screen mode and there are no problems with closing the window when the
session is suspended.
With this series of patches, there is also the option "Move to"
Thank you for the information.
I know you're busy so I appreciate you taking the time to do a quick check
:-)
Marek Głogowski
wt., 12 gru 2023 o 09:28 Akihiko Odaki
napisał(a):
> On 2023/12/12 17:04, Marek Glogowski wrote:
> > Hi
> >
> > I checked on the emulation "qemu-system-ppc -machine pega
Traditional mmio in balloon makes qemu do balloon inflation in the same
thread as vcpu thread.In a CPU overcommitment scenario, host may run
more than one vcpu threads on one host thread, which makes
madvise_dontneed_free() wait for a long time due to the function
cond_resched() at host side.
If u
On Sun, 12 Nov 2023 at 09:22, Nikita Ostrenkov wrote:
Hi; thanks for this patch, and sorry I haven't got round
to reviewing it earlier.
> Signed-off-by: Nikita Ostrenkov
> ---
> hw/misc/imx7_snvs.c | 59 -
> hw/misc/trace-events| 4 +--
> in
From: Inès Varhol
Although very similar to the STM32F4xx EXTI, STM32L4x5 EXTI generates
more than 32 event/interrupt requests and thus uses more registers
than STM32F4xx EXTI which generates 23 event/interrupt requests.
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
hw/misc/Kconf
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