Hi
On Sat, Nov 25, 2023 at 11:55 AM lijiejun wrote:
>
> Reduce unnecessary code execution in function qemu_spice_create_update,
> such as "int blocks = DIV_ROUND_UP(surface_width(ssd->ds), blksize);"
> and "int bpp = surface_bytes_per_pixel(ssd->ds);".
>
> Signed-off-by: lijiejun
This is a micr
18/10/23 14:09, Anastasia Belova:
It's better to overwrite freed pointer s->fd to avoid accessing an
invalid descriptor. Found by Linux Verification Center
(linuxtesting.org) with SVACE.
Just a friendly reminder.
Anastasia Belova
ZNS emulation follows NVMe ZNS spec but the state of namespace
zones does not persist accross restarts of QEMU. This patch makes the
metadata of ZNS emulation persistent by using new block layer APIs and
the qcow2 img as backing file. It is the second part after the patches
- adding full zoned stor
On Fri, 2023-11-24 at 23:24 +, Volodymyr Babchuk wrote:
> Xen PV devices in QEMU can be created in two ways: either by QEMU
> itself, if they were passed via command line, or by Xen toolstack. In
> the latter case, QEMU scans XenStore entries and configures devices
> accordingly.
>
> In the se
On Fri, 2023-11-24 at 23:24 +, Volodymyr Babchuk wrote:
> This patch makes legacy backends optional. As was discussed at [1]
> this is a solution to a problem when we can't run QEMU as a device
> model in a non-privileged domain. This is because legacy backends
> assume that they are always run
Zone descriptor data is host definied data that is associated with
each zone. Add zone descriptor extensions to zonedmeta struct.
Signed-off-by: Sam Li
---
block/qcow2.c| 69 +---
block/qcow2.h| 2 +
include/block/block_int-com
ZNS emulation follows NVMe ZNS spec but the state of namespace
zones does not persist accross restarts of QEMU. This patch makes the
metadata of ZNS emulation persistent by using new block layer APIs and
the qcow2 img as backing file. It is the second part after the patches
- adding full zoned stor
Signed-off-by: Sam Li
---
docs/interop/qcow2.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/docs/interop/qcow2.txt b/docs/interop/qcow2.txt
index 0f1938f056..458d05371a 100644
--- a/docs/interop/qcow2.txt
+++ b/docs/interop/qcow2.txt
@@ -428,6 +428,9 @@ The fields of the zoned extensi
The zone information is contained in the BlockLimits fileds. Add blk_get_*()
functions
to access the block layer and update zone info accessing in the NVMe device
emulation.
Signed-off-by: Sam Li
---
block/block-backend.c | 72 +++
hw/nvme/ctrl.c
The NVMe ZNS devices follow NVMe ZNS spec but the state of namespace
zones does not persist accross restarts of QEMU. This patch makes the
metadata of ZNS emulation persistent by using new block layer APIs. The
ZNS device calls zone report and zone mgmt APIs from the block layer
which will handle z
Zone descriptor extension data (ZDED) is not persistent across QEMU
restarts. The zone descriptor extension valid bit (ZDEV) is part of
zone attributes, which sets to one when the ZDED is associated with
the zone.
With the qcow2 img as the backing file, the NVMe ZNS device stores
the zone attribut
Signed-off-by: Sam Li
---
block/block-backend.c | 16
hw/nvme/ctrl.c| 20 ++--
hw/nvme/ns.c | 24
hw/nvme/nvme.h| 7 ---
include/sysemu/block-backend-io.h | 2 +
Signed-off-by: Sam Li
---
block/qcow2.c| 2 +-
hw/nvme/ctrl.c | 190 ---
include/sysemu/dma.h | 3 +
system/dma-helpers.c | 17
4 files changed, 162 insertions(+), 50 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
index dfa
On 11/23/23 08:56, Akihiko Odaki wrote:
g_new() aborts if the allocation fails so it returns NULL only if the
requested allocation size is zero. register_vfs() makes such an
allocation if NumVFs is zero so it should not assert that g_new()
returns a non-NULL value.
Fixes: 7c0fa8dff8 ("pcie: Add
Hi
On Thu, Nov 23, 2023 at 12:46 PM Fiona Ebner wrote:
>
> Am 23.11.23 um 07:52 schrieb Marc-André Lureau:
> > Hi
> >
> > On Wed, Nov 22, 2023 at 5:25 PM Fiona Ebner wrote:
> >>
> >> Am 22.11.23 um 14:06 schrieb Marc-André Lureau:
> >>> Hi
> >>>
> >>> On Wed, Nov 22, 2023 at 5:00 PM Fiona Ebner
Hi David,
"Woodhouse, David" writes:
> [[S/MIME Signed Part:Undecided]]
> On Fri, 2023-11-24 at 23:24 +, Volodymyr Babchuk wrote:
>> This patch makes legacy backends optional. As was discussed at [1]
>> this is a solution to a problem when we can't run QEMU as a device
>> model in a non-pr
From: Zhao Liu
>From s390_possible_cpu_arch_ids() in hw/s390x/s390-virtio-ccw.c, the
"core-id" is the index of pssible_cpus->cpus[], so it should only be
less than possible_cpus->len, which is equal to ms->smp.max_cpus.
Fix the wrong "core-id" 112 because it is greater than maxcpus (36) in
-smp.
On Sat, 25 Nov 2023 at 13:09, Petr Cvek wrote:
>
> It seems there is a bug in SIGALRM handling when 486 system emulates x86_64
> code.
486 host is pretty well out of support currently. Can you reproduce
this on a less ancient host CPU type ?
> ERROR:../accel/tcg/cpu-exec.c:546:cpu_exec_longjmp_
On Sat, 25 Nov 2023 at 12:24, Petr Cvek wrote:
>
> GCC defines __i386__ for i386 and i486, which both lack RDTSC instruction.
> The i386 seems to be impossible to distinguish, but i486 can be identified
> by checking for undefined __i486__.
>
> Signed-off-by: Petr Cvek
Last time this came up (ov
Hi Eric,
On 11/24/23 18:40, Eric Auger wrote:
Hi Shaoqin,
On 11/17/23 07:08, Shaoqin Huang wrote:
The KVM_ARM_VCPU_PMU_V3_FILTER provide the ability to let the VMM decide
which PMU events are provided to the guest. Add a new option
`pmu-filter` as -accel sub-option to set the PMU Event Filteri
Hi Eric,
On 11/25/23 02:24, Eric Auger wrote:
Hi,
On 11/17/23 07:08, Shaoqin Huang wrote:
The KVM_ARM_VCPU_PMU_V3_FILTER provide the ability to let the VMM decide
which PMU events are provided to the guest. Add a new option
`pmu-filter` as -accel sub-option to set the PMU Event Filtering.
The
On Mon, 27 Nov 2023 at 03:52, Gihun Nam wrote:
>
> The current implementation initializes the stack pointer of AVR devices
> to 0, but it should be set to RAMEND according to the specs.
>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1525
> Signed-off-by: Gihun Nam
Hi; thanks for sen
W dniu 27.11.2023 o 00:12, Gavin Shan pisze:
After the series is applied:
[gshan@gshan q]$ ./build/qemu-system-aarch64 -M virt -cpu cortex-a8
qemu-system-aarch64: Invalid CPU type: cortex-a8
The valid types are: cortex-a7, cortex-a15, cortex-a35, cortex-a55, \
W dniu 27.11.2023 o 00:12, Gavin Shan pisze:
@@ -2939,6 +2900,28 @@ static void virt_machine_class_init(ObjectClass *oc,
void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
+static const char * const valid_cpu_types[] = {
+#i
On 11/27/23 21:10, Marcin Juszkiewicz wrote:
W dniu 27.11.2023 o 00:12, Gavin Shan pisze:
After the series is applied:
[gshan@gshan q]$ ./build/qemu-system-aarch64 -M virt -cpu cortex-a8
qemu-system-aarch64: Invalid CPU type: cortex-a8
The valid types are: cortex-a7, cortex-a15, cort
On 11/27/23 21:13, Marcin Juszkiewicz wrote:
W dniu 27.11.2023 o 00:12, Gavin Shan pisze:
@@ -2939,6 +2900,28 @@ static void virt_machine_class_init(ObjectClass *oc,
void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
+ stati
Am 27.11.23 um 10:15 schrieb Marc-André Lureau:
>
> It seems like a bug in tigervnc then. For some reason, the compressed
> data doesn't trigger Z_STREAM_END on the decompression side. Have you
> investigated or reported an issue to them?
>
This was with noVNC. A colleague tested with TigerVNC.
Hi, this is a fixup for the recent patch series "QEMU: CXL mailbox rework and
features (Part 1)" [1].
This fixes two problems:
1. Media Status in memory device status register not being correctly
read as "Disabled" while sanitation is in progress.
2. QEMU assertion failure when it is
commit 43efb0bfad2b ("hw/cxl/mbox: Wire up interrupts for background
completion") enables notifying background command completion via MSI-X
interrupt (vector number 9).
However, the commit uses vector number 9 but the maximum number of
entries is less thus resulting in error below. Fix it by passi
In the current mdev_reg_read() implementation, it consistently returns
that the Media Status is Ready (01b). This was fine until commit
25a52959f99d ("hw/cxl: Add support for device sanitation") because the
media was presumed to be ready.
However, as per the CXL 3.0 spec "8.2.9.8.5.1 Sanitize (Opc
Some profiles, like RVA22S64, has a priv_spec requirement.
Make this requirement explicit for all profiles. We'll validate this
requirement finalize() time and, in case the user chooses an
incompatible priv_spec while activating a profile, a warning will be
shown.
Signed-off-by: Daniel Henrique B
Based-on: 20231124202353.1187814-1-dbarb...@ventanamicro.com
("[PATCH for-9.0 v12 00/18] riscv: rv64i/rva22u64 CPUs, RVA22U64 profile
support")
Hi,
In this second version the most notable change is a new patch where we
added a 'parent' field in the profile description. This feature was
suggested
'svade' is a RVA22S64 profile requirement, a profile we're going to add
shortly. It is a named feature (i.e. not a formal extension, not defined
in riscv,isa DT at this moment) defined in [1] as:
"Page-fault exceptions are raised when a page is accessed when A bit is
clear, or written when D bit i
Next patch will need to retrieve if a given RISCVCPU is 32 or 64 bit.
The existing helper riscv_is_32bit() (hw/riscv/boot.c) will always check
the first CPU of a given hart array, not any given CPU.
Create a helper to retrieve the info for any given CPU, not the first
CPU of the hart array. The he
The RVA22S64 profile consists of the following:
- all mandatory extensions of RVA22U64;
- priv spec v1.12.0;
- satp mode sv39;
- Ssccptr, a cache related named feature that we're assuming always
enable since we don't implement a cache;
- Other named features already implemented: Sstvecd, Sstvala
Certain S-mode profiles, like RVA22S64 and RVA23S64, mandate all the
mandatory extensions of their respective U-mode profiles. RVA22S64
includes all mandatory extensions of RVA22U64, and the same happens with
RVA23 profiles.
Add a 'parent' field to allow profiles to enable other profiles. This
wil
Profiles will need to validate satp_mode during their own finalize
methods. This will occur inside riscv_tcg_cpu_finalize_features() for
TCG. Given that satp_mode does not have any pre-req from the accelerator
finalize() method, it's safe to finalize it earlier.
Signed-off-by: Daniel Henrique Barb
Add a new profile CPU 'rva22s64' to work as an alias of
-cpu rv64i,rva22s64
Like the existing rva22u64 CPU already does with the RVA22U64 profile.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
---
target/riscv/cpu-qom.h | 1 +
target/riscv/cpu.c | 8
2 files ch
'satp_mode' is a requirement for supervisor profiles like RVA22S64.
User-mode/application profiles like RVA22U64 doesn't care.
Add 'satp_mode' to the profile description. If a profile requires it,
set it during cpu_set_profile(). We'll also check it during finalize()
to validate if the running con
On Mon, 27 Nov 2023, Nicholas Piggin wrote:
On Sun Nov 26, 2023 at 2:34 AM AEST, BALATON Zoltan wrote:
The machine uses a modified U-Boot under GPL license but the sources
of it are lost with only a binary available so it cannot be included
in QEMU. Allow running without the firmware image with
Am 24.11.2023 um 18:44 hat Kevin Wolf geschrieben:
> The vhost-user-blk export implement AioContext switches in its drain
> implementation. This means that on drain_begin, it detaches the server
> from its AioContext and on drain_end, attaches it again and schedules
> the server->co_trip coroutine
The vhost-user-blk export implement AioContext switches in its drain
implementation. This means that on drain_begin, it detaches the server
from its AioContext and on drain_end, attaches it again and schedules
the server->co_trip coroutine in the updated AioContext.
However, nothing guarantees tha
On Mon, Nov 27, 2023 at 08:37:46AM -0300, Daniel Henrique Barboza wrote:
> Some profiles, like RVA22S64, has a priv_spec requirement.
>
> Make this requirement explicit for all profiles. We'll validate this
> requirement finalize() time and, in case the user chooses an
> incompatible priv_spec whi
Am 22.11.2023 um 13:15 hat Andrey Drobyshev geschrieben:
> MT is being detected based on "-M help" output, and we're searching for
> the line ending with " (default)". However, in downstream one of the
> MTs marked as deprecated might become the default, in which case this
> logic breaks as the li
On Mon, Nov 27, 2023 at 08:37:50AM -0300, Daniel Henrique Barboza wrote:
> Certain S-mode profiles, like RVA22S64 and RVA23S64, mandate all the
> mandatory extensions of their respective U-mode profiles. RVA22S64
> includes all mandatory extensions of RVA22U64, and the same happens with
> RVA23 pro
On Mon, Nov 27, 2023 at 08:37:51AM -0300, Daniel Henrique Barboza wrote:
> The RVA22S64 profile consists of the following:
>
> - all mandatory extensions of RVA22U64;
> - priv spec v1.12.0;
> - satp mode sv39;
> - Ssccptr, a cache related named feature that we're assuming always
> enable since w
Hej,
qemu fails to start a guest using the following command (the process just
hangs): qemu-system-aarch64 -machine virt -cpu host -smp 4 -m 8192
-kernel /boot/vmlinuz-6.7.0-rc1 -initrd ~/basic.img -append "root=/dev/ram
console=ttyAMA0" -enable-kvm -device virtio-gpu,hostmem=2G -display none
Simple reproducer:
qemu.git $ ./build/qemu-system-x86_64 \
-m size=8389632k,slots=16,maxmem=2560k \
-object
'{"qom-type":"memory-backend-file","id":"ram-node0","mem-path":"/hugepages2M/","prealloc":true,"size":8590983168,"host-nodes":[0],"policy":"bind"}'
\
-numa node,nodeid=0,cpus=0,memdev=r
On Mon, 27 Nov 2023 at 12:29, Sebastian Ott wrote:
>
> Hej,
>
> qemu fails to start a guest using the following command (the process just
> hangs): qemu-system-aarch64 -machine virt -cpu host -smp 4 -m 8192
> -kernel /boot/vmlinuz-6.7.0-rc1 -initrd ~/basic.img -append "root=/dev/ram
> console=ttyA
On Mon Nov 27, 2023 at 9:43 PM AEST, BALATON Zoltan wrote:
> On Mon, 27 Nov 2023, Nicholas Piggin wrote:
> > On Sun Nov 26, 2023 at 2:34 AM AEST, BALATON Zoltan wrote:
> >> The machine uses a modified U-Boot under GPL license but the sources
> >> of it are lost with only a binary available so it ca
On Mon, 2023-11-27 at 17:39 +0800, Zhao Liu wrote:
> From: Zhao Liu
>
> From s390_possible_cpu_arch_ids() in hw/s390x/s390-virtio-ccw.c, the
> "core-id" is the index of pssible_cpus->cpus[], so it should only be
s/pssible_cpus/possible_cpus/
> less than possible_cpus->len, which is equal to ms-
The current implementation initializes the stack pointer of AVR devices
to 0. Although older AVR devices used to be like that, newer ones set
it to RAMEND.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1525
Signed-off-by: Gihun Nam
---
Edit code to use QOM property and add more descript
On Mon, 27 Nov 2023, Peter Maydell wrote:
On Mon, 27 Nov 2023 at 12:29, Sebastian Ott wrote:
qemu fails to start a guest using the following command (the process just
hangs): qemu-system-aarch64 -machine virt -cpu host -smp 4 -m 8192
-kernel /boot/vmlinuz-6.7.0-rc1 -initrd ~/basic.img -append "
Hi Nina,
On Mon, Nov 27, 2023 at 01:58:32PM +0100, Nina Schoetterl-Glausch wrote:
> Date: Mon, 27 Nov 2023 13:58:32 +0100
> From: Nina Schoetterl-Glausch
> Subject: Re: [RFC] docs/s390: Fix wrong command example in
> s390-cpu-topology.rst
>
> On Mon, 2023-11-27 at 17:39 +0800, Zhao Liu wrote:
>
From: Zhao Liu
>From s390_possible_cpu_arch_ids() in hw/s390x/s390-virtio-ccw.c, the
"core-id" is the index of possible_cpus->cpus[], so it should only be
less than possible_cpus->len, which is equal to ms->smp.max_cpus.
Fix the wrong "core-id" 112, because it isn't less than maxcpus (36) in
-sm
On 27.11.23 13:32, Michal Privoznik wrote:
Simple reproducer:
qemu.git $ ./build/qemu-system-x86_64 \
-m size=8389632k,slots=16,maxmem=2560k \
-object
'{"qom-type":"memory-backend-file","id":"ram-node0","mem-path":"/hugepages2M/","prealloc":true,"size":8590983168,"host-nodes":[0],"policy":"b
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
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On Mon, 27 Nov 2023, Nicholas Piggin wrote:
On Mon Nov 27, 2023 at 9:43 PM AEST, BALATON Zoltan wrote:
On Mon, 27 Nov 2023, Nicholas Piggin wrote:
On Sun Nov 26, 2023 at 2:34 AM AEST, BALATON Zoltan wrote:
The machine uses a modified U-Boot under GPL license but the sources
of it are lost with
On 27.11.23 14:37, David Hildenbrand wrote:
On 27.11.23 13:32, Michal Privoznik wrote:
Simple reproducer:
qemu.git $ ./build/qemu-system-x86_64 \
-m size=8389632k,slots=16,maxmem=2560k \
-object
'{"qom-type":"memory-backend-file","id":"ram-node0","mem-path":"/hugepages2M/","prealloc":true,"
On 11/24/23 21:39, Joelle van Dyne wrote:
On Fri, Nov 24, 2023 at 8:26 AM Stefan Berger wrote:
On 11/24/23 11:21, Joelle van Dyne wrote:
On Fri, Nov 24, 2023 at 8:17 AM Stefan Berger wrote:
On 11/23/23 19:56, Joelle van Dyne wrote:
On Tue, Nov 14, 2023 at 4:12 PM Stefan Berger wro
On Mon, 27 Nov 2023 at 06:58, Kevin Wolf wrote:
>
> The vhost-user-blk export implement AioContext switches in its drain
> implementation. This means that on drain_begin, it detaches the server
> from its AioContext and on drain_end, attaches it again and schedules
> the server->co_trip coroutine
On Mon, 27 Nov 2023 at 13:08, Sebastian Ott wrote:
>
> On Mon, 27 Nov 2023, Peter Maydell wrote:
> > On Mon, 27 Nov 2023 at 12:29, Sebastian Ott wrote:
> >> qemu fails to start a guest using the following command (the process just
> >> hangs): qemu-system-aarch64 -machine virt -cpu host -smp 4 -m
On Fri, Nov 24, 2023 at 01:14:26PM -0300, Fabiano Rosas wrote:
> This was introduced by commit 34c55a94b1 ("migration: Create multipage
> support") and never used.
>
> Signed-off-by: Fabiano Rosas
Reviewed-by: Peter Xu
--
Peter Xu
From: Zhao Liu
Remove unused header (qemu/module.h and sysemu/cpus.h) in core.c,
and reorder the remaining header files (except qemu/osdep.h) in
alphabetical order.
Tested by "./configure" and then "make".
Signed-off-by: Zhao Liu
---
hw/cpu/core.c | 7 +++
1 file changed, 3 insertions(+),
From: Zhao Liu
Remove unused header (qemu/module.h and qemu/cutils.h) in cluster.c,
and reorder the remaining header files (except qemu/osdep.h) in
alphabetical order.
Tested by "./configure" and then "make".
Signed-off-by: Zhao Liu
---
hw/cpu/cluster.c | 5 ++---
1 file changed, 2 insertions
On Fri, Nov 24, 2023 at 01:14:27PM -0300, Fabiano Rosas wrote:
> Signed-off-by: Fabiano Rosas
Reviewed-by: Peter Xu
--
Peter Xu
From: Zhao Liu
Remove unused header in core.c and cluster.c, and reorder the remaining
header files (except qemu/osdep.h) in alphabetical order.
Tested by "./configure" and then "make".
---
Zhao Liu (2):
hw/cpu/core: Cleanup unused included header in core.c
hw/cpu/cluster: Cleanup unused in
On Fri, Nov 24, 2023 at 01:14:28PM -0300, Fabiano Rosas wrote:
> The 'size' argument is actually the number of pages that fit in a
> multifd packet. Change it to uint32_t and rename.
>
> Signed-off-by: Fabiano Rosas
Reviewed-by: Peter Xu
--
Peter Xu
On Fri, Nov 24, 2023 at 01:14:29PM -0300, Fabiano Rosas wrote:
> We're not currently reporting the errors set with migrate_set_error()
> when incoming migration fails.
>
> Signed-off-by: Fabiano Rosas
Reviewed-by: Peter Xu
--
Peter Xu
On Fri, Nov 24, 2023 at 01:14:30PM -0300, Fabiano Rosas wrote:
> We're currently just asserting when incoming migration fails. Let's
> print the error message from QMP as well.
>
> Signed-off-by: Fabiano Rosas
> ---
> tests/qtest/migration-helpers.c | 6 ++
> 1 file changed, 6 insertions(+)
On Fri, Nov 24, 2023 at 01:14:31PM -0300, Fabiano Rosas wrote:
> Our usage of gtest results in us losing the very basic functionality
> of "knowing which test failed". The issue is that gtest only prints
> test names ("paths" in gtest parlance) once the test has finished, but
> we use asserts in th
On Fri, Nov 24, 2023 at 01:14:32PM -0300, Fabiano Rosas wrote:
> Replace the tests registration with the new function that prints tests
> names.
>
> Signed-off-by: Fabiano Rosas
Reviewed-by: Peter Xu
--
Peter Xu
On Thu, Nov 23, 2023 at 02:49:28PM -0500, Stefan Hajnoczi wrote:
> Stop depending on the AioContext lock and instead access
> SCSIDevice->requests from only one thread at a time:
> - When the VM is running only the BlockBackend's AioContext may access
> the requests list.
> - When the VM is stopp
On Fri, Nov 24, 2023 at 11:56:54AM +, Fam wrote:
> From: Fam Zheng
>
> If the text description file is larger than DESC_SIZE, we force the last
> byte in the buffer to be 0 and write it out.
>
> This results in a corruption.
>
> Try to allocate a big buffer in this case.
>
> Resolves: http
On Thu, Nov 23, 2023 at 02:49:29PM -0500, Stefan Hajnoczi wrote:
> virtio_queue_aio_attach_host_notifier() does not require the AioContext
> lock. Stop taking the lock and remember add an explicit smp_wmb()
s/remember// ?
> because we were relying on the implicit barrier in the AioContext lock
>
On Fri, 24 Nov 2023 at 18:34, Philippe Mathieu-Daudé wrote:
>
> Series fully reviewed.
>
> Since v2:
> - Addressed Vikram review comments,
> - Added R-b tags
>
> Fix a pair of fuzzed bugs.
>
> Tested with the CAN tests from 'make check-qtest-aarch64'.
Applied to target-arm.next, thanks.
-- PMM
On Tue, 21 Nov 2023 at 17:40, Philippe Mathieu-Daudé wrote:
>
> In few places we forget to free the array allocated by the
> DEFINE_PROP_ARRAY() macro handlers. Fix that.
>
> Philippe Mathieu-Daudé (6):
> hw/virtio: Add VirtioPCIDeviceTypeInfo::instance_finalize field
> hw/virtio: Free VirtIOI
On Fri, 24 Nov 2023 at 14:35, Frederic Konrad wrote:
>
> Hi,
>
> Those are various simple fixes for ZynqMP:
> * 1: fixes a possible out of bound access in the SPI model.
> * 2: is a trivial fix for documentation url.
> * 3: is a log guest error fix for the CSU DMA.
>
Applied to target-arm
Peter Xu writes:
> On Fri, Nov 24, 2023 at 01:14:31PM -0300, Fabiano Rosas wrote:
>> Our usage of gtest results in us losing the very basic functionality
>> of "knowing which test failed". The issue is that gtest only prints
>> test names ("paths" in gtest parlance) once the test has finished, bu
From: Zhao Liu
In fact, type4-count, core-count, core-count2, thread-count and
thread-count2 are tested with KVM not TCG.
Rename these test functions to reflect KVM base instead of TCG.
Signed-off-by: Zhao Liu
---
tests/qtest/bios-tables-test.c | 20 ++--
1 file changed, 10 in
Peter Xu writes:
> On Fri, Nov 24, 2023 at 01:14:30PM -0300, Fabiano Rosas wrote:
>> We're currently just asserting when incoming migration fails. Let's
>> print the error message from QMP as well.
>>
>> Signed-off-by: Fabiano Rosas
>> ---
>> tests/qtest/migration-helpers.c | 6 ++
>> 1 fi
On Mon, Nov 27, 2023 at 12:44:53PM -0300, Fabiano Rosas wrote:
> >> +static void migration_test_wrapper(const void *data)
> >> +{
> >> +MigrationTest *test = (MigrationTest *)data;
> >> +
> >> +g_test_message("Running /%s%s", qtest_get_arch(), test->name);
> >
> > /%s/%s?
>
> The test name
Introduce the SM4 cipher algorithms (OSCCA GB/T 32907-2016).
SM4 (GBT.32907-2016) is a cryptographic standard issued by the
Organization of State Commercial Administration of China (OSCCA)
as an authorized cryptographic algorithms for the use within China.
Signed-off-by: Hyman Huang
---
crypto/
On Thu, Nov 23, 2023 at 02:49:30PM -0500, Stefan Hajnoczi wrote:
> blk_aio_*() doesn't require the AioContext lock and the SCSI subsystem's
> internal state also does not anymore.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> hw/scsi/scsi-disk.c| 23 ---
> hw/scsi/scsi-gener
On 10/26/23 18:47, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The LBUS is modelled to maintain the qdev bus hierarchy and to take
advantage of the object model to automatically generate the CFAM
configuration block. The configuration blo
Am 24.11.2023 um 12:56 hat Fam geschrieben:
> From: Fam Zheng
>
> If the text description file is larger than DESC_SIZE, we force the last
> byte in the buffer to be 0 and write it out.
>
> This results in a corruption.
>
> Try to allocate a big buffer in this case.
>
> Resolves: https://gitla
On 10/26/23 18:47, Ninad Palsule wrote:
This is a part of patchset where scratchpad is introduced.
The scratchpad provides a set of non-functional registers. The firmware
is free to use them, hardware does not support any special management
support. The scratchpad registers can be read or writte
On Mon, Nov 27, 2023 at 11:55:34PM +0800, Hyman Huang wrote:
> Introduce the SM4 cipher algorithms (OSCCA GB/T 32907-2016).
>
> SM4 (GBT.32907-2016) is a cryptographic standard issued by the
> Organization of State Commercial Administration of China (OSCCA)
> as an authorized cryptographic algorit
On 10/26/23 18:47, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The Common FRU Access Macro (CFAM), an address space containing
various "engines" that drive accesses on busses internal and external
to the POWER chip. Examples include the S
On 10/26/23 18:47, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
This commit models the FSI bus. CFAM is hanging out of FSI bus. The bus
is model such a way that it is embedded inside the FSI master which is a
bus controller.
The FSI maste
On 10/26/23 18:47, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in
POWER processors. This now makes an appearance in the ASPEED SoC due
to tight integration of the FSI maste
On 10/26/23 18:47, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
An APB-to-OPB bridge enabling access to the OPB from the ARM core in
the AST2600. Hardware limitations prevent the OPB from being directly
mapped into APB, so all accesses are
On 10/26/23 18:47, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The LBUS is modelled to maintain the qdev bus hierarchy and to take
advantage of the object model to automatically generate the CFAM
configuration block. The configuration blo
On 10/26/23 18:47, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The Common FRU Access Macro (CFAM), an address space containing
various "engines" that drive accesses on busses internal and external
to the POWER chip. Examples include the S
Hello Ninad,
On 10/26/23 18:47, Ninad Palsule wrote:
Hello,
Please review the patch-set version 7.
I have incorporated review comments from Cedric, Philippe and Thomas.
I reworked v7 with the suggestions I made in patches 1-6. Please check :
https://github.com/legoater/qemu/commits/aspeed
I'm not sure, I don't think it's necessary if your minimal patch works.
I'll do a PR for 8.2 for SLOF and Skiboot updates, so happy to include
this as well.
I think this is a bit late for 8.2 to change FW images, well, at least
SLOF and skiboot. Are the new versions fixing something critical
On Tue, Nov 28, 2023 at 12:11 AM Daniel P. Berrangé
wrote:
> On Mon, Nov 27, 2023 at 11:55:34PM +0800, Hyman Huang wrote:
> > Introduce the SM4 cipher algorithms (OSCCA GB/T 32907-2016).
> >
> > SM4 (GBT.32907-2016) is a cryptographic standard issued by the
> > Organization of State Commercial Ad
On Wed, 2023-11-22 at 09:55 +0100, Cédric Le Goater wrote:
> On 11/21/23 20:09, Glenn Miles wrote:
> > Specs are available here:
> >
> > https://www.nxp.com/docs/en/data-sheet/PCA9554_9554A.pdf
> >
> > This is a simple model supporting the basic registers for GPIO
> > mode. The device also
Apologies for the late reply. I was on vacation. Please see my response below:
On 11/13/23 02:19, Peter Zijlstra wrote:
> On Sun, Nov 12, 2023 at 09:23:24PM -0500, Mickaël Salaün wrote:
>> From: Madhavan T. Venkataraman
>>
>> X86 uses a function called __text_poke() to modify executable code. Thi
On Mon, 2023-11-20 at 10:42 +0100, Cornelia Huck wrote:
> Add 9.0 machine types for arm/i440fx/m68k/q35/s390x/spapr.
>
> Signed-off-by: Cornelia Huck
> ---
> hw/arm/virt.c | 9 -
> hw/core/machine.c | 3 +++
> hw/i386/pc.c | 3 +++
> hw/i386/pc_piix
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