Re: [PATCH for-8.2] ui/vnc-clipboard: fix inflate_buffer

Am 23.11.23 um 07:52 schrieb Marc-André Lureau: > Hi > > On Wed, Nov 22, 2023 at 5:25 PM Fiona Ebner wrote: >> >> Am 22.11.23 um 14:06 schrieb Marc-André Lureau: >>> Hi >>> >>> On Wed, Nov 22, 2023 at 5:00 PM Fiona Ebner wrote: Commit d921fea338 ("ui/vnc-clipboard: fix infinite loop in

Re: [PATCH v2 2/2] ppc/spapr: Initialize max_cpus limit to SPAPR_NR_IPIS.

On 11/23/23 06:03, Harsh Prateek Bora wrote: Hi Philippe, On 11/22/23 16:46, Philippe Mathieu-Daudé wrote: Hi Harsh, On 22/11/23 10:28, Harsh Prateek Bora wrote: Initialize the machine specific max_cpus limit as per the maximum range of CPU IPIs available. Keeping between 4096 to 8192 will th

Re: [PATCH v3 1/2] ppc/spapr: Introduce SPAPR_IRQ_NR_IPIS to refer IRQ range for CPU IPIs.

On 11/23/23 06:57, Harsh Prateek Bora wrote: spapr_irq_init currently uses existing macro SPAPR_XIRQ_BASE to refer to the range of CPU IPIs during initialization of nr-irqs property. It is more appropriate to have its own define which can be further reused as appropriate for correct interpretatio

Re: [PATCH v3 2/2] ppc/spapr: Initialize max_cpus limit to SPAPR_IRQ_NR_IPIS.

On 11/23/23 06:57, Harsh Prateek Bora wrote: Initialize the machine specific max_cpus limit as per the maximum range of CPU IPIs available. Keeping between 4096 to 8192 will throw IRQ not free error due to XIVE/XICS limitation and keeping beyond 8192 will hit assert in tcg_region_init or spapr_xi

[PATCH 1/1] target/riscv/pmp: Use hwaddr instead of target_ulong for RV32

The Sv32 page-based virtual-memory scheme described in RISCV privileged spec Section 5.3 supports 34-bit physical addresses for RV32, so the PMP scheme must support addresses wider than XLEN for RV32. However, PMP address register format is still 32 bit wide. Signed-off-by: Ivan Klokov --- targe

Re: [PATCH v2 4/6] xen_pvdev: Do not assume Dom0 when creating a directory

On 23/11/2023 00:07, Volodymyr Babchuk wrote: Hi, Volodymyr Babchuk writes: Hi Stefano, Stefano Stabellini writes: On Wed, 22 Nov 2023, David Woodhouse wrote: On Wed, 2023-11-22 at 15:09 -0800, Stefano Stabellini wrote: On Wed, 22 Nov 2023, David Woodhouse wrote: On Wed, 2023-11-22 at

Re: [PATCH v2 1/6] hw/xen: Set XenBackendInstance in the XenDevice before realizing it

On 22/11/2023 23:04, David Woodhouse wrote: On Wed, 2023-11-22 at 22:56 +, Volodymyr Babchuk wrote: Paul Durrant writes: On 21/11/2023 22:10, Volodymyr Babchuk wrote: From: David Woodhouse This allows a XenDevice implementation to know whether it was created by QEMU, or merely discove

Re: [PATCH v3 1/2] ppc/spapr: Introduce SPAPR_IRQ_NR_IPIS to refer IRQ range for CPU IPIs.

On 11/23/23 14:20, Cédric Le Goater wrote: On 11/23/23 06:57, Harsh Prateek Bora wrote: spapr_irq_init currently uses existing macro SPAPR_XIRQ_BASE to refer to the range of CPU IPIs during initialization of nr-irqs property. It is more appropriate to have its own define which can be further

Re: [RFC PATCH-for-9.0 02/11] target/arm: Add target_aarch64_available() helper

On 22/11/23 19:30, Philippe Mathieu-Daudé wrote: We want to build HW models once, but don't want to register types when all prerequisites are satisfied. Add the target_aarch64_available() to know at runtime whether TARGET_AARCH64 is built-in. Signed-off-by: Philippe Mathieu-Daudé --- target/a

Re: [PATCH-for-8.2] pcie_sriov: Remove g_new assertion

On 23/11/23 08:56, Akihiko Odaki wrote: g_new() aborts if the allocation fails so it returns NULL only if the requested allocation size is zero. register_vfs() makes such an allocation if NumVFs is zero so it should not assert that g_new() returns a non-NULL value. Fixes: 7c0fa8dff8 ("pcie: Add

[PATCH for-8.2] target/riscv/kvm: fix shadowing in kvm_riscv_(get|put)_regs_csr

KVM_RISCV_GET_CSR() and KVM_RISCV_SET_CSR() use an 'int ret' variable that is used to do an early 'return' if ret > 0. Both are being called in functions that are also declaring a 'ret' integer, initialized with '0', and this integer is used as return of the function. The result is that the compil

Re: [PATCH] hw/i386: Rename kvmvapic.c -> vapic.c

Il mar 5 set 2023, 16:52 Philippe Mathieu-Daudé ha scritto: > vAPIC isn't KVM specific, so having its name prefixed 'kvm' > is misleading. Rename it simply 'vapic'. Rename the single > function prefixed 'kvm'. > > Signed-off-by: Philippe Mathieu-Daudé > --- > Interestingly there is a strong depe

Re: [PATCH for-8.2] ui/pixman-minimal.h: fix empty allocation

21.11.2023 12:38, Manos Pitsidianakis : In the minimal pixman API stub that is used when the real pixman dependency is missing a NULL dereference happens when virtio-gpu-rutabaga allocates a pixman image with bits = NULL and rowstride_bytes = zero. A buffer of rowstride_bytes * height is allocate

Re: [PATCH] hw/ppc: Improve build for PPC VFIO

Hi Cédric, On 23/11/23 08:33, Cédric Le Goater wrote: On 11/23/23 07:01, Zhenzhong Duan wrote: VFIO is not a required subsystem for the pseries machine but it's force enabled currently. When --without-default-devices is used to drop some default devices including vfio-pci, vfio core code is sti

Re: [PATCH] RISC-V: Increase max vlen to 4096

Hi Patrick, On 23/11/23 01:17, Patrick O'Neill wrote: QEMU currently limits the max vlenb to 1024. GCC sets the upper bound to 4096 [1]. There doesn't seem to be an upper bound set by the spec [2] so this patch just changes QEMU to match GCC's upper bound. [1] https://github.com/gcc-mirror/gcc

Re: [PATCH for-8.2] target/riscv/kvm: fix shadowing in kvm_riscv_(get|put)_regs_csr

On 23/11/23 11:13, Daniel Henrique Barboza wrote: KVM_RISCV_GET_CSR() and KVM_RISCV_SET_CSR() use an 'int ret' variable that is used to do an early 'return' if ret > 0. Both are being called in functions that are also declaring a 'ret' integer, initialized with '0', and this integer is used as re

Re: [PATCH for-8.2] ui/pixman-minimal.h: fix empty allocation

On Thu, 23 Nov 2023 12:15, Michael Tokarev wrote: 21.11.2023 12:38, Manos Pitsidianakis : In the minimal pixman API stub that is used when the real pixman dependency is missing a NULL dereference happens when virtio-gpu-rutabaga allocates a pixman image with bits = NULL and rowstride_bytes = ze

Re: [PATCH v2 2/2] ppc/spapr: Initialize max_cpus limit to SPAPR_NR_IPIS.

On 23/11/23 09:47, Cédric Le Goater wrote: On 11/23/23 06:03, Harsh Prateek Bora wrote: Hi Philippe, On 11/22/23 16:46, Philippe Mathieu-Daudé wrote: Hi Harsh, On 22/11/23 10:28, Harsh Prateek Bora wrote: Initialize the machine specific max_cpus limit as per the maximum range of CPU IPIs ava

[PATCH 0/7] ppc: pnv ChipTOD and various timebase fixes

The chiptod/TFMR/state machine is not really tied to the other time register fixes, but they touch some of the same code, and logically same facility. Changes since v1 of chiptod patches: - Split hackish ChipTOD<->TFMR/TBST interface into its own patch - Fix multi-socket addressing on P9 / chip ID

[PATCH 1/7] target/ppc: Rename TBL to TB on 64-bit

>From the earliest PowerPC ISA, TBR (later SPR) 268 has been called TB and accessed with mftb instruction. The problem is that TB is the name of the 64-bit register, and 32-bit implementations can only read the lower half with one instruction, so 268 has also been called TBL and it does only read T

[PATCH 4/7] pnv/chiptod: Add POWER9/10 chiptod model

The ChipTOD (for Time-Of-Day) is a pervasive facility that keeps the clocks on multiple chips consistent which can keep TOD (time-of-day), synchronise it across multiple chips, and can move that TOD to or from the core timebase units. This driver implements basic emulation of chiptod registers suf

[PATCH 7/7] target/ppc: Add SMT support to time facilities

The TB, VTB, PURR, HDEC SPRs are per-LPAR registers, and the TFMR is a per-core register. Add the necessary SMT helpers. The TFMR can only drive the timebase state machine via thread 0 of the core, which is almost certainly not right, but it is enough for skiboot and other proprietary firmware. S

[PATCH 5/7] pnv/chiptod: Implement the ChipTOD to Core transfer

One of the functions of the ChipTOD is to transfer TOD to the Core (aka PC - Pervasive Core) timebase facility. The ChipTOD can be programmed with a target address to send the TOD value to. The hardware implementation seems to perform this by sending the TOD value to a SCOM addres. This implement

[PATCH 6/7] target/ppc: Implement core timebase state machine and TFMR

This implements the core timebase state machine, which is the core side of the time-of-day system in POWER processors. This facility is operated by control fields in the TFMR register, which also contains status fields. The core timebase interacts with the chiptod hardware, primarily to receive TO

[PATCH 3/7] target/ppc: Fix move-to timebase SPR access permissions

The move-to timebase registers TBU and TBL can not be read, and they can not be written in supervisor mode on hypervisor-capable CPUs. Signed-off-by: Nicholas Piggin --- target/ppc/helper_regs.c | 31 +++ 1 file changed, 23 insertions(+), 8 deletions(-) diff --git a/

[PATCH 2/7] target/ppc: Improve timebase register defines naming

The timebase in ppc started out with the mftb instruction which is like mfspr but addressed timebase registers (TBRs) rather than SPRs. These instructions could be used to read TB and TBU at 268 and 269. Timebase could be written via the TBL and TBU SPRs at 284 and 285. The ISA changed around v2.0

Re: [PATCH v2] tests/acpi/bios-tables-test: do not write new blobs unless there are changes

> On 21-Nov-2023, at 12:39 PM, Ani Sinha wrote: > > > >> On 16-Nov-2023, at 11:30 AM, Ani Sinha wrote: >> >> >> >>> On 07-Nov-2023, at 10:19 AM, Ani Sinha wrote: >>> >>> When dumping table blobs using rebuild-expected-aml.sh, table blobs from all >>> test variants are dumped regardless

Re: [PATCH v2] tests/acpi/bios-tables-test: do not write new blobs unless there are changes

On Tue, Nov 07, 2023 at 10:19:51AM +0530, Ani Sinha wrote: > When dumping table blobs using rebuild-expected-aml.sh, table blobs from all > test variants are dumped regardless of whether there are any actual changes to > the tables or not. This creates lot of new files for various test variants >

Re: [PATCH v2 4/6] xen_pvdev: Do not assume Dom0 when creating a directory

On Thu, 2023-11-23 at 09:28 +, Paul Durrant wrote: > On 23/11/2023 00:07, Volodymyr Babchuk wrote: > > > > Hi, > > > > Volodymyr Babchuk writes: > > > > > Hi Stefano, > > > > > > Stefano Stabellini writes: > > > > > > > On Wed, 22 Nov 2023, David Woodhouse wrote: > > > > > On Wed, 2023-1

Re: [PATCH] tests/avocado/reverse_debugging: Disable the ppc64 tests by default

On Mon, 20 Nov 2023 at 19:19, John Snow wrote: > > On Wed, Nov 15, 2023 at 12:23 PM Daniel P. Berrangé > wrote: > > The Python Machine() class has passed one of a pre-created socketpair > > FDs for the serial port chardev. The guest is trying to write to this > > and blocking. Nothing in the M

Re: [PATCH 06/19] qapi/schema: adjust type narrowing for mypy's benefit

John Snow writes: > On Wed, Nov 22, 2023, 7:00 AM Markus Armbruster wrote: > >> John Snow writes: >> >> > On Tue, Nov 21, 2023, 9:09 AM Markus Armbruster wrote: [...] >> >> Harmless enough. I can't quite see the mypy problem, though. Care to >> >> elaborate a bit? >> >> >> > >> > self.arg_

Re: [PATCH 08/19] qapi/schema: add static typing and assertions to lookup_type()

John Snow writes: > On Wed, Nov 22, 2023 at 7:09 AM Markus Armbruster wrote: >> >> John Snow writes: >> >> > On Tue, Nov 21, 2023, 9:21 AM Markus Armbruster wrote: >> > >> >> John Snow writes: >> >> >> >> > This function is a bit hard to type as-is; mypy needs some assertions to >> >> > assis

Re: [PATCH] hw/i386: Rename kvmvapic.c -> vapic.c

On 23/11/23 11:14, Paolo Bonzini wrote: Il mar 5 set 2023, 16:52 Philippe Mathieu-Daudé > ha scritto: vAPIC isn't KVM specific, so having its name prefixed 'kvm' is misleading. Rename it simply 'vapic'. Rename the single function prefixed 'kvm'. Sign

Re: [PATCH 01/21] accel/kvm: Make kvm_has_guest_debug static

On 23/11/23 05:41, Richard Henderson wrote: This variable is not used or declared outside kvm-all.c. Signed-off-by: Richard Henderson --- accel/kvm/kvm-all.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 03/21] target/arm/kvm: Merge kvm_arm_init_debug into kvm_arch_init

On 23/11/23 05:42, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/arm/kvm_arm.h | 8 target/arm/kvm.c | 8 +++- target/arm/kvm64.c | 12 3 files changed, 7 insertions(+), 21 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 04/21] target/arm/kvm: Move kvm_arm_verify_ext_dabt_pending and unexport

On 23/11/23 05:42, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/arm/kvm_arm.h | 10 target/arm/kvm.c | 57 target/arm/kvm64.c | 49 - 3 files changed, 57 insertions(+), 59

Re: [PATCH 05/21] target/arm/kvm: Move kvm_arm_copy_hw_debug_data and unexport

On 23/11/23 05:42, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/arm/kvm_arm.h | 10 -- target/arm/kvm.c | 24 target/arm/kvm64.c | 17 - 3 files changed, 24 insertions(+), 27 deletions(-) Reviewed-by: Philippe

Re: [PATCH 06/21] target/arm/kvm: Move kvm_arm_hw_debug_active and unexport

On 23/11/23 05:42, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/arm/kvm_arm.h | 8 target/arm/kvm.c | 11 +++ target/arm/kvm64.c | 5 - 3 files changed, 11 insertions(+), 13 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 07/21] target/arm/kvm: Move kvm_arm_handle_debug and unexport

On 23/11/23 05:42, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/arm/kvm_arm.h | 9 -- target/arm/kvm.c | 77 target/arm/kvm64.c | 70 3 files changed, 77 insertions(+), 7

[PATCH 1/2] docs: introduce dedicated page about code provenance / sign-off

Currently we have a short paragraph saying that patches must include a Signed-off-by line, and merely link to the kernel documentation. The linked kernel docs have alot of content beyond the part about sign-off an thus is misleading/distracting to QEMU contributors. This introduces a dedicated 'co

[PATCH 0/2] docs: define policy forbidding use of "AI" / LLM code generators

This patch kicks the hornet's nest of AI / LLM code generators. With the increasing interest in code generators in recent times, it is inevitable that QEMU contributions will include AI generated code. Thus far we have remained silent on the matter. Given that everyone knows these tools exist, our

Re: [PATCH 08/21] target/arm/kvm: Unexport kvm_arm_{get, put}_virtual_time

On 23/11/23 05:42, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/arm/kvm_arm.h | 16 target/arm/kvm.c | 16 ++-- 2 files changed, 14 insertions(+), 18 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

[PATCH 2/2] docs: define policy forbidding use of "AI" / LLM code generators

There has been an explosion of interest in so called "AI" (LLM) code generators in the past year or so. Thus far though, this is has not been matched by a broadly accepted legal interpretation of the licensing implications for code generator outputs. While the vendors may claim there is no problem

Re: [PATCH 09/21] target/arm/kvm: Inline kvm_arm_steal_time_supported

On 23/11/23 05:42, Richard Henderson wrote: This function is only used once, and is quite simple. Signed-off-by: Richard Henderson --- target/arm/kvm_arm.h | 13 - target/arm/kvm64.c | 7 +-- 2 files changed, 1 insertion(+), 19 deletions(-) Reviewed-by: Philippe Mathieu

Re: [PATCH 11/21] target/arm/kvm: Use a switch for kvm_arm_cpreg_level

On 23/11/23 05:42, Richard Henderson wrote: Use a switch instead of a linear search through data. Signed-off-by: Richard Henderson --- target/arm/kvm64.c | 32 +--- 1 file changed, 9 insertions(+), 23 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH v2 4/6] xen_pvdev: Do not assume Dom0 when creating a directory

Hi David, David Woodhouse writes: > [[S/MIME Signed Part:Undecided]] > On Thu, 2023-11-23 at 09:28 +, Paul Durrant wrote: >> On 23/11/2023 00:07, Volodymyr Babchuk wrote: >> > >> > Hi, >> > >> > Volodymyr Babchuk writes: >> > >> > > Hi Stefano, >> > > >> > > Stefano Stabellini writes

Re: [PATCH 13/21] target/arm/kvm: Move kvm_arm_reg_syncs_via_cpreg_list and unexport

On 23/11/23 05:42, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/arm/kvm_arm.h | 10 -- target/arm/kvm.c | 23 +++ target/arm/kvm64.c | 15 --- 3 files changed, 23 insertions(+), 25 deletions(-) Reviewed-by: Philippe Mat

Re: [PATCH 15/21] target/arm/kvm: Unexport kvm_arm_vcpu_init

On 23/11/23 05:42, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/arm/kvm_arm.h | 12 target/arm/kvm.c | 12 +++- 2 files changed, 11 insertions(+), 13 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 16/21] target/arm/kvm: Unexport kvm_arm_vcpu_finalize

On 23/11/23 05:42, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/arm/kvm_arm.h | 14 -- target/arm/kvm.c | 14 +- 2 files changed, 13 insertions(+), 15 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH v2 4/6] xen_pvdev: Do not assume Dom0 when creating a directory

On 23 November 2023 11:43:35 GMT, Volodymyr Babchuk wrote: > >Hi David, > >David Woodhouse writes: > >> [[S/MIME Signed Part:Undecided]] >> On Thu, 2023-11-23 at 09:28 +, Paul Durrant wrote: >>> On 23/11/2023 00:07, Volodymyr Babchuk wrote: >>> > >>> > Hi, >>> > >>> > Volodymyr Babchuk wr

Re: [PATCH v2 4/6] xen_pvdev: Do not assume Dom0 when creating a directory

Hi Paul, Paul Durrant writes: > On 23/11/2023 00:07, Volodymyr Babchuk wrote: >> Hi, >> Volodymyr Babchuk writes: >> >>> Hi Stefano, >>> >>> Stefano Stabellini writes: >>> On Wed, 22 Nov 2023, David Woodhouse wrote: > On Wed, 2023-11-22 at 15:09 -0800, Stefano Stabellini wrote: >>>

Re: [PATCH v2 4/6] xen_pvdev: Do not assume Dom0 when creating a directory

On 23 November 2023 11:54:01 GMT, Volodymyr Babchuk wrote: > >Hi Paul, > >Paul Durrant writes: > >> On 23/11/2023 00:07, Volodymyr Babchuk wrote: >>> Hi, >>> Volodymyr Babchuk writes: >>> Hi Stefano, Stefano Stabellini writes: > On Wed, 22 Nov 2023, David Woodhouse wro

Re: [PATCH 1/2] docs: introduce dedicated page about code provenance / sign-off

On 23/11/23 12:40, Daniel P. Berrangé wrote: Currently we have a short paragraph saying that patches must include a Signed-off-by line, and merely link to the kernel documentation. The linked kernel docs have alot of content beyond the part about sign-off an thus is misleading/distracting to QEMU

Re: [PATCH v2 4/6] xen_pvdev: Do not assume Dom0 when creating a directory

Hi David, David Woodhouse writes: > On 23 November 2023 11:54:01 GMT, Volodymyr Babchuk > wrote: >> >>Hi Paul, >> >>Paul Durrant writes: >> >>> On 23/11/2023 00:07, Volodymyr Babchuk wrote: Hi, Volodymyr Babchuk writes: > Hi Stefano, > > Stefano Stabellini writ

Re: [PATCH v2 4/6] xen_pvdev: Do not assume Dom0 when creating a directory

On 23 November 2023 12:17:57 GMT, Volodymyr Babchuk wrote: > >Hi David, > >David Woodhouse writes: >> Which PV backends do you care about? We already have net, block and console >> converted. > >Well, this is all what we need, actually. Even console only will be >sufficient, as we are using QEM

Re: [PATCH v2 4/6] xen_pvdev: Do not assume Dom0 when creating a directory

On 23/11/2023 12:27, David Woodhouse wrote: On 23 November 2023 12:17:57 GMT, Volodymyr Babchuk wrote: Hi David, David Woodhouse writes: Which PV backends do you care about? We already have net, block and console converted. Well, this is all what we need, actually. Even console only wil

Re: [PATCH 2/2] docs: define policy forbidding use of "AI" / LLM code generators

Daniel P. Berrangé writes: > There has been an explosion of interest in so called "AI" (LLM) > code generators in the past year or so. Thus far though, this is > has not been matched by a broadly accepted legal interpretation > of the licensing implications for code generator outputs. While > the

Re: [PATCH 1/2] docs: introduce dedicated page about code provenance / sign-off

On Thu, 23 Nov 2023 at 11:40, Daniel P. Berrangé wrote: > > Currently we have a short paragraph saying that patches must include > a Signed-off-by line, and merely link to the kernel documentation. > The linked kernel docs have alot of content beyond the part about "a lot" > sign-off an thus is

Re: [PATCH 11/19] qapi/schema: fix QAPISchemaArrayType.check's call to resolve_type

John Snow writes: > On Wed, Nov 22, 2023 at 7:59 AM Markus Armbruster wrote: >> >> John Snow writes: >> >> > There's more conditionals in here than we can reasonably pack into a >> > terse little statement, so break it apart into something more explicit. >> > >> > (When would a built-in array e

Re: [PATCH 1/2] docs: introduce dedicated page about code provenance / sign-off

Am 23.11.2023 um 12:40 hat Daniel P. Berrangé geschrieben: > Currently we have a short paragraph saying that patches must include > a Signed-off-by line, and merely link to the kernel documentation. > The linked kernel docs have alot of content beyond the part about > sign-off an thus is misleading

[RFC PATCH] gdbstub: use a better signal when we halt for IO reasons

The gdb description GDB_SIGNAL_IO is "I/O possible" and by default gdb will try and restart the guest, getting us nowhere. Report GDB_SIGNAL_STOP instead which should at least halt the session at the failure point. Signed-off-by: Alex Bennée Cc: Luis Machado --- gdbstub/internals.h | 1 + gdbst

Re: [PATCH 2/2] docs: define policy forbidding use of "AI" / LLM code generators

Am 23.11.2023 um 12:40 hat Daniel P. Berrangé geschrieben: > There has been an explosion of interest in so called "AI" (LLM) > code generators in the past year or so. Thus far though, this is > has not been matched by a broadly accepted legal interpretation > of the licensing implications for code

Re: [PATCH] hw/ppc: Improve build for PPC VFIO

On 11/23/23 11:19, Philippe Mathieu-Daudé wrote: Hi Cédric, On 23/11/23 08:33, Cédric Le Goater wrote: On 11/23/23 07:01, Zhenzhong Duan wrote: VFIO is not a required subsystem for the pseries machine but it's force enabled currently. When --without-default-devices is used to drop some default

Re: [PATCH 14/19] qapi/schema: assert QAPISchemaVariants are QAPISchemaObjectType

John Snow writes: > I'm actually not too sure about this one, it seems to hold up at runtime > but instead of lying and coming up with an elaborate ruse as a commit > message I'm just going to admit I just cribbed my own notes from the > last time I typed schema.py and I no longer remember why or

Re: [PATCH v2 2/2] ppc/spapr: Initialize max_cpus limit to SPAPR_NR_IPIS.

On 11/23/23 11:26, Philippe Mathieu-Daudé wrote: On 23/11/23 09:47, Cédric Le Goater wrote: On 11/23/23 06:03, Harsh Prateek Bora wrote: Hi Philippe, On 11/22/23 16:46, Philippe Mathieu-Daudé wrote: Hi Harsh, On 22/11/23 10:28, Harsh Prateek Bora wrote: Initialize the machine specific max_c

Re: [PATCH 15/19] qapi/parser: demote QAPIExpression to Dict[str, Any]

John Snow writes: > Dict[str, object] is a stricter type, but with the way that code is > currently arranged, it is infeasible to enforce this strictness. > > In particular, although expr.py's entire raison d'être is normalization > and type-checking of QAPI Expressions, that type information is

Re: [PATCH v3 1/2] ppc/spapr: Introduce SPAPR_IRQ_NR_IPIS to refer IRQ range for CPU IPIs.

On 11/23/23 10:31, Harsh Prateek Bora wrote: On 11/23/23 14:20, Cédric Le Goater wrote: On 11/23/23 06:57, Harsh Prateek Bora wrote: spapr_irq_init currently uses existing macro SPAPR_XIRQ_BASE to refer to the range of CPU IPIs during initialization of nr-irqs property. It is more appropriate

Re: [PATCH 1/2] docs: introduce dedicated page about code provenance / sign-off

On Thu, Nov 23, 2023 at 11:40:25AM +, Daniel P. Berrangé wrote: > Currently we have a short paragraph saying that patches must include > a Signed-off-by line, and merely link to the kernel documentation. > The linked kernel docs have alot of content beyond the part about > sign-off an thus is m

Re: [PATCH 2/2] docs: define policy forbidding use of "AI" / LLM code generators

On Thu, Nov 23, 2023 at 11:40:26AM +, Daniel P. Berrangé wrote: > There has been an explosion of interest in so called "AI" (LLM) > code generators in the past year or so. Thus far though, this is > has not been matched by a broadly accepted legal interpretation > of the licensing implications

[PATCH-for-9.0 v2 0/8] hw: Simplify accesses to CPUState::'start-powered-off' property

Extracted from a bigger series, after Markus' review. Supersedes: <20231122183633.17676-1-phi...@linaro.org> Supersedes: <20231122183048.17150-8-phi...@linaro.org> Philippe Mathieu-Daudé (8): hw/ppc/spapr_cpu_core: Access QDev properties with proper API hw/arm/bcm2836: Simplify use of 'reset-

[PATCH-for-9.0 v2 3/8] hw/arm/bcm2836: Use ARM_CPU 'mp-affinity' property

The 'mp-affinity' property is present since commit 15a21fe028 ("target-arm: Add mp-affinity property for ARM CPU class"). Use it and remove a /* TODO */ comment. Since all ARM CPUs have this property, use &error_abort, because this call can not fail. Signed-off-by: Philippe Mathieu-Daudé --- hw/

[PATCH-for-9.0 v2 2/8] hw/arm/bcm2836: Simplify use of 'reset-cbar' property

bcm2836_realize() is called by - bcm2836_class_init() which sets: bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7") - bcm2837_class_init() which sets: bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53") Both Cortex-A7 / A53 have the ARM_FEATURE_CBAR set. If it isn't, then this is a programmin

Re: [PATCH-for-9.0] hw/mips/cps: Simplify access to 'start-powered-off' property

On 23/11/23 07:53, Markus Armbruster wrote: Philippe Mathieu-Daudé writes: Since commit c1b701587e ("target/arm: Move start-powered-off property to generic CPUState"), all target CPUs have the 'start-powered-off' property. This object_property_set_bool() call can not fail. Use &error_abort to

[PATCH-for-9.0 v2 6/8] hw: Simplify uses of qdev_prop_set_bit(dev, 'start-powered-off')

Simplify few qdev_prop_set_bit("start-powered-off") and re-indent. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/allwinner-h3.c | 3 +-- hw/arm/allwinner-r40.c | 3 +-- hw/arm/bcm2836.c | 4 ++-- hw/arm/fsl-imx6.c | 4 +--- hw/arm/fsl-imx7.c | 12 +--- 5 files cha

[PATCH-for-9.0 v2 7/8] hw/arm/bcm2836: Move code after error checks

First run the code that can return errors, then on success run what alters the instance state. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/bcm2836.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index 03e6eb2fb2..e5693

[PATCH-for-9.0 v2 4/8] hw: Simplify accesses to the CPUState::'start-powered-off' property

The 'start-powered-off' property has been added to ARM CPUs in commit 5de164304a ("arm: Allow secondary KVM CPUs to be booted via PSCI"), then eventually got generalized to all CPUs in commit c1b701587e ("target/arm: Move start-powered-off property to generic CPUState"). Since all CPUs have it, no

[PATCH-for-9.0 v2 5/8] hw: Prefer qdev_prop_set_bit over object_property_set_bool for QDev

The QOM API is lower level than the QDev one. When an instance is QDev and setting the property can not fail (using &error_abort), prefer qdev_prop_set_bit() over object_property_set_bool(). Mechanical transformation using the following coccinelle patch: @@ expression o, p, v; @@ -

[PATCH-for-9.0 v2 8/8] hw/arm/bcm2836: Add local variable to remove various DEVICE() casts

Cast the CPU to DeviceState once. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/bcm2836.c | 19 ++- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index e56935f3e5..013cee853d 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm283

[PATCH-for-9.0 v2 1/8] hw/ppc/spapr_cpu_core: Access QDev properties with proper API

CPUState::start_powered_off field is part of the internal implementation of a QDev CPU. It is exposed as the QDev "start-powered-off" property. External components should use the qdev properties API to access it. Signed-off-by: Philippe Mathieu-Daudé --- hw/ppc/spapr_cpu_core.c | 2 +- 1 file ch

Re: [PATCH 2/2] docs: define policy forbidding use of "AI" / LLM code generators

On Thu, 23 Nov 2023 16:35, "Michael S. Tsirkin" wrote: On Thu, Nov 23, 2023 at 11:40:26AM +, Daniel P. Berrangé wrote: There has been an explosion of interest in so called "AI" (LLM) code generators in the past year or so. Thus far though, this is has not been matched by a broadly accepted

Re: [RFC PATCH-for-9.0 01/11] qom: Introduce the TypeInfo::can_register() handler

On 22/11/2023 19.30, Philippe Mathieu-Daudé wrote: Add a helper to decide at runtime whether a type can be registered to the QOM framework or not. Signed-off-by: Philippe Mathieu-Daudé --- include/qom/object.h | 4 qom/object.c | 3 +++ 2 files changed, 7 insertions(+) diff --

Re: [PATCH 1/2] docs: introduce dedicated page about code provenance / sign-off

On Thu, Nov 23, 2023 at 11:40:25AM +, Daniel P. Berrangé wrote: > Currently we have a short paragraph saying that patches must include > a Signed-off-by line, and merely link to the kernel documentation. > The linked kernel docs have alot of content beyond the part about > sign-off an thus is m

Re: [PATCH 2/2] docs: define policy forbidding use of "AI" / LLM code generators

On Thu, Nov 23, 2023 at 04:56:28PM +0200, Manos Pitsidianakis wrote: > > However, can't we define a simpler more specific policy? > > For example, isn't it true that *any* automatically generated code > > can only be included if the scripts producing said code > > are also included or otherwise ava

Re: [PATCH 2/2] docs: define policy forbidding use of "AI" / LLM code generators

On Thu, Nov 23, 2023 at 11:40:26AM +, Daniel P. Berrangé wrote: > There has been an explosion of interest in so called "AI" (LLM) > code generators in the past year or so. Thus far though, this is > has not been matched by a broadly accepted legal interpretation > of the licensing implications

Re: [PATCH 2/2] docs: define policy forbidding use of "AI" / LLM code generators

On 23/11/23 15:56, Manos Pitsidianakis wrote: On Thu, 23 Nov 2023 16:35, "Michael S. Tsirkin" wrote: On Thu, Nov 23, 2023 at 11:40:26AM +, Daniel P. Berrangé wrote: There has been an explosion of interest in so called "AI" (LLM) code generators in the past year or so. Thus far though, this

Re: [PATCH 2/2] docs: define policy forbidding use of "AI" / LLM code generators

Manos Pitsidianakis writes: > On Thu, 23 Nov 2023 16:35, "Michael S. Tsirkin" wrote: >>On Thu, Nov 23, 2023 at 11:40:26AM +, Daniel P. Berrangé wrote: >>> There has been an explosion of interest in so called "AI" (LLM) >>> code generators in the past year or so. Thus far though, this is >>>

[PULL 02/14] .gitlab-ci.d/cirrus: Upgrade macOS to 13 (Ventura)

From: Philippe Mathieu-Daudé macOS 14 "Sonoma" was released on September 2023 [1]. According to QEMU's support policy, we stop supporting the previous major release two years after the the new major release has been published. Replace the macOS 12 (Monterey) testing by macOS 13 (Ventura, release

[PULL 04/14] plugins: fix win plugin tests on cross compile

From: Greg Manning Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1972 Cross compile gcc is more picky about argument order than msys. Changed the meson command to take the (now renamed) libqemu_plugin_api.a as a lib, rather than an object. This puts it in the right place on both native

[PULL 08/14] docs/system: clarify limits of using gdbstub in system emulation

It seems some users will try and use the gdbstub to debug userspace inside a system emulation. While possible clarify the limitations of this approach and direct the users to a less head scratching way of debugging user-space. Clarifies: https://gitlab.com/qemu-project/qemu/-/issues/1274 Reviewed-

[PULL 07/14] docs/emulation: expand warning about semihosting

A surprising feature of calls like SYS_READC is this can cause QEMU to indefinitely block as there is no handling for EOF. Clarifies: https://gitlab.com/qemu-project/qemu/-/issues/1963 Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20231120150833.2552739-8-alex.ben...@lin

[PULL 00/14] random fixes for 8.2 (tests, plugins, docs, semihosting)

The following changes since commit b93c4313f2f40897bdafba15620c8fef6c20e721: Merge tag 'pull-riscv-to-apply-20231122' of https://github.com/alistair23/qemu into staging (2023-11-22 09:39:23 -0500) are available in the Git repository at: https://gitlab.com/stsquad/qemu.git tags/pull-for-8.2-

[PULL 03/14] tests/docker: merge debian-native with debian-amd64

debian-native isn't really needed and suffers from the problem of tracking a distros dependencies rather than the projects. With a little surgery we can make the debian-amd64 container architecture neutral and allow people to use it to build a native QEMU. Rename it so it follows the same non-arch

[PULL 10/14] testing: move arm system tests into their own folder

Prepare for expanding the arm system tests by cleaning up the test directory. Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Message-Id: <20231120150833.2552739-11-alex.ben...@linaro.org> diff --git a/tests/tcg/arm/Makefile.softmmu-target b/tests

[PULL 11/14] tests/tcg: enable arm softmmu tests

To make it easier to test 32 bit Arm softmmu issues implement a basic boot.S so we can build the multiarch tests. Currently CHECK_UNALIGNED is disabled as I haven't got the right magic set for it to work. Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20231120150833.25527

[PULL 14/14] tests/tcg: finesse the registers check for "hidden" regs

The reason the ppc64 and s390x test where failing was because gdb hides them although they are still accessible via regnum. We can re-arrange the test a little bit and include these two arches in our test. We also need to be a bit more careful handling remote-registers as the format isn't easily p

[PULL 01/14] tests/docker: replace fedora-i386 with debian-i686

From: Daniel P. Berrangé Fedora is gradually killing off i386 packages in its repos, via a death-by-1000-cuts process. Thus Debian looks like a better long term bet for i686 build testing. It has the added advantage that we can generate it via lcitool too. Signed-off-by: Daniel P. Berrangé Revi

[PULL 05/14] target/nios2: Deprecate the Nios II architecture

From: Philippe Mathieu-Daudé See commit 9ba1caf510 ("MAINTAINERS: Mark the Nios II CPU as orphan"), last contribution from Chris was in 2012 [1] and Marek in 2018 [2]. [1] https://lore.kernel.org/qemu-devel/1352607539-10455-2-git-send-email-crwu...@gmail.com/ [2] https://lore.kernel.org/qemu-d

[PULL 12/14] tests/tcg: enable semiconsole test for Arm

This still remains a MANUAL test due to blocking issues. Signed-off-by: Alex Bennée Message-Id: <20231120150833.2552739-13-alex.ben...@linaro.org> diff --git a/tests/tcg/arm/system/semiconsole.c b/tests/tcg/arm/system/semiconsole.c new file mode 100644 index 00..206dd60eed --- /dev/null

[PULL 13/14] configure: don't try a "native" cross for linux-user

As 32 bit x86 become rarer we are starting to run into problems with search paths. Although we switched to a Debian container we still favour the native CC on a Bookworm host. As a result we have a broken cross compile setup which then fails to build with: BUILD i386-linux-user guest-tests

[PULL 09/14] hw/core: skip loading debug on all failures

ELF_LOAD_FAILED is one of many negative return codes we can have. Lets treat any positive size_t as a success for loading. Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Message-Id: <20231120150833.2552739-10-alex.ben...@linaro.org> diff --git a/h

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