From: Greg Manning
Generate a qemu_plugin_api.lib delay import lib on windows, for
windows qemu plugins to link against.
Implement an example dll load fail hook to link up the API functions
correctly when a plugin is loaded on windows.
Update the build scripts for the test and example plugins t
We already do a couple of "info registers" for specific tests but this
is a more comprehensive multiarch test. It also has some output
helpful for debugging the gdbstub by showing which XML features are
advertised and what the underlying register numbers are.
My initial motivation was to see if th
nios2 signal tests are broken again:
retry.py -n 10 -c -- ./qemu-nios2 ./tests/tcg/nios2-linux-user/signals
Results summary:
0: 8 times (80.00%), avg time 2.254 (0.00 varience/0.00 deviation)
-11: 2 times (20.00%), avg time 0.253 (0.00 varience/0.00 deviation)
Ran command 10 times, 8 pas
Daynix describes itself as a cloud technology company so I assume
employee contributions should count as such.
Reviewed-by: Akihiko Odaki
Signed-off-by: Alex Bennée
Message-Id: <20231106185112.2755262-21-alex.ben...@linaro.org>
diff --git a/contrib/gitdm/domain-map b/contrib/gitdm/domain-map
in
Whatever they are up to a number of people for the company are
contributing to QEMU so lets group them together.
Reviewed-by: Palmer Dabbelt
Acked-by: Palmer Dabbelt
Signed-off-by: Alex Bennée
Message-Id: <20231106185112.2755262-18-alex.ben...@linaro.org>
diff --git a/contrib/gitdm/domain-map
From: luzhipeng
Signed-off-by: luzhipeng
Message-Id: <20230628072236.1925-1-luzhip...@cestc.cn>
Signed-off-by: Alex Bennée
Message-Id: <20231106185112.2755262-19-alex.ben...@linaro.org>
diff --git a/contrib/gitdm/domain-map b/contrib/gitdm/domain-map
index e676da8d47..38945cddf0 100644
--- a/c
HiSilicon is a wholly owned subsidiary of Huawei so map the domain to
the same company to avoid splitting the contributions.
Reviewed-by: Yicong Yang
Signed-off-by: Alex Bennée
Message-Id: <20231106185112.2755262-20-alex.ben...@linaro.org>
diff --git a/contrib/gitdm/domain-map b/contrib/gitdm/d
Hi,
> Thanks, this works, I tested with the 46 bit limit.
Good. I've sent a seabios patch to limit phys-bits to 46.
OVMF does the same btw.
> Charles maybe something to update the older os info definitions (for QEMU 8.2
> and newer..?)
>
> The idea is just that the toolstack could automatic
On 11/7/23 14:14, Cédric Le Goater wrote:
On 11/2/23 08:12, Zhenzhong Duan wrote:
This adds "--enable-iommufd/--disable-iommufd" to enable or disable
iommufd support, enabled by default.
I don't think a configure option is the right approach. I will
comment other patches to propose another sol
Ping, for anyone to review this trivial patch
On Fri, Sep 22, 2023 at 04:18:58PM +0100, Daniel P. Berrangé wrote:
> Print a debug message as is done for other unsupported audio formats
> to give the user the chance to understand their mistake.
>
> Signed-off-by: Daniel P. Berrangé
> ---
> a
Ping, for anyone who can review this.
On Thu, Sep 14, 2023 at 12:54:08PM +0100, Daniel P. Berrangé wrote:
> Ping for review please. This series still applies to git master.
>
> On Tue, Jul 18, 2023 at 10:26:28AM +0100, Daniel P. Berrangé wrote:
> > Changed in v2:
> >
> > - Tweaked commit messag
On Tue, 7 Nov 2023, BALATON Zoltan wrote:
On Mon, 6 Nov 2023, BALATON Zoltan wrote:
On Fri, 27 Oct 2023, BALATON Zoltan wrote:
Changes in v7:
- Increase default memory size to 512m to match pegasos2 and sam460ex
and it's a better default for AmigaOS
Changes in v6:
- Dropped patch 1, now it's
On Tue, Nov 07, 2023 at 02:15:34PM +, Daniel P. Berrangé wrote:
> Date: Tue, 7 Nov 2023 14:15:34 +
> From: "Daniel P. Berrangé"
> Subject: Re: [PATCH] scripts/cpu-x86-uarch-abi.py: Fix parameter error of
> cmd
>
> On Wed, Oct 18, 2023 at 06:00:11PM +0800, Zhao Liu wrote:
> > From: Zhao L
01.11.2023 23:45, BALATON Zoltan:
Apparently these should be half the memory region sizes confirmed at
least by Radeon FCocde ROM while Rage 128 Pro ROMs don't seem to use
these. Linux r100 DRM driver also checks for a bit in HOST_PATH_CNTL
so we also add that even though the FCode ROM does not s
On Fri, Sep 22, 2023 at 7:19 PM Daniel P. Berrangé wrote:
>
> Print a debug message as is done for other unsupported audio formats
> to give the user the chance to understand their mistake.
>
> Signed-off-by: Daniel P. Berrangé
Reviewed-by: Marc-André Lureau
> ---
> audio/wavaudio.c | 4
On Mon, Nov 06, 2023 at 12:44:59PM +0100, Philippe Mathieu-Daudé wrote:
> Date: Mon, 6 Nov 2023 12:44:59 +0100
> From: Philippe Mathieu-Daudé
> Subject: [PATCH 4/4] target/s390x/cpu: Restrict CPUS390XState declaration
> to 'cpu.h'
> X-Mailer: git-send-email 2.41.0
>
> "target/s390x/cpu-qom.h" h
On Tue, 7 Nov 2023, Michael Tokarev wrote:
01.11.2023 23:45, BALATON Zoltan:
Apparently these should be half the memory region sizes confirmed at
least by Radeon FCocde ROM while Rage 128 Pro ROMs don't seem to use
these. Linux r100 DRM driver also checks for a bit in HOST_PATH_CNTL
so we also a
"Michael S. Tsirkin" writes:
> On Mon, Nov 06, 2023 at 07:15:10PM +, Alex Bennée wrote:
>> Lets keep a cleaner split between the base class and the derived
>> vhost-user-device which we can use for generic vhost-user stubs. This
>> includes an update to introduce the vq_size property so the n
From: Chalapathi V
Hello,
For modularity reasons the P10 processor chip is split into multiple
chiplets individually controlled and managed by the pervasive logic.
The boundaries of these chiplets are defined based on physical design
parameters like clock grids, the nature of the functional unit
From: Chalapathi V
The nest1 chiplet handle the high speed i/o traffic over PCIe and others.
The nest1 chiplet consists of PowerBus Fabric controller,
nest Memory Management Unit, chiplet control unit and more.
This commit creates a nest1 chiplet model and initialize and realize the
pervasive ch
From: Chalapathi V
This part of the patchset creates a common pervasive chiplet model where it
houses the common units of a chiplets.
The chiplet control unit is common across chiplets and this commit implements
the pervasive chiplet model with chiplet control registers.
Signed-off-by: Chalapat
From: Chalapathi V
This part of the patchset connects the nest1 chiplet model to p10 chip.
Signed-off-by: Chalapathi V
---
hw/ppc/pnv.c | 14 ++
include/hw/ppc/pnv_chip.h | 2 ++
2 files changed, 16 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index c0e34ff
On 11/7/23 11:42, BALATON Zoltan wrote:
On Tue, 7 Nov 2023, BALATON Zoltan wrote:
On Mon, 6 Nov 2023, BALATON Zoltan wrote:
On Fri, 27 Oct 2023, BALATON Zoltan wrote:
Changes in v7:
- Increase default memory size to 512m to match pegasos2 and sam460ex
and it's a better default for AmigaOS
17.10.2023 15:59, Vladimir Sementsov-Ogievskiy:
NVMeQueuePair::reqs has length NVME_NUM_REQS, which less than
NVME_QUEUE_SIZE by 1.
Fixes: 1086e95da17050 ("block/nvme: switch to a NVMeRequest freelist")
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Maksi
On 11/7/23 02:51, Alex Bennée wrote:
We also mark it ARM_CP_NO_GDB so we avoid duplicate PAR's in the
system register XML we send to gdb.
Suggested-by:
Signed-off-by: Alex Bennée
---
v2
- only set ARM_CP_NO_GDB when no LPAE enabled
- also mark as AP_CP_ALIAS
---
target/arm/helper.c |
30.10.2023 10:38, Naohiro Aota wrote:
raw_co_zone_append() sets "s->offset" where "BDRVRawState *s". This pointer
is used later at raw_co_prw() to save the block address where the data is
written.
When multiple IOs are on-going at the same time, a later IO's
raw_co_zone_append() call over-writes
25.08.2023 07:05, Sam Li wrote:
When the zoned request fail, it needs to update only the wp of
the target zones for not disrupting the in-flight writes on
these other zones. The wp is updated successfully after the
request completes.
Fixed the callers with right offset and nr_zones.
This smell
On 07/11/2023 04:49, Richard Henderson wrote:
On 11/6/23 14:02, Mark Cave-Ayland wrote:
I was working through my SPARC boot tests for your latest target/sparc series when
I spotted a segfault on my FreeBSD SPARC64 image. A git bisect indicated that this
was the patch that originally introduced
On 7/11/23 15:06, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Cc: qemu-sta...@nongnu.org
Fixes: c76b409fef ("hw/mips: Add Loongson-3 machine support")
Reviewed-by: Philippe Mathieu-Daudé
---
hw/mips/Kconfig | 1 +
1 file changed, 1 insert
30.10.2023 13:21, Heinrich Schuchardt wrote:
The CSR register mseccfg is used by multiple extensions: Smepm and Zkr.
Consider this when checking the existence of the register.
Fixes: 77442380ecbe ("target/riscv: rvk: add CSR support for Zkr")
Is this change worth to pick for -stable (together
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
On 11/7/23 11:42, BALATON Zoltan wrote:
On Tue, 7 Nov 2023, BALATON Zoltan wrote:
On Mon, 6 Nov 2023, BALATON Zoltan wrote:
On Fri, 27 Oct 2023, BALATON Zoltan wrote:
Changes in v7:
- Increase default memory size to 512m to match pegasos2 and
Fedora is gradually killing off i386 packages in its repos, via a
death-by-1000-cuts process. Thus Debian looks like a better long
term bit for i686 build testing. It has the added advantage that
we can generate it via lcitool too.
Signed-off-by: Daniel P. Berrangé
---
.gitlab-ci.d/container-cro
Am 11.10.2023 um 15:12 hat Niklas Cassel geschrieben:
> From: Niklas Cassel
>
> According to AHCI 1.3.1, 5.3.8.1 RegFIS:Entry, if ERR_STAT is set,
> we jump to state ERR:FatalTaskfile, which will raise a TFES IRQ
> unconditionally, regardless if the I bit is set in the FIS or not.
>
> Thus, we s
07.11.2023 12:30, marcandre.lur...@redhat.com:
...
Antonio Caggiano (1):
ui/gtk-egl: Check EGLSurface before doing scanout
Carwyn Ellis (1):
ui/cocoa: add zoom-to-fit display option
Dongwon Kim (1):
ui/gtk-egl: apply scale factor when calculating window's dimension
Marc-André Lureau (
On Tue, 7 Nov 2023 14:20:46 +
Janosch Frank wrote:
> dump_state_prepare() now sets the fucntion pointers to NULL so we only
> need to touch them if we're going to use them.
>
> Signed-off-by: Janosch Frank
I would merge this and the previous patch
> ---
> target/s390x/arch_dump.c | 4 --
Zoltan,
Gitlab is complaining about a missing file in one of the tests:
8/259 qemu:qtest+qtest-ppc / qtest-ppc/test-hmp
ERROR 0.22s killed by signal 6 SIGABRT
4324>>> G_TEST_DBUS_DAEMON=/builds/danielhb/qemu/tests/dbus-vmstate-daemon.sh
QTEST_QEMU_BINARY
07.11.2023 18:33, BALATON Zoltan:
..
Is it stable-worthy?
Not really beacause this is only needed by RV100 drivers but that GPU is not emulated enough yet to work so this won't help them. However the last
patch adding pixman fallbacks to ati_2d.c fixes graphics issues on Apple silicon Macs whe
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
Zoltan,
Gitlab is complaining about a missing file in one of the tests:
8/259 qemu:qtest+qtest-ppc / qtest-ppc/test-hmp
ERROR 0.22s killed by signal 6 SIGABRT
4324>>> G_TEST_DBUS_DAEMON=/builds/danielhb/qemu/tests/dbus-vmstate-da
On 11/2/23 08:12, Zhenzhong Duan wrote:
No fucntional change intended.
Signed-off-by: Zhenzhong Duan
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/vfio/vfio-common.h | 5 -
include/hw/vfio/vfio-container-base.h | 5 +
hw/vfio/common.c
On 11/7/23 14:33, BALATON Zoltan wrote:
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
Zoltan,
Gitlab is complaining about a missing file in one of the tests:
8/259 qemu:qtest+qtest-ppc / qtest-ppc/test-hmp ERROR 0.22s killed
by signal 6 SIGABRT
4324>>> G_TEST_DBUS_DAEMON
On Tue, 7 Nov 2023, BALATON Zoltan wrote:
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
Zoltan,
Gitlab is complaining about a missing file in one of the tests:
8/259 qemu:qtest+qtest-ppc / qtest-ppc/test-hmp ERROR 0.22s
killed by signal 6 SIGABRT
4324>>>
G_TEST_DBUS_DAEMON=/
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
On 11/7/23 14:33, BALATON Zoltan wrote:
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
Zoltan,
Gitlab is complaining about a missing file in one of the tests:
8/259 qemu:qtest+qtest-ppc / qtest-ppc/test-hmp ERROR 0.22s
kill
A lot of our vhost-user stubs are large chunks of boilerplate that do
(mostly) the same thing. This series continues the cleanups by
splitting the vhost-user-base and vhost-user-generic implementations.
After adding a new vq_size property the rng, gpio and i2c vhost-user
devices become simple speci
From: Manos Pitsidianakis
Tested with rust-vmm vhost-user-sound daemon:
RUST_LOG=trace cargo run --bin vhost-user-sound -- --socket /tmp/snd.sock
--backend null
Invocation:
qemu-system-x86_64 \
-qmp unix:./qmp-sock,server,wait=off \
-m 4096 \
-num
Lets keep a cleaner split between the base class and the derived
vhost-user-device which we can use for generic vhost-user stubs. This
includes an update to introduce the vq_size property so the number of
entries in a virtq can be defined.
Signed-off-by: Alex Bennée
---
v5
- s/parent/parent_ob
Make it clear the vhost-user-device is intended for expert use only.
Signed-off-by: Alex Bennée
Message-Id: <20231009095937.195728-7-alex.ben...@linaro.org>
---
v5
- split vhost-user-device out of the table
- sort the table alphabetically
- add sound and scmi devices
v6
- add note re vho
Now we can take advantage of our new base class and make
vhost-user-rng a much simpler boilerplate wrapper. Also as this
doesn't require any target specific hacks we only need to build the
stubs once.
Acked-by: Mark Cave-Ayland
Signed-off-by: Alex Bennée
---
v5
- don't remove the in-QEMU RNG
Now the new base class supports config handling we can take advantage
and make vhost-user-gpio a much simpler boilerplate wrapper. Also as
this doesn't require any target specific hacks we only need to build
the stubs once.
Acked-by: Mark Cave-Ayland
Acked-by: Viresh Kumar
Signed-off-by: Alex Be
Now we can take advantage of the new base class and make
vhost-user-i2c a much simpler boilerplate wrapper. Also as this
doesn't require any target specific hacks we only need to build the
stubs once.
Acked-by: Mark Cave-Ayland
Acked-by: Viresh Kumar
Signed-off-by: Alex Bennée
---
v7
- s/par
We are about to convert at least one stubs which was using the async
teardown so lets use it for all the cases.
Signed-off-by: Alex Bennée
---
hw/virtio/vhost-user-base.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/hw/virtio/vhost-user-base.c b/hw/virtio
On Tue, 7 Nov 2023, BALATON Zoltan wrote:
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
On 11/7/23 14:33, BALATON Zoltan wrote:
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
Zoltan,
Gitlab is complaining about a missing file in one of the tests:
8/259 qemu:qtest+qtest-ppc / qtest
Now we can take advantage of our new base class and make
vhost-user-rng a much simpler boilerplate wrapper. Also as this
doesn't require any target specific hacks we only need to build the
stubs once.
Acked-by: Mark Cave-Ayland
Signed-off-by: Alex Bennée
---
v5
- don't remove the in-QEMU RNG
Now the new base class supports config handling we can take advantage
and make vhost-user-gpio a much simpler boilerplate wrapper. Also as
this doesn't require any target specific hacks we only need to build
the stubs once.
Acked-by: Mark Cave-Ayland
Acked-by: Viresh Kumar
Signed-off-by: Alex Be
A lot of our vhost-user stubs are large chunks of boilerplate that do
(mostly) the same thing. This series continues the cleanups by
splitting the vhost-user-base and vhost-user-generic implementations.
After adding a new vq_size property the rng, gpio and i2c vhost-user
devices become simple speci
We are about to convert at least one stubs which was using the async
teardown so lets use it for all the cases.
Signed-off-by: Alex Bennée
---
hw/virtio/vhost-user-base.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/hw/virtio/vhost-user-base.c b/hw/virtio
Lets keep a cleaner split between the base class and the derived
vhost-user-device which we can use for generic vhost-user stubs. This
includes an update to introduce the vq_size property so the number of
entries in a virtq can be defined.
Signed-off-by: Alex Bennée
---
v5
- s/parent/parent_ob
Now we can take advantage of the new base class and make
vhost-user-i2c a much simpler boilerplate wrapper. Also as this
doesn't require any target specific hacks we only need to build the
stubs once.
Acked-by: Mark Cave-Ayland
Acked-by: Viresh Kumar
Signed-off-by: Alex Bennée
---
v7
- s/par
Make it clear the vhost-user-device is intended for expert use only.
Signed-off-by: Alex Bennée
---
v5
- split vhost-user-device out of the table
- sort the table alphabetically
- add sound and scmi devices
v6
- add note re vhost-user-device
v7
- fix patching description
---
docs/syst
From: Fan Ni
Per cxl spec 3.0, add dynamic capacity region representative based on
Table 8-126 and extend the cxl type3 device definition to include dc region
information. Also, based on info in 8.2.9.8.9.1, add 'Get Dynamic Capacity
Configuration' mailbox support.
Note: decode_len of a dc regio
From: Manos Pitsidianakis
Tested with rust-vmm vhost-user-sound daemon:
RUST_LOG=trace cargo run --bin vhost-user-sound -- --socket /tmp/snd.sock
--backend null
Invocation:
qemu-system-x86_64 \
-qmp unix:./qmp-sock,server,wait=off \
-m 4096 \
-num
On Tue, Nov 07, 2023 at 06:02:46PM +, Alex Bennée wrote:
> Make it clear the vhost-user-device is intended for expert use only.
>
> Signed-off-by: Alex Bennée
> Message-Id: <20231009095937.195728-7-alex.ben...@linaro.org>
>
> ---
> v5
> - split vhost-user-device out of the table
> - sort
From: Fan Ni
Add (file/memory backed) host backend, all the dynamic capacity regions
will share a single, large enough host backend. Set up address space for
DC regions to support read/write operations to dynamic capacity for DCD.
With the change, following supports are added:
1. Add a new prope
From: Fan Ni
Per CXL spec 3.0, two mailbox commands are implemented:
Add Dynamic Capacity Response (Opcode 4802h) 8.2.9.8.9.3, and
Release Dynamic Capacity (Opcode 4803h) 8.2.9.8.9.4.
Signed-off-by: Fan Ni
---
hw/cxl/cxl-mailbox-utils.c | 271
hw/mem/cxl_t
From: Fan Ni
The patch series are based on Jonathan's branch cxl-2023-09-26.
The main changes include,
1. Update cxl_find_dc_region to detect the case the range of the extent cross
multiple DC regions.
2. Add comments to explain the checks performed in function
cxl_detect_malformed_exte
From: Fan Ni
Rename mem_size as static_mem_size for type3 memdev to cover static RAM and
pmem capacity, preparing for the introduction of dynamic capacity to support
dynamic capacity devices.
Signed-off-by: Fan Ni
---
hw/cxl/cxl-mailbox-utils.c | 4 ++--
hw/mem/cxl_type3.c | 8 --
From: Fan Ni
Based on CXL spec 3.0 Table 8-94 (Identify Memory Device Output
Payload), dynamic capacity event log size should be part of
output of the Identify command.
Add dc_event_log_size to the output payload for the host to get the info.
Signed-off-by: Fan Ni
---
hw/cxl/cxl-mailbox-utils.
From: Fan Ni
With the change, when setting up memory for type3 memory device, we can
create DC regions.
A property 'num-dc-regions' is added to ct3_props to allow users to pass the
number of DC regions to create. To make it easier, other region parameters
like region base, length, and block size
On Tue, Nov 07, 2023 at 06:07:45PM +, Alex Bennée wrote:
> A lot of our vhost-user stubs are large chunks of boilerplate that do
> (mostly) the same thing. This series continues the cleanups by
> splitting the vhost-user-base and vhost-user-generic implementations.
> After adding a new vq_size
From: Fan Ni
Add dynamic capacity extent list representative to the definition of
CXLType3Dev and add get DC extent list mailbox command per
CXL.spec.3.0:.8.2.9.8.9.2.
Signed-off-by: Fan Ni
---
hw/cxl/cxl-mailbox-utils.c | 73 +
hw/mem/cxl_type3.c
From: Fan Ni
Not all dpa range in the dc regions is valid to access until an extent
covering the range has been added. Add a bitmap for each region to
record whether a dc block in the region has been backed by dc extent.
For the bitmap, a bit in the bitmap represents a dc block. When a dc
extent
From: Fan Ni
Since fabric manager emulation is not supported yet, the change implements
the functions to add/release dynamic capacity extents as QMP interfaces.
Note: we block any FM issued extent release request if the exact extent
does not exist in the extent list of the device. We will loose
Am 05.10.2023 um 12:04 hat Niklas Cassel geschrieben:
> From: Niklas Cassel
>
> Legacy software contains a standard mechanism for generating a reset to a
> Serial ATA device - setting the SRST (software reset) bit in the Device
> Control register.
>
> Serial ATA has a more robust mechanism calle
On Tue, 7 Nov 2023 at 18:05, BALATON Zoltan wrote:
> So if it's tests/qtest/test-hmp.c that seems to try to run a bunch of
> command for each machine AFAIU. This machine needs a firmware image but
> this test seems to run it with -S and never starts the machine so could
> take any file with -bios
"Michael S. Tsirkin" writes:
> On Mon, Nov 06, 2023 at 07:15:09PM +, Alex Bennée wrote:
>> A lot of our vhost-user stubs are large chunks of boilerplate that do
>> (mostly) the same thing. This series continues the cleanups by
>> splitting the vhost-user-base and vhost-user-generic implementa
On Tue, 7 Nov 2023, Peter Maydell wrote:
On Tue, 7 Nov 2023 at 18:05, BALATON Zoltan wrote:
So if it's tests/qtest/test-hmp.c that seems to try to run a bunch of
command for each machine AFAIU. This machine needs a firmware image but
this test seems to run it with -S and never starts the machin
On 11/2/23 08:12, Zhenzhong Duan wrote:
Previously we added support to select iommu backend for vfio pci
device. Now we added others, E.g: platform, ap and ccw.
Signed-off-by: Zhenzhong Duan
We would need an Ack from the Z team for this change.
Thanks,
C.
---
include/hw/vfio/vfio-platf
On 11/2/23 08:12, Zhenzhong Duan wrote:
This gives management tools like libvirt a chance to open the vfio
cdev with privilege and pass FD to qemu. This way qemu never needs
to have privilege to open a VFIO or iommu cdev node.
Opportunisticly, remove some unnecessory double-cast.
Signed-off-by:
On 11/2/23 08:13, Zhenzhong Duan wrote:
This gives management tools like libvirt a chance to open the vfio
cdev with privilege and pass FD to qemu. This way qemu never needs
to have privilege to open a VFIO or iommu cdev node.
Opportunisticly, remove a redundant definition of TYPE_VFIO_CCW.
Sig
The AmigaOne is a rebranded MAI Teron board that uses U-Boot firmware
with patches to support AmigaOS and is very similar to pegasos2 so can
be easily emulated sharing most code with pegasos2. The reason to
emulate it is that AmigaOS comes in different versions for AmigaOne
and PegasosII which only
On Tue, 7 Nov 2023 at 18:18, BALATON Zoltan wrote:
>
> On Tue, 7 Nov 2023, Peter Maydell wrote:
> > On Tue, 7 Nov 2023 at 18:05, BALATON Zoltan wrote:
> >> So if it's tests/qtest/test-hmp.c that seems to try to run a bunch of
> >> command for each machine AFAIU. This machine needs a firmware imag
On Tue, 7 Nov 2023 at 18:21, BALATON Zoltan wrote:
>
> The AmigaOne is a rebranded MAI Teron board that uses U-Boot firmware
> with patches to support AmigaOS and is very similar to pegasos2 so can
> be easily emulated sharing most code with pegasos2. The reason to
> emulate it is that AmigaOS com
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
On 11/7/23 14:33, BALATON Zoltan wrote:
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
Zoltan,
Gitlab is complaining about a missing file in one of the tests:
8/259 qemu:qtest+qtest-ppc / qtest-ppc/test-hmp ERROR 0.22s
kill
On Tue, 7 Nov 2023, Peter Maydell wrote:
On Tue, 7 Nov 2023 at 18:21, BALATON Zoltan wrote:
The AmigaOne is a rebranded MAI Teron board that uses U-Boot firmware
with patches to support AmigaOS and is very similar to pegasos2 so can
be easily emulated sharing most code with pegasos2. The reaso
On 11/2/23 08:12, Zhenzhong Duan wrote:
Hi,
Thanks all for giving guides and comments on previous series, here is
the v4 of pure iommufd support part.
Based on Cédric's suggestion, this series includes an effort to remove
spapr code from container.c, now all spapr functions are moved to spapr.c
Hi Stefan!
The following changes since commit 8aba939e77daca10eac99d9d467f65ba7df5ab3e:
Merge tag 'pull-riscv-to-apply-20231107' of
https://github.com/alistair23/qemu into staging (2023-11-07 11:08:16 +0800)
are available in the Git repository at:
https://gitlab.com/thuth/qem
From: Nina Schoetterl-Glausch
In case of horizontal polarization entitlement has no effect on
ordering.
Moreover, since the comparison is used to insert CPUs at the correct
position in the TLE list, this affects the creation of TLEs and now
correctly collapses horizontally polarized CPUs into one
The artist graphics adapter is only used by the hppa machine, so
let's add this file to the corresponding section.
Message-ID: <20231107103044.15089-1-th...@redhat.com>
Acked-by: Helge Deller
Signed-off-by: Thomas Huth
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAIN
From: Ilya Leoshkevich
LAALG uses op_laa() and wout_addu64(). The latter expects cc_src to be
set, but the former does not do it. This can lead to assertion failures
if something sets cc_src to neither 0 nor 1 before.
Fix by introducing op_laa_addu64(), which sets cc_src, and using it for
LAALG.
Am 07.11.2023 um 19:14 hat Kevin Wolf geschrieben:
> Am 05.10.2023 um 12:04 hat Niklas Cassel geschrieben:
> > From: Niklas Cassel
> >
> > Legacy software contains a standard mechanism for generating a reset to a
> > Serial ATA device - setting the SRST (software reset) bit in the Device
> > Cont
From: Ilya Leoshkevich
Add a small test to prevent regressions.
Signed-off-by: Ilya Leoshkevich
Reviewed-by: Richard Henderson
Message-ID: <20231106093605.1349201-3-...@linux.ibm.com>
Signed-off-by: Thomas Huth
---
tests/tcg/s390x/clc.c | 48 +
tests
From: Philippe Mathieu-Daudé
We already have a global 'first_cpu' variable storing a pointer
to the first CPU, no need to use a static one.
Signed-off-by: Philippe Mathieu-Daudé
Message-ID: <20231030093150.65297-1-phi...@linaro.org>
Reviewed-by: David Hildenbrand
Signed-off-by: Thomas Huth
--
Add virtio-gpu.rst to the corresponding section in MAINTAINERS, so that
the maintainers gets CC:-ed on corresponding patches.
Message-ID: <20231027060808.242442-1-th...@redhat.com>
Reviewed-by: Manos Pitsidianakis
Signed-off-by: Thomas Huth
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
From: Ilya Leoshkevich
Add a small test to prevent regressions.
Signed-off-by: Ilya Leoshkevich
Reviewed-by: Richard Henderson
Message-ID: <20231106093605.1349201-5-...@linux.ibm.com>
Signed-off-by: Thomas Huth
---
tests/tcg/s390x/laalg.c | 27 +++
tests/tcg/s
From: Ilya Leoshkevich
Add a test that tries different combinations of ADD LOGICAL WITH
CARRY instructions.
Signed-off-by: Ilya Leoshkevich
Message-ID: <20231106093605.1349201-6-...@linux.ibm.com>
Signed-off-by: Thomas Huth
---
tests/tcg/s390x/add-logical-with-carry.c | 156 ++
From: Heiko Carstens
Qemu's SCLP implementation incorrectly reports that it supports CPU
reconfiguration. If a guest issues a CPU reconfiguration request it
is rejected as invalid command.
Fix the SCLP_HAS_CPU_INFO mask, and remove the unused
SCLP_CMDW_CONFIGURE_CPU and SCLP_CMDW_DECONFIGURE_CPU
From: Thomas Huth
Current Linux distros ship version 5 of the tesseract OCR software,
so the nextcube screen test is ignored there. Let's make the check
more flexible to allow newer versions, too, and remove the old v3
test since most Linux distros don't ship this version anymore.
Message-ID: <2
From: Ilya Leoshkevich
CLC updates cc_src before accessing the second operand; if the latter
is inaccessible, the former ends up containing a bogus value.
Fix by reading cc_src into a temporary first.
Fixes: 4f7403d52b1c ("target-s390: Convert CLC")
Closes: https://gitlab.com/qemu-project/qemu/
The AmigaOne is a rebranded MAI Teron board that uses U-Boot firmware
with patches to support AmigaOS and is very similar to pegasos2 so can
be easily emulated sharing most code with pegasos2. The reason to
emulate it is that AmigaOS comes in different versions for AmigaOne
and PegasosII which only
On Tue, 7 Nov 2023, BALATON Zoltan wrote:
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
On 11/7/23 14:33, BALATON Zoltan wrote:
On Tue, 7 Nov 2023, Daniel Henrique Barboza wrote:
Zoltan,
Gitlab is complaining about a missing file in one of the tests:
8/259 qemu:qtest+qtest-ppc / qtest
Instead of taking the writer lock internally, require callers to already
hold it when calling bdrv_root_attach_child(). These callers will
typically already hold the graph lock once the locking work is
completed, which means that they can't call functions that take it
internally.
Signed-off-by: Ke
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