On 23/10/23 19:08, Ninad Palsule wrote:
Hello Philippe,
On 10/23/23 10:00, Philippe Mathieu-Daudé wrote:
On 21/10/23 23:17, Ninad Palsule wrote:
This is a part of patchset where scratchpad is introduced.
The scratchpad provides a set of non-functional registers. The firmware
is free to use th
Am 23. Oktober 2023 21:06:11 UTC schrieb Mark Cave-Ayland
:
>On 23/10/2023 18:19, Bernhard Beschow wrote:
>
>> Am 22. Oktober 2023 22:06:30 UTC schrieb Bernhard Beschow
>> :
>>>
>>>
>>> Am 19. Oktober 2023 13:04:51 UTC schrieb Mark Cave-Ayland
>>> :
This function reads the value of the
Reviewed-by: Michael Rolnik
On Tue, Oct 24, 2023 at 2:32 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 10/23/23 09:09, Philippe Mathieu-Daudé wrote:
> > Inspired-by: Richard Henderson
> > Signed-off-by: Philippe Mathieu-Daudé
> > ---
> > target/avr/translate.c | 18 ++-
On 10/21/23 23:17, Ninad Palsule wrote:
Added basic qtests for FSI model.
Signed-off-by: Ninad Palsule
---
v3:
- Added new qtest as per Cedric's comment.
V4:
- Remove MAINTAINER and documentation changes from this commit
v6:
- Incorporated review comments by Thomas Huth.
---
tests/qtest
On 10/21/23 23:17, Ninad Palsule wrote:
Documentation for IBM FSI model.
Signed-off-by: Ninad Palsule
---
v4:
- Added separate commit for documentation
---
docs/specs/fsi.rst | 141 +
1 file changed, 141 insertions(+)
create mode 100644 docs/s
On 10/21/23 23:17, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
An APB-to-OPB bridge enabling access to the OPB from the ARM core in
the AST2600. Hardware limitations prevent the OPB from being directly
mapped into APB, so all accesses are
On Wed, 18 Oct 2023 17:48:36 +0100
Salil Mehta wrote:
> Hi Alex,
>
> On 18/10/2023 16:41, Alex Bennée wrote:
> >
> > Salil Mehta writes:
> >
> >> Hello,
> >>
> >> Came across below code excerpt in x86/microvm code and wanted to know
> >> why 'has_hotpluggable_cpus' flag has been set to 'fal
On Mon, Oct 23, 2023 at 05:35:49PM -0300, Fabiano Rosas wrote:
> From: Nikolay Borisov
>
> Introduce basic pwritev/preadv support in the generic channel layer.
> Specific implementation will follow for the file channel as this is
> required in order to support migration streams with fixed locatio
Mechanical change using the following coccinelle script:
@@
identifier dev;
expression qom_type;
expression addr;
expression irq;
@@
-dev = qdev_new(qom_type);
-sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
-sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr)
Mechanical change using the following coccinelle script:
@@
identifier dev;
identifier sbd;
expression qom_type;
expression addr;
@@
-dev = qdev_new(qom_type);
-sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
-sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr)
All series reviewed.
v2:
- Addressed Thomas comments in patches 1-2
- Added R-b tags
Avoid QOM objects poking at each other internals:
- Pass "link" properties
- Access MMIO via SysBus API
- Simplify using sysbus_create_simple()
Philippe Mathieu-Daudé (6):
hw/m68k/irqc: Pass CPU using QOM link
Avoid the interrupt controller directly access the first cpu via
the qemu_get_cpu() call. Pass it as argument to mcf5206_init()
from the board code.
Reviewed-by: Richard Henderson
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
---
hw/m68k/an5206.c | 6 --
hw/m68k/mcf5206.c
QOM objects shouldn't access each other internals fields
except using the QOM API.
Here the caller of mcf_intc_init() access the MMIO region from
the MCF_INTC state. Avoid that by exposing that region via
sysbus_init_mmio(), then get it with sysbus_mmio_get_region().
Signed-off-by: Philippe Mathi
QOM objects shouldn't access each other internals fields
except using the QOM API.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Tested-by: Thomas Huth
Reviewed-by: Thomas Huth
---
hw/m68k/mcf_intc.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(
Avoid the interrupt controller directly access the 'first_cpu'
global. Pass 'cpu' from the board code.
Reviewed-by: Richard Henderson
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/intc/m68k_irqc.h | 1 +
hw/intc/m68k_irqc.c | 10 +-
hw/m68k/virt
On Mon, Oct 23, 2023 at 05:36:07PM -0300, Fabiano Rosas wrote:
> Add the direct-io migration parameter that tells the migration code to
> use O_DIRECT when opening the migration stream file whenever possible.
>
> This is currently only used for the secondary channels of fixed-ram
> migration, whic
KVM_FEATURE_ASYNC_PF_VMEXIT has been introduced for years, however QEMU
doesn't support expose it to guest. Add support for it.
Signed-off-by: Xiaoyao Li
---
target/i386/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index bdca901d
From: Marc-André Lureau
Hi,
Surprisingly, the migration code doesn't check that required migration entries
and subsections are loaded. Either optional or required sections are both
ignored when missing. According to the documentation a "newer QEMU that knows
about a subsection can (with care) lo
From: Marc-André Lureau
There is no simple way to distinguish when the callback is used for load
or save, AFAICT.
Signed-off-by: Marc-André Lureau
---
hw/virtio/virtio.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index 6facd
From: Marc-André Lureau
It is reconstructed during fdc_post_load()
Signed-off-by: Marc-André Lureau
---
hw/block/fdc.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/block/fdc.c b/hw/block/fdc.c
index d7cc4d3ec1..fc71660ba0 100644
--- a/hw/block/fdc.c
+++ b/hw/block/fdc.c
@@ -1005
From: Marc-André Lureau
Check subsection support, and optional handling.
Signed-off-by: Marc-André Lureau
---
tests/unit/test-vmstate.c | 116 ++
1 file changed, 116 insertions(+)
diff --git a/tests/unit/test-vmstate.c b/tests/unit/test-vmstate.c
index 0b7d
From: Marc-André Lureau
The function is used on save at this point. The following commits will
use it on load.
Signed-off-by: Marc-André Lureau
---
include/migration/vmstate.h | 2 +-
migration/savevm.c | 2 +-
migration/vmstate.c | 4 ++--
3 files changed, 4 insertions(+), 4
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
docs/devel/migration.rst | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/docs/devel/migration.rst b/docs/devel/migration.rst
index c3e1400c0c..50f313f178 100644
--- a/docs/devel/migration.rst
+++
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
migration/savevm.c | 43 +++
1 file changed, 43 insertions(+)
diff --git a/migration/savevm.c b/migration/savevm.c
index ca5c7cebe0..66c9c3095b 100644
--- a/migration/savevm.c
+++ b/migration/s
From: Marc-André Lureau
commit 13cde50889237 ("vmstate: Return error in case of error") sets
QemuFile error to stop reading from it and report to the caller (checked
by unit tests). We should do the same on subsection loading error.
Signed-off-by: Marc-André Lureau
---
migration/vmstate.c | 1
From: Marc-André Lureau
Check that required subsections have been loaded.
Signed-off-by: Marc-André Lureau
---
migration/vmstate.c | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/migration/vmstate.c b/migration/vmstate.c
index 16e33
From: Marc-André Lureau
Using always 0, QEMU will end up loading the same instance, even if
multiple have been saved.
Signed-off-by: Marc-André Lureau
---
net/slirp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/slirp.c b/net/slirp.c
index c33b3e02e7..af1451b60f 10
On Tue, Oct 24, 2023 at 2:26 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 10/23/23 09:09, Philippe Mathieu-Daudé wrote:
> > Inspired-by: Richard Henderson
> > Signed-off-by: Philippe Mathieu-Daudé
> > ---
> > RFC: please double-check bits
> > ---
> > target/cris/translate.c
On Tue, Oct 24, 2023 at 1:36 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 10/23/23 09:09, Philippe Mathieu-Daudé wrote:
> > Inspired-by: Richard Henderson
> > Signed-off-by: Philippe Mathieu-Daudé
> > ---
> > target/cris/translate.c | 3 +--
> > target/i386/tcg/transla
On Mon, Oct 23, 2023 at 05:36:01PM -0300, Fabiano Rosas wrote:
> For the upcoming support to fixed-ram migration with multifd, we need
> to be able to accept an iovec array with non-contiguous data.
>
> Add a pwritev and preadv version that splits the array into contiguous
> segments before writin
From: Zhao Liu
For function comments in this file, keep the comment style consistent
with other files in the directory.
Signed-off-by: Zhao Liu
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yanan Wang
Reviewed-by: Xiaoyao Li
Reviewed-by: Babu Moger
Tested-by: Babu Moger
Tested-by: Yongw
From: Zhao Liu
CPUID[0xB] defines SMT, Core and Invalid types, and this leaf is shared
by Intel and AMD CPUs.
But for extended topology levels, Intel CPU (in CPUID[0x1F]) and AMD CPU
(in CPUID[0x8026]) have the different definitions with different
enumeration values.
Though CPUID[0x8026
From: Zhao Liu
In the nr_threads' comment, specify it represents the
number of threads in the "core" to avoid confusion.
Also add comment for nr_dies in CPUX86State.
Signed-off-by: Zhao Liu
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Babu Moger
Tested-by: Yongwei Ma
Acked-by: Michael S.
From: Zhao Liu
In cpu_x86_cpuid(), there are many variables in representing the cpu
topology, e.g., topo_info, cs->nr_cores/cs->nr_threads.
Since the names of cs->nr_cores/cs->nr_threads does not accurately
represent its meaning, the use of cs->nr_cores/cs->nr_threads is prone
to confusion and m
From: Zhao Liu
Hi list,
This is the our v5 patch series, rebased on the master branch at the
commit 384dbdda94c0 ("Merge tag 'migration-20231020-pull-request' of
https://gitlab.com/juan.quintela/qemu into staging").
Comparing with v4 [1], v5 drops the "x-l2-cache-topo" option and adds
A/R/T tag
From: Zhao Liu
The tests in this file actually test the APIC ID combinations.
Rename to test-x86-topo.c to make its name more in line with its
actual content.
Signed-off-by: Zhao Liu
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Babu Moger
Tested-by: Yongwei Ma
Acked-by: Michael S. Tsirkin
On 24/10/23 02:26, Richard Henderson wrote:
On 10/23/23 09:09, Philippe Mathieu-Daudé wrote:
Inspired-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
RFC: please double-check bits
---
target/cris/translate.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
From: Zhao Liu
At present, the subleaf 0x02 of CPUID[0x1F] is bound to the "die" level.
In fact, the specific topology level exposed in 0x1F depends on the
platform's support for extension levels (module, tile and die).
To help expose "module" level in 0x1F, decouple CPUID[0x1F] subleaf
with sp
From: Zhuocheng Ding
Introduce cluster-id other than module-id to be consistent with
CpuInstanceProperties.cluster-id, and this avoids the confusion
of parameter names when hotplugging.
Following the legacy smp check rules, also add the cluster_id validity
into x86_cpu_pre_plug().
Signed-off-by
From: Zhuocheng Ding
>From CPUState.nr_cores' comment, it represents "number of cores within
this CPU package".
After 003f230e37d7 ("machine: Tweak the order of topology members in
struct CpuTopology"), the meaning of smp.cores changed to "the number of
cores in one die", but this commit missed
From: Zhuocheng Ding
As module-level topology support is added to X86CPU, now we can enable
the support for the cluster parameter on PC machines. With this support,
we can define a 5-level x86 CPU topology with "-smp":
-smp cpus=*,maxcpus=*,sockets=*,dies=*,clusters=*,cores=*,threads=*.
Additio
From: Zhao Liu
Refer to the fixes of cache_info_passthrough ([1], [2]) and SDM, the
CPUID.04H:EAX[bits 25:14] and CPUID.04H:EAX[bits 31:26] should use the
nearest power-of-2 integer.
The nearest power-of-2 integer can be calculated by pow2ceil() or by
using APIC ID offset (like L3 topology using
From: Zhao Liu
CPUID[4].EAX[bits 25:14] is used to represent the cache topology for
Intel CPUs.
After cache models have topology information, we can use
CPUCacheInfo.share_level to decide which topology level to be encoded
into CPUID[4].EAX[bits 25:14].
And since maximum_processor_id (original
From: Zhao Liu
Currently, by default, the cache topology is encoded as:
1. i/d cache is shared in one core.
2. L2 cache is shared in one core.
3. L3 cache is shared in one die.
This default general setting has caused a misunderstanding, that is, the
cache topology is completely equated with a sp
From: Zhao Liu
For i-cache and d-cache, current QEMU hardcodes the maximum IDs for CPUs
sharing cache (CPUID.04H.00H:EAX[bits 25:14] and CPUID.04H.01H:EAX[bits
25:14]) to 0, and this means i-cache and d-cache are shared in the SMT
level.
This is correct if there's single thread per core, but is
From: Zhao Liu
CPUID[0x801D].EAX[bits 25:14] NumSharingCache: number of logical
processors sharing cache.
The number of logical processors sharing this cache is
NumSharingCache + 1.
After cache models have topology information, we can use
CPUCacheInfo.share_level to decide which topology le
From: Zhuocheng Ding
Support module level in i386 cpu topology structure "X86CPUTopoInfo".
Since x86 does not yet support the "clusters" parameter in "-smp",
X86CPUTopoInfo.modules_per_die is currently always 1. Therefore, the
module level width in APIC ID, which can be calculated by
"apicid_bit
From: Zhao Liu
The commit 8f4202fb1080 ("i386: Populate AMD Processor Cache Information
for cpuid 0x801D") adds the cache topology for AMD CPU by encoding
the number of sharing threads directly.
>From AMD's APM, NumSharingCache (CPUID[0x801D].EAX[bits 25:14])
means [1]:
The number of lo
From: Zhuocheng Ding
smp command has the "clusters" parameter but x86 hasn't supported that
level. "cluster" is a CPU topology level concept above cores, in which
the cores may share some resources (L2 cache or some others like L3
cache tags, depending on the Archs) [1][2]. For x86, the resource
From: Zhuocheng Ding
After i386 supports module level, it's time to add the test for module
level's parsing.
Signed-off-by: Zhuocheng Ding
Co-developed-by: Zhao Liu
Signed-off-by: Zhao Liu
Reviewed-by: Yanan Wang
Tested-by: Babu Moger
Tested-by: Yongwei Ma
Acked-by: Michael S. Tsirkin
---
From: Zhuocheng Ding
Add module_id member in X86CPUTopoIDs.
module_id can be parsed from APIC ID, so also update APIC ID parsing
rule to support module level. With this support, the conversions with
module level between X86CPUTopoIDs, X86CPUTopoInfo and APIC ID are
completed.
module_id can be a
From: Zhao Liu
Linux kernel (from v6.4, with commit edc0a2b595765 ("x86/topology: Fix
erroneous smp_num_siblings on Intel Hybrid platforms") is able to
handle platforms with Module level enumerated via CPUID.1F.
Expose the module level in CPUID[0x1F] if the machine has more than 1
modules.
(Tes
On 24/10/23 02:14, Richard Henderson wrote:
On 10/23/23 09:09, Philippe Mathieu-Daudé wrote:
Inspired-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/mxu_translate.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/target/mips/tcg/mxu
On 24/10/23 10:53, Philippe Mathieu-Daudé wrote:
On 24/10/23 02:26, Richard Henderson wrote:
On 10/23/23 09:09, Philippe Mathieu-Daudé wrote:
Inspired-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
RFC: please double-check bits
---
target/cris/translate.c | 3 +--
1 file c
ping
https://patchew.org/QEMU/20230921141634.26233-1-lu@verisilicon.com/
Could you please help review the patch?
Thanks.
B.R.
-Original Message-
From: Lu Gao
Sent: Thursday, September 21, 2023 10:17 PM
To: qemu-devel@nongnu.org
Cc: Lu Gao; Jianxian Wen; Paolo Bonzini; Daniel P. Ber
On 23/10/2023 20.55, Peter Xu wrote:
On Mon, Oct 23, 2023 at 07:30:04PM +0200, Thomas Huth wrote:
On 23/10/2023 19.11, Thomas Huth wrote:
On 23/10/2023 17.57, Peter Xu wrote:
On Mon, Oct 23, 2023 at 04:50:44PM +0200, Thomas Huth wrote:
No need for a new variable here, especially not for one t
On 24/10/2023 11.03, Zhao Liu wrote:
From: Zhao Liu
The tests in this file actually test the APIC ID combinations.
Rename to test-x86-topo.c to make its name more in line with its
actual content.
Signed-off-by: Zhao Liu
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Babu Moger
Tested-by: Yo
On Tue, Oct 24, 2023 at 08:53:31AM +, Lu Gao wrote:
> ping
>
> https://patchew.org/QEMU/20230921141634.26233-1-lu@verisilicon.com/
>
> Could you please help review the patch?
>
> Thanks.
> B.R.
>
> -Original Message-
> From: Lu Gao
> Sent: Thursday, September 21, 2023 10:17 PM
Rename the variable here to avoid that it shadows a variable from
the beginning of the function scope. With this change the code now
successfully compiles with -Wshadow=local.
Signed-off-by: Thomas Huth
---
v2: Need the value for the qemu_file_set_error() line, too
migration/ram.c | 8 +---
marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Using always 0, QEMU will end up loading the same instance, even if
> multiple have been saved.
>
> Signed-off-by: Marc-André Lureau
Similar (but different) fix on next Migration PULL request.
Later, Juan.
> ---
> net/slirp.c |
marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> commit 13cde50889237 ("vmstate: Return error in case of error") sets
> QemuFile error to stop reading from it and report to the caller (checked
> by unit tests). We should do the same on subsection loading error.
>
> Signed-off-by: M
On 9/25/23 08:22, Andrew Jeffery wrote:
I've changed employers, have company email that deals with patch-based
workflows without too much of a headache, and am trying to steer some
content out of my personal mail.
Signed-off-by: Andrew Jeffery
---
Hi Cédric, do you mind including this in your
This looks like a bug. When the size is `UINT64_MAX`, it is reset to
(Int128)`1 << 64` which actually is `UINT64_MAX + 1`.
Then, an assert is triggered when the size is converted back to uin64_t
by using the int128_get64() function, as the new value happens to be
different than the previous one.
Hi Richard,
This commit has broken some of our internal bareboard testing on
Risc-V 64. At some point in our programs, there is an AMOSWAP (=
atomic swap) instruction on I/O. But since this commit, can_do_io is
set to false triggering an infinite loop.
IIUC the doc (cf [1]), atomic operations on I
On 24/10/23 01:46, tit...@google.com wrote:
This patch series contains fixes and improvements to PMBus support in QEMU.
---
Titus Rwantare (8):
hw/i2c: pmbus add support for block receive
hw/i2c: pmbus: add vout mode bitfields
hw/i2c: pmbus: add fan support
hw/i2c:
On Tue, 24 Oct 2023 at 10:45, Antonio Caggiano
wrote:
>
> This looks like a bug. When the size is `UINT64_MAX`, it is reset to
> (Int128)`1 << 64` which actually is `UINT64_MAX + 1`.
>
> Then, an assert is triggered when the size is converted back to uin64_t
> by using the int128_get64() function,
Fabiano Rosas wrote:
> Juan Quintela writes:
>
>> So we can move more compression_counters stuff to ram-compress.c.
>> Create compression_counters struct to add the stuff that was on
>> MigrationState.
>>
>> Reviewed-by: Lukas Straub
>> Signed-off-by: Juan Quintela
>> ---
>> migration/ram-comp
Titus Rwantare writes:
> On Mon, 23 Oct 2023 at 12:16, Alex Bennée wrote:
>
>> You seem to have missed a number of tags from previous postings:
>>
>>
>> https://qemu.readthedocs.io/en/master/devel/submitting-a-patch.html#proper-use-of-reviewed-by-tags-can-aid-review
>>
>> (although I notice
On 10/21/23 15:29, Mike Maslenkin wrote:
On Thu, Oct 19, 2023 at 5:23 PM Alexander Ivanov
wrote:
We will need these functions in parallels-ext.c too. Let them be global
functions parallels_mark_used() and parallels_mark_unused().
Signed-off-by: Alexander Ivanov
---
block/parallels.c | 22
Thomas Huth wrote:
> Rename the variable here to avoid that it shadows a variable from
> the beginning of the function scope. With this change the code now
> successfully compiles with -Wshadow=local.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Juan Quintela
queued.
> ---
> v2: Need the valu
On 10/21/23 12:40, Mike Maslenkin wrote:
On Thu, Oct 19, 2023 at 4:06 PM Alexander Ivanov
wrote:
After used bitmap freeng s->used_bmap points to the freed memory. If we try
to free used bitmap one more time it leads to double free error.
Set s->used_bmap to NULL to exclude double free error
Thomas Huth writes:
> Rename the variable here to avoid that it shadows a variable from
> the beginning of the function scope. With this change the code now
> successfully compiles with -Wshadow=local.
>
> Signed-off-by: Thomas Huth
> ---
> v2: Need the value for the qemu_file_set_error() line,
marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> The function is used on save at this point. The following commits will
> use it on load.
>
> Signed-off-by: Marc-André Lureau
Reviewed-by: Juan Quintela
queued.
Markus Armbruster writes:
> Thomas Huth writes:
>
>> No need to declare a new variable in the the inner code block
>> here, we can re-use the "ret" variable that has been declared
>> at the beginning of the function. With this change, the code
>> can now be successfully compiled with -Wshadow=lo
marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Check that required subsections have been loaded.
>
> Signed-off-by: Marc-André Lureau
Reviewed-by: Juan Quintela
I will let other people to comment on this before merging.
I can see the (pontential problem) that Peter said: We
marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Signed-off-by: Marc-André Lureau
Reviewed-by: Juan Quintela
> @@ -2541,6 +2572,11 @@ qemu_loadvm_section_start_full(QEMUFile *f,
> MigrationIncomingState *mis)
> idstr, instance_id);
> return -EIN
marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Check subsection support, and optional handling.
>
> Signed-off-by: Marc-André Lureau
Reviewed-by: Juan Quintela
marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Signed-off-by: Marc-André Lureau
> ---
> docs/devel/migration.rst | 17 -
> 1 file changed, 8 insertions(+), 9 deletions(-)
>
> diff --git a/docs/devel/migration.rst b/docs/devel/migration.rst
> index c3e1400c0c..50
I messed it up on merge. It's a debugging aid, so no impact on build.
Fixes: e307a8174bb8 (qapi: provide a friendly string representation of QAPI
classes)
Signed-off-by: Markus Armbruster
---
scripts/qapi/schema.py | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/scripts/q
Hi Peter,
Thanks for the quick response.
On 24/10/2023 12:28, Peter Maydell wrote:
On Tue, 24 Oct 2023 at 10:45, Antonio Caggiano
wrote:
This looks like a bug. When the size is `UINT64_MAX`, it is reset to
(Int128)`1 << 64` which actually is `UINT64_MAX + 1`.
Then, an assert is triggered wh
Ping
Am 06.09.23 um 15:09 schrieb Fiona Ebner:
> If there is a pending DMA operation during ide_bus_reset(), the fact
> that the IDEState is already reset before the operation is canceled
> can be problematic. In particular, ide_dma_cb() might be called and
> then use the reset IDEState which cont
Thomas Huth wrote:
> On 20/10/2023 21.42, Juan Quintela wrote:
>> Thomas Huth wrote:
>>> On 20/10/2023 11.07, Juan Quintela wrote:
Otherwise qom-test fails.
ok 4 /i386/qom/x-remote
qemu-system-i386: savevm_state_handler_insert: Detected duplicate
SaveStateEntry: id=isa-ide, i
Juan Quintela writes:
> Thomas Huth wrote:
>> Rename the variable here to avoid that it shadows a variable from
>> the beginning of the function scope. With this change the code now
>> successfully compiles with -Wshadow=local.
>>
>> Signed-off-by: Thomas Huth
>
> Reviewed-by: Juan Quintela
>
Hi
On Tue, Oct 24, 2023 at 2:47 PM Juan Quintela wrote:
>
> marcandre.lur...@redhat.com wrote:
> > From: Marc-André Lureau
> >
> > Signed-off-by: Marc-André Lureau
> > ---
> > docs/devel/migration.rst | 17 -
> > 1 file changed, 8 insertions(+), 9 deletions(-)
> >
> > diff --gi
Am 23.10.2023 um 16:14 hat Fiona Ebner geschrieben:
> Am 23.10.23 um 14:59 schrieb Kevin Wolf:
> > Am 23.10.2023 um 13:37 hat Fiona Ebner geschrieben:
> +current = qatomic_cmpxchg(&s->copy_mode,
> MIRROR_COPY_MODE_BACKGROUND,
> + change_opts->copy_m
Steven Sistare wrote:
> On 10/20/2023 3:40 PM, Juan Quintela wrote:
>> Steven Sistare wrote:
>>> On 10/20/2023 5:45 AM, Juan Quintela wrote:
Steve Sistare wrote:
> Add the cpr-reboot migration mode. Usage:
>
> $ qemu-system-$arch -monitor stdio ...
> QEMU 8.1.50 monitor - t
Hanna Czenczek wrote:
> On 18.10.23 13:55, Juan Quintela wrote:
>> Create a new filter that removes the two warnings for test 183.
>>
>> Signed-off-by: Juan Quintela
>> ---
>> tests/qemu-iotests/183 | 2 +-
>> tests/qemu-iotests/common.filter | 7 +++
>> 2 files changed, 8 inser
On Sun, Oct 22, 2023 at 16:51:23 +0100, David Woodhouse wrote:
> From: David Woodhouse
>
> Signed-off-by: David Woodhouse
Reviewed-by: Leif Lindholm
> ---
> hw/arm/sbsa-ref.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
>
Hi Alex
On Mon, Oct 23, 2023 at 8:34 PM Alex Bennée wrote:
>
>
> Hi,
>
> I'm trying to get the contrib/vhost-user-input working but it exits
> during the boot up sequence:
>
> ➜ gdb --args ./vhost-user-input -p /dev/input/event22 -s /tmp/mouse.sock
> GNU gdb (GDB) 15.0.50.20231012-git
>
>
On 18.10.23 13:55, Juan Quintela wrote:
Create a new filter that removes the two warnings for test 183.
Signed-off-by: Juan Quintela
---
tests/qemu-iotests/183 | 2 +-
tests/qemu-iotests/common.filter | 7 +++
2 files changed, 8 insertions(+), 1 deletion(-)
Reviewed-by: Hann
Marc-André Lureau wrote:
> Hi
>
> On Tue, Oct 24, 2023 at 2:47 PM Juan Quintela wrote:
>>
>> marcandre.lur...@redhat.com wrote:
>> > From: Marc-André Lureau
>> >
>> > Signed-off-by: Marc-André Lureau
>> > ---
>> > docs/devel/migration.rst | 17 -
>> > 1 file changed, 8 insertio
On 24/10/23 12:06, Alex Bennée wrote:
A pull request is really just a GPG signed tag that you push to a repo.
You can use the existing git tooling to create the cover letter for it.
I've included my exact steps at the end of the email but really it comes
down to:
git tag --sign your-pr-tag
On 24/10/2023 12.37, Markus Armbruster wrote:
Markus Armbruster writes:
Thomas Huth writes:
No need to declare a new variable in the the inner code block
here, we can re-use the "ret" variable that has been declared
at the beginning of the function. With this change, the code
can now be suc
On 24/10/23 12:54, Fiona Ebner wrote:
Ping
John seems busy, I'll take these 2 patches. Thanks Fiona!
Am 06.09.23 um 15:09 schrieb Fiona Ebner:
If there is a pending DMA operation during ide_bus_reset(), the fact
that the IDEState is already reset before the operation is canceled
can be probl
On Tue, 24 Oct 2023 at 11:49, Antonio Caggiano
wrote:
>
> Hi Peter,
>
> Thanks for the quick response.
>
> On 24/10/2023 12:28, Peter Maydell wrote:
> > On Tue, 24 Oct 2023 at 10:45, Antonio Caggiano
> > wrote:
> >>
> >> This looks like a bug. When the size is `UINT64_MAX`, it is reset to
> >> (I
Hi
On Mon, Oct 23, 2023 at 5:49 PM wrote:
>
> From: Marc-André Lureau
>
> Hi,
>
> QEMU system emulators can be made to compile and work without Pixman.
>
> Only a few devices and options actually require it (VNC, Gtk, Spice for ex)
> and
> will have to be compiled out.
>
> However, most of QEMU
On Tue, Oct 24, 2023 at 12:48:41PM +0200, Markus Armbruster wrote:
> I messed it up on merge. It's a debugging aid, so no impact on build.
>
> Fixes: e307a8174bb8 (qapi: provide a friendly string representation of QAPI
> classes)
> Signed-off-by: Markus Armbruster
> ---
> scripts/qapi/schema.p
On 24/10/23 12:48, Markus Armbruster wrote:
I messed it up on merge. It's a debugging aid, so no impact on build.
Fixes: e307a8174bb8 (qapi: provide a friendly string representation of QAPI
classes)
Signed-off-by: Markus Armbruster
---
scripts/qapi/schema.py | 3 ++-
1 file changed, 2 inse
On 16/10/2023 16:18, David Woodhouse wrote:
From: David Woodhouse
The per-vCPU upcall vector support had two problems. Firstly it was
using the wrong hypercall argument and would always return -EFAULT.
And secondly it was using the wrong ioctl() to pass the vector to
the kernel and thus the *ke
On 16/10/2023 16:18, David Woodhouse wrote:
From: David Woodhouse
A guest which has configured the per-vCPU upcall vector may set the
HVM_PARAM_CALLBACK_IRQ param to fairly much anything other than zero.
For example, Linux v6.0+ after commit b1c3497e604 ("x86/xen: Add support
for HVMOP_set_evt
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