Example output was using single quotes. Fix it.
Signed-off-by: Victor Toso
Reviewed-by: Daniel P. Berrangé
---
qapi/net.json | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/qapi/net.json b/qapi/net.json
index 313c8a606e..81988e499a 100644
--- a/qapi/net.json
+++ b/qapi
Example output lacks double quotes. Fix it.
Fixes: 4cda177c60 "qmp: add 'get-win32-socket'"
Signed-off-by: Victor Toso
Reviewed-by: Daniel P. Berrangé
---
qapi/misc.json | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qapi/misc.json b/qapi/misc.json
index cda2effa81..be302ca
Example output has extra end curly bracket. Remove it.
Signed-off-by: Victor Toso
Reviewed-by: Daniel P. Berrangé
---
qapi/migration.json | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qapi/migration.json b/qapi/migration.json
index 8843e74b59..9385b9f87c 100644
--- a/qapi/
Example output has several missing commas. Add them.
Signed-off-by: Victor Toso
---
qapi/block-core.json | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/qapi/block-core.json b/qapi/block-core.json
index 2b1d493d6e..6a81103594 100644
--- a/qa
Hi,
v1: https://lists.gnu.org/archive/html/qemu-devel/2023-09/msg00853.html
Changes:
- Fixed running the generator with tests (Daniel). Added a flag for the
generator, set in tests/meson.build (Philippe).
- Moved the script to the end of the series, to avoid git bisect issues
(Daniel)
- Added
Example output has extra end curly bracket. Switch with comma.
Signed-off-by: Victor Toso
Reviewed-by: Daniel P. Berrangé
---
qapi/machine.json | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qapi/machine.json b/qapi/machine.json
index a08b6576ca..9eb76193e0 100644
--- a/qap
08.09.2023 22:21, Paolo Bonzini wrote:
On Fri, Sep 8, 2023 at 7:28 PM Kevin Wolf wrote:
Maybe the calls aren't eliminated because --enable-debug implies -O0?
My experience is that it will still fold simple dead code like "0 &&
foo()" or even "if (0) { ... }", but maybe it's a GCC vs. clang
di
11.09.2023 13:41, Michael Tokarev:
What can be done though is, instead of making kvm_arch_get_supported_cpuid
et all a stubs, to replace them in .h file with an empty macro when some
condition(s) are met. In other words, fold kvm_enabled() "inside" of
kvm_arch_get_supported_cpuid() and use some
On Thu, Aug 31, 2023 at 03:25:45PM +0200, Markus Armbruster wrote:
> diff --git a/hw/block/xen-block.c b/hw/block/xen-block.c
> index 3906b9058b..a07cd7eb5d 100644
> --- a/hw/block/xen-block.c
> +++ b/hw/block/xen-block.c
> @@ -369,7 +369,7 @@ static void xen_block_get_vdev(Object *obj, Visitor *v,
On Mon, Sep 11, 2023 at 12:40:15PM +0200, Victor Toso wrote:
> Example output has a comment embedded in the array. Remove it.
> The end result is a list of size 1.
>
> Signed-off-by: Victor Toso
> ---
> qapi/rocker.json | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Dani
On Mon, Sep 11, 2023 at 12:40:16PM +0200, Victor Toso wrote:
> Example output has a comment embedded in the array. Remove it.
> The end result is a list of size 2.
>
> Signed-off-by: Victor Toso
> ---
> qapi/ui.json | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Daniel P
On Mon, 11 Sep 2023 11:43:00 +0200
Philippe Mathieu-Daudé wrote:
> On 11/9/23 01:28, Gavin Shan wrote:
> > Hi Philippe,
> >
> > On 9/8/23 21:22, Philippe Mathieu-Daudé wrote:
> >> Add a field to return the QOM type name of a CPU class.
> >>
> >> Signed-off-by: Philippe Mathieu-Daudé
> >> ---
On Mon, Sep 11, 2023 at 12:40:17PM +0200, Victor Toso wrote:
> Example output has several missing commas. Add them.
>
> Signed-off-by: Victor Toso
> ---
> qapi/block-core.json | 32
> 1 file changed, 16 insertions(+), 16 deletions(-)
Reviewed-by: Daniel P. Berra
>-Original Message-
>From: Joao Martins
>Sent: Monday, September 11, 2023 6:13 PM
>Subject: Re: [PATCH v1] vfio/common: Separate vfio-pci ranges
>
>On 11/09/2023 10:48, Duan, Zhenzhong wrote:
>>> -Original Message-
>>> From: Joao Martins
>>> Sent: Monday, September 11, 2023 5:07
On Mon, 11 Sept 2023 at 06:10, Philippe Mathieu-Daudé wrote:
>
> On 8/9/23 17:47, Stefan Hajnoczi wrote:
> > I wonder how it passed CI?
> > https://gitlab.com/qemu-project/qemu/-/pipelines/996175923/
>
> The conditions are:
> - x86 host
> - both system / user emulation enabled
> - KVM disabled
> -
This generator has two goals:
1. Mechanical validation of QAPI examples
2. Generate the examples in a JSON format to be consumed for extra
validation.
The generator iterates over every Example section, parsing both server
and client messages. The generator prints any inconsistency found, for
The next patch adds a generator that also validates qapi
documentation. We don't want to execute it with a test schema.
Signed-off-by: Victor Toso
---
scripts/qapi/main.py | 4
tests/meson.build| 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/scripts/qapi/main.py b/
On Mon, 11 Sept 2023 at 06:39, Philippe Mathieu-Daudé wrote:
>
> Since commits 3adce820cf..ef1cf6890f, When building on
> a x86 host configured as:
>
> $ ./configure --cc=clang \
> --target-list=x86_64-linux-user,x86_64-softmmu \
> --enable-debug
>
> we get:
>
> [71/71] Linking target
On Thu, Aug 31, 2023 at 3:25 PM Markus Armbruster wrote:
>
> Local variables shadowing other local variables or parameters make the
> code needlessly hard to understand. Tracked down with -Wshadow=local.
> Clean up: delete inner declarations when they are actually redundant,
> else rename variabl
>-Original Message-
>From: Joao Martins
>Sent: Monday, September 11, 2023 6:20 PM
>To: Duan, Zhenzhong ; qemu-devel@nongnu.org
>Cc: Alex Williamson ; Cedric Le Goater
>; Avihai Horon ; Gerd Hoffmann
>
>Subject: Re: [PATCH v1] vfio/common: Separate vfio-pci ranges
>
>On 11/09/2023 10:48, Du
On Mon, Sep 11, 2023 at 12:38:32PM +0200, Philippe Mathieu-Daudé wrote:
> Since commits 3adce820cf..ef1cf6890f, When building on
> a x86 host configured as:
>
> $ ./configure --cc=clang \
> --target-list=x86_64-linux-user,x86_64-softmmu \
> --enable-debug
>
> we get:
>
> [71/71] Link
Hi,
Sorry, this two are part of v2, did a mistake with
git-send-email. I'll add them to the right thread with
--in-reply-to shortly (without cc, to avoid spamming people's
inbox)
v2: https://lists.gnu.org/archive/html/qemu-devel/2023-09/msg02383.html
Cheers,
Victor
On Mon, Sep 11, 2023 at 01:13
On Fri, 8 Sep 2023 17:55:12 +0100
Daniel P. Berrangé wrote:
> On Fri, Sep 08, 2023 at 04:48:46PM +0200, Igor Mammedov wrote:
> > On Fri, 8 Sep 2023 14:45:24 +0200
> > Tim Wiederhake wrote:
> >
> > > Synchronizing the list of cpu features and models with qemu is a recurring
> > > task in libv
This generator has two goals:
1. Mechanical validation of QAPI examples
2. Generate the examples in a JSON format to be consumed for extra
validation.
The generator iterates over every Example section, parsing both server
and client messages. The generator prints any inconsistency found, for
Станислав Юдин writes:
> Hello,
>
> I've just got this message, when I dubugging my code:
>
> Disassembler disagrees with translator over instruction decoding
> Please report this to qemu-devel@nongnu.org
>
> *
>
> Binary code is in the attachment.
The binary seems to reconfigure itself as it
The next patch adds a generator that also validates qapi
documentation. We don't want to execute it with a test schema.
Signed-off-by: Victor Toso
---
scripts/qapi/main.py | 4
tests/meson.build| 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/scripts/qapi/main.py b/
On Mon, Sep 11, 2023 at 12:17:13PM +0200, Marcin Juszkiewicz wrote:
> I am working on aarch64/sbsa-ref machine so people can have virtual
> machine to test their OS against something reminding standards compliant
> system.
>
> One of tools I use is BSA ACS (Base System Architecture - Architecture
From: Marc-André Lureau
Replace select() with poll() to fix a crash when QEMU has a large number
of FDs.
Fixes:
https://bugzilla.redhat.com/show_bug.cgi?id=2020133
Signed-off-by: Marc-André Lureau
---
backends/tpm/tpm_util.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
On Thu, 7 Sep 2023 14:41:16 +0200
Philippe Mathieu-Daudé wrote:
> On 7/9/23 13:35, Jonathan Cameron wrote:
> > Support these decoders in CXL host bridges (pxb-cxl), CXL Switch USP
> > and CXL Type 3 end points.
> >
> > Signed-off-by: Jonathan Cameron
> > ---
> > include/hw/cxl/cxl_component.h
v3: Thanks to Philippe.
- Pull the hdm_inc change out as a precursor to the increase in HDM
decoders (new patch: 3)
- Fix a bug where cxl-host used the encoded count as if it were the
decoded version.
For initial CXL emulation / kernel driver bring up a single Host-managed
Device Memory (H
There is no strong justification for keeping these in the header
so push them down into the associated cxl-component-utils.c file.
Suggested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Jonathan Cameron
---
include/hw/cxl/cxl_component.h | 18 ++
As an encoded version of these key configuration parameters is available
in a register, provide functions to extract it again so as to avoid
the need for duplicating the storage.
Whilst here update the _enc() function to include additional values
as defined in the CXL 3.0 specification. Whilst the
In order to avoid having the size of the per HDM decoder register block
repeated in lots of places, create the register definitions for HDM
decoder 1 and use the offset between the first registers in HDM decoder 0 and
HDM decoder 1 to establish the offset.
Calculate in each function as this is mor
11.09.2023 14:36, marcandre.lur...@redhat.com:
From: Marc-André Lureau
Replace select() with poll() to fix a crash when QEMU has a large number
of FDs.
Fixes:
https://bugzilla.redhat.com/show_bug.cgi?id=2020133
Signed-off-by: Marc-André Lureau
---
backends/tpm/tpm_util.c | 12 +++-
Support these decoders in CXL host bridges (pxb-cxl), CXL Switch USP
and CXL Type 3 end points.
Signed-off-by: Jonathan Cameron
---
v3: Factor out the hdm_inc changes to previous patch.
Fix use of encoded hdm count as if it were decoded in cxl-host.
Minor refactoring to make that path an
Or instead of using linker behavior, maybe just change the #ifdef so it
only applies when KVM is disabled. I didn't look at the code to see if this
is possible, but it would be nice to avoid the very specific #ifdef
condition in this patch.
Stefan
On Mon, Sep 11, 2023, 07:15 Stefan Hajnoczi wrot
11.09.2023 14:56, Stefan Hajnoczi:
Or instead of using linker behavior, maybe just change the #ifdef so it only applies when KVM is disabled. I didn't look at the code to see if this is
possible, but it would be nice to avoid the very specific #ifdef condition in this patch.
Yeah, this is defin
Am 11.09.2023 um 12:22 hat Philippe Mathieu-Daudé geschrieben:
> On 11/9/23 12:10, Philippe Mathieu-Daudé wrote:
> > On 8/9/23 17:47, Stefan Hajnoczi wrote:
> > > I wonder how it passed CI?
> > > https://gitlab.com/qemu-project/qemu/-/pipelines/996175923/
> >
> > The conditions are:
> > - x86 host
On Mon, 11 Sept 2023 at 12:28, Alex Bennée wrote:
>
>
> Станислав Юдин writes:
>
> > Hello,
> >
> > I've just got this message, when I dubugging my code:
> >
> > Disassembler disagrees with translator over instruction decoding
> > Please report this to qemu-devel@nongnu.org
> >
> > *
> >
> > Bina
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The LBUS device is embeded inside the scratchpad. The scratchpad
provides a non-functional registers. There is a 1-1 relation between
scratchpad and LBUS devices. Each LBUS devi
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The Common FRU Access Macro (CFAM), an address space containing
various "engines" that drive accesses on busses internal and external
to the POWER chip. Examples include the SBE
On 9/11/23 06:04, Andrew Jones wrote:
On Mon, Sep 11, 2023 at 09:49:06AM +0200, Andrew Jones wrote:
On Wed, Sep 06, 2023 at 12:23:19PM +0200, Philippe Mathieu-Daudé wrote:
On 6/9/23 11:16, Daniel Henrique Barboza wrote:
This file is not needed for some time now. All the stubs implemented in
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
This commit models the FSI bus. CFAM is hanging out of FSI bus. The bus
is model such a way that it is embeded inside the FSI master which is a
bus controller.
The FSI master:
在 2023/9/10 上午9:44, Richard Henderson 写道:
On 9/7/23 01:31, Song Gao wrote:
--- a/target/loongarch/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/insn_trans/trans_vec.c.inc
@@ -208,6 +208,16 @@ static bool gvec_vvv(DisasContext *ctx, arg_vvv
*a, MemOp mop,
return gvec_vvv_vl(ctx, a, 16
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in
POWER processors. This now makes an appearance in the ASPEED SoC due
to tight integration of the FSI master
Am 11.09.2023 um 13:15 hat Stefan Hajnoczi geschrieben:
> On Mon, 11 Sept 2023 at 06:39, Philippe Mathieu-Daudé
> wrote:
> >
> > Since commits 3adce820cf..ef1cf6890f, When building on
> > a x86 host configured as:
> >
> > $ ./configure --cc=clang \
> > --target-list=x86_64-linux-user,x86_64
On 9/9/23 00:28, Ninad Palsule wrote:
Added maintainer for IBM FSI model
Signed-off-by: Ninad Palsule
---
V4:
- Added separate commit for MAINTAINER change.
---
MAINTAINERS | 22 ++
1 file changed, 22 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 6111b6b4
在 2023/9/7 下午8:12, gaosong 写道:
在 2023/9/7 下午3:39, gaosong 写道:
Hi, Richard
在 2023/8/31 上午11:09, Richard Henderson 写道:
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-runtime.h | 25 ++
include/tcg/tcg-op-gvec-common.h | 6 ++
accel/tcg/tcg-runtime-gvec.c | 26 ++
On Mon, 2023-09-11 at 07:06 -0400, Stefan Hajnoczi wrote:
> On Mon, 11 Sept 2023 at 06:10, Philippe Mathieu-Daudé
> wrote:
> >
> > On 8/9/23 17:47, Stefan Hajnoczi wrote:
> > > I wonder how it passed CI?
> > > https://gitlab.com/qemu-project/qemu/-/pipelines/996175923/
> >
> > The conditions are
On 9/9/23 00:28, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
An APB-to-OPB bridge enabling access to the OPB from the ARM core in
the AST2600. Hardware limitations prevent the OPB from being directly
mapped into APB, so all accesses are i
On 9/9/23 00:28, Ninad Palsule wrote:
This patchset introduces IBM's Flexible Service Interface(FSI).
Time for some fun with inter-processor buses. FSI allows a service
processor access to the internal buses of a host POWER processor to
perform configuration or debugging.
FSI has long existed i
On 9/11/23 07:36, marcandre.lur...@redhat.com wrote:
From: Marc-Andr Lureau
Replace select() with poll() to fix a crash when QEMU has a large number
of FDs.
Fixes:
https://bugzilla.redhat.com/show_bug.cgi?id=2020133
The description there seems wrong. It's a limit of the POSIX API not the
On 9/11/23 05:54, Michael Tokarev wrote:
Stefan, can you take a quick look please?
https://patchew.org/QEMU/20230909131258.354675-1-...@tls.msk.ru/20230909131258.354675-7-...@tls.msk.ru/
I lost subscription to the mailing list for some reason and missed the
patch, looks good, though.
On 9/11/23 10:53, Gerd Hoffmann wrote:
> On Mon, Sep 11, 2023 at 12:12:43PM +0400, Marc-André Lureau wrote:
>>> Gerd, here's the question for you: why are "device" and "head" QOM
>>> properties in the first place? What are they needed for?
>>>
>>
>> You get QOM tree introspection (ex: (qemu) qom-g
Since commits 3adce820cf..ef1cf6890f, When building on
a x86 host configured as:
$ ./configure --cc=clang \
--target-list=x86_64-linux-user,x86_64-softmmu \
--enable-debug
we get:
[71/71] Linking target qemu-x86_64
FAILED: qemu-x86_64
/usr/bin/ld: libqemu-x86_64-linux-user.fa.p/t
On 11/9/23 14:32, Kevin Wolf wrote:
Am 11.09.2023 um 13:15 hat Stefan Hajnoczi geschrieben:
On Mon, 11 Sept 2023 at 06:39, Philippe Mathieu-Daudé wrote:
Since commits 3adce820cf..ef1cf6890f, When building on
a x86 host configured as:
$ ./configure --cc=clang \
--target-list=x86_64-li
From: Marc-André Lureau
Replace select() with poll() to fix a crash when QEMU has a large number
of FDs.
Fixes:
https://bugzilla.redhat.com/show_bug.cgi?id=2020133
Signed-off-by: Marc-André Lureau
Reviewed-by: Michael Tokarev
Reviewed-by: Stefan Berger
---
backends/tpm/tpm_util.c | 11 ++---
Alistair, Phil,
On 9/1/23 16:46, Daniel Henrique Barboza wrote:
Future patches will split the existing Property arrays even further, and
the existing code in riscv_cpu_add_user_properties() will start to scale
bad with it because it's dealing with KVM constraints mixed in with TCG
constraints.
On Mon, Sep 11, 2023 at 12:07:52AM +0300, Michael Tokarev wrote:
> 09.09.2023 16:04, Michael Tokarev wrote:
> > From: Niklas Cassel
> >
> > For NCQ, PxCI is cleared on command queued successfully.
> > For non-NCQ, PxCI is cleared on command completed successfully.
> > Successfully means ERR_STAT,
11.09.2023 15:32, Kevin Wolf wrote:
..
The approach with static inline functions defined only for a very
specific configuration looks a lot more fragile to me. In fact, I'm
surprised that it works because I think it requires that the header
isn't used in any files that are shared between user sp
Hi Stefan,
On 9/8/23 08:06, Stefan Hajnoczi wrote:
Hi Alistair,
Please take a look at the following CI failure:
https://gitlab.com/qemu-project/qemu/-/jobs/5045998521
/usr/bin/ld: libqemu-riscv64-softmmu.fa.p/target_riscv_cpu.c.o: in
function `riscv_cpu_add_kvm_properties':
/home/gitlab-runner
FEAT_HBC (Hinted conditional branches) provides a new instruction
BC.cond, which behaves exactly like the existing B.cond except
that it provides a hint to the branch predictor about the
likely behaviour of the branch.
Since QEMU does not implement branch prediction, we can treat
this identically
This patchset started off as "implement FEAT_HBC" but I ended
up finding I needed to do a bit of cleanup regarding the elf
hwcaps bits, so most of the patchset is that cleanup and the
FEAT_HBC is the simple patch at the end.
Patch 1 is the ID_AA64ISAR2_EL1 that's been on the list multiple
times al
Some of the names we use for CPU features in linux-user's dummy
/proc/cpuinfo don't match the strings in the real kernel in
arch/arm64/kernel/cpuinfo.c. Specifically, the SME related
features have an underscore in the HWCAP_FOO define name,
but (like the SVE ones) they do not have an underscore in
Update our AArch64 ID register field definitions from the 2023-06
system register XML release:
https://developer.arm.com/documentation/ddi0601/2023-06/
Signed-off-by: Peter Maydell
---
This is intended to allow updating the set of ID register
fields we expose for user-only mode, so I have only
u
Add the code to report the arm32 hwcaps we were previously missing:
ss, ssbs, fphp, asimdhp, asimddp, asimdfhm, asimdbf16, i8mm
Signed-off-by: Peter Maydell
---
linux-user/elfload.c | 12
1 file changed, 12 insertions(+)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
ind
From: Aaron Lindsay
Signed-off-by: Aaron Lindsay
[PMM: drop the HVF part of the patch and just comment that
we need to do something when the register appears in that API]
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 1 +
target/arm/helper.c | 4 ++--
target/arm/hvf/hvf.c | 1 +
ta
Our lists of Arm 32 and 64 bit hwcap values have lagged behind
the Linux kernel. Update them to include all the bits defined
as of upstream Linux git commit a48fa7efaf1161c1 (in the middle
of the kernel 6.6 dev cycle).
For 64-bit, we don't yet implement any of the features reported via
these hwcap
For user-only mode we reveal a subset of the AArch64 ID registers
to the guest, to emulate the kernel's trap-and-emulate-ID-regs
handling. Update the feature bit masks to match upstream kernel
commit a48fa7efaf1161c1c.
None of these features are yet implemented by QEMU, so this
doesn't yet have a
From: Marc-André Lureau
Thread 1 "qemu-system-x86" received signal SIGSEGV, Segmentation fault.
0x55888630 in dpy_ui_info_supported (con=0x0) at ../ui/console.c:812
812 return con->hw_ops->ui_info != NULL;
(gdb) bt
#0 0x55888630 in dpy_ui_info_supported (con=0x0) at ../ui
On Mon, 11 Sept 2023 at 09:38, Daniel Henrique Barboza
wrote:
>
> Hi Stefan,
>
> On 9/8/23 08:06, Stefan Hajnoczi wrote:
> > Hi Alistair,
> > Please take a look at the following CI failure:
> >
> > https://gitlab.com/qemu-project/qemu/-/jobs/5045998521
> >
> > /usr/bin/ld: libqemu-riscv64-softmmu.
On Sat, 9 Sept 2023 at 17:38, Richard Henderson
wrote:
>
> On 9/7/23 09:03, Peter Maydell wrote:
> > The FEAT_MOPS SETG* instructions are very similar to the SET*
> > instructions, but as well as setting memory contents they also
> > set the MTE tags. They are architecturally required to operate
>
On 11/9/23 12:11, Philippe Mathieu-Daudé wrote:
On 8/9/23 21:21, Paolo Bonzini wrote:
On Fri, Sep 8, 2023 at 7:28 PM Kevin Wolf wrote:
Maybe the calls aren't eliminated because --enable-debug implies -O0?
My experience is that it will still fold simple dead code like "0 &&
foo()" or even "if
Since commits 3adce820cf ("target/i386: Remove unused KVM
stubs") and ef1cf6890f ("target/i386: Allow elision of
kvm_hv_vpindex_settable()"), when building on a x86 host
configured as:
$ ./configure --cc=clang \
--target-list=x86_64-linux-user,x86_64-softmmu \
--enable-debug
we get:
On Mon, 11 Sept 2023 at 14:53, Peter Maydell wrote:
>
> Update our AArch64 ID register field definitions from the 2023-06
> system register XML release:
> https://developer.arm.com/documentation/ddi0601/2023-06/
>
> Signed-off-by: Peter Maydell
> ---
> This is intended to allow updating the set
Reviewed-by: Michael Tokarev
Thank you for patience!
11.09.2023 17:27, Philippe Mathieu-Daudé:
Since commits 3adce820cf ("target/i386: Remove unused KVM
stubs") and ef1cf6890f ("target/i386: Allow elision of
kvm_hv_vpindex_settable()"), when building on a x86 host
...
On Mon, Sep 11, 2023 at 4:08 PM wrote:
> From: Marc-André Lureau
>
> Thread 1 "qemu-system-x86" received signal SIGSEGV, Segmentation fault.
> 0x55888630 in dpy_ui_info_supported (con=0x0) at
> ../ui/console.c:812
> 812 return con->hw_ops->ui_info != NULL;
> (gdb) bt
> #0 0x
On Thu, Aug 24, 2023 at 10:57:50AM +0200, Gerd Hoffmann wrote:
> v4 changes:
> - fix handling of 32bit memory bars.
> v3 changes:
> - rename variables, use u8 for CPULongMode.
> v2 changes:
> - e820 conflict fix
>
> Gerd Hoffmann (6):
> better kvm detection
> detect physical address space s
On 8/9/23 22:07, BALATON Zoltan wrote:
On Fri, 8 Sep 2023, Michael Tokarev wrote:
08.09.2023 22:21, BALATON Zoltan:
I was about to ask, since when but probably nobody knows then. AFAIR
I had no such errors for the canyonlands one when I've added it but
that was quite some years ago and things
On Sun, Sep 10, 2023 at 11:40:25AM +0300, Michael Tokarev wrote:
> 25.08.2023 23:08, Denis V. Lunev wrote:
> > +/* Remember parent's stderr if we will be restoring it. */
> > +if (verbose /* fork_process is set */) {
> > +opts.stderr = dup(STDERR_FILENO);
> >
On 11/9/23 15:53, Peter Maydell wrote:
Some of the names we use for CPU features in linux-user's dummy
/proc/cpuinfo don't match the strings in the real kernel in
arch/arm64/kernel/cpuinfo.c. Specifically, the SME related
features have an underscore in the HWCAP_FOO define name,
but (like the SVE
On 11/9/23 15:53, Peter Maydell wrote:
Our lists of Arm 32 and 64 bit hwcap values have lagged behind
the Linux kernel. Update them to include all the bits defined
as of upstream Linux git commit a48fa7efaf1161c1 (in the middle
of the kernel 6.6 dev cycle).
For 64-bit, we don't yet implement any
On 11/9/23 15:53, Peter Maydell wrote:
FEAT_HBC (Hinted conditional branches) provides a new instruction
BC.cond, which behaves exactly like the existing B.cond except
that it provides a hint to the branch predictor about the
likely behaviour of the branch.
Since QEMU does not implement branch p
On Mon, Sep 11, 2023 at 4:42 PM Albert Esteve wrote:
>
>
> On Mon, Sep 11, 2023 at 4:08 PM wrote:
>
>> From: Marc-André Lureau
>>
>> Thread 1 "qemu-system-x86" received signal SIGSEGV, Segmentation fault.
>> 0x55888630 in dpy_ui_info_supported (con=0x0) at
>> ../ui/console.c:812
>> 812
On Mon, 11 Sept 2023 at 15:59, Philippe Mathieu-Daudé wrote:
>
> On 11/9/23 15:53, Peter Maydell wrote:
> > Our lists of Arm 32 and 64 bit hwcap values have lagged behind
> > the Linux kernel. Update them to include all the bits defined
> > as of upstream Linux git commit a48fa7efaf1161c1 (in the
On 11/9/23 15:15, Philippe Mathieu-Daudé wrote:
Since commits 3adce820cf..ef1cf6890f, When building on
a x86 host configured as:
$ ./configure --cc=clang \
--target-list=x86_64-linux-user,x86_64-softmmu \
--enable-debug
we get:
[71/71] Linking target qemu-x86_64
FAILED: qemu
On Fri, 8 Sept 2023 at 21:08, BALATON Zoltan wrote:
>
> On Fri, 8 Sep 2023, Michael Tokarev wrote:
> > 08.09.2023 22:21, BALATON Zoltan:
> >> I was about to ask, since when but probably nobody knows then. AFAIR I had
> >> no such errors for the canyonlands one when I've added it but that was
> >>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any
user-visible changes.
signature.asc
Description: PGP signature
On Sat, 9 Sept 2023 at 14:17, Michael Tokarev wrote:
>
> Signed-off-by: Michael Tokarev
> ---
> host/include/i386/host/cpuinfo.h | 2 +-
> hw/i386/acpi-build.c | 4 ++--
> hw/i386/amd_iommu.c | 4 ++--
> hw/i386/intel_iommu.c| 4 ++--
> hw/i386/kvm/xen_xensto
On Sat, 9 Sept 2023 at 14:16, Michael Tokarev wrote:
>
> Signed-off-by: Michael Tokarev
> diff --git a/hw/misc/trace-events b/hw/misc/trace-events
> index e8b2be14c0..bc87cd3670 100644
> --- a/hw/misc/trace-events
> +++ b/hw/misc/trace-events
> @@ -155,7 +155,7 @@ stm32f4xx_syscfg_read(uint64_t
On Sat, 9 Sept 2023 at 14:18, Michael Tokarev wrote:
>
> Signed-off-by: Michael Tokarev
> @@ -503,7 +503,7 @@ static void designware_pcie_root_realize(PCIDevice *dev,
> Error **errp)
>&designware_pci_host_msi_ops,
>root, "pcie-msi", 0x4);
On Sat, 9 Sept 2023 at 14:15, Michael Tokarev wrote:
>
> Signed-off-by: Michael Tokarev
> ---
Reviewed-by: Peter Maydell
PS: for a v2 patchset each patch email ought to have the
"PATCH v2" tag, not just the cover letter.
thanks
-- PMM
On Fri, 8 Sept 2023 at 15:37, Kevin Wolf wrote:
>
> Instead of exposing the ugly hack of how we represent arrays in qdev (a
> static "foo-len" property and after it is set, dynamically created
> "foo[i]" properties) to boards, add an interface that allows setting the
> whole array at once.
>
> Onc
On Fri, 8 Sept 2023 at 15:37, Kevin Wolf wrote:
>
> Instead of manually setting "foo-len" and "foo[i]" properties, build a
> QList and use the new qdev_prop_set_array() helper to set the whole
> array property with a single call.
>
> Signed-off-by: Kevin Wolf
> ---
> hw/i386/pc.c | 8 +---
>
On Fri, 8 Sept 2023 at 15:37, Kevin Wolf wrote:
>
> Instead of manually setting "foo-len" and "foo[i]" properties, build a
> QList and use the new qdev_prop_set_array() helper to set the whole
> array property with a single call.
>
> Signed-off-by: Kevin Wolf
> ---
Reviewed-by: Peter Maydell
t
On Fri, 8 Sept 2023 at 15:37, Kevin Wolf wrote:
>
> Instead of manually setting "foo-len" and "foo[i]" properties, build a
> QList and use the new qdev_prop_set_array() helper to set the whole
> array property with a single call.
>
> Signed-off-by: Kevin Wolf
> ---
> hw/arm/mps2.c | 12 -
On Fri, 8 Sept 2023 at 15:37, Kevin Wolf wrote:
>
> Instead of manually setting "foo-len" and "foo[i]" properties, build a
> QList and use the new qdev_prop_set_array() helper to set the whole
> array property with a single call.
>
> Signed-off-by: Kevin Wolf
> ---
Reviewed-by: Peter Maydell
t
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