From: Max Chou
This commit adds support for the Zvksed vector-crypto extension, which
consists of the following instructions:
* vsm4k.vi
* vsm4r.[vv,vs]
Translation functions are defined in
`target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in
`target/riscv/vcrypto_helper.c`.
S
From: Daniel Henrique Barboza
The code inside riscv_cpu_add_user_properties() became quite repetitive
after recent changes. Add a helper to hide the repetition away.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Da
From: Akihiko Odaki
riscv_trigger_init() had been called on reset events that can happen
several times for a CPU and it allocated timers for itrigger. If old
timers were present, they were simply overwritten by the new timers,
resulting in a memory leak.
Divide riscv_trigger_init() into two func
From: Daniel Henrique Barboza
The 'max' CPU type is used by tooling to determine what's the most
capable CPU a current QEMU version implements. Other archs such as ARM
implements this type. Let's add it to RISC-V.
What we consider "most capable CPU" in this context are related to
ratified, non-v
From: Nazar Kazakov
This commit adds support for the Zvkned vector-crypto extension, which
consists of the following instructions:
* vaesef.[vv,vs]
* vaesdf.[vv,vs]
* vaesdm.[vv,vs]
* vaesz.vs
* vaesem.[vv,vs]
* vaeskf1.vi
* vaeskf2.vi
Translation functions are defined in
`target/riscv/insn_tra
From: LIU Zhiwei
We should not use types dependend on host arch for target_ucontext.
This bug is found when run rv32 applications.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20230811055438.194
On 9/1/23 11:41, Cédric Le Goater wrote:
The following changes since commit 17780edd81d27fcfdb7a802efc870a99788bd2fc:
Merge tag 'quick-fix-pull-request' of https://gitlab.com/bsdimp/qemu into
staging (2023-08-31 10:06:29 -0400)
are available in the Git repository at:
https://github.com/
From: Joao Martins
QEMU computes the DMA logging ranges for two predefined ranges: 32-bit
and 64-bit. In the OVMF case, when the dynamic MMIO window is enabled,
QEMU includes in the 64-bit range the RAM regions at the lower part
and vfio-pci device RAM regions which are at the top of the address
On 7/9/23 22:34, Michael Tokarev wrote:
From: Peter Maydell
Clarify somewhat misleading code comments.
Signed-off-by: Michael Tokarev
---
hw/display/xlnx_dp.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 8/9/23 04:21, Jiajie Chen wrote:
Pass vece to tcg_target_const_match() to allow correct interpretation of
const args of vector ops.
Signed-off-by: Jiajie Chen
Reviewed-by: Richard Henderson
---
tcg/aarch64/tcg-target.c.inc | 2 +-
tcg/arm/tcg-target.c.inc | 2 +-
tcg/i386/tc
On 7/9/23 20:17, Victor Toso wrote:
Hi,
File "/home/berrange/src/virt/qemu/scripts/qapi/dumpexamples.py", line 118,
in parse_examples_of
assert((obj.doc is not None))
^^^
AssertionError
ninja: build stopped: subcommand failed.
not sure if that's related t
08.09.2023 10:09, Cédric Le Goater wrote:
..
Hang Yu (3):
hw/i2c/aspeed: Fix Tx count and Rx size error in buffer pool mode
hw/i2c/aspeed: Fix TXBUF transmission start position error
Michael,
I think the two above are candidates for stable.
Got it. I've noticed these two in ma
On 7/9/23 20:16, Michael Tokarev wrote:
07.09.2023 19:54, John Snow wrote:
..
>
>
> Niklas Cassel (7):
> hw/ide/core: set ERR_STAT in unsupported command completion
> hw/ide/ahci: write D2H FIS when p
On 8/9/23 01:49, Gavin Shan wrote:
On 9/7/23 19:05, Philippe Mathieu-Daudé wrote:
On 7/9/23 02:35, Gavin Shan wrote:
The names of supported CPU models instead of CPU types should be
printed when the user specified CPU type isn't supported, to be
consistent with the output from '-cpu ?'.
Correc
It is forbidden to block on the event loop during a coroutine, as that
can cause deadlocks due to recursive locking.
Signed-off-by: Paolo Bonzini
---
include/block/aio.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/block/aio.h b/include/block/aio.h
index 32042e8905
On 8/9/23 01:44, Gavin Shan wrote:
On 9/7/23 18:20, David Hildenbrand wrote:
On 07.09.23 02:35, Gavin Shan wrote:
For target/s390x, the CPU type name is always the combination of the
CPU modle name and suffix. The CPU model names have been correctly
shown in s390_print_cpu_model_list_entry() a
08.09.2023 10:53, Philippe Mathieu-Daudé wrote:
On 7/9/23 20:16, Michael Tokarev wrote:
07.09.2023 19:54, John Snow wrote:
..
>
>
> Niklas Cassel (7):
> hw/ide/core: set ERR_STAT in unsupported command compl
On Thu, Aug 24, 2023 at 11:42:08AM +0200, Thomas Huth wrote:
> Commit 0db0fbb5cf ("Add conditional dependency for libkeyutils")
> tried to provide a possibility for the user to disable keyutils
> if not required by makeing it depend on the keyring feature. This
> looked reasonable at a first glance
On Thu, Sep 07, 2023 at 08:34:07PM +0200, Victor Toso wrote:
> Hi,
>
> On Wed, Sep 06, 2023 at 10:15:52AM +0100, Daniel P. Berrangé wrote:
> > On Tue, Sep 05, 2023 at 09:48:40PM +0200, Victor Toso wrote:
> > > This generator has two goals:
> > > 1. Mechanical validation of QAPI examples
> > > 2.
On Fri, Sep 08, 2023 at 09:51:35AM +0200, Philippe Mathieu-Daudé wrote:
> On 7/9/23 20:17, Victor Toso wrote:
> > Hi,
>
> > >File "/home/berrange/src/virt/qemu/scripts/qapi/dumpexamples.py", line
> > > 118, in parse_examples_of
> > > assert((obj.doc is not None))
> > > ^
On 08/09/2023 08:14, Cédric Le Goater wrote:
> From: Joao Martins
>
> QEMU computes the DMA logging ranges for two predefined ranges: 32-bit
> and 64-bit. In the OVMF case, when the dynamic MMIO window is enabled,
> QEMU includes in the 64-bit range the RAM regions at the lower part
> and vfio
On 9/8/23 09:52, Michael Tokarev wrote:
08.09.2023 10:09, Cédric Le Goater wrote:
..
Hang Yu (3):
hw/i2c/aspeed: Fix Tx count and Rx size error in buffer pool mode
hw/i2c/aspeed: Fix TXBUF transmission start position error
Michael,
I think the two above are candidates for stable
08.09.2023 11:06, Michael Tokarev wrote:
..
This smells a bit extreme, esp. for the "simplify and document PxCI handling"
part which is one of the largest patches in whole -stable history.
or maybe it's just the excellent commit comment ;)
/mjt
On 9/8/23 10:16, Joao Martins wrote:
On 08/09/2023 08:14, Cédric Le Goater wrote:
From: Joao Martins
QEMU computes the DMA logging ranges for two predefined ranges: 32-bit
and 64-bit. In the OVMF case, when the dynamic MMIO window is enabled,
QEMU includes in the 64-bit range the RAM regions
On 08/09/2023 09:28, Cédric Le Goater wrote:
> On 9/8/23 10:16, Joao Martins wrote:
>> On 08/09/2023 08:14, Cédric Le Goater wrote:
>>> From: Joao Martins
>>>
>>> QEMU computes the DMA logging ranges for two predefined ranges: 32-bit
>>> and 64-bit. In the OVMF case, when the dynamic MMIO window i
Current checks on writing pmpcfg for Smepmp follows Smepmp version
0.9.1. However, Smepmp specification has already been ratified, and
there are some differences between version 0.9.1 and 1.0. In this commit
we update the checks of writing pmpcfg to follow Smepmp version 1.0.
When mseccfg.MML is s
On 9/8/23 10:35, Joao Martins wrote:
On 08/09/2023 09:28, Cédric Le Goater wrote:
On 9/8/23 10:16, Joao Martins wrote:
On 08/09/2023 08:14, Cédric Le Goater wrote:
From: Joao Martins
QEMU computes the DMA logging ranges for two predefined ranges: 32-bit
and 64-bit. In the OVMF case, when the
On Thu, Sep 07, 2023 at 10:31:20PM +0300, Michael Tokarev wrote:
> 31.08.2023 22:00, Colton Lewis wrote:
> > Due to recent KVM changes, QEMU is setting a ptimer offset resulting
> > in unintended trap and emulate access and a consequent performance
> > hit. Filter out the PTIMER_CNT register to res
The "hw/boards.h" is unused since the previous commit. Since its removal
requires include fixes in various unrelated files to keep the code compiling it
has been split in a dedicated commit.
Signed-off-by: Bernhard Beschow
Reviewed-by: Philippe Mathieu-Daudé
---
hw/acpi/hmat.h
This series contains changes from my effort to bring the VIA south bridges to
the PC machine [1]. The first part of the series resolves the
AcpiCpuAmlIfClass::madt_cpu virtual method which frees ACPI controllers from
worrying about CPU AML generation. The second part minimizes an Intel-specific
ass
The bit positions of both registers are related. Tracing the registers
independently results in the same offsets across these registers which
eases debugging.
Signed-off-by: Bernhard Beschow
Acked-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
---
hw/acpi/core.c | 10 +++---
h
Now that TYPE_ACPI_GED_X86 doesn't assign AcpiDeviceIfClass::madt_cpu any more
it is the same as TYPE_ACPI_GED.
Signed-off-by: Bernhard Beschow
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/acpi/generic_event_device.h | 2 --
hw/i386/generic_event_device_x86.c | 27 ---
This is x86-specific code, so there is no advantage in using
pc_madt_cpu_entry() behind an architecture-agnostic interface.
Signed-off-by: Bernhard Beschow
Reviewed-by: Philippe Mathieu-Daudé
---
hw/i386/acpi-common.h | 3 +--
hw/i386/acpi-build.c | 3 +--
hw/i386/acpi-common.c | 5 ++---
h
The SMI command port is currently hardcoded by means of the ACPI_PORT_SMI_CMD
macro. This hardcoding is Intel specific and doesn't match VIA, for example.
There is already the AcpiFadtData::smi_cmd attribute which is used when building
the FADT. Let's also use it when building the DSDT which confin
Signed-off-by: Bernhard Beschow
Reviewed-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
---
hw/acpi/core.c | 5 +
hw/acpi/piix4.c | 3 ---
hw/acpi/trace-events | 8
3 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
inde
This virtual method was always set to the x86-specific pc_madt_cpu_entry(),
even in piix4 which is also used in MIPS. The previous changes use
pc_madt_cpu_entry() otherwise, so madt_cpu can be dropped.
Since pc_madt_cpu_entry() is now only used in x86-specific code, the stub
in hw/acpi/acpi-x86-st
build_cpus_aml() is architecture independent but needs to create architecture-
specific CPU AML. So far this was achieved by using a virtual method from
TYPE_ACPI_DEVICE_IF. However, build_cpus_aml() would resolve this interface from
global (!) state. This makes it quite incomprehensible where this
Am 07.09.2023 um 20:42 hat Stefan Hajnoczi geschrieben:
> On Tue, Sep 05, 2023 at 04:50:00PM +0200, Kevin Wolf wrote:
> > This fixes a recently introduced assertion failure that was reported to
> > happen when migrating virtio-net with a failover. The latent bug that
> > we're executing code in cor
Am 07.09.2023 um 20:40 hat Stefan Hajnoczi geschrieben:
> On Tue, Sep 05, 2023 at 04:50:02PM +0200, Kevin Wolf wrote:
> > virtio_load() as a whole should run in coroutine context because it
> > reads from the migration stream and we don't want this to block.
>
> Is that "should" a "must" or a "can
Am 07.09.2023 um 11:35 hat Peter Maydell geschrieben:
> On Thu, 7 Sept 2023 at 10:33, Markus Armbruster wrote:
> >
> > Kevin Wolf writes:
> >
> > > Am 04.09.2023 um 18:25 hat Daniel P. Berrangé geschrieben:
> > >> By the time of the 8.2.0 release, it will have been 2 years and 6
> > >> releases s
On Fri, Sep 08, 2023 at 11:25:54AM +0200, Kevin Wolf wrote:
> Am 07.09.2023 um 11:35 hat Peter Maydell geschrieben:
> > On Thu, 7 Sept 2023 at 10:33, Markus Armbruster wrote:
> > >
> > > Kevin Wolf writes:
> > >
> > > > Am 04.09.2023 um 18:25 hat Daniel P. Berrangé geschrieben:
> > > >> By the ti
QEMU computes the DMA logging ranges for two predefined ranges: 32-bit
and 64-bit. In the OVMF case, when the dynamic MMIO window is enabled,
QEMU includes in the 64-bit range the RAM regions at the lower part
and vfio-pci device RAM regions which are at the top of the address
space. This range con
The DEFINE_PROP_ARRAY macro is a clever trick for defining array
properties. It initially creates a property "len-$FOO". When that
property is set, then it creates a sequence "$FOO[NN]" for NN
in the range 0 to "len-$FOO".
The intended usage for this was to simplify code for internal
devices, howe
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 5fce74aac5..4d42d3ed4c 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -604,6 +604,10 @@ static void kvm_mce_inject(X86CPU *cpu, hwaddr
paddr, int code)
mcg_status |= MCG_STATUS_RIPV;
}
On 8/9/23 08:54, Mark Cave-Ayland wrote:
On 07/07/2023 09:29, Philippe Mathieu-Daudé wrote:
On 2/7/23 17:48, Mark Cave-Ayland wrote:
This determines whether the Apple Sound Chip (ASC) is set to enhanced
mode
(default) or to original mode. The real Q800 hardware used an EASC
chip however
a lo
On Thu, 7 Sept 2023 at 21:35, Michael Tokarev wrote:
>
> From: Peter Maydell
>
> Clarify somewhat misleading code comments.
>
> Signed-off-by: Michael Tokarev
> ---
> hw/display/xlnx_dp.c | 11 +++
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> Peter, this is the result of your s
On Thu, 7 Sept 2023 at 20:31, Michael Tokarev wrote:
>
> 31.08.2023 22:00, Colton Lewis wrote:
> > Due to recent KVM changes, QEMU is setting a ptimer offset resulting
> > in unintended trap and emulate access and a consequent performance
> > hit. Filter out the PTIMER_CNT register to restore trap
Depending on the number of available address bits of the current processor, a
VM can only use a certain maximum amount of memory and no more. This change
makes sure that a VM is not configured to have more memory than what it can use
with the current processor settings when started. Additionally, t
On Fri, 8 Sept 2023 at 10:26, Kevin Wolf wrote:
>
> Am 07.09.2023 um 11:35 hat Peter Maydell geschrieben:
> > On Thu, 7 Sept 2023 at 10:33, Markus Armbruster wrote:
> > >
> > > Kevin Wolf writes:
> > >
> > > > Am 04.09.2023 um 18:25 hat Daniel P. Berrangé geschrieben:
> > > >> By the time of the
The following changes since commit 03a3a62fbd0aa5227e978eef3c67d3978aec9e5f:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2023-09-07 10:29:06 -0400)
are available in the Git repository at:
https://gitlab.com/mjt0k/qemu.git tags/pull-trivial-patches
for you to f
From: Thomas Huth
The file has been converted to .rst a while ago - make sure that the
references in the trace-events files are pointing to the right location
now.
Signed-off-by: Thomas Huth
Signed-off-by: Michael Tokarev
---
bsd-user/trace-events | 2 +-
ebpf/trace-events
Signed-off-by: Michael Tokarev
Acked-by: Alistair Francis
---
hw/riscv/microchip_pfsoc.c| 2 +-
hw/riscv/virt.c | 4 ++--
include/hw/riscv/riscv_hart.h | 2 +-
target/riscv/cpu.h| 2 +-
target/riscv/cpu_bits.h
I'm getting io-qcow2-244 test failure on mips*
due to output mismatch:
Take an internal snapshot:
-qemu-img: Could not create snapshot 'test': -95 (Operation not supported)
+qemu-img: Could not create snapshot 'test': -122 (Operation not supported)
No errors were found on the image.
This is
Signed-off-by: Michael Tokarev
Reviewed-by: Eric Blake
---
qga/channel-posix.c | 2 +-
qga/commands-posix-ssh.c | 2 +-
qga/commands-posix.c | 2 +-
qga/commands-win32.c | 4 ++--
qga/main.c| 2 +-
qga/vss-win32/install.cpp | 4 ++--
6 files changed, 8 insertions
Signed-off-by: Michael Tokarev
Reviewed-by: Philippe Mathieu-Daudé
---
audio/mixeng.h| 2 +-
hw/audio/fmopl.c | 8
hw/audio/fmopl.h | 2 +-
hw/audio/gusemu_hal.c | 4 ++--
hw/audio/intel-hda-defs.h | 4 ++--
5 files changed, 10 insertions(+), 10 deletio
Signed-off-by: Michael Tokarev
Reviewed-by: Eric Blake
---
backends/tpm/tpm_ioctl.h | 2 +-
chardev/char-socket.c| 6 +++---
chardev/char.c | 2 +-
crypto/afalg.c | 2 +-
crypto/block-luks.c | 6 +++---
crypto/der.c | 2 +-
crypto/der.h | 6 ++
Signed-off-by: Michael Tokarev
Reviewed-by: Alex Bennée
---
include/block/block_int-common.h | 2 +-
include/chardev/char-fe.h| 4 ++--
include/crypto/akcipher.h| 2 +-
include/crypto/ivgen.h | 4 ++--
include/hw/acpi/aml-build.h | 2 +-
include/hw/acpi/pc-hotplug.
From: Philippe Mathieu-Daudé
Missed while reviewing commit dfd1b81274
("accel/tcg: Introduce translator_io_start").
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Michael Tokarev
---
include/exec/translator.h | 2 +-
1 file changed, 1 insertion(+), 1 dele
Signed-off-by: Michael Tokarev
Reviewed-by: Eric Blake
---
block.c | 2 +-
block/block-copy.c | 4 ++--
block/export/vduse-blk.c | 2 +-
block/export/vhost-user-blk-server.c | 2 +-
block/export/vhost-user-blk-server.h | 2 +-
block/file
Signed-off-by: Michael Tokarev
Reviewed-by: Brian Cain
---
target/hexagon/README | 2 +-
target/hexagon/fma_emu.c| 2 +-
target/hexagon/idef-parser/README.rst | 2 +-
target/hexagon/idef-parser/idef-parser.h| 2 +-
target/hexagon/idef-parse
From: Thomas Huth
TARGET_BIG_ENDIAN is *always* defined, either as 0 for little endian
targets or as 1 for big endian targets. So we can use this as a value
directly in places that need such a 0 or 1 for some reason, instead
of taking a detour through an additional local variable or something
sim
Signed-off-by: Michael Tokarev
Acked-by: David Woodhouse
---
hw/xen/xen_pvdev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/xen/xen_pvdev.c b/hw/xen/xen_pvdev.c
index be1504b82c..c5ad71e8dc 100644
--- a/hw/xen/xen_pvdev.c
+++ b/hw/xen/xen_pvdev.c
@@ -89,7 +89,7 @@ char
From: Peter Maydell
Clarify somewhat misleading code comments.
Signed-off-by: Peter Maydell
Reviewed-by: Michael Tokarev
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Michael Tokarev
---
hw/display/xlnx_dp.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/h
From: Daniel Henrique Barboza
table[i] is allocated in create_new_table() using g_new().
Use g_free(table[i]) instead of free(table[i]) to comply with QEMU low
level memory management guidelines.
Signed-off-by: Daniel Henrique Barboza
Signed-off-by: Michael Tokarev
[Mjt: minor commit comment
with some rewording in
tests/qemu-iotests/298
tests/qtest/fuzz/generic_fuzz.c
tests/unit/test-throttle.c
as suggested by Eric.
Signed-off-by: Michael Tokarev
Reviewed-by: Eric Blake
---
tests/avocado/acpi-bits.py | 4 ++--
tests/avocado/acpi-bits/bits-tests/testacpi.py2
From: Markus Armbruster
The command always fails with "Error: Parameter 'xbzrle_cache_size'
expects a power of two no less than the target page size". The test
passes anyway. Change the argument from 1 to 64k to make the test a
bit more useful.
Signed-off-by: Markus Armbruster
Reviewed-by: Th
From: Daniel Henrique Barboza
tcet->mig_table is copied from tcet->table, which in turn is created
in spapr_tce_alloc_table() using g_new0().
Use g_free() instead of free() to deallocate it.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Peter Maydell
Signed-off-by: Michael Tokarev
[Mjt
From: Marc-André Lureau
If the PCI BAR isn't yet mapped or was unmapped, QXL_IO_SET_MODE will
assert(). Instead, report a guest bug and keep going.
This can be reproduced with:
cat << EOF | ./qemu-system-x86_64 -vga qxl -m 2048 -nodefaults -qtest stdio
outl 0xcf8 0x8000101c
outl 0xcfc 0xc000
ou
Signed-off-by: Michael Tokarev
Reviewed-by: Alex Bennée
---
scripts/checkpatch.pl | 2 +-
scripts/ci/gitlab-pipeline-status | 2 +-
scripts/codeconverter/codeconverter/qom_macros.py | 2 +-
scripts/oss-fuzz/minimize_qtest_trace.py | 8
From: Markus Armbruster
docs/multi-thread-compression.txt uses parameter names with
underscores instead of dashes. Wrong since day one.
docs/rdma.txt, tests/qemu-iotests/181, and tests/qtest/test-hmp.c are
wrong the same way since commit cbde7be900d2 (v6.0.0). Hard to see,
as test-hmp doesn't
From: Thomas Huth
The assert() that checks for valid MTU sizes can be triggered by
the guest (e.g. with the reproducer code from the bug ticket
https://gitlab.com/qemu-project/qemu/-/issues/517 ). Let's avoid
this problem by simply logging the error and refusing to activate
the device instead.
F
On Thu, Aug 24, 2023 at 10:56:05AM +0200, Gerd Hoffmann wrote:
> On Mon, Aug 07, 2023 at 10:51:33AM +, Niklas Cassel via SeaBIOS wrote:
> > Hello Seabios maintainers,
> >
> >
> > I was wondering, is there any chance of getting a new release tag
> > (e.g. rel-1.16.3) anytime soon?
> > Or is th
From: Thomas Huth
The current description says that these options will create a device
on the IDE bus, which is only true on x86. So rephrase these sentences
a little bit to speak of "default bus" instead.
Signed-off-by: Thomas Huth
Reviewed-by: Alex Bennée
Signed-off-by: Michael Tokarev
---
From: Thomas Huth
These tests do nothing additional compared to the other test,
so let's remove the empty functions to avoid wasting some few
precious test cycles here.
Signed-off-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Michael Tokarev
---
tests/qtest/usb-hcd-uhci-
08.09.2023 12:54, Michael Tokarev wrote:
I'm getting io-qcow2-244 test failure on mips*
due to output mismatch:
Take an internal snapshot:
-qemu-img: Could not create snapshot 'test': -95 (Operation not supported)
+qemu-img: Could not create snapshot 'test': -122 (Operation not supported)
On Fri, Sep 01, 2023 at 02:32:26PM +0200, Markus Armbruster wrote:
> When qcrypto_builtin_rsa_public_key_parse() is about to fail, but no
> error has been set, it makes one up. Actually, there's just one way
> to fail without setting an error. Set it there instead.
>
> Same for qcrypto_builtin_r
On Mon, Sep 04, 2023 at 11:41:08AM -0300, Fabiano Rosas wrote:
> All callers of qio_net_listener_set_name() already add some sort of
> "listen" or "listener" suffix.
>
> For intance, we currently have "migration-socket-listener-listen" and
> "vnc-listen-listen" as ioc names.
>
> Signed-off-by: Fa
The following changes since commit 03a3a62fbd0aa5227e978eef3c67d3978aec9e5f:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2023-09-07 10:29:06 -0400)
are available in the Git repository at:
https://gitlab.com/mjt0k/qemu.git tags/pull-trivial-patches
for you to f
On 08/09/2023 07:23, Duan, Zhenzhong wrote:
>
> On 6/23/2023 5:48 AM, Joao Martins wrote:
>> Implement IOMMU MR get_attr() method and use the dma_translation
>> property to report the IOMMU_ATTR_DMA_TRANSLATION attribute.
>> Additionally add the necessary get_iommu_attr into the PCIIOMMUOps to
On Fri, 8 Sept 2023 at 02:43, Alex Bennée wrote:
>
>
> Stefan Hajnoczi writes:
>
> > On Tue, Sep 05, 2023 at 10:34:11AM +0100, Alex Bennée wrote:
> >>
> >> Albert Esteve writes:
> >>
> >> > This looks great! Thanks for this proposal.
> >> >
> >> > On Fri, Sep 1, 2023 at 1:00 PM Alex Bennée
> >
On 08/09/2023 07:11, Duan, Zhenzhong wrote:
> Hi Joao,
>
> On 6/23/2023 5:48 AM, Joao Martins wrote:
>> Currently, device dirty page tracking with vIOMMU is not supported,
>> and a blocker is added and the migration is prevented.
>>
>> When vIOMMU is used, IOVA ranges are DMA mapped/unmapped on th
On 08/09/2023 07:28, Duan, Zhenzhong wrote:
>
> On 6/23/2023 5:48 AM, Joao Martins wrote:
>> Only block the case when the underlying vIOMMU model does not report any
>> address space limits, in addition to DMA translation being off or no
>> vIOMMU present. The limits are needed such that can de
On 08.09.23 11:50, Ani Sinha wrote:
Depending on the number of available address bits of the current processor, a
VM can only use a certain maximum amount of memory and no more. This change
makes sure that a VM is not configured to have more memory than what it can use
with the current processor
Queued, thanks.
Paolo
On Fri, Sep 08, 2023 at 10:59:48AM +0200, Kevin Wolf wrote:
> Am 07.09.2023 um 20:40 hat Stefan Hajnoczi geschrieben:
> > On Tue, Sep 05, 2023 at 04:50:02PM +0200, Kevin Wolf wrote:
> > > virtio_load() as a whole should run in coroutine context because it
> > > reads from the migration stream and w
On Tue, Sep 05, 2023 at 04:50:00PM +0200, Kevin Wolf wrote:
> This fixes a recently introduced assertion failure that was reported to
> happen when migrating virtio-net with a failover. The latent bug that
> we're executing code in coroutine context that was never supposed to run
> there has existe
On 7/9/23 21:36, Philippe Mathieu-Daudé wrote:
On 7/9/23 18:28, Richard Henderson wrote:
On 9/7/23 09:14, Philippe Mathieu-Daudé wrote:
CPUState::halt_cond is an accelerator specific pointer, used
in particular by TCG (which tcg_commit() is about).
The pointer is set by the AccelOpsClass::creat
On Thu, Sep 07, 2023 at 03:41:08PM -0500, Eric Blake wrote:
> On Wed, Aug 30, 2023 at 06:48:02PM -0400, Stefan Hajnoczi wrote:
> > The ongoing QEMU multi-queue block layer effort makes it possible for
> > multiple
> > threads to process I/O in parallel. The nbd block driver is not compatible
> >
On Wed, Aug 30, 2023 at 10:15:43AM -0400, Steven Sistare wrote:
> On 8/30/2023 9:16 AM, Daniel P. Berrangé wrote:
> > On Fri, Jun 30, 2023 at 07:25:07AM -0700, Steve Sistare wrote:
> >> Extend the migration URI to support file:. This can be used for
> >> any migration scenario that does not requir
Please resolve the following CI failure:
https://gitlab.com/qemu-project/qemu/-/jobs/5045998355
ninja: job failed: cc -m64 -mcx16 -Iqemu-nbd.p -I. -I.. -Iqapi -Itrace
-Iui -Iui/shader -I/usr/include/p11-kit-1 -I/usr/include/glib-2.0
-I/usr/lib/glib-2.0/include -fdiagnostics-color=auto -Wall
-Winv
ab.com/bonzini/qemu into staging
> (2023-09-07 10:29:06 -0400)
>
> are available in the Git repository at:
>
> https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20230908
>
> for you to fetch changes up to 69749970db9f1b05c8cd77a7bbb45e4e156f7d33:
>
> targe
Hi Ilya and Jason,
There is a CI failure related to a missing Debian libxdp-dev package:
https://gitlab.com/qemu-project/qemu/-/jobs/5046139967
I think the issue is that the debian-amd64 container image that QEMU
uses for testing is based on Debian 11 ("bullseye" aka "oldstable")
and libxdp is not
Leverage the public CPUClass::cpu_resolving_type field and
call object_class_dynamic_cast() once in cpu_class_by_name().
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/cpu-common.c | 3 ++-
target/alpha/cpu.c | 3 +--
target/arm/cpu.c | 4 +---
target/avr/cpu.c | 4 +---
tar
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/cpu.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 270ae787b1..351ee2e9f2 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -142,13 +142,10 @@ static Object
On 8/9/23 10:04, Philippe Mathieu-Daudé wrote:
On 8/9/23 01:44, Gavin Shan wrote:
On 9/7/23 18:20, David Hildenbrand wrote:
On 07.09.23 02:35, Gavin Shan wrote:
For target/s390x, the CPU type name is always the combination of the
CPU modle name and suffix. The CPU model names have been correc
On 9/8/23 13:03, Stefan Hajnoczi wrote:
Please resolve the following CI failure:
https://gitlab.com/qemu-project/qemu/-/jobs/5045998355
ninja: job failed: cc -m64 -mcx16 -Iqemu-nbd.p -I. -I.. -Iqapi -Itrace
-Iui -Iui/shader -I/usr/include/p11-kit-1 -I/usr/include/glib-2.0
-I/usr/lib/glib-2.0/in
Gavin noticed the same pattern is duplicated in many
CPUClass::class_by_name() handlers [*].
This series consolidate the calls to
- object_class_is_abstract()
- object_class_dynamic_cast()
in the common cpu_class_by_name(), by introducing
the CPUClass::cpu_resolving_type field.
[*]
https://lore
Add a field to return the QOM type name of a CPU class.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/core/cpu.h | 2 ++
hw/core/cpu-common.c| 2 +-
target/alpha/cpu.c | 1 +
target/arm/cpu.c| 1 +
target/avr/cpu.c| 1 +
target/cris/cpu.c | 1 +
target/hex
Let CPUClass::class_by_name() handlers to return abstract classes,
and filter them once in the public cpu_class_by_name() method.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/core/cpu.h | 7 ---
hw/core/cpu-common.c | 14 +++---
target/arm/cpu.c | 3 +--
target/avr
On 9/8/23 13:19, Stefan Hajnoczi wrote:
> Hi Ilya and Jason,
> There is a CI failure related to a missing Debian libxdp-dev package:
> https://gitlab.com/qemu-project/qemu/-/jobs/5046139967
>
> I think the issue is that the debian-amd64 container image that QEMU
> uses for testing is based on Debi
1 - 100 of 330 matches
Mail list logo
