Re: [PATCH v3 14/17] i386: Use CPUCacheInfo.share_level to encode CPUID[4]

Hi Babu, On Mon, Aug 14, 2023 at 11:03:53AM -0500, Moger, Babu wrote: > Date: Mon, 14 Aug 2023 11:03:53 -0500 > From: "Moger, Babu" > Subject: Re: [PATCH v3 14/17] i386: Use CPUCacheInfo.share_level to encode > CPUID[4] > > Hi Zhao, > > > On 8/14/23 03:22, Zhao Liu wrote: > > Hi Babu, > > >

Re: [PATCH v4 15/18] linux-user/loongarch64: Add vdso

在 2023/8/17 上午2:03, Richard Henderson 写道: Signed-off-by: Richard Henderson --- linux-user/loongarch64/vdso-asmoffset.h | 8 ++ linux-user/elfload.c| 4 + linux-user/loongarch64/signal.c | 17 +++- linux-user/loongarch64/Makefile.vdso| 7 ++ linux-user/

Re: [PATCH v4 07/18] linux-user: Load vdso image if available

Hi, Richard 在 2023/8/17 上午2:03, Richard Henderson 写道: @@ -3629,10 +3694,13 @@ int load_elf_binary(struct linux_binprm *bprm, struct image_info *info) } /* - * TODO: load a vdso, which would also contain the signal trampolines. - * Otherwise, allocate a private page to ho

Re: [PATCH v2 2/4] util/defer-call: move defer_call() to util/

Hi Stefan, On 17/8/23 17:58, Stefan Hajnoczi wrote: The networking subsystem may wish to use defer_call(), so move the code to util/ where it can be reused. As a reminder of what defer_call() does: This API defers a function call within a defer_call_begin()/defer_call_end() section, allowing m

Re: [PATCH v2 1/4] block: rename blk_io_plug_call() API to defer_call()

On 17/8/23 17:58, Stefan Hajnoczi wrote: Prepare to move the blk_io_plug_call() API out of the block layer so that other subsystems call use this deferred call mechanism. Rename it to defer_call() but leave the code in block/plug.c. The next commit will move the code out of the block layer. Sug

Re: [PATCH] block/vpc: Avoid dynamic stack allocation

On [2023 Aug 11] Fri 18:52:29, Peter Maydell wrote: > From: Philippe Mathieu-Daudé > > Use autofree heap allocation instead of variable-length array on the > stack. Here we don't expect the bitmap size to be enormous, and > since we're about to read/write it to disk the overhead of the > allocati

Re: [PATCH 2/3] tcg: Fold deposit with zero to and

On Thu, 17 Aug 2023 at 23:07, Richard Henderson wrote: > > On 8/17/23 08:50, Peter Maydell wrote: > >> +if (arg_is_const(op->args[1]) > >> +&& arg_info(op->args[1])->val == 0 > >> +&& op->args[3] == 0) { > >> +uint64_t mask = MAKE_64BIT_MASK(0, op->args[4]); > > > > The

Re: [PATCH v3 02/18] target/loongarch: Add new object class for loongarch32 cpus

Hi Jiajie, Song, (+Huacai) On 17/8/23 11:31, Song Gao wrote: From: Jiajie Chen Add object class for future loongarch32 cpus. It is derived from the loongarch64 object class. Is it how the architecture design happened? IIUC per [*] it seems the arch was designed as a whole then adapted per s

Re: [PATCH v3 02/18] target/loongarch: Add new object class for loongarch32 cpus

Hi, Philippe, On Fri, Aug 18, 2023 at 4:52 PM Philippe Mathieu-Daudé wrote: > > Hi Jiajie, Song, > > (+Huacai) > > On 17/8/23 11:31, Song Gao wrote: > > From: Jiajie Chen > > > > Add object class for future loongarch32 cpus. It is derived from the > > loongarch64 object class. > > Is it how the

[PATCH 0/3] Risc-V/gdb: replace exit(0) with proper shutdown

This serie replaces some of the call to exit(0) in hardware used by Risc-V boards or made when gdb is requested to exit. Otherwise, the gdb connection can be too abruptly disconnected resulting in the last gdb packet "Wxx" being not sent. As qemu_system_shutdown_request doesn't allow to pass the

[PATCH 1/3] hw/misc/sifive_test.c: replace exit(0) with proper shutdown

This replaces the exit(0) call by a shutdown request, ensuring a proper cleanup of Qemu. Otherwise, some connections like gdb could be broken without being correctly flushed. Signed-off-by: Clément Chigot --- hw/misc/sifive_test.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --

[PATCH 2/3] hw/char: riscv_htif: replace exit(0) with proper shutdown

This replaces the exit(0) call by a shutdown request, ensuring a proper cleanup of Qemu. Otherwise, some connections like gdb could be broken without being correctly flushed. Signed-off-by: Clément Chigot --- hw/char/riscv_htif.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-)

[PATCH 3/3] gdbstub: replace exit(0) with proper shutdown

This replaces the exit(0) call by a shutdown request, ensuring a proper cleanup of Qemu. Otherwise, some connections could be broken without being correctly flushed. Signed-off-by: Clément Chigot --- gdbstub/gdbstub.c | 3 +-- gdbstub/softmmu.c | 11 +++ gdbstub/user.c| 2 ++ 3 fil

Re: [PATCH 3/3] gdbstub: replace exit(0) with proper shutdown

On Fri, 18 Aug 2023 at 10:03, Clément Chigot wrote: > > This replaces the exit(0) call by a shutdown request, ensuring a proper > cleanup of Qemu. Otherwise, some connections could be broken without > being correctly flushed. > > Signed-off-by: Clément Chigot > --- > gdbstub/gdbstub.c | 3 +-- >

Re: [PATCH v3 13/18] target/loongarch: Add loongarch32 cpu la132

On 17/8/23 11:31, Song Gao wrote: From: Jiajie Chen Add la132 as a loongarch32 cpu type and allow virt machine to be used with la132 instead of la464. Due to lack of public documentation of la132, it is currently a synthetic loongarch32 cpu model. Details need to be added in the future. Signe

Re: [PATCH v3 08/18] target/loongarch: Truncate high 32 bits of address in VA32 mode

On 17/8/23 11:31, Song Gao wrote: From: Jiajie Chen When running in VA32 mode(!LA64 or VA32L[1-3] matching PLV), virtual address is truncated to 32 bits before address mapping. Signed-off-by: Jiajie Chen Co-authored-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Song Ga

[PATCH v2 00/58] TDX QEMU support

This is v2 series of adding TDX suppot in QEMU. This patch series aims to enable TDX support to allow creating and booting a TD (TDX VM) with QEMU. It needs to work with corresponding KVM v15 patch [1]. TDX related documents can be found in [2]. This series is based on QEMU gmem implemntation, wh

[PATCH v2 02/58] i386: Introduce tdx-guest object

Introduce tdx-guest object which implements the interface of CONFIDENTIAL_GUEST_SUPPORT, and will be used to create TDX VMs (TDs) by qemu -machine ...,confidential-guest-support=tdx0 \ -object tdx-guset,id=tdx0 It has only one property 'attributes' with fixed value 0 and not configur

[PATCH v2 07/58] i386/tdx: Introduce is_tdx_vm() helper and cache tdx_guest object

It will need special handling for TDX VMs all around the QEMU. Introduce is_tdx_vm() helper to query if it's a TDX VM. Cache tdx_guest object thus no need to cast from ms->cgs every time. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/tdx.c | 13 + target/i38

[PATCH v2 01/58] *** HACK *** linux-headers: Update headers to pull in TDX API changes

Pull in recent TDX updates, which are not backwards compatible. It's just to make this series runnable. It will be updated by script scripts/update-linux-headers.sh once TDX support is upstreamed in linux kernel Signed-off-by: Xiaoyao Li --- linux-headers/asm-x86/kvm.h | 90 ++

[PATCH v2 03/58] target/i386: Parse TDX vm type

TDX VM requires VM type KVM_X86_TDX_VM to be passed to kvm_ioctl(KVM_CREATE_VM). If tdx-guest object is specified to confidential-guest-support, like, qemu -machine ...,confidential-guest-support=tdx0 \ -object tdx-guest,id=tdx0,... it parses VM type as KVM_X86_TDX_VM. Signed-off-by: X

[PATCH v2 11/58] i386/tdx: Integrate tdx_caps->attrs_fixed0/1 to tdx_cpuid_lookup

Some bits in TD attributes have corresponding CPUID feature bits. Reflect the fixed0/1 restriction on TD attributes to their corresponding CPUID bits in tdx_cpuid_lookup[] as well. Signed-off-by: Xiaoyao Li --- target/i386/cpu-internal.h | 9 + target/i386/cpu.c | 9 -

[PATCH v2 10/58] i386/tdx: Integrate tdx_caps->xfam_fixed0/1 into tdx_cpuid_lookup

KVM requires userspace to pass XFAM configuration via CPUID 0xD leaves. Convert tdx_caps->xfam_fixed0/1 into corresponding tdx_cpuid_lookup[].tdx_fixed0/1 field of CPUID 0xD leaves. Thus the requirement can be applied naturally. Signed-off-by: Xiaoyao Li --- target/i386/cpu.c | 3 --- targ

[PATCH v2 14/58] i386/tdx: Initialize TDX before creating TD vcpus

Invoke KVM_TDX_INIT in kvm_arch_pre_create_vcpu() that KVM_TDX_INIT configures global TD configurations, e.g. the canonical CPUID config, and must be executed prior to creating vCPUs. Use kvm_x86_arch_cpuid() to setup the CPUID settings for TDX VM. Note, this doesn't address the fact that QEMU ma

[PATCH v2 09/58] i386/tdx: Update tdx_cpuid_lookup[].tdx_fixed0/1 by tdx_caps.cpuid_config[]

tdx_cpuid_lookup[].tdx_fixed0/1 is QEMU maintained data which reflects TDX restrictions regrading how some CPUIDs are virtualized by TDX. It's retrieved from TDX spec. However, TDX may change some fixed fields to configurable in the future. Update tdx_cpuid.lookup[].tdx_fixed0/1 fields by removing

[PATCH v2 16/58] i386/tdx: Make sept_ve_disable set by default

From: Isaku Yamahata For TDX KVM use case, Linux guest is the most major one. It requires sept_ve_disable set. Make it default for the main use case. For other use case, it can be enabled/disabled via qemu command line. Signed-off-by: Isaku Yamahata --- target/i386/kvm/tdx.c | 2 +- 1 file

[PATCH v2 06/58] i386/tdx: Get tdx_capabilities via KVM_TDX_CAPABILITIES

KVM provides TDX capabilities via sub command KVM_TDX_CAPABILITIES of IOCTL(KVM_MEMORY_ENCRYPT_OP). Get the capabilities when initializing TDX context. It will be used to validate user's setting later. Since there is no interface reporting how many cpuid configs contains in KVM_TDX_CAPABILITIES, Q

[PATCH v2 15/58] i386/tdx: Add property sept-ve-disable for tdx-guest object

Bit 28 of TD attribute, named SEPT_VE_DISABLE. When set to 1, it disables EPT violation conversion to #VE on guest TD access of PENDING pages. Some guest OS (e.g., Linux TD guest) may require this bit as 1. Otherwise refuse to boot. Add sept-ve-disable property for tdx-guest object, for user to c

[PATCH v2 12/58] i386/kvm: Move architectural CPUID leaf generation to separate helper

From: Sean Christopherson Move the architectural (for lack of a better term) CPUID leaf generation to a separate helper so that the generation code can be reused by TDX, which needs to generate a canonical VM-scoped configuration. Signed-off-by: Sean Christopherson Signed-off-by: Xiaoyao Li --

[PATCH v2 19/58] qom: implement property helper for sha384

From: Isaku Yamahata Implement property_add_sha384() which converts hex string <-> uint8_t[48] It will be used for TDX which uses sha384 for measurement. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li --- include/qom/object.h | 17 ++ qom/object.c | 76 +++

[PATCH v2 21/58] i386/tdx: Implement user specified tsc frequency

Reuse "-cpu,tsc-frequency=" to get user wanted tsc frequency and call VM scope VM_SET_TSC_KHZ to set the tsc frequency of TD before KVM_TDX_INIT_VM. Besides, sanity check the tsc frequency to be in the legal range and legal granularity (required by TDX module). Signed-off-by: Xiaoyao Li Acked-by

[PATCH v2 22/58] i386/tdx: Set kvm_readonly_mem_enabled to false for TDX VM

TDX only supports readonly for shared memory but not for private memory. In the view of QEMU, it has no idea whether a memslot is used as shared memory of private. Thus just mark kvm_readonly_mem_enabled to false to TDX VM for simplicity. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- t

[PATCH v2 26/58] kvm/tdx: Ignore memory conversion to shared of unassigned region

From: Isaku Yamahata TDX requires vMMIO region to be shared. For KVM, MMIO region is the region which kvm memslot isn't assigned to (except in-kernel emulation). qemu has the memory region for vMMIO at each device level. While OVMF issues MapGPA(to-shared) conservatively on 32bit PCI MMIO regio

[PATCH v2 04/58] target/i386: Introduce kvm_confidential_guest_init()

Introduce a separate function kvm_confidential_guest_init() for SEV (and future TDX). Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/kvm.c | 11 ++- target/i386/sev.c | 1 - target/i386/sev.h | 2 ++ 3 files changed, 12 insertions(+), 2 deletions(-) dif

[PATCH v2 08/58] i386/tdx: Adjust the supported CPUID based on TDX restrictions

According to Chapter "CPUID Virtualization" in TDX module spec, CPUID bits of TD can be classified into 6 types: 1 | As configured | configurable by VMM, independent of native value; --

[PATCH v2 17/58] i386/tdx: Wire CPU features up with attributes of TD guest

For QEMU VMs, PKS is configured via CPUID_7_0_ECX_PKS and PMU is configured by x86cpu->enable_pmu. Reuse the existing configuration interface for TDX VMs. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/tdx.c | 14 +- 1 file changed, 13 insertions(+), 1 deletio

[PATCH v2 28/58] i386/tdx: Parse TDVF metadata for TDX VM

TDX cannot support pflash device since it doesn't support read-only memslot and doesn't support emulation. Load TDVF(OVMF) with -bios option for TDs. When boot a TD, besides load TDVF to the address below 4G, it needs parse TDVF metadata. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- h

[PATCH v2 13/58] kvm: Introduce kvm_arch_pre_create_vcpu()

Introduce kvm_arch_pre_create_vcpu(), to perform arch-dependent work prior to create any vcpu. This is for i386 TDX because it needs call TDX_INIT_VM before creating any vcpu. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- accel/kvm/kvm-all.c | 12 include/sysemu/kvm.h | 1

[PATCH v2 27/58] i386/tdvf: Introduce function to parse TDVF metadata

From: Isaku Yamahata TDX VM needs to boot with its specialized firmware, Trusted Domain Virtual Firmware (TDVF). QEMU needs to parse TDVF and map it in TD guest memory prior to running the TDX VM. A TDVF Metadata in TDVF image describes the structure of firmware. QEMU refers to it to setup memor

[PATCH v2 32/58] i386/tdx: Track RAM entries for TDX VM

The RAM of TDX VM can be classified into two types: - TDX_RAM_UNACCEPTED: default type of TDX memory, which needs to be accepted by TDX guest before it can be used and will be all-zeros after being accepted. - TDX_RAM_ADDED: the RAM that is ADD'ed to TD guest before running, and can be

[PATCH v2 25/58] kvm/tdx: Don't complain when converting vMMIO region to shared

From: Isaku Yamahata Because vMMIO region needs to be shared region, guest TD may explicitly convert such region from private to shared. Don't complain such conversion. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li --- accel/kvm/kvm-all.c | 20 ++-- 1 file changed,

[PATCH v2 35/58] i386/tdx: Add TDVF memory via KVM_TDX_INIT_MEM_REGION

From: Isaku Yamahata TDVF firmware (CODE and VARS) needs to be added/copied to TD's private memory via KVM_TDX_INIT_MEM_REGION, as well as TD HOB and TEMP memory. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- Changes from RFC v4: - rename variable @met

[PATCH v2 34/58] i386/tdx: Setup the TD HOB list

The TD HOB list is used to pass the information from VMM to TDVF. The TD HOB must include PHIT HOB and Resource Descriptor HOB. More details can be found in TDVF specification and PI specification. Build the TD HOB in TDX's machine_init_done callback. Co-developed-by: Isaku Yamahata Signed-off-b

[PATCH v2 33/58] headers: Add definitions from UEFI spec for volumes, resources, etc...

Add UEFI definitions for literals, enums, structs, GUIDs, etc... that will be used by TDX to build the UEFI Hand-Off Block (HOB) that is passed to the Trusted Domain Virtual Firmware (TDVF). All values come from the UEFI specification and TDVF design guide. [1] Note, EFI_RESOURCE_MEMORY_UNACCEPTE

[PATCH v2 30/58] i386/tdx: Don't initialize pc.rom for TDX VMs

For TDX, the address below 1MB are entirely general RAM. No need to initialize pc.rom memory region for TDs. Signed-off-by: Xiaoyao Li --- This is more as a workaround of the issue that for q35 machine type, the real memslot update (which requires memslot deletion )for pc.rom happens after tdx_in

[PATCH v2 23/58] i386/tdx: Make memory type private by default

By default (due to the recent UPM change), restricted memory attribute is shared. Convert the memory region from shared to private at the memory slot creation time. add kvm region registering function to check the flag and convert the region, and add memory listener to TDX guest code to set the f

[PATCH v2 36/58] memory: Introduce memory_region_init_ram_gmem()

Introduce memory_region_init_ram_gmem() to allocate private gmem on the MemoryRegion initialization. It's for the usercase of TDVF, which must be private on TDX case. Signed-off-by: Xiaoyao Li --- include/exec/memory.h | 6 + softmmu/memory.c | 52 ++

[PATCH v2 24/58] i386/tdx: Create kvm gmem for TD

From: Isaku Yamahata Allocate private gmem for TD guest, if the MemoryRegion is memory backend and has private property on. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li --- target/i386/kvm/tdx.c | 27 +-- 1 file changed, 25 insertions(+), 2 deletions(-) dif

[PATCH v2 18/58] i386/tdx: Validate TD attributes

Validate TD attributes with tdx_caps that fixed-0 bits must be zero and fixed-1 bits must be set. Besides, sanity check the attribute bits that have not been supported by QEMU yet. e.g., debug bit, it will be allowed in the future when debug TD support lands in QEMU. Signed-off-by: Xiaoyao Li Ac

[PATCH v2 05/58] i386/tdx: Implement tdx_kvm_init() to initialize TDX VM context

Introduce tdx_kvm_init() and invoke it in kvm_confidential_guest_init() if it's a TDX VM. More initialization will be added later. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/kvm.c | 15 ++- target/i386/kvm/meson.build | 2 +- target/i386/kvm/tdx-stu

[PATCH v2 29/58] i386/tdx: Skip BIOS shadowing setup

TDX doesn't support map different GPAs to same private memory. Thus, aliasing top 128KB of BIOS as isa-bios is not supported. On the other hand, TDX guest cannot go to real mode, it can work fine without isa-bios. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- Changes from RFC v4: - upd

[PATCH v2 31/58] i386/tdx: Track mem_ptr for each firmware entry of TDVF

For each TDVF sections, QEMU needs to copy the content to guest private memory via KVM API (KVM_TDX_INIT_MEM_REGION). Introduce a field @mem_ptr for TdxFirmwareEntry to track the memory pointer of each TDVF sections. So that QEMU can add/copy them to guest private memory later. TDVF sections can

[PATCH v2 20/58] i386/tdx: Allows mrconfigid/mrowner/mrownerconfig for TDX_INIT_VM

From: Isaku Yamahata When creating TDX vm, three sha384 hash values can be provided for TDX attestation. So far they were hard coded as 0. Now allow user to specify those values via property mrconfigid, mrowner and mrownerconfig. Choose hex-encoded string as format since it's friendly for user t

[PATCH v3 0/5] s390: Enable AP instructions for pv-guests

This series enables general QEMU support for AP pass-through for Secure Execution guests (pv-guests). To enable AP-PT on pv-guests QEMU has to turn on the corresponding bits in the KVM CPU-model[1] if the CPU firmware supports it. However, it only makes sense to turn on AP-PT if the QEMU user enab

Re: [PATCH v7 6/9] gfxstream + rutabaga: add initial support for gfxstream

On 2023/08/17 11:23, Gurchetan Singh wrote: From: Gurchetan Singh This adds initial support for gfxstream and cross-domain. Both features rely on virtio-gpu blob resources and context types, which are also implemented in this patch. gfxstream has a long and illustrious history in Android grap

Re: [PATCH v3 13/18] target/loongarch: Add loongarch32 cpu la132

On 17/8/23 11:31, Song Gao wrote: From: Jiajie Chen Add la132 as a loongarch32 cpu type and allow virt machine to be used with la132 instead of la464. Due to lack of public documentation of la132, it is currently a synthetic loongarch32 cpu model. Details need to be added in the future. Signe

[PATCH v3 3/5] NOTFORMERGE update linux-headers/asm-s390/kvm.h

Likely to be included in Linux 6.{6,7} Signed-off-by: Steffen Eiden --- linux-headers/asm-s390/kvm.h | 16 1 file changed, 16 insertions(+) diff --git a/linux-headers/asm-s390/kvm.h b/linux-headers/asm-s390/kvm.h index e2afd95420..023a2763a9 100644 --- a/linux-headers/asm-s390/

[PATCH v2 55/58] i386/tdx: Only configure MSR_IA32_UCODE_REV in kvm_init_msrs() for TDs

For TDs, only MSR_IA32_UCODE_REV in kvm_init_msrs() can be configured by VMM, while the features enumerated/controlled by other MSRs except MSR_IA32_UCODE_REV in kvm_init_msrs() are not under control of VMM. Only configure MSR_IA32_UCODE_REV for TDs. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoff

Re: [PATCH v3 10/18] target/loongarch: Fix loongarch_la464_initfn() misses setting LSPW.

On 17/8/23 11:31, Song Gao wrote: Reviewed-by: Richard Henderson Signed-off-by: Song Gao --- target/loongarch/cpu.c | 1 + 1 file changed, 1 insertion(+) Reviewed-by: Philippe Mathieu-Daudé

[PATCH v3 2/5] s390x: switch pv and subsystem reset ordering on reboot

From: Janosch Frank Bound APQNs have to be reset before tearing down the secure config via s390_machine_unprotect(). Otherwise the Ultravisor will return a error code. So let's switch the ordering around to make that happen. Reviewed-by: Christian Borntraeger Signed-off-by: Janosch Frank ---

[PATCH v2 53/58] hw/i386: add option to forcibly report edge trigger in acpi tables

From: Isaku Yamahata When level trigger isn't supported on x86 platform, forcibly report edge trigger in acpi tables. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- hw/i386/acpi-build.c | 99 --- hw/i386/acpi-commo

[PATCH v2 38/58] i386/tdx: Call KVM_TDX_INIT_VCPU to initialize TDX vcpu

TDX vcpu needs to be initialized by SEAMCALL(TDH.VP.INIT) and KVM provides vcpu level IOCTL KVM_TDX_INIT_VCPU for it. KVM_TDX_INIT_VCPU needs the address of the HOB as input. Invoke it for each vcpu after HOB list is created. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kv

[PATCH v2 39/58] i386/tdx: Finalize TDX VM

Invoke KVM_TDX_FINALIZE_VM to finalize the TD's measurement and make the TD vCPUs runnable once machine initialization is complete. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/tdx.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/target/i386/kvm/tdx.c b/targ

[PATCH v2 49/58] i386/tdx: Disable PIC for TDX VMs

Legacy PIC (8259) cannot be supported for TDX VMs since TDX module doesn't allow directly interrupt injection. Using posted interrupts for the PIC is not a viable option as the guest BIOS/kernel will not do EOI for PIC IRQs, i.e. will leave the vIRR bit set. Hence disable PIC for TDX VMs and erro

[PATCH v2 46/58] i386/tdx: Handle TDG.VP.VMCALL

Signed-off-by: Xiaoyao Li --- target/i386/kvm/tdx.c | 40 1 file changed, 40 insertions(+) diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index ced55be506d1..f111b46dac92 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -936,6

Re: [PATCH v2 1/4] block: rename blk_io_plug_call() API to defer_call()

On 17/08/2023 16:58, Stefan Hajnoczi wrote: Prepare to move the blk_io_plug_call() API out of the block layer so that other subsystems call use this deferred call mechanism. Rename it to defer_call() but leave the code in block/plug.c. The next commit will move the code out of the block layer.

Re: [PATCH v3 11/18] target/loongarch: Add a check parameter to the TRANS macro

On 17/8/23 11:31, Song Gao wrote: The default check parmeter is ALL. Suggested-by: Richard Henderson Signed-off-by: Song Gao --- target/loongarch/insn_trans/trans_arith.c.inc | 84 +- .../loongarch/insn_trans/trans_atomic.c.inc | 80 +- target/loongarch/insn_trans/trans_bit.c.inc |

[PATCH v2 54/58] i386/tdx: Don't synchronize guest tsc for TDs

From: Isaku Yamahata TSC of TDs is not accessible and KVM doesn't allow access of MSR_IA32_TSC for TDs. To avoid the assert() in kvm_get_tsc, make kvm_synchronize_all_tsc() noop for TDs, Signed-off-by: Isaku Yamahata Reviewed-by: Connor Kuehl Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann

Re: [PATCH v7 9/9] docs/system: add basic virtio-gpu documentation

On 2023/08/18 8:47, Gurchetan Singh wrote: On Wed, Aug 16, 2023 at 10:28 PM Akihiko Odaki > wrote: On 2023/08/17 11:23, Gurchetan Singh wrote: > From: Gurchetan Singh mailto:gurchetansi...@chromium.org>> > > This adds basic documentation for

[PATCH v2 37/58] i386/tdx: register TDVF as private memory

From: Chao Peng Allocate private gmem memory for BIOS if it's TD VM. Signed-off-by: Chao Peng Co-developed-by: Xiaoyao Li Signed-off-by: Xiaoyao Li --- hw/i386/x86.c | 9 - target/i386/kvm/tdx.c | 17 + target/i386/kvm/tdx.h | 2 ++ 3 files changed, 27 inser

[PATCH v2 41/58] i386/tdx: handle TDG.VP.VMCALL

From: Isaku Yamahata For GetQuote, delegate a request to Quote Generation Service. Add property of address of quote generation server and On request, connect to the server, read request buffer from shared guest memory, send the request buffer to the server and store the response into shared gues

[PATCH v2 51/58] i386/tdx: LMCE is not supported for TDX

LMCE is not supported TDX since KVM doesn't provide emulation for MSR_IA32_FEAT_CTL. Signed-off-by: Xiaoyao Li --- target/i386/kvm/kvm-cpu.c | 5 + 1 file changed, 5 insertions(+) diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index 7237378a7d4e..bec8b5f918e7 100644 ---

[PATCH v3 4/5] target/s390x/kvm: Refactor AP functionalities

kvm_s390_set_attr() is a misleading name as it only sets attributes for the KVM_S390_VM_CRYPTO group. Therefore, rename it to kvm_s390_set_crypto_attr(). Add new functions ap_available() and ap_enabled() to avoid code duplication later. Reviewed-by: Michael Mueller Signed-off-by: Steffen Eiden

[PATCH v2 40/58] i386/tdx: handle TDG.VP.VMCALL

From: Isaku Yamahata For SetupEventNotifyInterrupt, record interrupt vector and the apic id of the vcpu that received this TDVMCALL. Later it can inject interrupt with given vector to the specific vcpu that received SetupEventNotifyInterrupt. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoya

[PATCH v2 45/58] i386/tdx: Limit the range size for MapGPA

From: Isaku Yamahata If the range for TDG.VP.VMCALL is too large, process the limited size and return retry error. It's bad for VMM to take too long time, e.g. second order, with blocking vcpu execution. It results in too many missing timer interrupts. Signed-off-by: Isaku Yamahata Signed-off

[PATCH v2 57/58] i386/tdx: Don't get/put guest state for TDX VMs

From: Sean Christopherson Don't get/put state of TDX VMs since accessing/mutating guest state of production TDs is not supported. Note, it will be allowed for a debug TD. Corresponding support will be introduced when debug TD support is implemented in the future. Signed-off-by: Sean Christopher

Re: [PATCH 3/3] gdbstub: replace exit(0) with proper shutdown

On Fri, Aug 18, 2023 at 11:10 AM Peter Maydell wrote: > > On Fri, 18 Aug 2023 at 10:03, Clément Chigot wrote: > > > > This replaces the exit(0) call by a shutdown request, ensuring a proper > > cleanup of Qemu. Otherwise, some connections could be broken without > > being correctly flushed. > > >

[PATCH v2 48/58] i386/tdx: Disable SMM for TDX VMs

TDX doesn't support SMM and VMM cannot emulate SMM for TDX VMs because VMM cannot manipulate TDX VM's memory. Disable SMM for TDX VMs and error out if user requests to enable SMM. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/tdx.c | 8 1 file changed, 8 insert

[PATCH 0/4] target/loongarch: Cleanups in preparation of loongarch32 support

Jiajie, this series contains few notes I took while reviewing your series adding loongarch32 support [*]. If your series isn't merged, consider rebasing it on this one. Regards, Phil. [*] https://lore.kernel.org/qemu-devel/20230817093121.1053890-1-gaos...@loongson.cn/ Philippe Mathieu-Daudé (

[PATCH 1/4] target/loongarch: Log I/O write accesses to CSR registers

Various CSR registers have Read/Write fields. We might want to see guest trying to change such registers. Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index ad93ecac92..71079

[RFC] Proposal of QEMU PCI Endpoint test environment

Hi all, We are proposing to add a new test syste to Linux for PCIe Endpoint. That can be run on QEMU without real hardware. At present, partially we have confirmed that pci-epf-test is working, but it is not yet complete. However, we would appreciate your comments on the architecture design. # Ba

[PATCH v2 58/58] docs: Add TDX documentation

Add docs/system/i386/tdx.rst for TDX support, and add tdx in confidential-guest-support.rst Signed-off-by: Xiaoyao Li --- Changes since v1: - Add prerequisite of private gmem; - update example command to launch TD; Changes since RFC v4: - add the restriction that kernel-irqchip must be split

[PATCH 4/4] target/loongarch: Extract 64-bit specifics to loongarch64_cpu_class_init

Extract loongarch64 specific code from loongarch_cpu_class_init() to a new loongarch64_cpu_class_init(). Adapt DEFINE_LOONGARCH64_CPU_TYPE() macro. Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.c | 29 ++--- 1 file changed, 18 insertions(+), 11 deletions(

[PATCH v3 1/5] s390x/ap: fix missing subsystem reset registration

From: Janosch Frank A subsystem reset contains a reset of AP resources which has been missing. Adding the AP bridge to the list of device types that need reset fixes this issue. Reviewed-by: Jason J. Herne Reviewed-by: Tony Krowiak Signed-off-by: Janosch Frank Fixes: a51b3153 ("s390x/ap: bas

[PATCH v2 52/58] hw/i386: add eoi_intercept_unsupported member to X86MachineState

Add a new bool member, eoi_intercept_unsupported, to X86MachineState with default value false. Set true for TDX VM. Inability to intercept eoi causes impossibility to emulate level triggered interrupt to be re-injected when level is still kept active. which affects interrupt controller emulation.

[PATCH v2 42/58] i386/tdx: register the fd read callback with the main loop to read the quote data

From: Chenyi Qiang When TD guest invokes getquote tdvmcall, QEMU will register a async qio task with default context when the qio channel is connected. However, as there is a blocking action (recvmsg()) in qio_channel_read() and it will block main thread and make TD guest have no response until t

Re: [PATCH v3 4/6] hw/virtio/vhost-vdpa: Use target-agnostic qemu_target_page_mask()

ping? On 10/7/23 11:49, Philippe Mathieu-Daudé wrote: Similarly to commit e414ed2c47 ("virtio-iommu: Use target-agnostic qemu_target_page_mask"), Replace the target-specific TARGET_PAGE_SIZE and TARGET_PAGE_MASK definitions by a call to the runtime qemu_target_page_size() helper which is target

[PATCH v2 47/58] i386/tdx: Wire REPORT_FATAL_ERROR with GuestPanic facility

Originated-from: Isaku Yamahata Signed-off-by: Xiaoyao Li --- qapi/run-state.json | 17 +-- softmmu/runstate.c| 49 +++ target/i386/kvm/tdx.c | 24 - 3 files changed, 87 insertions(+), 3 deletions(-) diff --git a/qapi

Re: [PATCH v7 8/9] gfxstream + rutabaga: enable rutabaga

On 2023/08/17 11:23, Gurchetan Singh wrote: From: Gurchetan Singh This change enables rutabaga to receive virtio-gpu-3d hypercalls when it is active. Signed-off-by: Gurchetan Singh Tested-by: Alyssa Ross Tested-by: Emmanouil Pitsidianakis Reviewed-by: Emmanouil Pitsidianakis --- v3: Whites

[PATCH v2 50/58] i386/tdx: Don't allow system reset for TDX VMs

TDX CPU state is protected and thus vcpu state cann't be reset by VMM. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/kvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 601683d836c8..50b0218a8044 1

Re: CXL volatile memory is not listed

Once the cxl memory is online, how does Operating system know whether to malloc in the cxl memory or socket attached DDR memory? [https://static1.squarespace.com/static/60dbbd6d597c966b91a3b27b/t/6104415e6177af1589fb05e4/1627668830393/elastics-cloud-logo-120.png] Sh

[PATCH v2 56/58] i386/tdx: Skip kvm_put_apicbase() for TDs

KVM doesn't allow wirting to MSR_IA32_APICBASE for TDs. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/kvm.c | 5 + 1 file changed, 5 insertions(+) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 53d8d65f6667..d542351983cd 100644 --- a/target/i386/kv

[PATCH 2/4] target/loongarch: Remove duplicated disas_set_info assignment

Commit 228021f05e ("target/loongarch: Add core definition") sets disas_set_info to loongarch_cpu_disas_set_info. Probably due to a failed git-rebase, commit ca61e75071 ("target/loongarch: Add gdb support") also sets it to the same value. Remove the duplication. Signed-off-by: Philippe Mathieu-Daud

[PATCH v3 5/5] target/s390x: AP-passthrough for PV guests

Enabling AP-passthrough(AP-pt) for PV-guest by using the new CPU features for PV-AP-pt of KVM. As usual QEMU first checks which CPU features are available and then sets them if available and selected by user. An additional check is done to verify that PV-AP can only be enabled if "regular" AP-pt i

[PATCH 3/4] target/loongarch: Rename 64-bit specific functions

These functions are specific to loongarch64 cores. Rename including the '64' suffix in preparation of supporting loongarch32 cores. Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/target/loong

Re: [PATCH] block/vpc: Avoid dynamic stack allocation

Am 11.08.2023 um 19:52 hat Peter Maydell geschrieben: > From: Philippe Mathieu-Daudé > > Use autofree heap allocation instead of variable-length array on the > stack. Here we don't expect the bitmap size to be enormous, and > since we're about to read/write it to disk the overhead of the > alloca

Re: [PATCH] iotests: adapt test output for new qemu_cleanup() behavior

Am 17.08.2023 um 13:25 hat Fiona Ebner geschrieben: > Since commit ca2a5e630d ("qemu_cleanup: begin drained section after > vm_shutdown()"), there will be an additional pause for jobs during > qemu_cleanup(). The reason is that the bdrv_drain_all() call in > do_vm_stop() is not inside the drained s

Re: [PATCH v3 1/8] vhost: Add argument to vhost_svq_poll()

On Wed, Jul 19, 2023 at 9:54 AM Hawkins Jiawei wrote: > The subject could be more explicit. What about "add count argument to vhost_svq_poll"? Apart from that: Acked-by: Eugenio Pérez > Next patches in this series will no longer perform an > immediate poll and check of the device's used buffer

[PATCH 0/3] ui: avoid dynamic stack allocations

The codebase has very few VLAs, and if we can get rid of them all we can make the compiler error on new additions. This is a defensive measure against security bugs where an on-stack dynamic allocation isn't correctly size-checked (e.g. CVE-2021-3527). This patchset fixes some places in the spic

[PATCH 1/3] ui/spice-display: Avoid dynamic stack allocation

Use an autofree heap allocation instead of a variable-length array on the stack in qemu_spice_create_update(). The codebase has very few VLAs, and if we can get rid of them all we can make the compiler error on new additions. This is a defensive measure against security bugs where an on-stack dyn

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