[PATCH v5 8/9] gfxstream + rutabaga: enable rutabaga

This change enables rutabaga to receive virtio-gpu-3d hypercalls when it is active. Signed-off-by: Gurchetan Singh Tested-by: Alyssa Ross --- v3: Whitespace fix (Akihiko) hw/display/virtio-gpu-base.c | 3 ++- hw/display/virtio-gpu.c | 5 +++-- softmmu/qdev-monitor.c | 3 +++ softmmu

[PATCH v5 6/9] gfxstream + rutabaga: add initial support for gfxstream

This adds initial support for gfxstream and cross-domain. Both features rely on virtio-gpu blob resources and context types, which are also implemented in this patch. gfxstream has a long and illustrious history in Android graphics paravirtualization. It has been powering graphics in the Android

Re: [PATCH v2] virtio: don't zero out memory region cache for indirect descriptors

On Fri, Aug 11, 2023 at 10:33 PM Ilya Maximets wrote: > > Lots of virtio functions that are on a hot path in data transmission > are initializing indirect descriptor cache at the point of stack > allocation. It's a 112 byte structure that is getting zeroed out on > each call adding unnecessary ov

Re: [PATCH QEMU v2 0/3] provide a smooth upgrade solution for multi-queues disk

On Tue, Aug 15, 2023 at 12:28 AM Stefan Hajnoczi wrote: > On Fri, Aug 11, 2023 at 10:31:51AM +0800, Yong Huang wrote: > > Hi, Stefan, thank you for your interest in this series. > > I'm trying to explain my point, if you think my explanation > > doesn't stand up, please let me know. > > > > On F

[PULL 1/1] tcg/i386: Output %gs prefix in tcg_out_vex_opc

Missing the segment prefix means that user-only fails to add guest_base for some 128-bit load/store. Fixes: 098d0fc10d2 ("tcg/i386: Support 128-bit load/store") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1763 Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 3 +++ 1

[PULL 0/1] late tcg fix

s/pull-tcg-20230814 for you to fetch changes up to d3b41127c205062ca6c29c89c9542c4112c39ca0: tcg/i386: Output %gs prefix in tcg_out_vex_opc (2023-08-12 08:51:12 -0700) tcg/i386: Output %gs prefix in tcg_o

[PATCH] target/riscv: Update CSR bits name for svadu extension

The Svadu specification updated the name of the *envcfg bit from HADE to ADUE. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- target/riscv/cpu.c| 4 ++-- target/riscv/cpu_bits.h | 8 target/riscv/cpu_helper.c | 4 ++-- target/riscv/csr.c| 12 ++--

[PATCH v2] target/i386: Export GDS_NO bit to guests

Gather Data Sampling (GDS) is a side-channel attack using Gather instructions. Some Intel processors will set ARCH_CAP_GDS_NO bit in MSR IA32_ARCH_CAPABILITIES to report that they are not vulnerable to GDS. Make this bit available to guests. Closes: https://lore.kernel.org/qemu-devel/camgffemg6t

[RFC PATCH] tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB

Direct branch patching was disabled when using TCG_REG_TB in commit 736a1588c1 ("tcg/ppc: Fix race in goto_tb implementation"). Commit 7502f89c74 ("tcg/ppc: Use prefixed instructions for tcg_out_goto_tb") used the support for pc relative ISAv3.1 instructions to re-enable direct branch patching on P

Re: [PATCH] trace-events: Fix the name of the tracing.rst file

14.08.2023 20:12, Thomas Huth wrote: The file has been converted to .rst a while ago - make sure that the references in the trace-events files are pointing to the right location now. Applied to my trivial-patches tree, thanks! /mjt

Re: [PULL 0/1] late tcg fix

ository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230814 for you to fetch changes up to d3b41127c205062ca6c29c89c9542c4112c39ca0: tcg/i386: Output %gs prefix in tcg_out_vex_opc (2023-08-12 08:51:12 -0700) tcg/i386:

Re: [PATCH v2] target/i386: Export GDS_NO bit to guests

On 8/15/2023 12:54 PM, Pawan Gupta wrote: Gather Data Sampling (GDS) is a side-channel attack using Gather instructions. Some Intel processors will set ARCH_CAP_GDS_NO bit in MSR IA32_ARCH_CAPABILITIES to report that they are not vulnerable to GDS. Make this bit available to guests. Closes: ht

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