Re: [PATCH v6 4/5] tests/qtest/hd-geo-test: fix incorrect pcie-root-port usage and simplify test

On 29/06/2023 06.07, Ani Sinha wrote: The test attaches a SCSI controller to a non-zero slot and a pcie-to-pci bridge on slot 0 on the same pcie-root-port. Since a downstream device can be attached to a pcie-root-port only on slot 0, the above test configuration is not allowed. Additionally using

Re: [PATCH] hw/ppc: Fix clock update drift

On 29/06/2023 04:07, Nicholas Piggin wrote: The clock update logic reads the clock twice to compute the new clock value, with a value derived from the later time subtracted from a value derived from the earlier time. The delta causes time to be lost. This can ultimately result in time becomin

Re: [PATCH] vhost-user: use new thread to loop backend channel.

On Thu, Jun 29, 2023 at 02:54:15PM +0800, Rma Ma wrote: > fix: QEMU deadlock with dpdk-vdpa > > QEMU start vhost-user with modern net and blk, backend use dpdk-vdpa process, > after live migration, dest QEMU deadlock with dpdk-vdpa > > - QEMU sends VHOST_USER_SET_VRING_KICK to dpdk-vdpa net > - Q

Re: [PATCH] target/riscv: Remove unuseful KVM stubs

ping? On 20/6/23 10:16, Philippe Mathieu-Daudé wrote: Since we always check whether KVM is enabled before calling kvm_riscv_reset_vcpu() and kvm_riscv_set_irq(), their call is elided by the compiler when KVM is not available. Therefore the stubs are not even linked. Remove them. Signed-off-by:

Re: [PATCH v6 11/20] target/riscv/cpu: add misa_ext_info_arr[]

On 28/6/23 23:30, Daniel Henrique Barboza wrote: Next patch will add KVM specific user properties for both MISA and multi-letter extensions. For MISA extensions we want to make use of what is already available in misa_ext_cfgs[] to avoid code repetition. misa_ext_info_arr[] array will hold name

Re: [PATCH v6 15/20] target/riscv/cpu.c: add satp_mode properties earlier

On 28/6/23 23:30, Daniel Henrique Barboza wrote: riscv_cpu_add_user_properties() ended up with an excess of "#ifndef CONFIG_USER_ONLY" blocks after changes that added KVM properties handling. KVM specific properties are required to be created earlier than their TCG counterparts, but the remainin

Re: [PATCH] hw/ppc: Fix clock update drift

On 6/29/23 09:04, Frederic Barrat wrote: On 29/06/2023 04:07, Nicholas Piggin wrote: The clock update logic reads the clock twice to compute the new clock value, with a value derived from the later time subtracted from a value derived from the earlier time. The delta causes time to be lost. T

Re: [PATCH v2 15/16] hw/i386/pc_piix: Turn some local variables into initializers

On 28/6/23 21:52, Bernhard Beschow wrote: Eliminates an else branch. Suggested-by: Igor Mammedov Signed-off-by: Bernhard Beschow --- hw/i386/pc_piix.c | 13 - 1 file changed, 4 insertions(+), 9 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PULL 33/33] ui/dbus: use shared D3D11 Texture2D when possible

On 6/27/23 15:02, marcandre.lur...@redhat.com wrote: static void dbus_update_gl_cb(GObject *source_object, - GAsyncResult *res, - gpointer user_data) + GAsyncResult *res, + gpointer use

Re: [PATCH v2 02/16] hw/pci-host/q35: Fix double, contradicting .endianness assignment

On 28/6/23 21:51, Bernhard Beschow wrote: Fixes the following clangd warning (-Winitializer-overrides): q35.c:297:19: Initializer overrides prior initialization of this subobject q35.c:292:19: previous initialization is here Settle on little endian which is consistent with using pci_host_

Re: [PATCH] hw/ppc: Simplify clock update arithmetic

On Thu Jun 29, 2023 at 3:28 PM AEST, Cédric Le Goater wrote: > On 6/25/23 14:20, Nicholas Piggin wrote: > > The clock update logic reads the clock twice to compute the new clock > > value, with a value derived from the later time subtracted from a value > > derived from the earlier time. This can l

Re: [PATCH v2 01/16] hw/i386/pc_q35: Resolve redundant q35_host variable

On 28/6/23 21:51, Bernhard Beschow wrote: The variable is redundant to "phb" and is never used by its real type. Signed-off-by: Bernhard Beschow Reviewed-by: Thomas Huth --- hw/i386/pc_q35.c | 27 +-- 1 file changed, 13 insertions(+), 14 deletions(-) Reviewed-by: P

Re: [PULL 33/33] ui/dbus: use shared D3D11 Texture2D when possible

On 6/29/23 09:40, Richard Henderson wrote: On 6/27/23 15:02, marcandre.lur...@redhat.com wrote:   static void dbus_update_gl_cb(GObject *source_object, -   GAsyncResult *res, -   gpointer user_data) +  GAsyncResult *res,

Re: [PATCH] hw/ppc: Fix clock update drift

On Thu Jun 29, 2023 at 5:34 PM AEST, Cédric Le Goater wrote: > On 6/29/23 09:04, Frederic Barrat wrote: > > > > > > On 29/06/2023 04:07, Nicholas Piggin wrote: > >> The clock update logic reads the clock twice to compute the new clock > >> value, with a value derived from the later time subtracte

Re: [PATCH v2 14/16] hw/pci-host/i440fx: Resolve i440fx_init()

Hi Bernhard, On 28/6/23 21:52, Bernhard Beschow wrote: i440fx_init() is a legacy init function. The previous patches worked towards TYPE_I440FX_PCI_HOST_BRIDGE to be instantiated the QOM way. Do this now by transforming the parameters passed to i440fx_init() into property assignments. Signed-of

Re: [RFC PATCH 0/3] ppc/pnv: SMT support for powernv

On 6/29/23 04:16, Nicholas Piggin wrote: These patches implement enough to boot a SMT powernv machine to Linux and boot a SMP KVM guest inside that. There are a few more SPRs that need to be done, and per-LPAR SPRs are mostly not annotated yet so it can't run in 1LPAR mode. But it is enough to r

[qemu-web PATCH] Fix installation instructions for Debian/Ubuntu

There is no package called "qemu" here - thus use the two meta-packages "qemu-system" and "qemu-user" instead. Resolves: https://gitlab.com/qemu-project/qemu-web/-/issues/8 Signed-off-by: Thomas Huth --- _download/linux.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/_down

Re: [PATCH v6 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port

On Thu, 29 Jun, 2023, 12:17 pm Akihiko Odaki, wrote: > On 2023/06/29 13:07, Ani Sinha wrote: > > PCI Express ports only have one slot, so PCI Express devices can only be > > plugged into slot 0 on a PCIE port. Enforce it. > > > > The change has been tested to not break ARI by instantiating seven

[PATCH] linux-user: Avoid mmap of the last byte of the reserved_va

There is an overflow problem in mmap_find_vma_reserved: when reserved_va == UINT32_MAX, end may overflow to 0. Rather than a larger rewrite at this time, simply avoid the final byte of the VA, which avoids searching the final page, which avoids the overflow. Cc: qemu-sta...@nongnu.org Resolves: ht

Re: [qemu-web PATCH] Fix installation instructions for Debian/Ubuntu

29.06.2023 11:02, Thomas Huth wrote: There is no package called "qemu" here - thus use the two meta-packages "qemu-system" and "qemu-user" instead. There are 2 questions here. 1. Do we really want to suggest users to install the whole thing? qemu-user and qemu-system are two entirely different

Re: [PATCH v6 01/20] target/riscv: skip features setup for KVM CPUs

On Wed, Jun 28, 2023 at 06:30:14PM -0300, Daniel Henrique Barboza wrote: > As it is today it's not possible to use '-cpu host' if the RISC-V host > has RVH enabled. This is the resulting error: > > $ sudo ./qemu/build/qemu-system-riscv64 \ > -machine virt,accel=kvm -m 2G -smp 1 \ > -nograp

[PATCH 2/2] accel/tcg: add assert() check in tb_invalidate_phys_page_range__locked()

Add an assert() check in tb_invalidate_phys_page_range__locked() to ensure that both the start and last addresses are within the same target page. Note that due to performance concerns the check is only enabled when QEMU is configured with --enable-debug-tcg. Signed-off-by: Mark Cave-Ayland ---

[PATCH 0/2] accel/tcg: fix page invalidation in tb_invalidate_phys_range()

This series contains 2 patches: the first is a fix for page invalidation in tb_invalidate_phys_range() which resolves the crash reported by Howard and Cédric when booting MacOS 9 under qemu-system-ppc -M mac99,via=pmu. The second patch adds an assert() to tb_invalidate_phys_page_range__locked() wh

[PATCH 1/2] accel/tcg: fix start page passed to tb_invalidate_phys_page_range__locked()

Due to a copy-paste error in tb_invalidate_phys_range() the start address of the invalidation range was being passed to tb_invalidate_phys_page_range__locked() instead of the start address of the current page. Signed-off-by: Mark Cave-Ayland Fixes: e506ad6a05 ("accel/tcg: Pass last not end to tb_

Re: [PATCH 0/4] target/ppc: Catch invalid real address accesses

On 28/06/2023 08:17, Cédric Le Goater wrote: qemu-system-ppc.exe -M mac99,via=pmu -cdrom C:\mac-iso\9.2.2.iso -boot d -L pc-bios crashes Mac OS with an address error. (with unpatched and patched builds). Same on Linux. I get an invalid opcode. QEMU 7.2 work fine though. C. That certainly s

Re: [PATCH v4 0/6] net/tap: Fix QEMU frozen issue when the maximum number of file descriptors is very large

28.06.2023 18:27, Bin Meng wrote: Current codes using a brute-force traversal of all file descriptors do not scale on a system where the maximum number of file descriptors is set to a very large value (e.g.: in a Docker container of Manjaro distribution it is set to 1073741816). QEMU just looks

Re: [PULL 33/33] ui/dbus: use shared D3D11 Texture2D when possible

On 29/06/2023 08:40, Richard Henderson wrote: On 6/27/23 15:02, marcandre.lur...@redhat.com wrote:   static void dbus_update_gl_cb(GObject *source_object, -   GAsyncResult *res, -   gpointer user_data) +  GAsyncResult *

Re: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers

On Wed, 21 Jun 2023, BALATON Zoltan wrote: On Wed, 14 Jun 2023, BALATON Zoltan wrote: On Mon, 5 Jun 2023, BALATON Zoltan wrote: We don't emulate the gigabit ethernet part of the chip but the MorphOS driver accesses these and expects to get some valid looking result otherwise it hangs. Add some

[PATCH v5 1/1] target/riscv: Add RVV registers to log

Print RvV extension register to log if VPU option is enabled. Signed-off-by: Ivan Klokov --- v5: - Fix typo, move macros out of function, direct access to cfg.vlen field. --- target/riscv/cpu.c | 57 +- 1 file changed, 56 insertions(+), 1 deletion(

Re: [PATCH v6 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port

On 2023/06/29 17:05, Ani Sinha wrote: On Thu, 29 Jun, 2023, 12:17 pm Akihiko Odaki, > wrote: On 2023/06/29 13:07, Ani Sinha wrote: > PCI Express ports only have one slot, so PCI Express devices can only be > plugged into slot 0 on a PCIE port

[PATCH v4 3/5] vfio/pci: Disable INTx in vfio_realize error path

When vfio realize fails, INTx isn't disabled if it has been enabled. This may confuse host side with unhandled interrupt report. Add a new label to be used for vfio_intx_enable() failed case. Fixes: a9994687cb9b ("vfio/display: core & wireup") Fixes: b290659fc3dd ("hw/vfio/display: add ramfb supp

[PATCH v4 4/5] vfio/pci: Free resources when vfio_migration_realize fails

When vfio_realize() succeeds, hot unplug will call vfio_exitfn() to free resources allocated in vfio_realize(); when vfio_realize() fails, vfio_exitfn() is never called and we need to free resources in vfio_realize(). In the case that vfio_migration_realize() fails, e.g: with -only-migratable & en

Re: [PATCH] e1000e: Add ICR clearing by corresponding IMS bit

On 2023/06/02 16:25, Akihiko Odaki wrote: The datasheet does not say what happens when interrupt was asserted (ICR.INT_ASSERT=1) and auto mask is *not* active. However, section of 13.3.27 the PCIe* GbE Controllers Open Source Software Developer’s Manual, which were written for older devices, name

[PATCH v4 1/5] vfio/pci: Fix a segfault in vfio_realize

The kvm irqchip notifier is only registered if the device supports INTx, however it's unconditionally removed in vfio realize error path. If the assigned device does not support INTx, this will cause QEMU to crash when vfio realize fails. Change it to conditionally remove the notifier only if the n

[PATCH v4 5/5] vfio/migration: Refactor and fix print of "Migration disabled"

This patch refactors vfio_migration_realize() and its dependend code as follows: 1. It's redundant in vfio_migration_realize() to registers multiple blockers, e.g: vIOMMU blocker can be refactored as per device blocker. 2. Change vfio_viommu_preset() to be only a per device checker. 3. Remove g

[PATCH v4 2/5] vfio/pci: Free leaked timer in vfio_realize error path

When vfio_realize fails, the mmap_timer used for INTx optimization isn't freed. As this timer isn't activated yet, the potential impact is just a piece of leaked memory. Fixes: ea486926b07d ("vfio-pci: Update slow path INTx algorithm timer related") Signed-off-by: Zhenzhong Duan --- hw/vfio/pci.

[PATCH v4 0/5] VFIO migration related refactor and bug fix

Hello, PATCH5 refactors the VFIO migration blocker related code based on suggestions from Joao and Cedric, so that code is simpler and "Migration disabled" printed in right case. But before that works, also found some hotplug bugs when testing blocker adding failed case. PATCH1-4 fix them. See p

Re: [qemu-web PATCH] Fix installation instructions for Debian/Ubuntu

On 29/6/23 10:12, Michael Tokarev wrote: 29.06.2023 11:02, Thomas Huth wrote: There is no package called "qemu" here - thus use the two meta-packages "qemu-system" and "qemu-user" instead. There are 2 questions here. 1. Do we really want to suggest users to install the whole thing? qemu-user

Re: [PATCH v6 11/20] target/riscv/cpu: add misa_ext_info_arr[]

On Wed, Jun 28, 2023 at 06:30:24PM -0300, Daniel Henrique Barboza wrote: > Next patch will add KVM specific user properties for both MISA and > multi-letter extensions. For MISA extensions we want to make use of what > is already available in misa_ext_cfgs[] to avoid code repetition. > > misa_ext_

[PATCH] migration/calc-dirty-rate: millisecond precision period

Introduces alternative argument calc-time-ms, which is the the same as calc-time but accepts millisecond value. Millisecond precision allows to make predictions whether migration will succeed or not. To do this, calculate dirty rate with calc-time-ms set to max allowed downtime, convert measured ra

[PATCH 1/1] pcie: Add hotplug detect state register to w1cmask

When trying to migrate a machine type pc-q35-6.0 or lower, with this cmdline options: -device driver=pcie-root-port,port=18,chassis=19,id=pcie-root-port18,bus=pcie.0,addr=0x12 \ -device driver=nec-usb-xhci,p2=4,p3=4,id=nex-usb-xhci0,bus=pcie-root-port18,addr=0x12.0x1 the following bug happens

Re: [PATCH v4 0/6] net/tap: Fix QEMU frozen issue when the maximum number of file descriptors is very large

On Thu, Jun 29, 2023 at 11:33:29AM +0300, Michael Tokarev wrote: > 28.06.2023 18:27, Bin Meng wrote: > > > > Current codes using a brute-force traversal of all file descriptors > > do not scale on a system where the maximum number of file descriptors > > is set to a very large value (e.g.: in a Do

Re: [PATCH 0/4] target/ppc: Catch invalid real address accesses

On 6/29/23 10:29, Mark Cave-Ayland wrote: On 28/06/2023 08:17, Cédric Le Goater wrote: qemu-system-ppc.exe -M mac99,via=pmu -cdrom C:\mac-iso\9.2.2.iso -boot d -L pc-bios crashes Mac OS with an address error. (with unpatched and patched builds). Same on Linux. I get an invalid opcode. QEMU 7

Re: [PATCH 2/2] accel/tcg: add assert() check in tb_invalidate_phys_page_range__locked()

On 29/6/23 10:25, Mark Cave-Ayland wrote: Add an assert() check in tb_invalidate_phys_page_range__locked() to ensure that both the start and last addresses are within the same target page. Note that due to performance concerns the check is only enabled when QEMU is configured with --enable-debug-

Re: [PATCH 1/2] accel/tcg: fix start page passed to tb_invalidate_phys_page_range__locked()

On 6/29/23 10:25, Mark Cave-Ayland wrote: Due to a copy-paste error in tb_invalidate_phys_range() the start address of the invalidation range was being passed to tb_invalidate_phys_page_range__locked() instead of the start address of the current page. Signed-off-by: Mark Cave-Ayland Fixes: e506

Re: [PATCH v2 3/4] target/ppc: Make checkstop actually stop the system

On Wed Jun 28, 2023 at 7:33 PM AEST, Richard Henderson wrote: > On 6/27/23 15:46, Nicholas Piggin wrote: > > +vm_stop(RUN_STATE_GUEST_PANICKED); > > Calling qemu_system_guest_panicked(NULL) seems to be more correct. I'll have a look. > Though I'm not really sure the difference from cpu_abort(

Re: [PATCH v2 4/4] target/ppc: Implement attn instruction on BookS 64-bit processors

On Wed Jun 28, 2023 at 7:38 PM AEST, Richard Henderson wrote: > On 6/27/23 15:46, Nicholas Piggin wrote: > > +DEF_HELPER_1(attn, void, env) > > s/void/noreturn/ Thank you x2, agree. Thanks, Nick

[RFC PATCH] tcg: Reduce tcg_assert_listed_vecop() scope

tcg_assert_listed_vecop() is only used in tcg-op-vec.c. Signed-off-by: Philippe Mathieu-Daudé --- RFC: Maybe we plan to use it in tcg-op-gvec.c? --- include/tcg/tcg.h | 6 -- tcg/tcg-op-vec.c | 6 +++--- 2 files changed, 3 insertions(+), 9 deletions(-) diff --git a/include/tcg/tcg.h b/incl

Re: [PATCH v6 12/20] target/riscv: add KVM specific MISA properties

On Wed, Jun 28, 2023 at 06:30:25PM -0300, Daniel Henrique Barboza wrote: > Using all TCG user properties in KVM is tricky. First because KVM > supports only a small subset of what TCG provides, so most of the > cpu->cfg flags do nothing for KVM. > > Second, and more important, we don't have a way

Re: [PATCH v6 14/20] target/riscv/kvm.c: add multi-letter extension KVM properties

On Wed, Jun 28, 2023 at 06:30:27PM -0300, Daniel Henrique Barboza wrote: > Let's add KVM user properties for the multi-letter extensions that KVM > currently supports: zicbom, zicboz, zihintpause, zbb, ssaia, sstc, > svinval and svpbmt. > > As with MISA extensions, we're using the KVMCPUConfig typ

Re: [PATCH v6 15/20] target/riscv/cpu.c: add satp_mode properties earlier

On Wed, Jun 28, 2023 at 06:30:28PM -0300, Daniel Henrique Barboza wrote: > riscv_cpu_add_user_properties() ended up with an excess of "#ifndef > CONFIG_USER_ONLY" blocks after changes that added KVM properties > handling. > > KVM specific properties are required to be created earlier than their >

Re: [PATCH v6 17/20] target/riscv/cpu.c: create KVM mock properties

On Wed, Jun 28, 2023 at 06:30:30PM -0300, Daniel Henrique Barboza wrote: > KVM-specific properties are being created inside target/riscv/kvm.c. But > at this moment we're gathering all the remaining properties from TCG and > adding them as is when running KVM. This creates a situation where > non-K

[qemu-web PATCH v2] Fix installation instructions for Debian/Ubuntu

There is no package called "qemu" here - thus use the two meta-packages "qemu-system" and "qemu-user-static" instead. While we're at it, add a note for people who might not need all emulator binaries - in that case it makes sense to have a look at the list of available packages first. Resolves: h

Re: [qemu-web PATCH] Fix installation instructions for Debian/Ubuntu

On 29/06/2023 10.12, Michael Tokarev wrote: 29.06.2023 11:02, Thomas Huth wrote: There is no package called "qemu" here - thus use the two meta-packages "qemu-system" and "qemu-user" instead. There are 2 questions here. 1. Do we really want to suggest users to install the whole thing? qemu-us

Re: [PATCH 0/4] target/ppc: Catch invalid real address accesses

On Thu Jun 29, 2023 at 7:05 PM AEST, Cédric Le Goater wrote: > On 6/29/23 10:29, Mark Cave-Ayland wrote: > > On 28/06/2023 08:17, Cédric Le Goater wrote: > > > >> qemu-system-ppc.exe -M mac99,via=pmu -cdrom C:\mac-iso\9.2.2.iso -boot > >> d -L pc-bios > >> crashes Mac OS with an addre

Re: [qemu-web PATCH v2] Fix installation instructions for Debian/Ubuntu

29.06.2023 12:24, Thomas Huth пишет: There is no package called "qemu" here - thus use the two meta-packages "qemu-system" and "qemu-user-static" instead. While we're at it, add a note for people who might not need all emulator binaries - in that case it makes sense to have a look at the list of

Re: [PATCH v5] 9pfs: deprecate 'proxy' backend

On Monday, June 26, 2023 1:49:06 PM CEST Christian Schoenebeck wrote: > As recent CVE-2023-2861 (fixed by f6b0de53fb) once again showed, the 9p > 'proxy' fs driver is in bad shape. Using the 'proxy' backend was already > discouraged for safety reasons before and we recommended to use the > 'local'

Re: [qemu-web PATCH] Fix installation instructions for Debian/Ubuntu

29.06.2023 12:31, Thomas Huth wrote: .. This is actually a question to QEMU upstream, - I think the same reasoning applies there as well. Looking at our docs, it seems like we're lacking an introduction to the the "configure" switches like --enable-system and --enable-user completely, indeed :

Re: [qemu-web PATCH v2] Fix installation instructions for Debian/Ubuntu

On 29/06/2023 12.09, Michael Tokarev wrote: 29.06.2023 12:24, Thomas Huth пишет: There is no package called "qemu" here - thus use the two meta-packages "qemu-system" and "qemu-user-static" instead. While we're at it, add a note for people who might not need all emulator binaries - in that case

[PULL 4/5] target/i386: ignore CPL0-specific features in user mode emulation

Features such as PCID are only accessible through privileged operations, and therefore have no impact on any user-mode operation. Allow reporting them to programs running under user mode emulation, so that "-cpu" can be used with more named CPU models. XSAVES would be similar, but it doesn't make

[PULL 1/5] icount: don't adjust virtual time backwards after warp

From: Nicholas Piggin The icount-based QEMU_CLOCK_VIRTUAL runs ahead of the RT clock at times. When warping, it is possible it is still ahead at the end of the warp, which causes icount adaptive mode to adjust it backward. This can result in the machine observing time going backwards. Prevent th

[PULL 0/5] x86, main loop changes for 2023-06-29

The following changes since commit 4329d049d5b8d4af71c6b399d64a6d1b98856318: Merge tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu into staging (2023-06-26 17:40:38 +0200) are available in the Git repository at: https://gitlab.com/bonzini/qemu.git tags/for-upstream for you to fe

[PULL 5/5] target/i386: emulate 64-bit ring 0 for linux-user if LM feature is set

32-bit binaries can run on a long mode processor even if the kernel is 64-bit, of course, and this can have slightly different behavior; for example, SYSCALL is allowed on Intel processors. Allow reporting LM to programs running under user mode emulation, so that "-cpu" can be used with named CPU

[PULL 2/5] target/i386: Export MSR_ARCH_CAPABILITIES bits to guests

From: Pawan Gupta On Intel CPUs there are certain bits in MSR_ARCH_CAPABILITIES that indicates if the CPU is not affected by a vulnerability. Without these bits guests may try to deploy the mitigation even if the CPU is not affected. Export the bits to guests that indicate immunity to hardware v

[PULL 3/5] target/i386: ignore ARCH_CAPABILITIES features in user mode emulation

ARCH_CAPABILITIES is only accessible through a read-only MSR, so it has no impact on any user-mode operation (user-mode cannot read the MSR). So do not bother printing warnings about it in user mode emulation. Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 7 +++ 1 file changed, 7 inse

Re: [PATCH v2 05/38] crypto/aes: Add constants for ShiftRows, InvShiftRows

On Fri, 9 Jun 2023 at 04:24, Richard Henderson wrote: > > These symbols will avoid the indirection through memory > when fully unrolling some new primitives. > > Reviewed-by: Philippe Mathieu-Daudé > Signed-off-by: Richard Henderson > --- > crypto/aes.c | 50

[PATCH v3 3/7] pc-bios/s390-ccw/Makefile: Use -z noexecstack to silence linker warning

Recent versions of ld complain when linking the s390-ccw bios: /usr/bin/ld: warning: start.o: missing .note.GNU-stack section implies executable stack /usr/bin/ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker We can silence

[PATCH v3 4/7] pc-bios/s390-ccw: Fix indentation in start.S

start.S is currently indented with a mixture of spaces and tabs, which is quite ugly. QEMU coding style says indentation should be 4 spaces, and this is also what we are using in the assembler files in the tests/tcg/s390x/ folder already, so let's adjust start.S accordingly. Reviewed-by: Cédric Le

[PATCH v3 6/7] pc-bios/s390-ccw: Move the stack array into start.S

The stack array is only referenced from the start-up code (which is shared between the s390-ccw.img and the s390-netboot.img), but it is currently declared twice, once in main.c and once in netmain.c. It makes more sense to declare this in start.S instead - which will also be helpful in the next pa

[PATCH v3 2/7] pc-bios/s390-ccw: Get rid of the the __u* types

The types starting with double underscores have likely been introduced into the s390-ccw bios to be able to re-use structs from the Linux kernel in the past, but the corresponding structs in cio.h have been changed there a long time ago already to not use the variants with the double underscores an

[PATCH v3 7/7] pc-bios/s390-ccw: Don't use __bss_start with the "larl" instruction

start.S currently cannot be compiled with Clang 16 and binutils 2.40: ld: start.o(.text+0x8): misaligned symbol `__bss_start' (0xc1e5) for relocation R_390_PC32DBL According to the built-in linker script of ld, the symbol __bss_start can actually point *before* the .bss section and does not

[PATCH v3 1/7] s390-ccw: Getting rid of ulong

From: Juan Quintela Any good reason why this still exist? I can understand u* and __u* to be linux kernel like, but ulong? Signed-off-by: Juan Quintela Message-Id: <20230510143925.4094-4-quint...@redhat.com> Reviewed-by: Thomas Huth Signed-off-by: Thomas Huth --- pc-bios/s390-ccw/helper.h

[PATCH v3 5/7] pc-bios/s390-ccw: Provide space for initial stack frame in start.S

Providing the space of a stack frame is the duty of the caller, so we should reserve 160 bytes before jumping into the main function. Otherwise the main() function might write past the stack array. While we're at it, add a proper STACK_SIZE macro for the stack size instead of using magic numbers (

[PATCH v3 0/7] pc-bios/s390-ccw: Fixes and improvements for start.S (and other files)

tl;dr: Please review the final patch - it's the only one that really changed. This is a respin of the currently pending s390-ccw bios patches. Compared to v2, I've included other pending patches for the s390-ccw bios this time, so the series grew a little bit. The only real code change compared t

Re: [PATCH v2 04/12] hw/ssi: Add an "addr" property to SSIPeripheral

On 7/6/23 16:15, Cédric Le Goater wrote: On 6/7/23 10:28, Philippe Mathieu-Daudé wrote: On 7/6/23 10:06, Joel Stanley wrote: On Wed, 7 Jun 2023 at 04:40, Cédric Le Goater wrote: Boards will use this new property to identify the device CS line and wire the SPI controllers accordingly. "addr

Re: [PATCH v2 03/12] aspeed: Use the boot_rom region of the fby35 machine

On 7/6/23 06:39, Cédric Le Goater wrote: This change completes commits 5aa281d757 ("aspeed: Introduce a spi_boot region under the SoC") and 8b744a6a47 ("aspeed: Add a boot_rom overlap region in the SoC spi_boot container") which introduced a spi_boot container at the SoC level to map the boot rom

Re: [PATCH v4 1/5] vfio/pci: Fix a segfault in vfio_realize

On 29/06/2023 09:40, Zhenzhong Duan wrote: > The kvm irqchip notifier is only registered if the device supports > INTx, however it's unconditionally removed in vfio realize error > path. If the assigned device does not support INTx, this will cause > QEMU to crash when vfio realize fails. Change

Re: [PATCH v3 7/7] pc-bios/s390-ccw: Don't use __bss_start with the "larl" instruction

On Thu, 29 Jun 2023 12:48:21 +0200 Thomas Huth wrote: > start.S currently cannot be compiled with Clang 16 and binutils 2.40: > > ld: start.o(.text+0x8): misaligned symbol `__bss_start' (0xc1e5) for > relocation R_390_PC32DBL > > According to the built-in linker script of ld, the symbol _

Re: [PATCH v4 2/5] vfio/pci: Free leaked timer in vfio_realize error path

On 29/06/2023 09:40, Zhenzhong Duan wrote: > When vfio_realize fails, the mmap_timer used for INTx optimization > isn't freed. As this timer isn't activated yet, the potential impact > is just a piece of leaked memory. > > Fixes: ea486926b07d ("vfio-pci: Update slow path INTx algorithm timer > re

Re: [PATCH v3 1/7] s390-ccw: Getting rid of ulong

On Thu, 29 Jun 2023 12:48:15 +0200 Thomas Huth wrote: > From: Juan Quintela > > Any good reason why this still exist? > I can understand u* and __u* to be linux kernel like, but ulong? shorter code? ¯\_(ツ)_/¯ > > Signed-off-by: Juan Quintela > Message-Id: <20230510143925.4094-4-quint...@red

Re: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers

On 6/29/23 10:36, BALATON Zoltan wrote: On Wed, 21 Jun 2023, BALATON Zoltan wrote: On Wed, 14 Jun 2023, BALATON Zoltan wrote: On Mon, 5 Jun 2023, BALATON Zoltan wrote: We don't emulate the gigabit ethernet part of the chip but the MorphOS driver accesses these and expects to get some valid loo

Re: [PATCH v6 10/15] target/riscv: Add Zvknh ISA extension support

On 2023/6/28 5:14 PM, Richard Henderson wrote: On 6/27/23 19:45, Max Chou wrote: +void HELPER(vsha2cl_vv)(void *vd, void *vs1, void *vs2, CPURISCVState *env, +    uint32_t desc) +{ +    uint32_t sew = FIELD_EX64(env->vtype, VTYPE, VSEW); +    uint32_t esz = sew == MO_64 ? 8

Re: [PATCH v2 05/12] hw/ssi: Introduce a ssi_get_cs() helper

On 7/6/23 06:39, Cédric Le Goater wrote: Simple routine to retrieve a DeviceState object on a SPI bus using its address/cs. It will be useful for the board to wire the CS lines. Cc: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Cédric Le Goater --- include/hw/ssi/ssi.h

Re: [PATCH v3 1/7] s390-ccw: Getting rid of ulong

On 29/6/23 12:48, Thomas Huth wrote: From: Juan Quintela Any good reason why this still exist? I can understand u* and __u* to be linux kernel like, but ulong? Signed-off-by: Juan Quintela Message-Id: <20230510143925.4094-4-quint...@redhat.com> Reviewed-by: Thomas Huth Signed-off-by: Thomas

Re: [PATCH v3 7/7] pc-bios/s390-ccw: Don't use __bss_start with the "larl" instruction

On 29/06/2023 12.58, Claudio Imbrenda wrote: On Thu, 29 Jun 2023 12:48:21 +0200 Thomas Huth wrote: start.S currently cannot be compiled with Clang 16 and binutils 2.40: ld: start.o(.text+0x8): misaligned symbol `__bss_start' (0xc1e5) for relocation R_390_PC32DBL According to the buil

Re: [PULL 00/30] Accelerator patches for 2023-06-28

On 6/28/23 17:52, Philippe Mathieu-Daudé wrote: The following changes since commit b111569da9f82fdf05df03184836a4564adef599: Merge tag 'ui-pull-request' ofhttps://gitlab.com/marcandre.lureau/qemu into staging (2023-06-28 08:42:32 +0200) are available in the Git repository at: https://g

Re: [PATCH v4 3/5] vfio/pci: Disable INTx in vfio_realize error path

On 29/06/2023 09:40, Zhenzhong Duan wrote: > When vfio realize fails, INTx isn't disabled if it has been enabled. > This may confuse host side with unhandled interrupt report. > > Add a new label to be used for vfio_intx_enable() failed case. > > Fixes: a9994687cb9b ("vfio/display: core & wireup"

Re: [PATCH v3 7/7] pc-bios/s390-ccw: Don't use __bss_start with the "larl" instruction

On Thu, 29 Jun 2023 13:12:26 +0200 Thomas Huth wrote: > On 29/06/2023 12.58, Claudio Imbrenda wrote: > > On Thu, 29 Jun 2023 12:48:21 +0200 > > Thomas Huth wrote: > > > >> start.S currently cannot be compiled with Clang 16 and binutils 2.40: > >> > >> ld: start.o(.text+0x8): misaligned symb

Re: [PULL 3/5] tcg: add perfmap and jitdump

Hi Richard, Alex, On 16/1/23 23:36, Richard Henderson wrote: From: Ilya Leoshkevich Add ability to dump /tmp/perf-.map and jit-.dump. The first one allows the perf tool to map samples to each individual translation block. The second one adds the ability to resolve symbol names, line numbers an

Re: [PULL 18/42] tests: avocado: boot_linux_console: Add test case for bpim2u

On 06/06/2023 11.47, Peter Maydell wrote: From: qianfan Zhao Add test case for booting from initrd and sd card. Signed-off-by: qianfan Zhao Reviewed-by: Niek Linnenbank Tested-by: Niek Linnenbank Signed-off-by: Peter Maydell --- tests/avocado/boot_linux_console.py | 176 +

Re: [PATCH v6 11/20] target/riscv/cpu: add misa_ext_info_arr[]

On 6/29/23 04:26, Philippe Mathieu-Daudé wrote: On 28/6/23 23:30, Daniel Henrique Barboza wrote: Next patch will add KVM specific user properties for both MISA and multi-letter extensions. For MISA extensions we want to make use of what is already available in misa_ext_cfgs[] to avoid code re

Re: [PATCH v6 11/20] target/riscv/cpu: add misa_ext_info_arr[]

On 6/29/23 05:59, Andrew Jones wrote: On Wed, Jun 28, 2023 at 06:30:24PM -0300, Daniel Henrique Barboza wrote: Next patch will add KVM specific user properties for both MISA and multi-letter extensions. For MISA extensions we want to make use of what is already available in misa_ext_cfgs[] to

Re: [PATCH v6 11/20] target/riscv/cpu: add misa_ext_info_arr[]

On 6/29/23 08:36, Daniel Henrique Barboza wrote: On 6/29/23 04:26, Philippe Mathieu-Daudé wrote: On 28/6/23 23:30, Daniel Henrique Barboza wrote: Next patch will add KVM specific user properties for both MISA and multi-letter extensions. For MISA extensions we want to make use of what is a

Re: [PATCH v4 4/5] vfio/pci: Free resources when vfio_migration_realize fails

On 29/06/2023 09:40, Zhenzhong Duan wrote: > When vfio_realize() succeeds, hot unplug will call vfio_exitfn() > to free resources allocated in vfio_realize(); when vfio_realize() > fails, vfio_exitfn() is never called and we need to free resources > in vfio_realize(). > > In the case that vfio_mig

Re: [PATCH v6 12/20] target/riscv: add KVM specific MISA properties

On 6/29/23 06:12, Andrew Jones wrote: On Wed, Jun 28, 2023 at 06:30:25PM -0300, Daniel Henrique Barboza wrote: Using all TCG user properties in KVM is tricky. First because KVM supports only a small subset of what TCG provides, so most of the cpu->cfg flags do nothing for KVM. Second, and mo

Re: [PATCH v2 05/38] crypto/aes: Add constants for ShiftRows, InvShiftRows

On 6/29/23 12:21, Ard Biesheuvel wrote: +/* AES ShiftRows, for complete unrolling. */ +enum { +AES_SH_0 = 0x0, +AES_SH_1 = 0x5, +AES_SH_2 = 0xa, +AES_SH_3 = 0xf, +AES_SH_4 = 0x4, +AES_SH_5 = 0x9, +AES_SH_6 = 0xe, +AES_SH_7 = 0x3, +AES_SH_8 = 0x8, +AES_SH_9

Re: [PATCH v3 17/36] plugins: force slow path when plugins instrument memory ops

Richard Henderson writes: > On 6/28/23 11:06, Alex Bennée wrote: >>> I thought we dropped this patch until we could do something with TLB >>> accesses. >> I did suggest something like: >> --8<---cut here---start->8--- >> modified include/hw/core/cpu.h >> @@

[PATCH 0/2] accel/tcg: Remove qemu_tcg_mttcg_enabled()

Remove qemu_tcg_mttcg_enabled(): - check for CF_PARALLEL in riscv cpu_init(), - directly check 'mttcg_enabled' in TCG code. Philippe Mathieu-Daudé (2): target/riscv: Check for CF_PARALLEL instead of qemu_tcg_mttcg_enabled accel/tcg: Replace qemu_tcg_mttcg_enabled() by mttcg_enabled accel/tcg

[PATCH 1/2] target/riscv: Check for CF_PARALLEL instead of qemu_tcg_mttcg_enabled

A CPU knows whether MTTCG is enabled or not because it is reflected in its TCG flags via the CF_PARALLEL bit. Suggested-by: Alex Bennée Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/ri

[PATCH 2/2] accel/tcg: Replace qemu_tcg_mttcg_enabled() by mttcg_enabled

Move 'mttcg_enabled' declaration to "tcg-accel-ops-mttcg.h" which is a TCG-internal header; un-inline and remove the qemu_tcg_mttcg_enabled() definition. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/tcg-accel-ops-mttcg.h | 8 include/hw/core/cpu.h | 9 - accel/t

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