RISCV_EXCP_SEMIHOST is set to 0x10, which can be a local interrupt id
as well. This change moves RISCV_EXCP_SEMIHOST to switch case so that
async flag check is performed before invoking semihosting logic.
Signed-off-by: Rajnesh Kanwal
---
target/riscv/cpu_helper.c | 10 --
1 file changed
With H-Ext supported, VS bits are all hardwired to one in MIDELEG
denoting always delegated interrupts. This is being done in rmw_mideleg
but given mideleg is used in other places when routing interrupts
this change initializes it in riscv_cpu_realize to be on the safe side.
Signed-off-by: Rajnesh
This change adds support for inserting virtual interrupts from M-mode
into S-mode using mvien and mvip csrs. IRQ filtering is a use case of
this change, i-e M-mode can stop delegating an interrupt to S-mode and
instead enable it in MIE and receive those interrupts in M-mode and then
selectively inj
This series adds M and HS-mode virtual interrupt and IRQ filtering support.
This allows inserting virtual interrupts from M/HS-mode into S/VS-mode
using mvien/hvien and mvip/hvip csrs. IRQ filtering is a use case of
this change, i-e M-mode can stop delegating an interrupt to S-mode and
instead ena
This is to allow virtual interrupts to be inserted into S and VS
modes. Given virtual interrupts will be maintained in separate
mvip and hvip CSRs, riscv_cpu_update_mip will no longer be in the
path and interrupts need to be triggered for these cases from
rmw_hvip64 and rmw_mvip64 functions.
Signe
This change adds support for inserting virtual interrupts from HS-mode
into VS-mode using hvien and hvip csrs. This also allows for IRQ filtering
from HS-mode.
Also, the spec doesn't mandate the interrupt to be actually supported
in hardware. Which allows HS-mode to assert virtual interrupts to VS
On Mon, May 22, 2023 at 6:18 PM Daniel Henrique Barboza
wrote:
>
>
>
> On 5/18/23 08:38, Rajnesh Kanwal wrote:
> > This change adds support for inserting virtual interrupts from HS-mode
> > into VS-mode using hvien and hvip csrs. This also allows for IRQ filtering
> > from HS-mode.
> >
> > Also, t
On 08/05/2023 23:18, Wei Liu wrote:
On Fri, May 05, 2023 at 05:20:43PM +0200, Mickaël Salaün wrote:
From: Madhavan T. Venkataraman
Each supported hypervisor in x86 implements a struct x86_hyper_init to
define the init functions for the hypervisor. Define a new init_heki()
entry point in str
This does involve temporarily stubbing out some helper functions
before we excise the rest of the code.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20230524133952.3971948-4-alex.ben...@linaro.org>
---
Also rename the section to make the fact this is part of the
management protocol even clearer.
Suggested-by: Markus Armbruster
Signed-off-by: Alex Bennée
---
docs/about/deprecated.rst | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/docs/about/deprecated.rs
I don't think I can remove the parameters directly but certainly mark
them as deprecated.
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
Message-Id: <20230524133952.3971948-6-alex.ben...@linaro.org>
---
v6
- s/QAPI/
Hi Stefan,
The references dynamic vcpu tracing support was removed when the
original TCG trace points where removed. However there was still a
legacy of dynamic trace state to track this in cpu.h and extra hash
variables to track TBs. While the removed vcpu tracepoints are not in
generated code (o
Now we no longer have vcpu controlled trace events we can excise the
code that allows us to query its status.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20230524133952.3971948-8-alex.ben...@linaro.org>
Now we no longer have dynamic state affecting things we can remove the
additional fields in cpu.h and simplify the TB hash calculation.
For the benchmark:
hyperfine -w 2 -m 20 \
"./arm-softmmu/qemu-system-arm -cpu cortex-a15 \
-machine type=virt,highmem=off \
-display no
This makes it a little easier for developers to find where things
where being generated.
Reviewed-by: Richard Henderson
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
Signed-off-by: Alex Bennée
Message-Id: <20230524133952.3971948-5-alex.ben...@
While these are all in helper functions being designated vcpu events
complicates the removal of the dynamic vcpu state code. TCG plugins
allow you to instrument vcpu_[init|exit|idle].
We rename cpu_reset and make it a normal trace point.
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Richard Henderso
This is pure duplication now. Both bsd-user and linux-user have
builtin strace support and we can also track syscalls via the plugins
system.
Reviewed-by: Warner Losh
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
Mes
Now we no longer have any events that are for vcpus we can start
excising the code from the trace control. As the vcpu parameter is
encoded as part of QMP we just stub out the has_vcpu/vcpu parameters
rather than alter the API.
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Richard Henderson
Signed-o
We weren't using cs_base in the hash calculations before. Since the
arm front end moved a chunk of flags in a378206a20 (target/arm: Move
mode specific TB flags to tb->cs_base) they comprise of an important
part of the execution state.
Widen the tb_hash_func to include cs_base and expand to qemu_xx
No need to pass zeros as we have helpers that do that for us.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Christian Schoenebeck
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20230524133952.3971948-10-alex.ben...@linaro.org>
---
hw/9p
From: Ira Weiny
CXL has 24 bit unaligned fields which need to be stored to. CXL is
specified as little endian.
Define st24_le_p() and the supporting functions to store such a field
from a 32 bit host native value.
The use of b, w, l, q as the size specifier is limiting. So "24" was
used for t
v8: Formatting fixes for QMP docs from Markus Armbruster (thanks!)
The bswap naming discussions seems to have died down, so I'll stick
with this version (24)
Precursors now all upstream which make this email easier to write :)
The kernel support for Poison handling is now upstream.
This code ha
Inject poison using QMP command cxl-inject-poison to add an entry to the
poison list.
For now, the poison is not returned CXL.mem reads, but only via the
mailbox command Get Poison List. So a normal memory read to an address
that is on the poison list will not yet result in a synchronous exception
Very simple implementation to allow testing of corresponding
kernel code. Note that for now we track each 64 byte section
independently. Whilst a valid implementation choice, it may
make sense to fuse entries so as to prove out more complex
corners of the kernel code.
Reviewed-by: Ira Weiny
Revi
Current implementation is very simple so many of the corner
cases do not exist (e.g. fragmenting larger poison list entries)
Reviewed-by: Fan Ni
Reviewed-by: Ira Weiny
Signed-off-by: Jonathan Cameron
---
include/hw/cxl/cxl_device.h | 1 +
hw/cxl/cxl-mailbox-utils.c | 82 +
On 5/24/23 03:26, Peter Maydell wrote:
On Tue, 23 May 2023 at 13:04, Peter Maydell wrote:
Add some tests for various cases of named-field use, both ones that
should work and ones that should be diagnosed as errors.
Signed-off-by: Peter Maydell
---
tests/decode/err_field1.decode | 2
> > +# @temperature: Device temperature in degrees Celsius.
> > +#
> > +# @dirty-shutdown-count: Number of time the device has been unable to
>
> Number of times
>
> > +#determine whether data loss may have occurred.
> > +#
> > +# @corrected-volatile-error-count: Total
v8: QMP documentation formatting fixes from Markus.
Gathered tags.
Based on:
[PATCH v8 0/4] hw/cxl: Poison get, inject, clear
Based on: Message-ID: 20230526170010.574-1-jonathan.came...@huawei.com
Updated cover letter from earlier versions:
One challenge here is striking the right balance b
From: Ira Weiny
The device status register block was defined. However, there were no
individual registers nor any data wired up.
Define the event status register [CXL 3.0; 8.2.8.3.1] as part of the
device status register block. Wire up the register and initialize the
event status for each log.
Following patches will need access to the mailbox return code
type so move it to the header.
Reviewed-by: Ira Weiny
Reviewed-by: Fan Ni
Signed-off-by: Jonathan Cameron
---
include/hw/cxl/cxl_device.h | 28
hw/cxl/cxl-mailbox-utils.c | 28 --
From: Ira Weiny
CXL testing is benefited from an artificial event log injection
mechanism.
Add an event log infrastructure to insert, get, and clear events from
the various logs available on a device.
Replace the stubbed out CXL Get/Clear Event mailbox commands with
commands that operate on the
From: Ira Weiny
Replace the stubbed out CXL Get/Set Event interrupt policy mailbox
commands. Enable those commands to control interrupts for each of the
event log types.
Skip the standard input mailbox length on the Set command due to DCD
being optional. Perform the checks separately.
Signed-
From: Ira Weiny
To facilitate testing provide a QMP command to inject a general media
event. The event can be added to the log specified.
Signed-off-by: Ira Weiny
Reviewed-by: Fan Ni
Acked-by: Markus Armbruster
Signed-off-by: Jonathan Cameron
---
qapi/cxl.json | 74 +
Defined in CXL r3.0 8.2.9.2.1.2 DRAM Event Record, this event
provides information related to DRAM devices.
Example injection command in QMP:
{ "execute": "cxl-inject-dram-event",
"arguments": {
"path": "/machine/peripheral/cxl-mem0",
"log": "informational",
"flags": 1
These events include a copy of the device health information at the
time of the event. Actually using the emulated device health would
require a lot of controls to manipulate that state. Given the aim
of this injection code is to just test the flows when events occur,
inject the contents of the de
On 26/05/2023 14:30, BALATON Zoltan wrote:
On Fri, 26 May 2023, Thomas Huth wrote:
pci-ohci might habe been disabled in the QEMU binary (e.g. when "configure"
has been run with "--without-default-devices"). Thus we should check
for its availability before blindly using it.
Signed-off-by: Thoma
The Intel 82576EB GbE Controller say that the Physical and Virtual
Functions support Function Level Reset. Add the capability to each
device model.
Cc: Akihiko Odaki
Fixes: 3a977deebe6b ("Intrdocue igb device emulation")
Signed-off-by: Cédric Le Goater
---
hw/net/igb.c | 3 +++
hw/net/igbvf.c
Nor report any PermissionError on remove.
Previously we were testing with "> /dev/null", but that's not easy
to do with meson test(), so we want to use '-o /dev/null' instead.
That works fine for all of the existing tests, where all errors are
diagnosed before opening the output file. However, PM
On Mon, Apr 24, 2023 at 06:01:36PM -0300, Fabiano Rosas wrote:
> Daniel P. Berrangé writes:
>
> > There are 27 pre-copy live migration scenarios being tested. In all of
> > these we force non-convergance and run for one iteration, then let it
> > converge and wait for completion during the second
LCBB is supposed to overwrite only the bottom 32 bits, but QEMU
erroneously overwrites the entire register.
Fixes: 6d9303322ed9 ("s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARY")
Cc: qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
---
target/s390x/tcg/insn-data.h.inc | 2 +-
1 file cha
Hi,
It was reported that Fedora 38 Clang does not run correctly under
qemu-s390x [1]. Comparing qemu and real s390x instruction traces has
shown that the implementations of LCBB and LOCFHR were not fully
correct.
This series fixes the issues and adds tests. I can now run Fedora 38
Clang under s39
Add a test to prevent regressions.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/s390x/Makefile.target | 1 +
tests/tcg/s390x/lcbb.c | 51 +
2 files changed, 52 insertions(+)
create mode 100644 tests/tcg/s390x/lcbb.c
diff --g
Add a small test to prevent regressions.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/s390x/Makefile.target | 1 +
tests/tcg/s390x/locfhr.c| 29 +
2 files changed, 30 insertions(+)
create mode 100644 tests/tcg/s390x/locfhr.c
diff
LOCFHR should write top-to-top, but QEMU erroneously writes
bottom-to-top.
Fixes: 45aa9aa3b773 ("target/s390x: Implement load-on-condition-2 insns")
Cc: qemu-sta...@nongnu.org
Reported-by: Mikhail Mitskevich
Closes: https://gitlab.com/qemu-project/qemu/-/issues/1668
Signed-off-by: Ilya Leoshkevic
On Fri, May 26, 2023 at 5:04 AM Juan Quintela wrote:
>
> Leonardo Brás wrote:
> > On Mon, 2023-05-15 at 21:56 +0200, Juan Quintela wrote:
> >> We forget several places to add to trasferred amount of data. With
> >> this fixes I get:
> >>
> >>qemu_file_transferred() + multifd_bytes == transfe
On Fri, May 26, 2023 at 5:07 AM Juan Quintela wrote:
>
> Leonardo Brás wrote:
> > On Mon, 2023-05-15 at 21:56 +0200, Juan Quintela wrote:
> >> It is a time that needs to be cleaned each time cancel migration.
> >> Once there create migration_time_since() to calculate how time since a
> >> time in
On Fri, May 26, 2023 at 5:09 AM Juan Quintela wrote:
>
> Leonardo Brás wrote:
> > On Mon, 2023-05-15 at 21:56 +0200, Juan Quintela wrote:
> >> That is the moment we know we have transferred something.
> >>
> >> Signed-off-by: Juan Quintela
> >> Reviewed-by: Cédric Le Goater
> >> ---
> >> migra
On Fri, May 26, 2023 at 5:17 AM Juan Quintela wrote:
>
> Leonardo Brás wrote:
> > On Mon, 2023-05-15 at 21:57 +0200, Juan Quintela wrote:
> >> Signed-off-by: Juan Quintela
> >> Reviewed-by: Cédric Le Goater
> >> ---
> >> migration/migration-stats.h | 8 +++-
> >> migration/migration-stats.
On Fri, May 26, 2023 at 5:18 AM Juan Quintela wrote:
>
> Leonardo Brás wrote:
> > On Mon, 2023-05-15 at 21:57 +0200, Juan Quintela wrote:
> >> Since previous commit, we calculate how much data we have send with
> >> migration_transferred_bytes() so no need to maintain this counter and
> >> rememb
On Fri, May 26, 2023 at 5:21 AM Juan Quintela wrote:
>
> Leonardo Brás wrote:
> > On Mon, 2023-05-15 at 21:57 +0200, Juan Quintela wrote:
> >> When we sent a page through QEMUFile hooks (RDMA) there are three
> >> posiblities:
> >> - We are not using RDMA. return RAM_SAVE_CONTROL_DELAYED and
> >>
On Fri, May 26, 2023 at 5:24 AM Juan Quintela wrote:
>
> Leonardo Brás wrote:
> > On Mon, 2023-05-15 at 21:57 +0200, Juan Quintela wrote:
> >> In the past, we had to put the in the main thread all the operations
> >> related with sizes due to qemu_file not beeing thread safe. As now
> >> all cou
On Fri, 26 May 2023 at 15:28, Igor Mammedov wrote:
>
> On Mon, 3 Apr 2023 21:19:53 -0400
> Dinah Baum wrote:
>
> > Part 1 is a refactor/code motion patch for
> > qapi/machine target required for setup of
> >
> > Part 2 which enables query-cpu-model-expansion
> > on all architectures
> >
> > Part
On Fri, 26 May 2023 at 18:07, Richard Henderson
wrote:
>
> On 5/24/23 03:26, Peter Maydell wrote:
> > On Tue, 23 May 2023 at 13:04, Peter Maydell
> > wrote:
> >>
> >> Add some tests for various cases of named-field use, both ones that
> >> should work and ones that should be diagnosed as errors.
On Fri, 26 May 2023 at 18:40, Richard Henderson
wrote:
>
> Nor report any PermissionError on remove.
>
> Previously we were testing with "> /dev/null", but that's not easy
> to do with meson test(), so we want to use '-o /dev/null' instead.
> That works fine for all of the existing tests, where al
Jonathan Cameron writes:
>> > +# @temperature: Device temperature in degrees Celsius.
>> > +#
>> > +# @dirty-shutdown-count: Number of time the device has been unable to
>>
>> Number of times
>>
>> > +#determine whether data loss may have occurred.
>> > +#
>> > +# @cor
This patch adds an audio device implementing the recent virtio sound
spec (1.2) and a corresponding PCI wrapper device.
PCM functionality is implemented, and jack[0], chmaps[1] messages are
at the moment ignored.
To test this, you'll need a >6.0 kernel compiled with the virtio-snd
flag enabled, w
On Thu, May 04, 2023 at 01:44:39PM +0200, Juan Quintela wrote:
> Fixes this commit, clearly a bad merge after a rebase or similar, it
> should have been its own case since that point.
>
> commit 5b0e9dd46fbda5152566a4a26fd96bc0d0452bf7
> Author: Peter Lieven
> Date: Tue Jun 24 11:32:36 2014 +02
On Thu, May 04, 2023 at 01:44:40PM +0200, Juan Quintela wrote:
> Signed-off-by: Juan Quintela
Reviewed-by: Peter Xu
--
Peter Xu
On Thu, May 04, 2023 at 01:44:41PM +0200, Juan Quintela wrote:
> Signed-off-by: Juan Quintela
Reviewed-by: Peter Xu
--
Peter Xu
On Thu, May 04, 2023 at 01:44:42PM +0200, Juan Quintela wrote:
> This could only happen if the source send
> RAM_SAVE_FLAG_HOOK (i.e. rdma) and destination don't have CONFIG_RDMA.
>
> Signed-off-by: Juan Quintela
Bah, first patch to start reading the master code and it's already merged.
I'll sto
On 5/26/23 10:03 AM, Stefano Garzarella wrote:
The virtio-blk-vhost-vdpa driver in libblkio 1.3.0 supports the fd
passing through the new 'fd' property.
Since now we are using qemu_open() on '@path' if the virtio-blk driver
supports the fd passing, let's announce it.
In this way, the management
b.com/quic/qemu tags/pull-hex-20230526
for you to fetch changes up to 7d196e2196d50e0dda0f87f396d4f4a7ad9aafbe:
Hexagon (target/hexagon) Change Hexagon maintainer (2023-05-26 07:03:41
-0700)
Hexagon update
Applied, thank
On Tue, May 09, 2023 at 02:06:50PM +0200, Juan Quintela wrote:
> Hi
>
> Changes in v3:
> - fix rdma_migration to reset clearly (thanks danp)
> - redo the cherks for migration/rdma
> - rebased on top of the counters series:
> [PATCH 00/21] Migration: More migration atomic counters
> Based-on: Messa
On Wed, May 24, 2023 at 04:01:57PM +0800, Wei Wang wrote:
> qmp_migrate_set_parameters expects to use tmp for parameters check,
> so migrate_params_test_apply is expected to copy the related fields from
> params to tmp. So fix migrate_params_test_apply to use the function
> parameter, *dest, rather
On 5/26/23 12:52, Peter Maydell wrote:
On Fri, 26 May 2023 at 18:40, Richard Henderson
wrote:
Nor report any PermissionError on remove.
Previously we were testing with "> /dev/null", but that's not easy
to do with meson test(), so we want to use '-o /dev/null' instead.
That works fine for all
On Fri, May 26, 2023 at 01:59:08PM +0200, Fiona Ebner wrote:
> Currently, it is only done when the iteration finishes successfully.
> Not cleaning up the userfaultfd write protection can lead to
> symptoms/issues such as the process hanging in memmove or GDB not
> being able to attach.
>
> Signed-
On 5/26/23 11:12, Ilya Leoshkevich wrote:
LOCFHR should write top-to-top, but QEMU erroneously writes
bottom-to-top.
Fixes: 45aa9aa3b773 ("target/s390x: Implement load-on-condition-2 insns")
Cc:qemu-sta...@nongnu.org
Reported-by: Mikhail Mitskevich
Closes:https://gitlab.com/qemu-project/qemu/-/i
On 5/26/23 11:12, Ilya Leoshkevich wrote:
LCBB is supposed to overwrite only the bottom 32 bits, but QEMU
erroneously overwrites the entire register.
Fixes: 6d9303322ed9 ("s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARY")
Cc: qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
Reviewed-b
On 5/26/23 11:12, Ilya Leoshkevich wrote:
Add a test to prevent regressions.
Cc:qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/s390x/Makefile.target | 1 +
tests/tcg/s390x/lcbb.c | 51 +
2 files changed, 52 insertions(+)
creat
On 5/26/23 11:12, Ilya Leoshkevich wrote:
Add a small test to prevent regressions.
Cc:qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/s390x/Makefile.target | 1 +
tests/tcg/s390x/locfhr.c| 29 +
2 files changed, 30 insertions(+)
cre
Dynamically enable Atomic Ops completer support around realize/exit of
vfio-pci devices reporting host support for these accesses and adhering
to a minimal configuration standard. While the Atomic Ops completer
bits in the root port device capabilities2 register are read-only, the
PCIe spec does a
Report the PCIe capability version for a device
Signed-off-by: Alex Williamson
---
hw/pci/pcie.c | 7 +++
include/hw/pci/pcie.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index b8c24cf45f7e..b7f107ed8dd4 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci
This RFC proposes to allow a vfio-pci device to manipulate the PCI
Express capability of an associated root port to enable Atomic Op
completer support as equivalent to host capabilities. This would
dynamically change capability bits in the config space of the root
port on realize and exit of the v
This is a partial linux-headers update for illustrative and testing
purposes only, NOT FOR COMMIT.
Signed-off-by: Alex Williamson
---
linux-headers/linux/vfio.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/linux-headers/linux/vfio.h b/linux-headers/linux/vfio.h
index 4a534
A common helper implementing the realloc algorithm for handling
capabilities.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Signed-off-by: Alex Williamson
---
hw/s390x/s390-pci-vfio.c | 37
hw/vfio/common.c | 46 +++
On 2023/05/26 0:37, Tomasz Dzieciol wrote:
Refactoring is done in preparation for support of multiple advanced
descriptors RX modes, especially packet-split modes.
Signed-off-by: Tomasz Dzieciol
---
hw/net/e1000e_core.c | 18 ++--
hw/net/igb_core.c| 214 ++
On 2023/05/26 0:37, Tomasz Dzieciol wrote:
Packet-split descriptors are used by Linux VF driver for MTU values from 2048
Signed-off-by: Tomasz Dzieciol
---
hw/net/igb_core.c | 357 ++--
hw/net/igb_regs.h | 9 ++
hw/net/trace-events | 2 +-
On 2023/05/26 0:37, Tomasz Dzieciol wrote:
Based-on: <20230523024339.50875-1-akihiko.od...@daynix.com>
("[PATCH v5 00/48] igb: Fix for DPDK")
Purposes of this series of patches:
* introduce packet-split RX descriptors support. This feature is used by Linux
VF driver for MTU values from 2048.
On 5/26/23 09:08, Paolo Bonzini wrote:
The following changes since commit a3cb6d5004ff638aefe686ecd540718a793bd1b1:
Merge tag 'pull-tcg-20230525' of https://gitlab.com/rth7680/qemu into
staging (2023-05-25 11:11:52 -0700)
are available in the Git repository at:
https://gitlab.com/bonzin
Jonathan Cameron writes:
> From: Ira Weiny
>
> To facilitate testing provide a QMP command to inject a general media
> event. The event can be added to the log specified.
>
> Signed-off-by: Ira Weiny
> Reviewed-by: Fan Ni
> Acked-by: Markus Armbruster
> Signed-off-by: Jonathan Cameron
> ---
Jonathan Cameron writes:
> These events include a copy of the device health information at the
> time of the event. Actually using the emulated device health would
> require a lot of controls to manipulate that state. Given the aim
> of this injection code is to just test the flows when events o
Stefano Garzarella writes:
> The virtio-blk-vhost-vdpa driver in libblkio 1.3.0 supports the fd
> passing through the new 'fd' property.
>
> Since now we are using qemu_open() on '@path' if the virtio-blk driver
> supports the fd passing, let's announce it.
> In this way, the management layer can
"T.J. Alumbaugh" writes:
> - working_set_vq to receive Working Set reports from guest
> - notification_vq to send config or request to guest
> - add working set as object property on device
>
> Signed-off-by: T.J. Alumbaugh
> ---
> hw/virtio/virtio-balloon.c | 164 +++
"T.J. Alumbaugh" writes:
> - working_set_vq to receive Working Set reports from guest
> - notification_vq to send config or request to guest
> - add working set as object property on device
>
> Signed-off-by: T.J. Alumbaugh
[...]
> diff --git a/qapi/misc.json b/qapi/misc.json
> index ff070e
"T.J. Alumbaugh" writes:
> - Adds QMP function 'working-set-config'
> - Adds QMP function 'working-set-request'
> - Retrieve working set via 'guest-working-set' property on balloon
>
>>> cat script.py
>
> NAME = "name"
> SOCKET = 'vm.sock'
> BALLOON = "/machine/peripheral/balloon0"
>
> imp
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