On 4/13/23 21:01, Shivaprasad G Bhat wrote:
Add test for vextractbm, vextractwm, vextractdm and vextractqm
instructions. Test works for both qemu-ppc64 and qemu-ppc64le.
Based on the test case written by John Platts posted at [1]
References:
[1]: https://gitlab.com/qemu-project/qemu/-/issues/15
Richard Henderson wrote:
> Use the attribute, which is supported by clang, instead of
> the #pragma, which is not supported and, for some reason,
> also not detected by the meson probe, so we fail by -Werror.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Juan Quintela
On 5/2/23 12:11, Nicholas Piggin wrote:
On Tue May 2, 2023 at 4:13 PM AEST, Harsh Prateek Bora wrote:
On 5/2/23 10:19, Nicholas Piggin wrote:
On Tue Apr 25, 2023 at 12:47 AM AEST, Harsh Prateek Bora wrote:
@@ -1607,49 +1680,15 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu,
On 01/05/2023 16.19, Alexander Bulekov wrote:
A BH callback can free the BH, causing a use-after-free in aio_bh_call.
Fix that by keeping a local copy of the re-entrancy guard pointer.
Buglink: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=58513
Fixes: 9c86c97f12 ("async: Add an optional
On Sat, Apr 29, 2023 at 02:33:17PM +0200, Paolo Bonzini wrote:
> On 4/28/23 17:01, Fabiano Rosas wrote:
> > Also make sure our plugins support parallelism and report it properly
> > to sphinx. Particularly, implement the merge_domaindata method in
> > DBusDomain that is used to merge in data from o
On Tue May 2, 2023 at 5:36 PM AEST, Harsh Prateek Bora wrote:
>
>
> On 5/2/23 12:11, Nicholas Piggin wrote:
> > On Tue May 2, 2023 at 4:13 PM AEST, Harsh Prateek Bora wrote:
> >> On 5/2/23 10:19, Nicholas Piggin wrote:
> >>> On Tue Apr 25, 2023 at 12:47 AM AEST, Harsh Prateek Bora wrote:
> @@
Richard Henderson writes:
> Clang 14, with --enable-tcg-interpreter errors with
>
> include/qemu/int128.h:487:16: error: alignment of field 'i' (128 bits)
> does not match the alignment of the first field in transparent union;
> transparent_union attribute ignored [-Werror,-Wignored-attribu
On Thu, Mar 02, 2023 at 01:37:02PM +, Jonathan Cameron wrote:
> This register in AER should be both writeable and should
> have a default value with a couple of the errors masked
> including the Uncorrectable Internal Error used by CXL for
> it's error reporting.
>
> Signed-off-by: Jonathan Ca
Shivaprasad G Bhat writes:
> In function do_extractm() the mask is calculated as
> dup_const(1 << (element_width - 1)). '1' being signed int
> works fine for MO_8,16,32. For MO_64, on PPC64 host
> this ends up becoming 0 on compilation. The vextractdm
> uses MO_64, and it ends up having mask as
On Mon, May 01 2023, Richard Henderson wrote:
> On 4/28/23 18:50, Juan Quintela wrote:
>> Pardon my ignorance here, but to try to help with migration. How is
>> this mte tag stored?
>> - 1 array of 8bits per page of memory
>> - 1 array of 64bits per page of memory
>> - whatever
>>
>> Lets asume
From: Mads Ynddal
I wanted to use simpletrace.py for an internal project, so I tried to update
and polish the code. Some of the commits resolve specific issues, while some
are more subjective.
I've tried to divide it into commits so we can discuss the
individual changes, and I'm ready to pull th
From: Mads Ynddal
A failed call to `read_header` wouldn't be handled the same for the two
different code paths (one path would try to use `None` as a list).
Changed to raise exception to be handled centrally. This also allows for
easier unpacking, as errors has been filtered out.
Signed-off-by:
From: Mads Ynddal
Instead of explicitly calling `begin` and `end`, we can change the class
to use the context-manager paradigm. This is mostly a styling choice,
used in modern Python code. But it also allows for more advanced analyzers
to handle exceptions gracefully in the `__exit__` method (not
From: Mads Ynddal
The call to `getargspec` was deprecated and in Python 3.11 it has been
removed in favor of `getfullargspec`.
Signed-off-by: Mads Ynddal
---
scripts/simpletrace.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/simpletrace.py b/scripts/simpletrace.
From: Mads Ynddal
The arguments extracted from `sys.argv` named and unpacked to make it
clear what the arguments are and what they're used for.
The two input files were opened, but never explicitly closed. File usage
changed to use `with` statement to take care of this. At the same time,
ownersh
From: Mads Ynddal
NOTE: `process` changes function signature
Moved event_mapping and event_id_to_name down one level in the function
call-stack to keep variable instantiation and usage closer (`process`
and `run` has no use of the variables; `read_trace_records` does).
Instead of passing event_
From: Mads Ynddal
By moving the dynamic argument construction to keyword-arguments,
we can remove all of the specialized handling, and streamline it.
If a tracing method wants to access these, they can define the
kwargs, or ignore it be placing `**kwargs` at the end of the
function's arguments li
From: Mads Ynddal
Readability is subjective, but I've expanded the naming of the variables
and arguments, to help with understanding for new eyes on the code.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Mads Ynddal
---
scripts/simpletrace.py | 34 +-
1 f
From: Mads Ynddal
Define `SimpleException` to differentiate our exceptions from generic
exceptions (IOError, etc.). Adapted simpletrace to support this and
output to stderr.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Mads Ynddal
---
scripts/simpletrace.py | 22 ++
From: Mads Ynddal
Python 3 removed `dict.iteritems()` in favor of `dict.items()`. This
means the script curerntly doesn't work on Python 3.
Signed-off-by: Mads Ynddal
---
scripts/analyse-locks-simpletrace.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/analyse-lo
From: Mads Ynddal
It wasn't clear where the constants and structs came from, so I added
comments to help.
Signed-off-by: Mads Ynddal
---
scripts/simpletrace.py | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/scripts/simpletrace.py b/scripts/simpletrace.py
ind
From: Mads Ynddal
The signature of `process` in simpletrace.py has changed to not take
filepaths as the two first arguments, but rather a file-like object. We
change the code here to reflect that.
Signed-off-by: Mads Ynddal
---
scripts/analyse-locks-simpletrace.py | 3 ++-
1 file changed, 2 in
From: Mads Ynddal
In my work to refactor simpletrace.py, I noticed that there's no
maintainer of it, and has the status of "odd fixes". I'm using it from
time to time, so I'd like to maintain the script.
I've added myself as reviewer under "Tracing" to be informed of changes
that might affect si
On 25.04.23 18:14, Vladimir Sementsov-Ogievskiy wrote:
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
hw/pci/pci.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
Reviewed-by: David Hildenbrand
--
Thanks,
David / dhildenb
On 25.04.23 18:14, Vladimir Sementsov-Ogievskiy wrote:
Fix over-80 lines and missing curly brackets for if-operators, which
are required by QEMU coding style.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
hw/pci/pci.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions
On Fri, 28 Apr 2023 at 08:45, Richard Henderson
wrote:
>
> On 4/27/23 14:16, Fabiano Rosas wrote:
> > Richard Henderson writes:
> >
> >> On 4/26/23 19:00, Fabiano Rosas wrote:
> >>> We're about to move the 32-bit CPUs under CONFIG_TCG, so adjust the
> >>> query-cpu-model-expansion test to check a
On Wed, Apr 26, 2023 at 11:00:46PM +0300, Vladimir Sementsov-Ogievskiy wrote:
> On 26.04.23 07:43, Michael S. Tsirkin wrote:
> > On Tue, Apr 25, 2023 at 07:14:34PM +0300, Vladimir Sementsov-Ogievskiy
> > wrote:
> > > On incoming migration we have the following sequence to load option
> > > ROM:
>
Hi Eric,
you asked me for a review downstream, but since you would have to bring
back any problem to upstream anyway, let's discuss it here. For the
start, let me state that (a) I don't fully understand why this patch
fixes things and (b) I hate this function. More below.
Am 14.04.2023 um 17:33 h
On Wed, 26 Apr 2023 at 19:00, Fabiano Rosas wrote:
>
> Hi,
>
> Some minor changes:
>
> - new patch to move a test under CONFIG_TCG (broken on master);
> - new patch to document the unsupported CPU test (Philippe);
> - changed the test skip message when no KVM or TCG are present (Igor).
Applied to
On 02.05.23 12:48, Michael S. Tsirkin wrote:
On Wed, Apr 26, 2023 at 11:00:46PM +0300, Vladimir Sementsov-Ogievskiy wrote:
On 26.04.23 07:43, Michael S. Tsirkin wrote:
On Tue, Apr 25, 2023 at 07:14:34PM +0300, Vladimir Sementsov-Ogievskiy wrote:
On incoming migration we have the following sequ
On Tue, 25 Apr 2023 at 21:49, Patrick Venture wrote:
>
>
>
> On Thu, Oct 6, 2022 at 6:18 AM Peter Maydell wrote:
>>
>> On Mon, 3 Oct 2022 at 18:38, Patrick Venture wrote:
>> >
>> > The MAC address set from Qemu wasn't being saved into the register space.
>> >
>> > Reviewed-by: Hao Wu
>> > Signe
Am 28.04.23 um 18:54 schrieb Juan Quintela:
> Kevin Wolf wrote:
>> Am 28.04.2023 um 10:38 hat Juan Quintela geschrieben:
>>> Kevin Wolf wrote:
> I am perhaps a bit ingenuous here, but it is there a way to convince
> qemu that snapshot_save_job_bh *HAS* to run on the main thread?
"Michael S. Tsirkin" wrote:
>> > CC pbonzini,dgilbert,quintela,armbru : guys, is poking at runstate_check
>> > like
>> > this the right way to figure out we are not going to use the
>> > device locally before incoming migration will overwrite ROM contents?
>>
>> RUN_STATE_INMIGRATE is set in th
On 02.05.23 13:11, Juan Quintela wrote:
"Michael S. Tsirkin" wrote:
CC pbonzini,dgilbert,quintela,armbru : guys, is poking at runstate_check like
this the right way to figure out we are not going to use the
device locally before incoming migration will overwrite ROM contents?
RUN_STATE_INMIG
On Tue, 25 Apr 2023 at 11:34, Daniel Bertalan wrote:
>
> This query copies the kernel command line into the message buffer. It
> was previously stubbed out to return empty, this commit makes it reflect
> the arguments specified with `-append`.
>
> I observed the following peculiarities on my Pi 3B
Cornelia Huck wrote:
> On Mon, May 01 2023, Richard Henderson wrote:
>
>> On 4/28/23 18:50, Juan Quintela wrote:
>>> Pardon my ignorance here, but to try to help with migration. How is
>>> this mte tag stored?
>>> - 1 array of 8bits per page of memory
>>> - 1 array of 64bits per page of memory
>
From: Fabiano Rosas
The test set -accel tcg, so restrict it to when TCG is present.
Signed-off-by: Fabiano Rosas
Message-Id: <20230426180013.14814-13-faro...@suse.de>
Reviewed-by: Thomas Huth
Reviewed-by: Richard Henderson
Signed-off-by: Thomas Huth
---
tests/qtest/meson.build | 3 ++-
1 fi
Hi Richard!
The following changes since commit 7c18f2d663521f1b31b821a13358ce38075eaf7d:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2023-04-29 23:07:17 +0100)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git tags/pull-request-2023-05
From: Alexander Bulekov
A BH callback can free the BH, causing a use-after-free in aio_bh_call.
Fix that by keeping a local copy of the re-entrancy guard pointer.
Buglink: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=58513
Fixes: 9c86c97f12 ("async: Add an optional reentrancy guard to t
The spice test is currently hanging on FreeBSD. It likely was
never working before, since in the past, our configure script
was failing to detect this feature due to a bug in the spice
package there (it just got enabled recently by the commit
https://cgit.freebsd.org/ports/commit/?id=cf16b1c9063351
On 5/2/23 14:09, Nicholas Piggin wrote:
On Tue May 2, 2023 at 5:36 PM AEST, Harsh Prateek Bora wrote:
On 5/2/23 12:11, Nicholas Piggin wrote:
On Tue May 2, 2023 at 4:13 PM AEST, Harsh Prateek Bora wrote:
On 5/2/23 10:19, Nicholas Piggin wrote:
On Tue Apr 25, 2023 at 12:47 AM AEST, Harsh
On Mon, 17 Apr 2023 at 17:40, Peter Maydell wrote:
>
> The command line option '-singlestep' and its HMP equivalent
> the 'singlestep' command are very confusingly named, because
> they have nothing to do with single-stepping the guest (either
> via the gdb stub or by emulation of guest CPU archit
On Thu, 20 Apr 2023 at 13:22, Peter Maydell wrote:
>
> In commit 5242876f37ca we deprecated the dtb-kaslr-seed property of
> the virt board, but forgot the "since n.n" tag in the documentation
> of this in deprecated.rst.
>
> This deprecation note first appeared in the 7.1 release, so
> retrospect
Am 02.05.23 um 12:03 schrieb Fiona Ebner:
> Am 28.04.23 um 18:54 schrieb Juan Quintela:
>> Kevin Wolf wrote:
>>> Am 28.04.2023 um 10:38 hat Juan Quintela geschrieben:
Kevin Wolf wrote:
>> I am perhaps a bit ingenuous here, but it is there a way to convince
>> qemu that snapshot_save_
On Mon, 24 Apr 2023 at 17:27, Thomas Huth wrote:
>
> On 24/04/2023 17.19, Peter Maydell wrote:
> > The msf2-emac ethernet controller has functions emac_load_desc() and
> > emac_store_desc() which read and write the in-memory descriptor
> > blocks and handle conversion between guest and host endian
On Mon, 24 Apr 2023 at 16:27, Peter Maydell wrote:
>
> Both the raspi and aspeed boards load their secondary CPU bootloader
> code in a way that only works on little-endian hosts. This patchset
> fixes that by making them both use the write_bootloader() function
> in boot.c, which gets endianness-
On Mon, 24 Apr 2023 at 16:28, Peter Maydell wrote:
>
> The Allwinner PIC model uses set_bit() and clear_bit() to update the
> values in its irq_pending[] array when an interrupt arrives. However
> it is using these functions wrongly: they work on an array of type
> 'long', and it is passing an ar
On 5/2/23 09:44, Alex Bennée wrote:
Richard Henderson writes:
Clang 14, with --enable-tcg-interpreter errors with
include/qemu/int128.h:487:16: error: alignment of field 'i' (128 bits)
does not match the alignment of the first field in transparent union;
transparent_union attribute ign
Fiona Ebner wrote:
> Am 28.04.23 um 18:54 schrieb Juan Quintela:
>> Kevin Wolf wrote:
>>> Am 28.04.2023 um 10:38 hat Juan Quintela geschrieben:
Kevin Wolf wrote:
>> I am perhaps a bit ingenuous here, but it is there a way to convince
>> qemu that snapshot_save_job_bh *HAS* to run on
On 5/2/23 08:11, Juan Quintela wrote:
Richard Henderson wrote:
Use the attribute, which is supported by clang, instead of
the #pragma, which is not supported and, for some reason,
also not detected by the meson probe, so we fail by -Werror.
Signed-off-by: Richard Henderson
Reviewed-by: Juan
On Mon, 24 Apr 2023 at 16:39, Peter Maydell wrote:
>
> This patchset fixes a bug where on a big-endian 64-bit host the
> guest would crash immediately when it did an ERET. This happens
> because when we load the new PC value from CPUARMState::esr_el[2]
> we do a 32-bit load even though the struct
On Mon, 24 Apr 2023 at 17:50, Peter Maydell wrote:
>
> This patchset fixes bugs in the sd controller and ethernet controller
> devices used in the orangepi-pc board model. The bug is the same in
> both cases: we read and write a descriptor struct from guest memory
> without byte-swapping it, so th
Fiona Ebner wrote:
> Am 02.05.23 um 12:03 schrieb Fiona Ebner:
>> Am 28.04.23 um 18:54 schrieb Juan Quintela:
>>> Kevin Wolf wrote:
Am 28.04.2023 um 10:38 hat Juan Quintela geschrieben:
> Kevin Wolf wrote:
>>> I am perhaps a bit ingenuous here, but it is there a way to convince
Richard Henderson wrote:
> On 4/28/23 20:11, Juan Quintela wrote:
>> The following changes since commit 05d50ba2d4668d43a835c5a502efdec9b92646e6:
>>Merge tag 'migration-20230427-pull-request' of
>> https://gitlab.com/juan.quintela/qemu into staging (2023-04-28
>> 08:35:06 +0100)
>> are availab
Le 04/04/2023 à 07:21, Daniil Kovalev a écrit :
If a program requires fr1, we should set the FR bit of CP0 control status
register and add F64 hardware flag. The corresponding `else if` branch
statement is copied from the linux kernel sources (see `arch_check_elf` function
in linux/arch/mips/kern
Peter Maydell writes:
> On Mon, 17 Apr 2023 at 17:40, Peter Maydell wrote:
>>
>> The command line option '-singlestep' and its HMP equivalent
>> the 'singlestep' command are very confusingly named, because
>> they have nothing to do with single-stepping the guest (either
>> via the gdb stub or b
On Tue, 2 May 2023 at 11:39, Juan Quintela wrote:
> Richard, once that we are here, one of the problem that we are having is
> that the test is exiting with an abort, so we have no clue what is
> happening. Is there a way to get a backtrace, or at least the number
This has been consistently an i
On 4/13/23 20:01, Shivaprasad G Bhat wrote:
In function do_extractm() the mask is calculated as
dup_const(1 << (element_width - 1)). '1' being signed int
works fine for MO_8,16,32. For MO_64, on PPC64 host
this ends up becoming 0 on compilation. The vextractdm
uses MO_64, and it ends up having ma
The URLs here are not valid anymore - looks like the assets got moved
into the pub/archive/ subfolder instead.
Signed-off-by: Thomas Huth
---
tests/avocado/virtio-gpu.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/avocado/virtio-gpu.py b/tests/avocado/virtio-gpu
On 5/2/23 10:03, Cornelia Huck wrote:
Has anyone been able to access a real system with MTE? (All the systems
where I had hoped that MTE would be available didn't have MTE in the end
so far, so I'd be interested to hear if anybody else already got to play
with one.) Honestly, I don't want to even
On 4/27/23 08:26, Tianrui Zhao wrote:
Define some functions in target/loongarch/kvm.c, such as
kvm_arch_put_registers, kvm_arch_get_registers and
kvm_arch_handle_exit, etc. which are needed by kvm/kvm-all.c.
Now the most functions has no content and they will be
implemented in the next patches.
On 4/27/23 08:26, Tianrui Zhao wrote:
Supplement vcpu env initial when vcpu reset, including
init vcpu mp_state value to KVM_MP_STATE_RUNNABLE and
init vcpu CSR_CPUID,CSR_TID to cpu->cpu_index.
Signed-off-by: Tianrui Zhao
---
target/loongarch/cpu.c | 3 +++
target/loongarch/cpu.h | 2 ++
2 f
Hi Peter,
Thank you for merging the patch.
On Tuesday, May 2nd, 2023 at 12:15, Peter Maydell
wrote:
>
> Are there any particularly interesting bits of guest software
> that try to read this property ?
We plan to use it in the AArch64 port of SerenityOS temporarily, while
we are in the process
On 5/1/23 22:31, Taylor Simpson wrote:
Changes in v3
Fix bugs exposed by dpmpyss_rnd_s0 instruction
Set correct size/signedness for constants
Test cases added to tests/tcg/hexagon/misc.c
Changes in v2
Fix bug in imm_print identified in clang build
Currently, idef
The following changes since commit 7c18f2d663521f1b31b821a13358ce38075eaf7d:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2023-04-29 23:07:17 +0100)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230502
From: Kiran Ostrolenk
This is for use in the RISC-V vclz and vctz instructions (implemented in
proceeding commit).
Signed-off-by: Kiran Ostrolenk
Reviewed-by: Richard Henderson
Message-Id: <20230428144757.57530-11-lawrence.hun...@codethink.co.uk>
Signed-off-by: Richard Henderson
---
include/
Since TCG_TYPE_I32 values are kept sign-extended in registers, we need not
extend if the register matches. This is already relied upon by comparisons.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target.c.inc | 4 +++-
1 file changed, 3 insertions(+), 1
Use the attribute, which is supported by clang, instead of
the #pragma, which is not supported and, for some reason,
also not detected by the meson probe, so we fail by -Werror.
Signed-off-by: Richard Henderson
Reviewed-by: Juan Quintela
Message-Id: <20230501210555.289806-1-richard.hender...@lin
From: Nazar Kazakov
Add tcg expander and helper functions for rotate right
vector with scalar operand.
Signed-off-by: Nazar Kazakov
Message-Id: <20230428144757.57530-10-lawrence.hun...@codethink.co.uk>
[rth: Split out of larger patch; mask rotation count.]
Signed-off-by: Richard Henderson
---
From: Dickon Hood
Rotates have been fixed up to only allow for reasonable rotate amounts
(ie, no rotates >7 on an 8b value etc.) This fixes a problem with riscv
vector rotate instructions.
Signed-off-by: Dickon Hood
Reviewed-by: Richard Henderson
Message-Id: <20230428144757.57530-9-lawrence.h
From: Weiwei Li
When PMP entry overlap part of the page, we'll set the tlb_size to 1, which
will make the address in tlb entry set with TLB_INVALID_MASK, and the next
access will again go through tlb_fill.However, this way will not work in
tb_gen_code() => get_page_addr_code_hostp(): the TLB host
Drop inline marker: let compiler decide.
Change return type to uint64_t: this matches the computation in the
return statement and the local variable assignment in the caller.
Rename local to dirty_ring_size_MB to fix typo.
Simplify conversion to MiB via qemu_target_page_bits and right shift.
Rev
From: Nazar Kazakov
Add tcg expander and helper functions for and-compliment
vector with scalar operand.
Signed-off-by: Nazar Kazakov
Message-Id: <20230428144757.57530-10-lawrence.hun...@codethink.co.uk>
[rth: Split out of larger patch.]
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-runt
Clang 14, with --enable-tcg-interpreter errors with
include/qemu/int128.h:487:16: error: alignment of field 'i' (128 bits)
does not match the alignment of the first field in transparent union;
transparent_union attribute ignored [-Werror,-Wignored-attributes]
__int128_t i;
^
This is common code in most qemu_{ld,st} slow paths, moving two
registers when there may be overlap between sources and destinations.
At present, this is only used by 32-bit hosts for 64-bit data,
but will shortly be used for more than that.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Rich
At least RISC-V has the need to be able to perform a read
using execute permissions, outside of translation.
Add helpers to facilitate this.
Signed-off-by: Richard Henderson
Acked-by: Alistair Francis
Reviewed-by: Weiwei Li
Tested-by: Daniel Henrique Barboza
Message-Id: <20230325105429.1142530
Since TCG_TYPE_I32 values are kept sign-extended in registers,
via ".w" instructions, we need not extend if the register matches.
This is already relied upon by comparisons.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 4 +++-
1 fil
On 4/27/23 08:26, Tianrui Zhao wrote:
Implement kvm_arch_get/set_registers interfaces, many regs
can be get/set in the function, such as core regs, csr regs,
fpu regs, mp state, etc.
Signed-off-by: Tianrui Zhao
---
meson.build | 1 +
target/loongarch/kvm.c| 356 ++
On Tue, May 02, 2023 at 12:11:38PM +0200, Juan Quintela wrote:
> "Michael S. Tsirkin" wrote:
>
> >> > CC pbonzini,dgilbert,quintela,armbru : guys, is poking at runstate_check
> >> > like
> >> > this the right way to figure out we are not going to use the
> >> > device locally before incoming mig
On 4/27/23 08:26, Tianrui Zhao wrote:
Implement the kvm_arch_init of loongarch, in the function, the
KVM_CAP_MP_STATE cap is checked by kvm ioctl.
Signed-off-by: Tianrui Zhao
---
target/loongarch/kvm.c | 1 +
1 file changed, 1 insertion(+)
Reviewed-by: Richard Henderson
r~
On 4/27/23 08:26, Tianrui Zhao wrote:
+static void kvm_loongarch_vm_stage_change(void *opaque, bool running,
Typo: state
+uint64_t counter_value;
I know naming is hard, but this is so generic it is difficult to determine what it does.
Perhaps kvm_state_counter
Setting the VIRTIO Device Status Field to 0 resets the device. The
device's state is lost, including the vring configuration.
vhost-user.c currently sends SET_STATUS 0 before GET_VRING_BASE. This
risks confusion about the lifetime of the vhost-user state (e.g. vring
last_avail_idx) across VIRTIO d
On Mon, May 01, 2023 at 10:19:56AM -0400, Alexander Bulekov wrote:
> A BH callback can free the BH, causing a use-after-free in aio_bh_call.
> Fix that by keeping a local copy of the re-entrancy guard pointer.
>
> Buglink: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=58513
> Fixes: 9c86c9
04.04.2023 08:21, Daniil Kovalev Wrote:
If a program requires fr1, we should set the FR bit of CP0 control status
register and add F64 hardware flag. The corresponding `else if` branch
statement is copied from the linux kernel sources (see `arch_check_elf` function
in linux/arch/mips/kernel/elf.c
On Tue, 2 May 2023 at 12:10, Daniel Bertalan wrote:
>
> Hi Peter,
>
> Thank you for merging the patch.
>
> On Tuesday, May 2nd, 2023 at 12:15, Peter Maydell
> wrote:
> >
> > Are there any particularly interesting bits of guest software
> > that try to read this property ?
>
> We plan to use it i
On Thu, 27 Apr 2023 at 16:47, Alex Bennée wrote:
>
> The following changes since commit 1eb95e1baef852d0971a1dd62a3293cd68f1ec35:
>
> Merge tag 'migration-20230426-pull-request' of
> https://gitlab.com/juan.quintela/qemu into staging (2023-04-27 10:47:14 +0100)
>
> are available in the Git repo
On 4/25/23 18:14, Pierre Morel wrote:
S390 adds two new SMP levels, drawers and books to the CPU
topology.
The S390 CPU have specific topology features like dedication
and entitlement to give to the guest indications on the host
vCPUs scheduling and help the guest take the best decisions
on the s
From: Fabiano Rosas
It is possible to have a build with both TCG and KVM disabled due to
Xen requiring the i386 and x86_64 binaries to be present in an aarch64
host.
If we build with --disable-tcg on the aarch64 host, we will end-up
with a QEMU binary (x86) that does not support TCG nor KVM.
Sk
The only place left that looks at the old 'singlestep' global
variable is the TCG curr_cflags() function. Replace the old global
with a new 'one_insn_per_tb' which is defined in tcg-all.c and
declared in accel/tcg/internal.h. This keeps it restricted to the
TCG code, unlike 'singlestep' which was
From: Fabiano Rosas
Move all the CONFIG_FOO=y from default.mak into "default y if TCG"
statements in Kconfig. That way they won't be selected when
CONFIG_TCG=n.
I'm leaving CONFIG_ARM_VIRT in default.mak because it allows us to
keep the two default.mak files not empty and keep aarch64-default.ma
From: Fabiano Rosas
The file cpu_tcg.c is about to be moved into the tcg/ directory, so
move the register definitions into a new file.
Also move the function declaration to the more appropriate cpregs.h.
Reviewed-by: Richard Henderson
Signed-off-by: Fabiano Rosas
Reviewed-by: Philippe Mathieu
From: Fabiano Rosas
The migration tests are currently broken for an aarch64 host because
the tests pass no 'machine' and 'cpu' options on the QEMU command
line.
Add a separate class to each architecture so that we can specify
'machine' and 'cpu' options instead of relying on defaults.
Add a ski
From: Fabiano Rosas
The test set -accel tcg, so restrict it to when TCG is present.
Signed-off-by: Fabiano Rosas
Reviewed-by: Thomas Huth
Reviewed-by: Richard Henderson
Message-id: 20230426180013.14814-13-faro...@suse.de
Signed-off-by: Peter Maydell
---
tests/qtest/meson.build | 3 ++-
1 fi
The '-singlestep' option is confusing, because it doesn't actually
have anything to do with single-stepping the CPU. What it does do
is force TCG emulation to put one guest instruction in each TB,
which can be useful in some situations.
Create a new command line argument -one-insn-per-tb, so we ca
From: Fabiano Rosas
The sve-max-vq property has been removed from the -cpu max used with
KVM, so code under kvm_enabled in cpu_max_set_sve_max_vq is not
reachable.
Fixes: 0baa21be49 ("target/arm: Make KVM -cpu max exactly like -cpu host")
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard
Currently we report whether the TCG accelerator is in
'one-insn-per-tb' mode in the 'info status' output. This is a pretty
minor piece of TCG specific information, and we want to deprecate the
'singlestep' field of the associated QMP command. Move the
'one-insn-per-tb' reporting to 'info jit'.
W
The HMP 'singlestep' command, the QMP 'query-status' command and the
HMP 'info status' command (which is just wrapping the QMP command
implementation) look at the 'singlestep' global variable. Make them
access the new TCG accelerator 'one-insn-per-tb' property instead.
This leaves the HMP and QMP
In several places in the 32-bit Arm translate.c, we try to use
load_cpu_field() to load from a CPUARMState field into a TCGv_i32
where the field is actually 64-bit. This works on little-endian
hosts, but gives the wrong half of the register on big-endian.
Add a new load_cpu_field_low32() which loa
In commit 5242876f37ca we deprecated the dtb-kaslr-seed property of
the virt board, but forgot the "since n.n" tag in the documentation
of this in deprecated.rst.
This deprecation note first appeared in the 7.1 release, so
retrospectively add the correct "since 7.1" annotation to it.
Signed-off-b
From: Cédric Le Goater
The arm boot.c code includes a utility function write_bootloader()
which assists in writing a boot-code fragment into guest memory,
including handling endianness and fixing it up with entry point
addresses and similar things. This is useful not just for the boot.c
code but
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