Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/insn_trans/trans_lsx.c.inc | 5 +
target/loongarch/lsx_helper.c | 6 ++
target/loongarch/meson.build| 1 +
target/loongarch/translate.c| 1 +
4 files changed, 13 inse
This patch includes:
- VADDW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- VSUBW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- VADDW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 43 ++
target/loongarch/helper.h
This patch includes:
- V{AND/OR/XOR/NOR/ANDN/ORN}.V;
- V{AND/OR/XOR/NOR}I.B.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 12 +
target/loongarch/helper.h | 2 +
target/loongarch/insn_trans/trans_lsx.c.inc | 56 ++
This patch includes:
- VLDI.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 7 +
target/loongarch/insn_trans/trans_lsx.c.inc | 137
target/loongarch/insns.decode | 4 +
3 files changed, 148 insertio
This patch includes:
- VPCNT.{B/H/W/D}.
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 5 +
target/loongarch/helper.h | 5 +
target/loongarch/insn_trans/trans_lsx.c.inc | 5 +
target/loongarch/insns.decode | 5 +
targ
This patch includes:
- VFCMP.cond.{S/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 94 +
target/loongarch/helper.h | 5 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 32 +++
target/loong
This patch includes:
- VMADD.{B/H/W/D};
- VMSUB.{B/H/W/D};
- VMADDW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- VMADDW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 34 ++
target/loongarch/helper.h
This patch includes:
- VSADD.{B/H/W/D}[U];
- VSSUB.{B/H/W/D}[U].
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 17 +
target/loongarch/insn_trans/trans_lsx.c.inc | 17 +
target/loongarch/insns.decode
Signed-off-by: Song Gao
---
linux-user/loongarch64/signal.c | 4 +-
target/loongarch/cpu.c | 2 +-
target/loongarch/cpu.h | 21 -
target/loongarch/gdbstub.c | 4 +-
target/loongarch/internals.h| 22 +
target/loongarch/machine.c | 79 +
This patch includes:
- VSRLR[I].{B/H/W/D};
- VSRAR[I].{B/H/W/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 18
target/loongarch/helper.h | 18
target/loongarch/insn_trans/trans_lsx.c.inc | 18
tar
This patch includes:
- VSSRLRN.{B.H/H.W/W.D};
- VSSRARN.{B.H/H.W/W.D};
- VSSRLRN.{BU.H/HU.W/WU.D};
- VSSRARN.{BU.H/HU.W/WU.D};
- VSSRLRNI.{B.H/H.W/W.D/D.Q};
- VSSRARNI.{B.H/H.W/W.D/D.Q};
- VSSRLRNI.{BU.H/HU.W/WU.D/DU.Q};
- VSSRARNI.{BU.H/HU.W/WU.D/DU.Q}.
Reviewed-by: Richard Henderson
Signed-off-
This patch includes:
- VSSRLN.{B.H/H.W/W.D};
- VSSRAN.{B.H/H.W/W.D};
- VSSRLN.{BU.H/HU.W/WU.D};
- VSSRAN.{BU.H/HU.W/WU.D};
- VSSRLNI.{B.H/H.W/W.D/D.Q};
- VSSRANI.{B.H/H.W/W.D/D.Q};
- VSSRLNI.{BU.H/HU.W/WU.D/DU.Q};
- VSSRANI.{BU.H/HU.W/WU.D/DU.Q}.
Reviewed-by: Richard Henderson
Signed-off-by: Song
This patch includes:
- VMUL.{B/H/W/D};
- VMUH.{B/H/W/D}[U];
- VMULW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- VMULW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 38 ++
target/loongarch/helper.h | 30 ++
target/loongarch/
This patch includes:
- VFRSTP[I].{B/H}.
Acked-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 5 +++
target/loongarch/helper.h | 5 +++
target/loongarch/insn_trans/trans_lsx.c.inc | 5 +++
target/loongarch/insns.decode
This patch includes:
- VADDA.{B/H/W/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 5 ++
target/loongarch/helper.h | 5 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 53 +
target/loongarch/i
This patch includes:
- VFCVT{L/H}.{S.H/D.S};
- VFCVT.{H.S/S.D};
- VFRINT[{RNE/RZ/RP/RM}].{S/D};
- VFTINT[{RNE/RZ/RP/RM}].{W.S/L.D};
- VFTINT[RZ].{WU.S/LU.D};
- VFTINT[{RNE/RZ/RP/RM}].W.D;
- VFTINT[{RNE/RZ/RP/RM}]{L/H}.L.S;
- VFFINT.{S.W/D.L}[U];
- VFFINT.S.L, VFFINT{L/H}.D.W.
Signed-off-by: Song G
This patch includes:
- VLD[X], VST[X];
- VLDREPL.{B/H/W/D};
- VSTELM.{B/H/W/D}.
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 34 +
target/loongarch/insn_trans/trans_lsx.c.inc | 159
target/loongarch/insns.decode | 36 +
ta
This patch includes:
- VINSGR2VR.{B/H/W/D};
- VPICKVE2GR.{B/H/W/D}[U];
- VREPLGR2VR.{B/H/W/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 33 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 110
target/loon
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 55d7f9255e..c0afc21b2f 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -388,6 +388,7 @@
This patch includes:
- VBITSEL.V;
- VBITSELI.B;
- VSET{EQZ/NEZ}.V;
- VSETANYEQZ.{B/H/W/D};
- VSETALLNEZ.{B/H/W/D}.
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 20 ++
target/loongarch/helper.h | 11 +++
target/loongarch/insn_trans/trans_lsx.c.in
This patch includes:
- VSLLWIL.{H.B/W.H/D.W};
- VSLLWIL.{HU.BU/WU.HU/DU.WU};
- VEXTL.Q.D, VEXTL.QU.DU.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 9 +
target/loongarch/helper.h | 9 +
target/loongarch/insn
This patch includes:
- VHADDW.{H.B/W.H/D.W/Q.D/HU.BU/WU.HU/DU.WU/QU.DU};
- VHSUBW.{H.B/W.H/D.W/Q.D/HU.BU/WU.HU/DU.WU/QU.DU}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 17 +
target/loongarch/helper.h | 18 +
This patch includes:
- VILV{L/H}.{B/H/W/D};
- VSHUF.{B/H/W/D};
- VSHUF4I.{B/H/W/D};
- VPERMI.W;
- VEXTRINS.{B/H/W/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 25
target/loongarch/helper.h | 25
target
This patch includes:
- VREPLVE[I].{B/H/W/D};
- VBSLL.V, VBSRL.V;
- VPACK{EV/OD}.{B/H/W/D};
- VPICK{EV/OD}.{B/H/W/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 35 +
target/loongarch/helper.h | 18 +++
target/
This patch includes:
- VAVG.{B/H/W/D}[U];
- VAVGR.{B/H/W/D}[U].
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 17 ++
target/loongarch/helper.h | 18 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 197 ++
This patch includes:
- VDIV.{B/H/W/D}[U];
- VMOD.{B/H/W/D}[U].
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 17 ++
target/loongarch/helper.h | 17 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 17 ++
This patch includes:
- VF{ADD/SUB/MUL/DIV}.{S/D};
- VF{MADD/MSUB/NMADD/NMSUB}.{S/D};
- VF{MAX/MIN}.{S/D};
- VF{MAXA/MINA}.{S/D};
- VFLOGB.{S/D};
- VFCLASS.{S/D};
- VF{SQRT/RECIP/RSQRT}.{S/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/cpu.h
This patch includes:
- VSRLN.{B.H/H.W/W.D};
- VSRAN.{B.H/H.W/W.D};
- VSRLNI.{B.H/H.W/W.D/D.Q};
- VSRANI.{B.H/H.W/W.D/D.Q}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 16 +++
target/loongarch/helper.h | 16 +++
tar
This patch includes:
- VADDI.{B/H/W/D}U;
- VSUBI.{B/H/W/D}U.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 14
target/loongarch/insn_trans/trans_lsx.c.inc | 37 +
target/loongarch/insns.decode
This patch includes;
- VNEG.{B/H/W/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 10 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 20
target/loongarch/insns.decode | 7 +++
3 files
This patch includes:
- VMAX[I].{B/H/W/D}[U];
- VMIN[I].{B/H/W/D}[U].
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 33
target/loongarch/helper.h | 18 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 200 +++
This patch includes:
- VABSD.{B/H/W/D}[U].
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 9 ++
target/loongarch/helper.h | 9 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 95 +
target/loongarc
This patch includes:
- VSAT.{B/H/W/D}[U].
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 9 ++
target/loongarch/helper.h | 9 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 101
target/loongar
This patch includes:
- VMSKLTZ.{B/H/W/D};
- VMSKGEZ.B;
- VMSKNZ.B.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 7 ++
target/loongarch/helper.h | 7 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 7 ++
target/
This patch includes:
- VCLO.{B/H/W/D};
- VCLZ.{B/H/W/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 9 ++
target/loongarch/helper.h | 9 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 9 ++
target/l
This patch includes:
- VBITCLR[I].{B/H/W/D};
- VBITSET[I].{B/H/W/D};
- VBITREV[I].{B/H/W/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 25 ++
target/loongarch/helper.h | 27 ++
target/loongarch/insn_trans/trans_l
This patch includes:
- VSLL[I].{B/H/W/D};
- VSRL[I].{B/H/W/D};
- VSRA[I].{B/H/W/D};
- VROTR[I].{B/H/W/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 36 +
target/loongarch/insn_trans/trans_lsx.c.inc | 36 +
Introduce set_fpr() and get_fpr() and remove cpu_fpr.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
.../loongarch/insn_trans/trans_farith.c.inc | 72 +++
target/loongarch/insn_trans/trans_fcmp.c.inc | 12 ++--
.../loongarch/insn_trans/trans_fmemory.c.inc | 37 ++
This patch includes:
- VADD.{B/H/W/D/Q};
- VSUB.{B/H/W/D/Q}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 23 +++
target/loongarch/insn_trans/trans_lsx.c.inc | 69 +
target/loongarch/insns.decode |
This patch includes:
- VSIGNCOV.{B/H/W/D}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 5 ++
target/loongarch/helper.h | 5 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 53 +
target/loongarc
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/cpu.c | 2 ++
target/loongarch/cpu.h | 2 ++
target/loongarch/insn_trans/trans_lsx.c.inc | 11 +++
3 files changed, 15 insertions(+)
diff --git a/target/loongarch/cpu.
This patch includes:
- VEXTH.{H.B/W.H/D.W/Q.D};
- VEXTH.{HU.BU/WU.HU/DU.WU/QU.DU}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 9 ++
target/loongarch/helper.h | 9 ++
target/loongarch/insn_trans/trans_lsx.c
This patch includes:
- VSRLRN.{B.H/H.W/W.D};
- VSRARN.{B.H/H.W/W.D};
- VSRLRNI.{B.H/H.W/W.D/D.Q};
- VSRARNI.{B.H/H.W/W.D/D.Q}.
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 16 +++
target/loongarch/helper.h | 16 +++
Hi,
This series adds LoongArch LSX instructions, Since the LoongArch
Vol2 is not open, So we use 'RFC' title.
I'm not sure when the manual will be open.
After these patches are reviewed, how about merging them?
About test:
V2 we use RISU test the LoongArch LSX instructions.
QEMU:
https://gi
This patch includes:
- VSEQ[I].{B/H/W/D};
- VSLE[I].{B/H/W/D}[U];
- VSLT[I].{B/H/W/D/}[U].
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/disas.c| 43 +
target/loongarch/helper.h | 23 +++
target/loongarch/insn_trans/trans
Markus Armbruster wrote:
> query-cpu-definitions returns a list of CpuDefinitionInfo, but
> documentation claims CpuDefInfo, which doesn't exist.
>
> query-migrate-capabilities returns a list of
> MigrationCapabilityStatus, but documentation claims
> MigrationCapabilitiesStatus, which doesn't exis
On 24/04/2023 15.10, Ilya Leoshkevich wrote:
On Mon, 2023-04-24 at 14:00 +0100, Alex Bennée wrote:
Ilya Leoshkevich writes:
The QEMU headers contain macros and functions that are useful in
the
test context. Add them to tests' include path. Also provide a
header
similar to "qemu/osdep.h" for
Markus Armbruster wrote:
> A few examples neglect to prefix QMP input with '->'. Fix that.
>
> Two examples have extra space after '<-'. Delete it.
>
> A few examples neglect to show output. Provide some. The example
> output for query-vcpu-dirty-limit could use further improvement. Add
> a T
Leonardo Bras wrote:
> Since the introduction of multifd, it's possible to perform a multifd
> migration and finish it using postcopy.
>
> A bug introduced by yank (fixed on cfc3bcf373) was previously preventing
> a successful use of this migration scenario, and now thing should be
> working on mo
On Mon, Apr 24, 2023 at 11:36:47PM +0300, Vladimir Sementsov-Ogievskiy wrote:
> On migration, on target we load local ROM file. But actual ROM content
> migrates through migration channel. Original ROM content from local
> file doesn't matter. But when size mismatch - we have an error like
>
> Si
On 21/04/2023 16.27, Alexander Bulekov wrote:
Add a flag to the DeviceState, when a device is engaged in PIO/MMIO/DMA.
This flag is set/checked prior to calling a device's MemoryRegion
handlers, and set when device code initiates DMA. The purpose of this
flag is to prevent two types of DMA-based
The virt machine can have two UARTs and the second UART
can be used by the secure payload, firmware or OS residing
in secure world. Will include the UART device to FDT in a
seperated patch.
Signed-off-by: Yong Li
Reviewed-by: LIU Zhiwei
Reviewed-by: Philippe Mathieu-Daudé
---
hw/riscv/virt.c
On 21/04/2023 16.27, Alexander Bulekov wrote:
Signed-off-by: Alexander Bulekov
Reviewed-by: Thomas Huth
Reviewed-by: Darren Kenny
---
include/exec/memory.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 6c0a5e68d3..4e9531bd8a 10064
On Tue, Apr 25, 2023 at 03:26:54AM -0400, Michael S. Tsirkin wrote:
> On Mon, Apr 24, 2023 at 11:36:47PM +0300, Vladimir Sementsov-Ogievskiy wrote:
> > On migration, on target we load local ROM file. But actual ROM content
> > migrates through migration channel. Original ROM content from local
> >
On 21/04/2023 16.27, Alexander Bulekov wrote:
As the code is designed for re-entrant calls from bcm2835_property to
bcm2835_mbox and back into bcm2835_property, mark iomem as
reentrancy-safe.
Signed-off-by: Alexander Bulekov
---
hw/misc/bcm2835_property.c | 7 +++
1 file changed, 7 inser
The following changes since commit c1eb2ddf0f8075faddc5f7c3d39feae3e8e9d6b4:
Update version for v8.0.0 release (2023-04-19 17:27:13 +0100)
are available in the Git repository at:
https://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
for you to fetch changes up to c28db9e000
From: Carlos López
When a virtqueue size is changed by the guest via
virtio_queue_set_num(), its region cache is not automatically updated.
If the size was increased, this could lead to accessing the cache out
of bounds. For example, in vring_get_used_event():
static inline uint16_t vring_ge
From: Peter Xu
These hooks were introduced in:
80a1ea3748 ("memory: move ioeventfd ops to MemoryListener", 2012-02-29)
But they seem to be never used. Drop them.
Cc: Richard Henderson
Signed-off-by: Peter Xu
Message-Id: <20230306193209.516011-1-pet...@redhat.com>
Reviewed-by: Philippe Mathi
From: Viresh Kumar
The current model of memory mapping at the back-end works fine where a
standard call to mmap() (for the respective file descriptor) is enough
before the front-end can start accessing the guest memory.
There are other complex cases though where the back-end needs more
informati
From: Yangming
Optimize the virtio-balloon feature on the ARM platform by adding
a variable to keep track of the current hot-plugged pc-dimm size,
instead of traversing the virtual machine's memory modules to count
the current RAM size during the balloon inflation or deflation
process. This varia
From: Chuck Zmudzinski
This patch provides accessor functions as replacements for direct
access to slot_reserved_mask according to the comment at the top
of include/hw/pci/pci_bus.h which advises that data structures for
PCIBus should not be directly accessed but instead be accessed using
accesso
From: Philippe Mathieu-Daudé
The 'PCI capability offset' is a *PCI* notion. Since AMDVIPCIState
inherits PCIDevice and hold PCI-related fields, move capab_offset
from AMDVIState to AMDVIPCIState.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20230313153031.86107-5-phi...@linaro.org>
Review
From: Vladimir Sementsov-Ogievskiy
Currently block_resize qmp command is simply ignored by vhost-user-blk
export. So, the block-node is successfully resized, but virtio config
is unchanged and guest doesn't see that disk is resized.
Let's handle the resize by modifying the config and notifying t
From: Philippe Mathieu-Daudé
By accessing MemoryRegion internals, amdvi_init() gives the false
idea that the PCI BAR can be modified. However this isn't true
(at least the model isn't ready for that): the device is explicitly
maps at the BAR at the fixed AMDVI_BASE_ADDR address in
amdvi_sysbus_re
From: Viresh Kumar
The same layout is defined twice, once in "single memory region
description" and then in "memory regions description".
Separate out details of memory region from these two and reuse the same
definition later on.
While at it, also rename "memory regions description" to "multip
From: Ani Sinha
Update mailmap to indicate a...@anisinha.ca and anisi...@redhat.com are one and
the same person. Additionally update MAINTAINERS and bits documentation to use
my work (redhat) email.
Signed-off-by: Ani Sinha
Message-Id: <20230320114233.90638-1-anisi...@redhat.com>
Reviewed-by: M
From: Paolo Bonzini
Coverity complains that memset() writes over a const field. Use
an initializer instead, so that the const field is left to zero.
Tests that have to write the const field already use an initializer
for the whole struct, here I am choosing the smallest possible
patch (which is
From: Philippe Mathieu-Daudé
Aside the Frankenstein model of a SysBusDevice realizing a PCIDevice,
QOM parents shouldn't access children internals. In this particular
case, amdvi_sysbus_realize() is just open-coding TYPE_AMD_IOMMU_PCI's
DeviceRealize() handler. Factor it out.
Declare QOM-cast ma
From: Thomas Huth
This switch had been disabled by default by accident in commit
c55cf6ab03f. But we should enable it by default instead to avoid
regressions in the QOM device hierarchy.
Fixes: c55cf6ab03 ("configure, meson: move some default-disabled options to
meson_options.txt")
Signed-off-b
From: Ani Sinha
i440fx machine versions 2.3 and newer supports dynamic ram
resizing. See commit a1666142db6233 ("acpi-build: make ROMs RAM blocks
resizeable") .
Currently supported all q35 machine types (versions 2.4 and newer) supports
resizable RAM/ROM blocks.Therefore the warning generated wh
From: Eugenio Pérez
I'd like to be notified on SVQ patches and review them.
Signed-off-by: Eugenio Pérez
Message-Id: <20230331150410.2627214-1-epere...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Acked-by: Jason Wang
---
MAINTAINERS | 4
1 file changed
From: Stefan Weil
Signed-off-by: Stefan Weil
Message-Id: <20230409201828.1159568-1...@weilnetz.de>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
docs/system/devices/cxl.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/system/devices/cxl.rst
From: Ani Sinha
Updating mailmap to indicate a...@anisinha.ca and anisi...@redhat.com are one
and the same person. Also updating my email in MAINTAINERS for all my acpi work
(reviewing patches and biosbits) to my work email. Also doing the same for
bios bits test framework documentation.
Signed-
From: Viresh Kumar
Since the driver doesn't support interrupts, we must return early when
index is set to VIRTIO_CONFIG_IRQ_IDX.
Fixes: 544f0278afca ("virtio: introduce macro VIRTIO_CONFIG_IRQ_IDX")
Signed-off-by: Viresh Kumar
Message-Id:
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michae
From: Jonathan Cameron
Reproduce issue with
configure --enable-qom-cast-debug ...
qemu-system-x86_64 -display none -machine q35,cxl=on -device pxb-cxl,bus=pcie.0
hw/pci-bridge/pci_expander_bridge.c:54:PXB_DEV: Object 0x5570e0b1ada0 is not
an instance of type pxb
Aborted
The type conversi
From: Igor Mammedov
with Q35 using ACPI PCI hotplug by default, user's request to unplug
device is ignored when it's issued before guest OS has been booted.
And any additional attempt to request device hot-unplug afterwards
results in following error:
"Device XYZ is already in the process of u
From: Cornelia Huck
Add 8.1 machine types for arm/i440fx/m68k/q35/s390x/spapr.
Signed-off-by: Cornelia Huck
Message-Id: <20230314173009.152667-1-coh...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/boards.h| 3 +++
include/hw/i386/pc.h
From: Peter Maydell
Convert pci-testdev.txt to reStructuredText. Includes
some minor wordsmithing.
Signed-off-by: Peter Maydell
Message-Id: <20230420160334.1048224-4-peter.mayd...@linaro.org>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
docs/specs/pci-testdev.txt | 3
From: Peter Maydell
Convert pci-serial.txt to reStructuredText. This includes
some wordsmithing, and the correction of the docs to note
that the Windows inf file includes 2x and 4x support
(as it has done since commit dc9528fdf9f61 in 2014).
Signed-off-by: Peter Maydell
Message-Id: <20230420160
From: Peter Maydell
Convert the pci-ids document from plain text to reStructuredText.
I opted to use definition-lists here because rST tables are
super-clunky, and actually formatting these as tables didn't
seem necessary.
Signed-off-by: Peter Maydell
Message-Id: <20230420160334.1048224-2-pete
On 21/04/2023 16.27, Alexander Bulekov wrote:
This is useful for using unit-tests/fuzzing to detect bugs introduced by
the re-entrancy guard mechanism into devices that are intentionally
re-entrant.
Signed-off-by: Alexander Bulekov
---
softmmu/memory.c | 3 +++
util/async.c | 3 +++
2 f
From: Philippe Mathieu-Daudé
Set PCI static/const fields once in amdvi_pci_class_init.
They will be propagated via DeviceClassRealize handler via
pci_qdev_realize() -> do_pci_register_device() -> pci_config_set*().
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20230313153031.86107-6-phi...
From: Eugenio Pérez
There is no reason to block it as it has nothing to do with the vrings.
All the support of the feature comes via config space.
Signed-off-by: Eugenio Pérez
Suggested-by: Alvaro Karsz
Message-Id: <20230307170018.260557-1-epere...@redhat.com>
Reviewed-by: Michael S. Tsirkin
From: Philippe Mathieu-Daudé
hw/i386/amd_iommu.c seems unmaintained:
After commit 1c7955c450 ("x86-iommu: introduce parent class",
2016-07-14), almost no feature added, 2 bug fixes, other changes
are generic tree-wide API cleanups.
Cc: Roman Kapl
Cc: Wei Huang
Cc: Brijesh Singh
Cc: David Kiar
From: Jason Wang
Commit 1b2b12376c8 ("intel-iommu: PASID support") takes PASID into
account when calculating iotlb hash like:
static guint vtd_iotlb_hash(gconstpointer v)
{
const struct vtd_iotlb_key *key = v;
return key->gfn | ((key->sid) << VTD_IOTLB_SID_SHIFT) |
(key->leve
From: Philippe Mathieu-Daudé
AMDVIState::devid is only accessed by build_amd_iommu() which
has access to the PCIDevice state. Directly get the property
calling object_property_get_int() there.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20230313153031.86107-4-phi...@linaro.org>
Reviewed-
From: Jonathan Cameron
Previously, PXB_CXL_DEVICE, PXB_PCIE_DEVICE and PXB_DEVICE all
have PCI_DEVICE as their direct parent but share a common state
struct PXBDev. convert_to_pxb() is used to get the PXBDev
instance from which ever of these types it is called on.
This patch switches to an expli
> -Original Message-
> From: Akihiko Odaki
> Sent: Monday, 24 April 2023 13:50
> To: Sriram Yagnaraman
> Cc: Jason Wang ; Dmitry Fleytman
> ; Michael S . Tsirkin ; Alex
> Bennée ; Philippe Mathieu-Daudé
> ; Thomas Huth ; Wainer dos Santos
> Moschetta ; Beraldo Leal ;
> Cleber Rosa ; Lau
From: Akihiko Odaki
The documentation used to say there is no device implemented with
SR-IOV, but igb and nvme support SR-IOV today.
Signed-off-by: Akihiko Odaki
Message-Id: <20230414090441.23156-1-akihiko.od...@daynix.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
On Tue, Apr 25, 2023 at 1:15 PM Michael S. Tsirkin wrote:
>
> From: Ani Sinha
>
> Updating mailmap to indicate a...@anisinha.ca and anisi...@redhat.com are one
> and the same person. Also updating my email in MAINTAINERS for all my acpi
> work
> (reviewing patches and biosbits) to my work email.
On Mon, 24 Apr 2023 at 22:56, Jonathan Cameron
wrote:
>
> On Mon, 24 Apr 2023 16:45:48 +0100
> Peter Maydell wrote:
> > On the other hand, having QEMU enumerate PCI devices is *also* a
> > very different model from today, where we assume that the guest
> > code is the one that is going to deal wi
On 25.04.23 10:43, Michael S. Tsirkin wrote:
On Tue, Apr 25, 2023 at 03:26:54AM -0400, Michael S. Tsirkin wrote:
On Mon, Apr 24, 2023 at 11:36:47PM +0300, Vladimir Sementsov-Ogievskiy wrote:
On migration, on target we load local ROM file. But actual ROM content
migrates through migration channe
On 4/24/23 17:32, Nina Schoetterl-Glausch wrote:
On Fri, 2023-04-21 at 12:20 +0200, Pierre Morel wrote:
On 4/20/23 10:59, Nina Schoetterl-Glausch wrote:
On Mon, 2023-04-03 at 18:28 +0200, Pierre Morel wrote:
[..]
In the next version with entitlement being an enum it is right.
However, dele
On Mon, Apr 24, 2023 at 03:01:54PM +0200, Cornelia Huck wrote:
> > @@ -2480,6 +2471,7 @@ static int kvm_init(MachineState *ms)
> > }
> >
> > s->vmfd = ret;
> > +s->check_extension_vm = kvm_check_extension(s,
> > KVM_CAP_CHECK_EXTENSION_VM);
>
> Hm, it's a bit strange to set s->che
Eric Blake wrote:
> On Thu, Apr 20, 2023 at 12:41:25PM +0200, Juan Quintela wrote:
>> Eric Blake wrote:
>
> ...lots of lines...
>
>> > ---
>> > migration/migration.c | 5 ++---
>> > 1 file changed, 2 insertions(+), 3 deletions(-)
>
> ...describing a tiny change ;)
>
>> >
>> > diff --git a/migrat
On 21/04/2023 15.15, Cédric Le Goater wrote:
As mentioned in docs/devel/style.rst "Automatic memory deallocation":
* Variables declared with g_auto* MUST always be initialized,
otherwise the cleanup function will use uninitialized stack memory
This avoids QEMU to coredump when running the "h
On Tue, 2023-04-25 at 10:45 +0200, Pierre Morel wrote:
> On 4/24/23 17:32, Nina Schoetterl-Glausch wrote:
> > On Fri, 2023-04-21 at 12:20 +0200, Pierre Morel wrote:
> > > > On 4/20/23 10:59, Nina Schoetterl-Glausch wrote:
> > > > > > On Mon, 2023-04-03 at 18:28 +0200, Pierre Morel wrote:
> [..]
> >
On 21/04/2023 16.27, Alexander Bulekov wrote:
v7 -> v8:
- Disable reentrancy checks for bcm2835_property's iomem (Patch 7)
- Cache DeviceState* in the MemoryRegion to avoid dynamic cast for
each MemoryRegion access. (Patch 1)
- Make re-entrancy fatal for debug-builds (Patch
On 4/25/23 09:26, Michael S. Tsirkin wrote:
> On Mon, Apr 24, 2023 at 11:36:47PM +0300, Vladimir Sementsov-Ogievskiy wrote:
>> On migration, on target we load local ROM file. But actual ROM content
>> migrates through migration channel. Original ROM content from local
>> file doesn't matter. But wh
Currently, virt machine supports two pflash instances each with
32MB size. However, the first pflash is always assumed to
contain M-mode firmware and reset vector is set to this if
enabled. Hence, for S-mode payloads like EDK2, only one pflash
instance is available for use. This means both code and
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