On 4/14/23 17:23, Fabiano Rosas wrote:
Harsh Prateek Bora writes:
h_enter_nested() currently does a lot of register specific operations
which should be abstracted logically to simplify the code for better
readability. This patch breaks down relevant blocks into respective
helper routines to
On 4/14/23 17:25, Fabiano Rosas wrote:
Harsh Prateek Bora writes:
Currently, it asserts very late in the code flow if lpid is already initialized.
That's not about initializing. It is about making sure the LPIDR is
0. Which has a specific meaning according to the ISA.
Yes, I could rephra
On 4/14/23 17:28, Fabiano Rosas wrote:
Harsh Prateek Bora writes:
Currently, in spapr_exit_nested(), it does a lot of register state
restoring from ptregs/hvstate after mapping each of those before
restoring the L1 host state. This patch breaks down those set of ops
to respective helper rou
On 4/14/23 17:34, Fabiano Rosas wrote:
Harsh Prateek Bora writes:
This patchset introduces helper routines to enable (and does) cleaning
up of h_enter_nested() and spapr_exit_nested() routines in existing api
for nested virtualization on Power/SPAPR for better code readability /
maintenance
On 4/14/23 17:27, Daniel Henrique Barboza wrote:
On 3/31/23 03:53, Harsh Prateek Bora wrote:
Would like to get notified of changes in this area and review them.
Signed-off-by: Harsh Prateek Bora
---
All reviewers are welcome.
Reviewed-by: Daniel Henrique Barboza
Thanks for the warm
On 17.04.23 07:04, Alistair Francis wrote:
+
+/* #define Z069_DEBUG 1 */
+
+#ifdef Z069_DEBUG
+#define z069_debug(fmt, ...)\
+fprintf(stderr, "wdt_z069: %s: "fmt, __func__, ##__VA_ARGS__)
+#else
+#define z069_debug(fmt, ...)
+#endif
Same comment from t
On 14/04/2023 23.06, Vaibhav Jain wrote:
Since commit 74a1b256d775("configure: Bump minimum Clang version to 10.0") qemu
needs Clang version 10.0 as the minimum version to build qemu with
Clang. However 'focal' ships by default with Clang version 7.0.0 which causes an
error while executing the 'C
On 17/4/23 08:02, Viresh Kumar wrote:
Since the driver doesn't support interrupts, we must return early when
index is set to VIRTIO_CONFIG_IRQ_IDX.
Fixes: 544f0278afca ("virtio: introduce macro VIRTIO_CONFIG_IRQ_IDX")
Signed-off-by: Viresh Kumar
---
hw/virtio/vhost-user-i2c.c | 20 +++
On 17-04-23, 09:36, Philippe Mathieu-Daudé wrote:
> On 17/4/23 08:02, Viresh Kumar wrote:
> > Since the driver doesn't support interrupts, we must return early when
> > index is set to VIRTIO_CONFIG_IRQ_IDX.
> >
> > Fixes: 544f0278afca ("virtio: introduce macro VIRTIO_CONFIG_IRQ_IDX")
> > Signed-o
job may be NULL if queue->exit is true. Check
it before dereference job.
Fixes: f31f9c1080 ("vnc: add magic cookie to VncState")
Signed-off-by: Anastasia Belova
---
ui/vnc-jobs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/ui/vnc-jobs.c b/ui/vnc-jobs.c
index 886f9bf611.
On 14/04/2023 23.06, Vaibhav Jain wrote:
Since commit fd8171fe52b5e("target/hexagon: import lexer for idef-parser") the
hexagon target uses 'flex' to generate idef-parser. However 'focal' may not have
'flex' pre-installed, consequently following error is seen with travis when
trying to execute th
Hi Jamie,
On 14/4/23 12:51, Jamie Iles wrote:
The round-robin scheduler will iterate over the CPU list with an
assigned budget until the next timer expiry and may exit early because
of a TB exit. This is fine under normal operation but with icount
enabled and SMP it is possible for a CPU to be
Viresh Kumar writes:
> On 14-04-23, 17:04, Alex Bennée wrote:
>> hw/virtio/vhost-user-device-pci.c | 71 +
>> hw/virtio/vhost-user-device.c | 359 ++
>> hw/virtio/vhost-user-fs.c | 4 +-
>> hw/virtio/vhost-user-gpio.c| 405 +
On 17/04/2023 10.39, you.chen wrote:
In this patch, we added qatzip build option in the meson_options.txt and
meson-buildoptons.sh to support qemu build with qatzip.
If you installed qatzip and would like to use it for live migration, you could use
"--enable-qatzip" during configure, it will ch
Hi Peter,
On 4/13/23 14:05, Peter Maydell wrote:
On Thu, 13 Apr 2023 at 11:50, Peter Maydell wrote:
I just found a hung netdev-socket test on our s390 CI runner.
Looks like a deadlock, no processes using CPU.
Here's the backtrace; looks like both QEMU processes are sat
idle but the test proce
On 4/11/23 14:27, Nina Schoetterl-Glausch wrote:
On Tue, 2023-04-04 at 16:04 +0200, Pierre Morel wrote:
On 4/4/23 14:35, Cédric Le Goater wrote:
@@ -0,0 +1,15 @@
+/*
+ * CPU Topology
+ *
+ * Copyright IBM Corp. 2022
Shouldn't we have some range : 2022-2023 ?
There was a discussion on this i
Philippe Mathieu-Daudé writes:
> On 17/4/23 08:02, Viresh Kumar wrote:
>> Since the driver doesn't support interrupts, we must return early when
>> index is set to VIRTIO_CONFIG_IRQ_IDX.
>> Fixes: 544f0278afca ("virtio: introduce macro
>> VIRTIO_CONFIG_IRQ_IDX")
>> Signed-off-by: Viresh Kumar
Packet-split descriptors are used by Linux VF driver for MTU values from 2048
upwards.
Signed-off-by: Tomasz Dzieciol
---
hw/net/e1000x_regs.h | 1 +
hw/net/igb_core.c | 701 ++---
hw/net/igb_regs.h | 18 ++
hw/net/trace-events| 4 +-
test
Alex Bennée writes:
> When specialising general purpose objects it is sometimes useful to
> "fix" some of the properties that were configurable by the base
> classes. We will use this facility when specialising
> vhost-user-device.
>
> Signed-off-by: Alex Bennée
> ---
> qapi/qom.json
On 4/17/23 09:21, Harsh Prateek Bora wrote:
On 4/14/23 17:34, Fabiano Rosas wrote:
Harsh Prateek Bora writes:
This patchset introduces helper routines to enable (and does) cleaning
up of h_enter_nested() and spapr_exit_nested() routines in existing api
for nested virtualization on Power/SPA
Laurent Vivier writes:
> Hi Peter,
>
> On 4/13/23 14:05, Peter Maydell wrote:
>> On Thu, 13 Apr 2023 at 11:50, Peter Maydell wrote:
>>>
>>> I just found a hung netdev-socket test on our s390 CI runner.
>>> Looks like a deadlock, no processes using CPU.
>>> Here's the backtrace; looks like both
Hi Corey,
thank you for your response.
Could you give me some hints how to make IO operations non-blocking in QEMU? Is
there a code reference in the source code of QEMU I could use?
Karol
From: Corey Minyard on behalf of Corey Minyard
Sent: Thursday, Mar
Hi Alistair,
> > @@ -936,6 +936,11 @@ restart:
> > return TRANSLATE_FAIL;
> > }
> >
> > +/* PTE reserved bits must be cleared otherwise an exception is
> > raised */
> > +if (riscv_cpu_mxl(env) == MXL_RV64 && (pte & PTE_RESERVED)) {
> > +return TR
This commit adds a new audiodev backend to allow QEMU to use Pipewire as
both an audio sink and source. This backend is available on most systems
Add Pipewire entry points for QEMU Pipewire audio backend
Add wrappers for QEMU Pipewire audio backend in qpw_pcm_ops()
qpw_write function returns the c
Sergio Lopez writes:
> Add the required infrastructure to support generating multitouch events.
>
> Signed-off-by: Sergio Lopez
> Reviewed-by: Marc-André Lureau
> ---
> include/ui/input.h| 3 +++
> qapi/ui.json | 46 ---
> replay/replay-inp
On 4/16/23 23:35, Alistair Francis wrote:
On Thu, Apr 13, 2023 at 3:24 AM Daniel Henrique Barboza
wrote:
On 4/12/23 08:35, Weiwei Li wrote:
On 2023/4/12 18:55, Alistair Francis wrote:
On Wed, Apr 12, 2023 at 12:55 PM Weiwei Li wrote:
On 2023/4/12 10:12, Alistair Francis wrote:
On F
On 4/11/2023 3:27 PM, Alex Bennée wrote:
>
> "Wu, Fei" writes:
>
>> On 4/10/2023 6:36 PM, Alex Bennée wrote:
>>>
>>> Richard Henderson writes:
>>>
On 4/6/23 00:46, Alex Bennée wrote:
> If your aim is to examine JIT efficiency what is wrong with the current
> "info jit" that you can
On 11/04/2023 12.26, Peter Maydell wrote:
On Wed, 8 Mar 2023 at 01:14, Michael S. Tsirkin wrote:
From: Jonathan Cameron
The CXL r3.0 specification allows for there to be no HDM decoders on CXL
Host Bridges if they have only a single root port. Instead, all accesses
directed to the host bridg
On Mon, Apr 17, 2023 at 01:22:51PM +0200, Thomas Huth wrote:
> On 11/04/2023 12.26, Peter Maydell wrote:
> > On Wed, 8 Mar 2023 at 01:14, Michael S. Tsirkin wrote:
> > >
> > > From: Jonathan Cameron
> > >
> > > The CXL r3.0 specification allows for there to be no HDM decoders on CXL
> > > Host
Markus Armbruster writes:
> Alex Bennée writes:
>
>> When specialising general purpose objects it is sometimes useful to
>> "fix" some of the properties that were configurable by the base
>> classes. We will use this facility when specialising
>> vhost-user-device.
>>
>> Signed-off-by: Alex Be
Thomas Huth writes:
> Improve the runtime of the device-crash-test jobs by avoiding
> to run "configure" again and by forcing to test with TCG only
> (instead of testing twice, with TCG and KVM).
Queued to testing/next, thanks.
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
On Mon, 17 Apr 2023 at 12:33, Alex Bennée wrote:
> The use-case is this whole series. Basically I want to have a generic
> device (vhost-user-device) which has a bunch of control knobs the user
> can fiddle with (e.g. virtio id, num_vqs and the like). However for the
> specialised versions of this
"Wu, Fei" writes:
> On 4/11/2023 3:27 PM, Alex Bennée wrote:
>>
>> "Wu, Fei" writes:
>>
>>> On 4/10/2023 6:36 PM, Alex Bennée wrote:
Richard Henderson writes:
> On 4/6/23 00:46, Alex Bennée wrote:
>> If your aim is to examine JIT efficiency what is wrong with the curr
On Mon, 3 Apr 2023 at 20:17, wrote:
>
> From: Francesco Cagnin
>
> Support is added for single-stepping, software breakpoints, hardware
> breakpoints and watchpoints. The code has been structured like the KVM
> counterpart (and many parts are basically identical).
>
> Guests can be debugged throu
On 12/04/2023 19:50, David Woodhouse wrote:
From: David Woodhouse
There was a superfluous allocation of the XS handle, leading to it
being leaked on both the error path and the success path (where it gets
allocated again).
Spotted by Coverity (CID 1508098).
Fixes: ba2a92db1ff6 ("hw/xen: Add x
On 12/04/2023 19:51, David Woodhouse wrote:
From: David Woodhouse
In restructuring to allow for internal emulation of Xen functionality,
I broke compatibility for Xen 4.6 and earlier. Fix this by explicitly
removing support for anything older than 4.7.1, which is also ancient
but it does still
On 12/04/2023 19:51, David Woodhouse wrote:
From: David Woodhouse
Coverity spotted a double-free (CID 1508254); we g_string_free(path) and
then for some reason immediately call free(path) too.
We should just use g_autoptr() for it anyway, which simplifies the code
a bit.
Fixes: 7a8a749da7d3 (
On Fri, 14 Apr 2023 at 12:06, Alex Bennée wrote:
>
> A lot of our vhost-user stubs are large chunks of boilerplate that do
> (mostly) the same thing. This series attempts to fix that by defining
> a new base class for vhost-user devices and then converting the rng
> and gpio devices to be based of
On 12/04/2023 19:51, David Woodhouse wrote:
From: David Woodhouse
Coverity points out that if (!s && !s->impl) isn't really what we intended
to do here. CID 1508131.
Fixes: 032475127225 ("hw/xen: Add emulated implementation of XenStore
operations")
Signed-off-by: David Woodhouse
---
hw/i38
The 15.3 version is EOL now:
https://get.opensuse.org/leap/15.3
Switch the dockerfile to 15.4.
Signed-off-by: Peter Krempa
Reviewed-by: Daniel P. Berrangé
---
tests/docker/dockerfiles/opensuse-leap.docker | 8 ++---
tests/lcitool/mappings.yml| 36 +--
test
Update to commit which has fixes needed for OpenSUSE 15.4 and
re-generate output files.
Signed-off-by: Peter Krempa
---
.gitlab-ci.d/cirrus/freebsd-12.vars | 16 ++
.gitlab-ci.d/cirrus/freebsd-13.vars | 16 ++
.gitlab-ci.d/cirrus/macos-12.vars | 16 ++
tests/do
v2:
- update 'libvirt-ci' submodule first
- fix forgotten explicit mappings for 15.4
Peter Krempa (2):
tests: libvirt-ci: Update to commit '51dad419'
tests: lcitool: Switch to OpenSUSE Leap 15.4
.gitlab-ci.d/cirrus/freebsd-12.vars | 16 ++
.gitlab-ci.d/cirrus/freebsd-13.vars
This switch had been disabled by default by accident in commit
c55cf6ab03f. But we should enable it by default instead to avoid
regressions in the QOM device hierarchy.
Fixes: c55cf6ab03 ("configure, meson: move some default-disabled options to
meson_options.txt")
Signed-off-by: Thomas Huth
---
This reverts commit 154070eaf6597c47f64c3ea917bcba62427ae61f.
The pxb_cxl_dev_reset() function tries to cast the device via
PXB_DEV(), however the function belongs to TYPE_PXB_CXL_DEVICE
which is not derived from TYPE_PXB_DEVICE. So this causes QEMU
to abort in case the QOM checks have been enable
On 4/17/2023 8:11 PM, Alex Bennée wrote:
>
> "Wu, Fei" writes:
>
>> On 4/11/2023 3:27 PM, Alex Bennée wrote:
>>>
>>> "Wu, Fei" writes:
>>>
On 4/10/2023 6:36 PM, Alex Bennée wrote:
>
> Richard Henderson writes:
>
>> On 4/6/23 00:46, Alex Bennée wrote:
>>> If your aim is
On 4/17/23 12:16, Alex Bennée wrote:
Laurent Vivier writes:
Hi Peter,
On 4/13/23 14:05, Peter Maydell wrote:
On Thu, 13 Apr 2023 at 11:50, Peter Maydell wrote:
I just found a hung netdev-socket test on our s390 CI runner.
Looks like a deadlock, no processes using CPU.
Here's the backtrac
On 17/04/2023 13.29, Michael S. Tsirkin wrote:
On Mon, Apr 17, 2023 at 01:22:51PM +0200, Thomas Huth wrote:
On 11/04/2023 12.26, Peter Maydell wrote:
On Wed, 8 Mar 2023 at 01:14, Michael S. Tsirkin wrote:
From: Jonathan Cameron
The CXL r3.0 specification allows for there to be no HDM decod
This switch had been disabled by default by accident in commit
c55cf6ab03f. But we should enable it by default instead to avoid
regressions in the QOM device hierarchy.
Two bugs crept in while we had it disabled. One has been fixed
by Peter in commit 6c50845a91 ("hw/i2c/allwinner-i2c: Fix subclass
On Mon, 17 Apr 2023 at 14:00, Thomas Huth wrote:
>
> This switch had been disabled by default by accident in commit
> c55cf6ab03f. But we should enable it by default instead to avoid
> regressions in the QOM device hierarchy.
>
> Fixes: c55cf6ab03 ("configure, meson: move some default-disabled opt
"you.chen" writes:
> Add config and logics to use qatzip for page compression, in order to support
> qatzip compression better, we collect multipe pages together to do qatzip
> compression for best performance.
> And we use compile option CONFIG_QATZIP to determine whether should qatzip
> rela
From: Philippe Mathieu-Daudé
This change adds set of boot tests on SBSA-ref machine:
1. boot firmware up to the EDK2 banner
2. boot Alpine Linux
Prebuilt flash volumes are included, built using upstream documentation.
To unify tests for AArch64/virt and AArch64/sbsa-ref we boot
the same Alpine
We are a bit premature in recommending -blockdev/-device as the best
way to configure block devices. It seems there are times the more
human friendly -drive still makes sense especially when -snapshot is
involved.
Improve the language to hopefully make things clearer.
Suggested-by: Michael Tokare
This is the current state of my testing tree. It contains a few
patches that didn't make it into 8.0 and more testing fixes including
a bump to the avocado release including Thomas' --max-parallel-tasks
hack to avoid running the tests in parallel. So far it doesn't look
like its causing any problem
From: Thomas Huth
We're currently facing the problem that the device-crash-test script
runs twice as long in the CI when a runner supports KVM - which sometimes
results in a timeout of the CI job. To get a more deterministic runtime
here, add an option to the script that allows to run it with TCG
The tuxboot images now have a stable snapshot URL so we can enable the
checksums and remove the avocado warnings. We will have to update as
old snapshots retire but that won't be too frequent.
Signed-off-by: Alex Bennée
---
tests/avocado/tuxrun_baselines.py | 170 +-
From: Kautuk Consul
Avocado version 101.0 has a fix to re-compute the checksum
of an asset file if the algorithm used in the *-CHECKSUM
file isn't the same as the one being passed to it by the
avocado user (i.e. the avocado_qemu python module).
In the earlier avocado versions this fix wasn't ther
From: Thomas Huth
After "make check-venv" had been added to these jobs, they started
to re-run "configure" each time since our logic in the makefile
thinks that some files are out of date here. Avoid it with the same
trick that we are using in buildtest-template.yml already by disabling
the up-to
Changes in V2:
1. Added CONFIG_QATZIP macro to control this feature
2. removed useless code changes
3. fixed typos
WIP: tests still under development
Hello,
qatzip https://github.com/intel/QATzip is a project that
supply the zlib like api with the Intel QAT hardware.
compress and decompress p
In this patch, we added qatzip build option in the meson_options.txt and
meson-buildoptons.sh to support qemu build with qatzip.
If you installed qatzip and would like to use it for live migration, you could
use "--enable-qatzip" during configure, it will check qatzip availablility from
the pkg-
Add config and logics to use qatzip for page compression, in order to support
qatzip compression better, we collect multipe pages together to do qatzip
compression for best performance.
And we use compile option CONFIG_QATZIP to determine whether should qatzip
related code be compiled or not.
C
This patchset provides an implementation for Zvbb, Zvbc, Zvkned, Zvknh, Zvksh,
Zvkg, and Zvksed of the draft RISC-V vector cryptography extensions as per the
v20230407 version of the specification(1) (3206f07). This is an update to the
patchset submitted to qemu-devel on Friday, 10 Mar 2023 16:03:0
From: Dickon Hood
Rotates have been fixed up to only allow for reasonable rotate amounts
(ie, no rotates >7 on an 8b value etc.) This fixes a problem with riscv
vector rotate instructions.
Signed-off-by: Dickon Hood
---
include/qemu/bitops.h | 24
1 file changed, 16 i
From: Kiran Ostrolenk
Factor the non SEW-specific stuff out of `GEN_OPIVV_TRANS` into
function `opivv_trans` (similar to `opivi_trans`). `opivv_trans` will be
used in proceeding vector-crypto commits.
Signed-off-by: Kiran Ostrolenk
---
target/riscv/insn_trans/trans_rvv.c.inc | 62 +
From: Max Chou
This commit adds support for the Zvksed vector-crypto extension, which
consists of the following instructions:
* vsm4k.vi
* vsm4r.[vv,vs]
Translation functions are defined in
`target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in
`target/riscv/vcrypto_helper.c`.
S
From: Dickon Hood
Zvbb (implemented in later commit) has a widening instruction, which
requires an extra check on the enabled extensions. Refactor
GEN_OPIVX_WIDEN_TRANS() to take a check function to avoid reimplementing
it.
Signed-off-by: Dickon Hood
---
target/riscv/insn_trans/trans_rvv.c.in
From: Kiran Ostrolenk
Take some functions/macros out of `vector_helper` and put them in a new
module called `vector_internals`. This ensures they can be used by both
vector and vector-crypto helpers (latter implemented in proceeding
commits).
Signed-off-by: Kiran Ostrolenk
---
target/riscv/mes
From: Max Chou
Signed-off-by: Max Chou
Reviewed-by: Frank Chang
---
crypto/sm4.c | 10 ++
include/crypto/sm4.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/crypto/sm4.c b/crypto/sm4.c
index 9f0cd452c78..2987306cf7a 100644
--- a/crypto/sm4.c
+++ b/crypto/sm4.c
@@ -47,
From: Kiran Ostrolenk
Move some macros out of `vector_helper` and into `vector_internals`.
This ensures they can be used by both vector and vector-crypto helpers
(latter implemented in proceeding commits).
Signed-off-by: Kiran Ostrolenk
---
target/riscv/vector_helper.c| 42
write_misa() must use as much common logic as possible. We want to open
code just the bits that are exclusive to the CSR write operation and TCG
internals.
Our validation is done with riscv_cpu_validate_set_extensions(), but we
need a small tweak first. When enabling RVG we're doing:
env-
We're doing env->priv_spec validation and assignment at the start of
riscv_cpu_realize(), which is fine, but then we're doing a force disable
on extensions that aren't compatible with the priv version.
This second step is being done too early. The disabled extensions might be
re-enabled again in r
This commit adds support for the Zvbc vector-crypto extension, which
consists of the following instructions:
* vclmulh.[vx,vv]
* vclmul.[vx,vv]
Translation functions are defined in
`target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in
`target/riscv/vcrypto_helper.c`.
Co-authored-
From: Weiwei Li
Using implicitly enabled extensions such as Zca/Zcf/Zcd instead of their
super extensions can simplify the extension related check. However, they
may have higher priv version than their super extensions. So we should mask
them in the isa_string based on priv version to make them i
From: Dickon Hood
This commit adds support for the Zvbc vector-crypto extension, which
consists of the following instructions:
* vrol.[vv,vx]
* vror.[vv,vx,vi]
* vbrev8.v
* vrev8.v
* vandn.[vv,vx]
* vbrev.v
* vclz.v
* vctz.v
* vcpop.v
* vswll.[vv,vx,vi]
Translation functions are defined in
`tar
From: Max Chou
- Share sm4_subword between different targets.
Signed-off-by: Max Chou
Reviewed-by: Frank Chang
---
include/crypto/sm4.h | 8
target/arm/tcg/crypto_helper.c | 10 ++
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/include/crypto/s
This commit adds support for the Zvksh vector-crypto extension, which
consists of the following instructions:
* vsm3me.vv
* vsm3c.vi
Translation functions are defined in
`target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in
`target/riscv/vcrypto_helper.c`.
Co-authored-by: Kiran O
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/cpu.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 3b754d7e13b..2f71d612725 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1485,6 +1485,16 @@ static P
All these generic CPUs are using the latest priv available, at this
moment PRIV_VERSION_1_12_0:
- riscv_any_cpu_init()
- rv32_base_cpu_init()
- rv64_base_cpu_init()
- rv128_base_cpu_init()
Create a new PRIV_VERSION_LATEST enum and use it in those cases. I'll
make it easier to update everything at
From: Nazar Kazakov
Move the checks out of `do_opiv{v,x,i}_gvec{,_shift}` functions
and into the corresponding macros. This enables the functions to be
reused in proceeding commits without check duplication.
Signed-off-by: Nazar Kazakov
---
target/riscv/insn_trans/trans_rvv.c.inc | 28
We have 4 config settings being done in riscv_cpu_init(): ext_ifencei,
ext_icsr, mmu and pmp. This is also the constructor of the "riscv-cpu"
device, which happens to be the parent device of every RISC-V cpu.
The result is that these 4 configs are being set every time, and every
other CPU should a
From: Kiran Ostrolenk
This is for use in the RISC-V vclz and vctz instructions (implemented in
proceeding commit).
Signed-off-by: Kiran Ostrolenk
---
include/qemu/host-utils.h | 54 +++
1 file changed, 54 insertions(+)
diff --git a/include/qemu/host-utils.h
The setter is doing nothing special. Just set env->priv_ver directly.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: LIU Zhiwei
Reviewed-by: Weiwei Li
---
target/riscv/cpu.c | 29 -
1 file changed, 12 insertions(+), 17 deletions(-)
diff --git a/target/riscv/cp
The RVV verification will error out if fails and it's being done at the
end of riscv_cpu_validate_set_extensions(), after we've already set some
extensions that are dependent on RVV. Let's put it in its own function
and do it earlier.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: LIU Zhiwe
Hi,
In this v7 we have three extra patches:
- patch 4 [1] and 5 [2], both from Weiwei Li, addresses an issue that
we're going to have with Zca and RVC if we push the priv spec
disabling code to the end of validation. More details can be seen on
[3]. Patch 5 commit message also has some context o
Let's remove more code that is open coded in riscv_cpu_realize() and put
it into a helper. Let's also add an error message instead of just
asserting out if env->misa_mxl_max != env->misa_mlx.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: LIU Zhiwei
Reviewed-by: Weiwei Li
---
target/riscv
This setter is doing nothing else but setting env->vext_ver. Assign the
value directly.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: LIU Zhiwei
Reviewed-by: Weiwei Li
---
target/riscv/cpu.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/target/riscv/cpu.c b/ta
There is no need to init timers if we're not even sure that our
extensions are valid. Execute riscv_cpu_validate_set_extensions() before
riscv_timer_init().
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: LIU Zhiwei
Reviewed-by: Weiwei Li
---
target/riscv/cpu.c | 11 ---
1 file cha
From: Kiran Ostrolenk
This commit adds support for the Zvknh vector-crypto extension, which
consists of the following instructions:
* vsha2ms.vv
* vsha2c[hl].vv
Translation functions are defined in
`target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in
`target/riscv/vcrypto_helpe
Static CPUs don't want their extensions changed by user interaction. We
can prevent it during init by not exposing user facing properties, but
write_misa() is also capable of disabling/enabling extension during
runtime.
We have a way of telling whether a CPU is static or not by checking for
TYPE_R
From: Nazar Kazakov
This commit adds support for the Zvkned vector-crypto extension, which
consists of the following instructions:
* vaesef.[vv,vs]
* vaesdf.[vv,vs]
* vaesdm.[vv,vs]
* vaesz.vs
* vaesem.[vv,vs]
* vaeskf1.vi
* vaeskf2.vi
Translation functions are defined in
`target/riscv/insn_tra
From: Weiwei Li
Even though Zca/Zcf/Zcd can be included by C/F/D, however, their priv
version is higher than the priv version of C/F/D. So if we use check
for them instead of check for C/F/D totally, it will trigger new
problem when we try to disable the extensions based on the configured
priv ve
From: Nazar Kazakov
This commit adds support for the Zvkg vector-crypto extension, which
consists of the following instructions:
* vgmul.vv
* vghsh.vv
Translation functions are defined in
`target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in
`target/riscv/vcrypto_helper.c`.
Co-
Hi Thomas,
Thanks for reviewing this patch. My responses inline below:
Thomas Huth writes:
> On 14/04/2023 23.06, Vaibhav Jain wrote:
>> Since commit 74a1b256d775("configure: Bump minimum Clang version to 10.0")
>> qemu
>> needs Clang version 10.0 as the minimum version to build qemu with
>> C
Hi Thomas,
Thanks for looking into this patch. My responses inline below:
Thomas Huth writes:
> On 14/04/2023 23.06, Vaibhav Jain wrote:
>> Since commit fd8171fe52b5e("target/hexagon: import lexer for idef-parser")
>> the
>> hexagon target uses 'flex' to generate idef-parser. However 'focal' m
On 17/04/2023 16.11, Vaibhav Jain wrote:
Hi Thomas,
Thanks for reviewing this patch. My responses inline below:
...
Travis documentation at [1] mentions clang 7.0.0 to be the default
compiler for Ubuntu 20.04 (Focal and Jammy). That is what I see in my travis
environment also with Focal.
[1] -
Mon, 17 Apr 2023 14:46:54 +0200 Peter Krempa :
> Switch the dockerfile to 15.4.
Given that Leap 15.5 is essentially done, please skip this meanwhile stale
version of Leap.
Thanks,
Olaf
pgp08kRqcL5xn.pgp
Description: Digitale Signatur von OpenPGP
On Mon, Apr 17, 2023 at 10:18:08AM +, Karol Nowak wrote:
> Hi Corey,
>
>
> thank you for your response.
>
>
> Could you give me some hints how to make IO operations non-blocking in QEMU?
> Is there a code reference in the source code of QEMU I could use?
>
You can look at hw/ipmi/ipmi_bm
On Tue, Jan 24, 2023 at 01:27:50AM +, Sean Christopherson wrote:
> On Thu, Jan 19, 2023, Isaku Yamahata wrote:
> > On Thu, Jan 19, 2023 at 03:25:08PM +,
> > Sean Christopherson wrote:
> >
> > > On Thu, Jan 19, 2023, Isaku Yamahata wrote:
> > > > On Sat, Jan 14, 2023 at 12:37:59AM +,
>
On Mon, Apr 17, 2023, Chao Peng wrote:
> In case you started working on the code again, I have a branch [1]
> originally planned as v11 candidate which I believe I addressed all the
> discussions we had for v10 except the very latest one [2] and integrated
> all the newly added selftests from Acker
On Thu, Apr 13, 2023 at 07:31:57PM +0200, Hanna Czenczek wrote:
> On 13.04.23 12:14, Eugenio Perez Martin wrote:
> > On Wed, Apr 12, 2023 at 11:06 PM Stefan Hajnoczi
> > wrote:
> > > On Tue, Apr 11, 2023 at 05:05:13PM +0200, Hanna Czenczek wrote:
> > > > So-called "internal" virtio-fs migration r
On Fri, Apr 14, 2023 at 05:17:02PM +0200, Eugenio Perez Martin wrote:
> On Thu, Apr 13, 2023 at 7:55 PM Hanna Czenczek wrote:
> >
> > On 13.04.23 13:38, Stefan Hajnoczi wrote:
> > > On Thu, 13 Apr 2023 at 05:24, Hanna Czenczek wrote:
> > >> On 12.04.23 23:06, Stefan Hajnoczi wrote:
> > >>> On Tue
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