On Fri, Mar 03, 2023 at 04:17:40PM -0600, Eric Blake wrote:
> On Fri, Dec 16, 2022 at 10:32:01PM +0300, Vladimir Sementsov-Ogievskiy wrote:
> > s-o-b line missed.
>
> I'm not sure if the NBD project has a strict policy on including one,
> but I don't mind adding it.
I've never required it, mostly
On Fri, Mar 03, 2023 at 04:26:53PM -0600, Eric Blake wrote:
> On Tue, Feb 21, 2023 at 05:21:37PM +0200, Wouter Verhelst wrote:
> > Hi Eric,
> >
> > Busy days, busy times. Sorry about the insane delays here.
>
> No problem; I've been tackling other things in the meantime too, so
> this extension h
On Fri, Mar 03, 2023 at 04:36:41PM -0600, Eric Blake wrote:
> On Wed, Feb 22, 2023 at 11:49:18AM +0200, Wouter Verhelst wrote:
> > On Mon, Nov 14, 2022 at 04:46:52PM -0600, Eric Blake wrote:
[...]
> > > + Note that even when extended headers are in use, the client MUST be
> > > + prepared for the
On Fri, Mar 03, 2023 at 04:40:38PM -0600, Eric Blake wrote:
> On Wed, Feb 22, 2023 at 12:05:44PM +0200, Wouter Verhelst wrote:
> > On Mon, Nov 14, 2022 at 04:46:54PM -0600, Eric Blake wrote:
> > > Simple reply message
> > >
> > > @@ -1232,6 +1235,19 @@ The field has the following format:
> >
This patch also enables debugger to set current privilege mode to
VU/VS-mode.
Extend previous commit 81d2929c41d32af138f3562f5a7b309f6eac7ca7 to
support H-extension.
Signed-off-by: Jim Shu
Reviewed-by: Frank Chang
---
target/riscv/gdbstub.c | 18 --
1 file changed, 16 insertion
This patch enables a debugger to read current virtualization mode via
virtual "virt" register. After it, we could get full current privilege
mode via both "priv" and "virt" register.
Extend previous commit ab9056ff9bdb3f95db6e7a666d10522d289f14ec to
support H-extension.
Signed-off-by: Jim Shu
Re
On Sat, Mar 04, 2023 at 12:40:38PM +0100, Bernhard Beschow wrote:
> A recent series [1] attempted to remove some PIC -> CPU interrupt
> indirections.
> This inadvertantly caused NULL qemu_irqs to be passed to the i8259 because the
> qemu_irqs aren't initialized at that time yet. This series provid
On Sun, Mar 05, 2023 at 07:45:55AM +, Bernhard Beschow wrote:
>
>
> Am 13. Februar 2023 16:45:05 UTC schrieb Bernhard Beschow :
> >
> >
> >Am 13. Februar 2023 16:19:55 UTC schrieb Bernhard Beschow
> >:
> >>This series contains some cleanups I came across when working on the PC
> >>
> >>machi
On Sat, Mar 04, 2023 at 11:03:20PM +0300, Michael Tokarev wrote:
> 02.03.2023 11:25, Michael S. Tsirkin wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > In bad9c5a516 ("virtio-rng-pci: fix migration compat for vectors") I
> > fixed the virtio-rng-pci migration compatibility, but it was discovere
Hi!
For a few qemu major releases already, we did not have any stable minor
releases.
I'd love to change that, in order to consolidate efforts and to make better
software in the end. But I need some (hopefully minor) help here.
I collected changes from qemu/master which apparently should go to
From: Bernhard Beschow
According to the PCI specification, PCI_INTERRUPT_LINE shall have no
effect on hardware operations. Now that the VIA south bridges implement
the internal PCI interrupt router let's be more conformant to the PCI
specification.
Signed-off-by: Bernhard Beschow
Reviewed-by: M
Add a property to allow disabling pixman and always use the fallbacks
for different operations which is useful for testing different drawing
methods or debugging pixman related issues.
Signed-off-by: BALATON Zoltan
Tested-by: Rene Engel
---
hw/display/sm501.c | 18 +++---
1 file cha
From: David Woodhouse
Back in the mists of time, before EISA came along and required per-pin
level control in the ELCR register, the i8259 had a single chip-wide
level-mode control in bit 3 of ICW1.
Even in the PIIX3 datasheet from 1996 this is documented as 'This bit is
disabled', but apparentl
Changes in this version:
v7:
- Added a comment and log to patch 3 as asked by Bernhard
- Added missed R-b tag to patch 5
- Patch 4 in this version is
Based-on: <20230304114043.121024-2-shen...@gmail.com>
(hw/isa/vt82c686: Fix wiring of PIC -> CPU interrupt)
so whatever fix for that will be taken th
Add basic implementation of the AC'97 sound part used in VIA south
bridge chips. Not all features of the device is emulated, only one
playback channel is supported for now but this is enough to get sound
output from some guests using this device on pegasos2.
Signed-off-by: BALATON Zoltan
Reviewed
The real VIA south bridges implement a PCI IRQ router which is configured
by the BIOS or the OS. In order to respect these configurations, QEMU
needs to implement it as well. The real chip may allow routing IRQs from
internal functions independently of PCI interrupts but since guests
usually config
According to the PegasosII schematics the PCI interrupt lines are
connected to both the gpp pins of the Mv64361 north bridge and the
PINT pins of the VT8231 south bridge so guests can get interrupts from
either of these. So far we only had the MV64361 connections which
worked for on board devices b
Hi,
I am beginning to get into the virtualization realm, and had a few
questions, some regarding the process of learning the development, and some
regarding the capabilities of me and qemu.
I would love to get any resources you might think are relevant to get into
developing in qemu. Currently, I a
Hi,
Inside
> -Original Message-
> From: Philippe Mathieu-Daudé
> Sent: Thursday, December 22, 2022 5:03 PM
> To: Havard Skinnemoen ; peter.mayd...@linaro.org
> Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org; IS20 Avi Fishman
> ; CS20 KFTing ; Alexander
> Bulekov ; Shengtan Mao ; Hao Wu
On Sun, 5 Mar 2023, BALATON Zoltan wrote:
Changes in this version:
v7:
- Added a comment and log to patch 3 as asked by Bernhard
- Added missed R-b tag to patch 5
- Patch 4 in this version is
Based-on: <20230304114043.121024-2-shen...@gmail.com>
For patchew only, also:
Based-on: 20230304114043
Am 5. März 2023 14:05:49 UTC schrieb BALATON Zoltan :
>The real VIA south bridges implement a PCI IRQ router which is configured
>by the BIOS or the OS. In order to respect these configurations, QEMU
>needs to implement it as well. The real chip may allow routing IRQs from
>internal functions in
On Sun, 5 Mar 2023, Bernhard Beschow wrote:
Am 5. März 2023 14:05:49 UTC schrieb BALATON Zoltan :
The real VIA south bridges implement a PCI IRQ router which is configured
by the BIOS or the OS. In order to respect these configurations, QEMU
needs to implement it as well. The real chip may allow
Richard Henderson writes:
> This file, and a couple of uses, got left behind when the
> tcg stuff was removed from tracetool.
>
> Fixes: 126d4123c50a ("tracing: excise the tcg related from tracetool")
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation
Richard Henderson writes:
> Move the tcg_temp_free_* and tcg_temp_ebb_new_* declarations
> and inlines to the new header. These are private to the
> implementation, and will prevent tcg_temp_free_* from creeping
> back into the guest front ends.
>
> Reviewed-by: Peter Maydell
> Signed-off-by:
Ping. Is there anything left to do to get this patch series merged for
8.0? All patches are reviewed.
With best regards,
Volker
A few patches from my audio patch queue.
Patches 1 - 2:
If a guest selects an unsupported sample rate, an error message is
currently shown. The first patch takes ca
On Sat, 4 Mar 2023 at 18:20, Richard Henderson
wrote:
>
> Translators are no longer required to free tcg temporaries.
>
> Signed-off-by: Richard Henderson
> ---
> Cc: Bastian Koppelmann
> ---
> target/tricore/translate.c | 540 +
> 1 file changed, 4 insertion
On Sat, 4 Mar 2023 at 18:19, Richard Henderson
wrote:
>
> Translators are no longer required to free tcg temporaries.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On 3/3/23 08:45, Peter Maydell wrote:
+
+if (wp_flags & BP_MEM_WRITE) {
+write_flags |= TLB_WATCHPOINT;
+}
+tlb_set_compare(full, &tn, vaddr_page, write_flags, MMU_DATA_STORE,
+(prot & PAGE_WRITE) && !(prot & PAGE_WRITE_INV));
So in the old code, if PAGE_
From: David Woodhouse
A Linux guest will perform IRQ migration after the IRQ has happened,
updating the RTE to point to the new destination CPU and then unmasking
the interrupt.
However, when the guest updates the RTE, ioapic_mem_write() calls
ioapic_service(), which redelivers the pending level
On 3/3/23 09:19, Paolo Bonzini wrote:
This nasty difference between Linux and C11 read-modify-write operations
has already caused issues in util/async.c and more are being found.
Provide something similar to Linux smp_mb__before/after_atomic(); this
has the double function of documenting clearly
On 3/3/23 09:19, Paolo Bonzini wrote:
QemuEvent is currently broken on ARM due to missing memory barriers
after qatomic_*(). Apart from adding the memory barrier, a closer look
reveals some unpaired memory barriers too. Document more clearly what
is going on, and remove optimizations that I cou
On 3/3/23 09:19, Paolo Bonzini wrote:
QemuEvent is currently broken on ARM due to missing memory barriers
after qatomic_*(). Apart from adding the memory barrier, a closer look
reveals some unpaired memory barriers that are not really needed and
complicated the functions unnecessarily, as well a
On 3/3/23 09:19, Paolo Bonzini wrote:
Ensure ordering between clearing the COMPUTING flag and checking
IRQFACT, and between setting the IRQFACT flag and checking
COMPUTING. This ensures that no wakeups are lost.
Signed-off-by: Paolo Bonzini
---
hw/misc/edu.c | 5 +
1 file changed, 5 inse
On 3/3/23 09:19, Paolo Bonzini wrote:
The barrier comes after an atomic increment, so it is enough to use
smp_mb__after_rmw(); this avoids a double barrier on x86 systems.
Signed-off-by: Paolo Bonzini
---
include/block/aio-wait.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewe
On 3/3/23 09:19, Paolo Bonzini wrote:
There is no implicit memory barrier in qatomic_fetch_or() and
atomic_fetch_and() on ARM systems. Add an explicit
smp_mb__after_rmw() to match the intended semantics.
Signed-off-by: Paolo Bonzini
---
util/async.c | 13 -
1 file changed, 8 ins
On 3/3/23 09:19, Paolo Bonzini wrote:
mutex->from_push and mutex->handoff in qemu-coroutine-lock implement
the familiar pattern:
write a write b
smp_mb() smp_mb()
read b read a
The mem
On 3/3/23 09:19, Paolo Bonzini wrote:
Signed-off-by: Paolo Bonzini
---
softmmu/physmem.c | 3 +++
1 file changed, 3 insertions(+)
Reviewed-by: Richard Henderson
r~
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 47143edb4f6c..a6efd8e8dd11 100644
--- a/softmmu/physmem.c
+++ b/s
On Thu, 02 Mar 2023 00:37:10 PST (-0800), ben.do...@codethink.co.uk wrote:
On 01/03/2023 21:59, Daniel Henrique Barboza wrote:
From: Anup Patel
The cbom-block-size fdt property property is used to inform the OS about
the blocksize in bytes for the Zicbom cache operations.
Linux documents it i
On Thu, 02 Mar 2023 01:14:05 PST (-0800), dbarb...@ventanamicro.com wrote:
Based-on: 20230224132536.552293-1-dbarb...@ventanamicro.com
("[PATCH v8 0/4] riscv: Add support for Zicbo[m,z,p] instructions")
Hi,
This second version, which is still dependent on:
[PATCH v8 0/4] riscv: Add support for
On Fri, 24 Feb 2023 05:25:32 PST (-0800), dbarb...@ventanamicro.com wrote:
Hi,
This version has a change in patch 2, proposed by Weiwei Li, where we're
now triggering virt_instruction_fault before triggering illegal_insn
fault from S mode.
Richard already queued patch 1 is queued in tcg-next al
On Fri, 17 Feb 2023 07:14:59 PST (-0800), ivan.klo...@syntacore.com wrote:
Due to typo in opcode list, ctzw is disassembled as clzw instruction.
Signed-off-by: Ivan Klokov
---
disas/riscv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/disas/riscv.c b/disas/riscv.c
index
On Sat, 4 Mar 2023 01:43:30 +
Joao Martins wrote:
> Hey,
>
> Presented herewith a series based on the basic VFIO migration protocol v2
> implementation [1].
>
> It is split from its parent series[5] to solely focus on device dirty
> page tracking. Device dirty page tracking allows the VFIO
Il dom 5 mar 2023, 19:57 Richard Henderson
ha scritto:
> On 3/3/23 09:19, Paolo Bonzini wrote:
> > This nasty difference between Linux and C11 read-modify-write operations
> > has already caused issues in util/async.c and more are being found.
> > Provide something similar to Linux smp_mb__before
Am 5. März 2023 17:08:30 UTC schrieb BALATON Zoltan :
>On Sun, 5 Mar 2023, Bernhard Beschow wrote:
>> Am 5. März 2023 14:05:49 UTC schrieb BALATON Zoltan :
>>> The real VIA south bridges implement a PCI IRQ router which is configured
>>> by the BIOS or the OS. In order to respect these configura
On Wed, Mar 01, 2023 at 04:36:20PM +0800, Jason Wang wrote:
> On Tue, Feb 28, 2023 at 10:25 PM Longpeng(Mike) wrote:
> >
> > From: Longpeng
> >
> > When updating ioeventfds, we need to iterate all address spaces and
> > iterate all flat ranges of each address space. There is so much
> > redundant
Hi, Chuang,
On Fri, Mar 03, 2023 at 06:56:50PM +0800, Chuang Xu wrote:
> Sorry to forget to update the test results in the last patch of v6.
>
> In this version:
>
> - add peter's patch.
> - split mr_do_commit() from mr_commit().
> - adjust the sanity check in address_space_to_flatview().
> - re
On Sun, Mar 05, 2023 at 06:43:42PM +, David Woodhouse wrote:
> From: David Woodhouse
>
> A Linux guest will perform IRQ migration after the IRQ has happened,
> updating the RTE to point to the new destination CPU and then unmasking
> the interrupt.
>
> However, when the guest updates the RTE
On 05/03/2023 20:57, Alex Williamson wrote:
> On Sat, 4 Mar 2023 01:43:30 +
> Joao Martins wrote:
>
>> Hey,
>>
>> Presented herewith a series based on the basic VFIO migration protocol v2
>> implementation [1].
>>
>> It is split from its parent series[5] to solely focus on device dirty
>> pa
On Fri, 03 Mar 2023 05:12:47 PST (-0800), alexgh...@rivosinc.com wrote:
This introduces new properties to allow the user to set the satp mode,
see patch 3 for full syntax. In addition, it prevents cpus to boot in a
satp mode they do not support (see patch 4).
base-commit: commit c61d1a066cb6 ("M
On Thu, 02 Mar 2023 22:50:53 PST (-0800), mchit...@ventanamicro.com wrote:
Currently a Risc-V platform cannot realizes multiple CPUs with non contiguous
hart IDs because the APLIC, IMSIC and ACLINT emulation code uses the
contiguous logical CPU ID to fetch per CPU state.
This patchset implements
On Fri, 03 Mar 2023 15:28:14 PST (-0800), Bin Meng wrote:
On Sat, Mar 4, 2023 at 4:25 AM Palmer Dabbelt wrote:
The OpenSBI build has been using docker:19.03.1, which appears to be old
enough that v2 of the manifest is no longer supported. Something has
started serving us those manifests, resu
On Thu, 02 Mar 2023 01:12:04 PST (-0800), suni...@ventanamicro.com wrote:
This series adds the basic ACPI support for the RISC-V virt machine.
Currently only RINTC interrupt controller specification is approved by the
UEFI forum. External interrupt controller support in ACPI is in progress.
This
On Sun, 5 Mar 2023, Bernhard Beschow wrote:
Am 5. März 2023 17:08:30 UTC schrieb BALATON Zoltan :
On Sun, 5 Mar 2023, Bernhard Beschow wrote:
Am 5. März 2023 14:05:49 UTC schrieb BALATON Zoltan :
The real VIA south bridges implement a PCI IRQ router which is configured
by the BIOS or the OS. I
Translators are no longer required to free tcg temporaries,
therefore there's no need to record for later freeing.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/avr/translate.c | 19 ---
1 file changed, 19 deletions(-)
diff --git a/target/avr/translate.
Finish removing tcg temp free accounting interfaces.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
include/exec/translator.h | 2 --
accel/tcg/translator.c | 4
target/alpha/translate.c | 1 -
target/arm/tcg/translate-a64.c | 2 --
target/arm/tcg/transl
Translators are no longer required to free tcg temporaries.
Reviewed-by: Taylor Simpson
Signed-off-by: Richard Henderson
---
target/hexagon/gen_tcg.h | 29 --
target/hexagon/gen_tcg_hvx.h | 15 --
target/hexagon/macros.h | 7 -
target/hexagon/genptr.c
From: "Richard W.M. Jones"
When CONFIG_PROFILER is set there are various undefined references to
profile_getclock. Include the header which defines this function.
For example:
../tcg/tcg.c: In function ‘tcg_gen_code’:
../tcg/tcg.c:4905:51: warning: implicit declaration of function
‘profile_ge
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/alpha/translate.c | 70
1 file changed, 70 deletions(-)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
i
While changes are made to prot within tlb_set_page_full, they are
an implementation detail of softmmu. Retain the original for any
target use of probe_access_full.
Fixes: 4047368938f6 ("accel/tcg: Introduce tlb_set_page_full")
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
acc
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/cris/translate.c | 20
1 file changed, 20 deletions(-)
diff --git a/target/cris/translate.c b/target/cris/translate.c
index a959b27373..76db74
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h | 1 -
target/arm/tcg/translate-a64.c | 17 -
target/arm/tcg/translate.c | 9 -
3 files changed, 4 insertions(
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/cris/translate.c | 23 ---
target/cris/translate_v10.c.inc | 4
2 files changed, 27 deletions(-)
diff --git a/target/cris/transla
Translators are no longer required to free tcg temporaries,
therefore there's no need to record temps for later freeing.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h | 3 ---
target/arm/tcg/translate-a64.c | 25 +
2 file
This allows us to easily find all branches that use a label.
Since 'refs' is only tested vs zero, remove it and test for
an empty list instead. Drop the use of bitfields, which had
been used to pack refs into a single 32-bit word.
Reviewed-by: Taylor Simpson
Signed-off-by: Richard Henderson
---
Only the use within cpu_reg requires a writable temp,
so inline new_tmp_a64_zero there. All other uses are
fine with a constant temp, so use tcg_constant_i64(0).
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.h | 1 -
target/arm/tcg/translate-a64.
Fixes a bug in that we weren't reporting these changes.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 40 +---
1 file changed, 29 insertions(+), 11 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 79 +++
1 file changed, 79 insertions(+)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index cd8f356adb..f9e1afd926 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -2192,6 +21
While we do not include these in tcg_target_reg_alloc_order,
and therefore they ought never be allocated, it seems safer
to mark them reserved as well.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.c.inc | 13 +
1 file changed, 13 inser
Translators are no longer required to free tcg temporaries.
This removes gen_rvalue_free, gen_rvalue_free_manual and
free_variables, whose only purpose was to emit tcg_temp_free.
Reviewed-by: Taylor Simpson
Signed-off-by: Richard Henderson
---
target/hexagon/idef-parser/README.rst | 8 -
The following changes since commit 2946e1af2704bf6584f57d4e3aec49d1d5f3ecc0:
configure: Disable thread-safety warnings on macOS (2023-03-04 14:03:46 +)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230305
for you to fetch changes up to
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h
index a5dd518903..20f3ca7aca 100644
This is now a simple wrapper for tcg_temp_new_i64.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.h | 1 -
target/arm/tcg/translate-a64.c | 45 +++---
target/arm/tcg/translate-sve.c | 20 +++
3 files changed,
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/avr/translate.c | 228 -
1 file changed, 228 deletions(-)
diff --git a/target/avr/translate.c b/target/avr/translate.c
inde
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-neon.c | 131 +---
1 file changed, 1 insertion(+), 130 deletions(-)
diff --git a/target/arm/tcg/translate-neon.c b/ta
This variable is not used, only allocated and freed.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/cris/translate_v10.c.inc | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/cris/translate_v10.c.inc b/target/cris/translate_v10.c.inc
index 5e9
This variable is not used, only allocated and freed.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/avr/translate.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/avr/translate.c b/target/avr/translate.c
index e7f0e2bbe3..4f8112c3e6 100644
--- a/target/avr
This field was only used to avoid freeing globals.
Since we no longer free any temps, this is dead.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h | 1 -
target/arm/tcg/translate.c | 5 -
2 files changed, 6 deletions(-)
diff --git a/target/arm/tc
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/cris/translate.c | 70 -
target/cris/translate_v10.c.inc | 41 ---
2 files changed, 111 deletions(-)
diff -
Remove the first label and redirect all uses to the second.
Tested-by: Taylor Simpson
Reviewed-by: Taylor Simpson
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/tcg/tcg.c b/tcg/tcg.
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-sve.c | 186 +
1 file changed, 2 insertions(+), 184 deletions(-)
diff --git a/target/arm/tcg/translate-sve.c b/ta
Translators are no longer required to free tcg temporaries.
Reviewed-by: Weiwei Li
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Richard Henderson
---
target/riscv/translate.c | 7 ---
target/riscv/insn_trans/trans_rvb.c.inc| 24 --
target/riscv/insn_trans/
Using an atomic write or read-write insn on ROM is basically
a happens-never case. Handle it via stop-the-world, which
will generate non-atomic serial code, where we can correctly
ignore the write while producing the correct read result.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderso
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/i386/tcg/translate.c | 41
target/i386/tcg/decode-new.c.inc | 15
target/i386/tcg/emit.c.inc | 6 -
3
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-sme.c | 28
1 file changed, 28 deletions(-)
diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-s
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 93 +
1 file changed, 1 insertion(+), 92 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa
Since all temps allocated by guest front-ends are now TEMP_TB,
and we don't recycle TEMP_TB, there's no point in requiring
that the front-ends free the temps at all. Begin by dropping
the inner-most checks that all temps have been freed.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderso
Translators are no longer required to free tcg temporaries.
Remove the g1 and g2 members of DisasCompare, as they were
used to track which temps needed to be freed.
Reviewed-by: Peter Maydell
Acked-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target/sparc/translate.c | 32
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/sh4/translate.c | 110 -
1 file changed, 110 deletions(-)
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
inde
Replace ifdefs with C, tcg_const_i32 with tcg_constant_i32.
We only need a single temporary for this.
Reviewed-by: Max Filippov
Signed-off-by: Richard Henderson
---
target/xtensa/translate.c | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/target/xtensa/tr
Translators are no longer required to free tcg temporaries.
Reviewed-by: Song Gao
Signed-off-by: Richard Henderson
---
target/loongarch/insn_trans/trans_arith.c.inc | 12 ---
.../loongarch/insn_trans/trans_atomic.c.inc | 3 --
target/loongarch/insn_trans/trans_bit.c.inc | 12 ---
t
Translators are no longer required to free tcg temporaries.
Remove the g1 and g2 members of DisasCompare, as they were
used to track which temps needed to be freed.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/m68k/translate.c | 40 -
Translators are no longer required to free tcg temporaries.
Reviewed-by: Taylor Simpson
Signed-off-by: Richard Henderson
---
target/hexagon/gen_tcg_funcs.py | 79 +
1 file changed, 1 insertion(+), 78 deletions(-)
diff --git a/target/hexagon/gen_tcg_funcs.py b/ta
Translators are no longer required to free tcg temporaries,
therefore there's no need to record temps for later freeing.
Replace the few uses with tcg_temp_new.
Reviewed-by: Peter Maydell
Acked-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target/sparc/translate.c | 53
This file, and a couple of uses, got left behind when the
tcg stuff was removed from tracetool.
Fixes: 126d4123c50a ("tracing: excise the tcg related from tracetool")
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
meson.build| 1 -
scripts/tracetool/__init__
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/m68k/translate.c | 181
1 file changed, 181 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
in
Rename from gen_tmp_value_from_imm to match gen_constant vs gen_tmp.
Reviewed-by: Taylor Simpson
Signed-off-by: Richard Henderson
---
target/hexagon/idef-parser/parser-helpers.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/target/hexagon/idef-parser/parser
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-vfp.c | 193 -
1 file changed, 193 deletions(-)
diff --git a/target/arm/tcg/translate-vfp.c b/target/arm/tcg/tran
Translators are no longer required to free tcg temporaries.
Reviewed-by: Jiaxun Yang
Signed-off-by: Richard Henderson
---
target/mips/tcg/mips16e_translate.c.inc | 6 --
1 file changed, 6 deletions(-)
diff --git a/target/mips/tcg/mips16e_translate.c.inc
b/target/mips/tcg/mips16e_translate
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 140bc31017..6610e222
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell
Acked-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target/sparc/translate.c | 136 ---
1 file changed, 136 deletions(-)
diff --git a/target/sparc/translate.c
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