On 15/2/23 08:26, Thomas Huth wrote:
On 15/02/2023 08.10, Philippe Mathieu-Daudé wrote:
On 15/2/23 06:48, Thomas Huth wrote:
We are not on a hot path here, so there is no real need for the logic
here with the split heap and stack space allocation. Simplify it by
always allocating memory from th
On 2/15/23 07:38, Markus Armbruster wrote:
Cédric Le Goater writes:
Hello,
This series starts with a first set of patches fixing I2C slave mode
in the Aspeed I2C controller, a test device and its associated test in
avocado.
Follow some cleanups which allow the use of block devices instead of
On 2023/2/9 14:24, Deepak Gupta wrote:
zisslpcfi protects returns(back cfi) using shadow stack. If compiled with
enabled compiler, function prologs will have `sspush ra` instruction to
push return address on shadow stack and function epilogs will have
`sspop t0; sschckra` instruction sequences.
On Wed, Feb 15, 2023 at 3:26 AM Daniel Henrique Barboza
wrote:
>
> At this moment, and apparently since ever, we have no way of enabling
> RISCV_FEATURE_MISA. This means that all the code from write_misa(), all
> the nuts and bolts that handles how to properly write this CSR, has
> always been a n
On 15/02/2023 06.48, Thomas Huth wrote:
We are not on a hot path here, so there is no real need for the logic
here with the split heap and stack space allocation. Simplify it by
always allocating memory from the heap.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Thomas Huth
---
Based-
This commit adds a new audiodev backend to allow QEMU to use Pipewire as both
an audio sink and source. This backend is available on most systems.
Added Pipewire entry points for QEMU Pipewire audio backend
Added wrappers for QEMU Pipewire audio backend in qpw_pcm_ops()
qpw_write function returns
On 2023/2/9 14:24, Deepak Gupta wrote:
zisslpcfi protects forward control flow (if enabled) by enforcing all
indirect call and jmp must land on a landing pad instruction `lpcll`
short for landing pad and check lower label value. If target of an
indirect call or jmp is not `lpcll` then cpu/hart
We are not on a hot path here, so there is no real need for the logic
here with the split heap and stack space allocation. Simplify it by
always allocating memory from the heap.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Thomas Huth
---
v2:
- Added the missing "prev_size = note_size"
Vladimir Sementsov-Ogievskiy wrote:
> On 08.02.23 16:57, Juan Quintela wrote:
>> So remove last assignation of res_compatible.
>
> I hoped for some description when asked to split it out :)
>
>> Signed-off-by: Juan Quintela
>> ---
>> migration/ram.c | 2 +-
>> 1 file changed, 1 insertion(+), 1
On 1/26/23 19:49, Avihai Horon wrote:
There are several places where the %m conversion is used if one of
vfio_dma_map(), vfio_dma_unmap() or vfio_get_dirty_bitmap() fail.
The %m usage in these places is wrong since %m relies on errno value while
the above functions don't report errors via errno.
On 1/26/23 19:49, Avihai Horon wrote:
Return -errno instead of -1 if VFIO_IOMMU_DIRTY_PAGES ioctl fails in
vfio_get_dirty_bitmap().
Signed-off-by: Avihai Horon
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/vfio/common.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/vfio/c
On 1/26/23 19:49, Avihai Horon wrote:
If VFIO dirty pages log start/stop/sync fails during migration,
migration should be aborted as pages dirtied by VFIO devices might not
be reported properly.
This is not the case today, where in such scenario only an error is
printed.
Fix it by aborting migr
John Snow writes:
> This patch creates a new type, QAPIExpression, which represents a parsed
> expression complete with QAPIDoc and QAPISourceInfo.
>
> This patch turns parser.exprs into a list of QAPIExpression instead,
> and adjusts expr.py to match.
>
> This allows the types we specify in pars
John Snow writes:
> We can remove this alias as it only has two usages now, and no longer
> pays for the confusion of "yet another type".
>
> Signed-off-by: John Snow
Reviewed-by: Markus Armbruster
On Tue, 14 Feb 2023 16:54:02 -0500
Gregory Price wrote:
> On Tue, Feb 14, 2023 at 04:51:53PM -0500, Gregory Price wrote:
> > On Tue, Feb 14, 2023 at 09:18:24PM +, Jonathan Cameron wrote:
> > > On Tue, 14 Feb 2023 14:01:23 -0500
> > > Gregory Price wrote:
> > >
> > > Could you test it with
Hi Zhao,
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
For i-cache and d-cache, the maximum IDs for CPUs sharing cache (
CPUID.04H.00H:EAX[bits 25:14] and CPUID.04H.01H:EAX[bits 25:14]) are
both 0, and this means i-cache and d-cache are shared in the SMT level.
This is correct if there's sing
On Tue, Feb 14, 2023 at 3:20 AM Marc-André Lureau <
marcandre.lur...@redhat.com> wrote:
> Hi
>
> On Mon, Feb 13, 2023 at 8:20 PM Konstantin Kostiuk
> wrote:
>
>> Hi Marc-André,
>>
>> Can you please review this patch set?
>>
>> Best Regards,
>> Konstantin Kostiuk.
>>
>>
>> On Thu, Feb 9, 2023 at 1
Reviewed-by: Konstantin Kostiuk
On Thu, Feb 9, 2023 at 2:50 AM Kfir Manor wrote:
> Query VSS backup type number (DWORD) from QEMU Guest Agent VSS Provider
> registry key registry value VssOption
>
> Translate the VSS backup type number (DWORD) into its VSS backup type
> (VSS_BACKUP_TYPE)
>
> Re
Reviewed-by: Konstantin Kostiuk
On Thu, Feb 9, 2023 at 2:50 AM Kfir Manor wrote:
> Adds registry value VssOption with value 1 to QEMU Guest Agent VSS
> Provider service registry key
>
> Signed-off-by: Kfir Manor
> ---
> qga/installer/qemu-ga.wxs | 4
> 1 file changed, 4 insertions(+)
>
>
Reviewed-by: Konstantin Kostiuk
On Thu, Feb 9, 2023 at 2:50 AM Kfir Manor wrote:
> Change requester_freeze so that the VSS backup type queried from the
> registry
>
> Signed-off-by: Kfir Manor
> ---
> qga/vss-win32/requester.cpp | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> di
Hi Richard,
On 2/6/23 19:27, Richard Henderson wrote:
> On 2/6/23 03:32, Eric Auger wrote:
>>> +void kvm_arm_enable_mte(Error **errp)
>>> +{
>>> + static bool tried_to_enable = false;
>>> + Error *mte_migration_blocker = NULL;
>> can't you make the mte_migration_blocker static instead?
>>
>>>
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhuocheng Ding
Support module level in i386 cpu topology structure "X86CPUTopoInfo".
Before updating APIC ID parsing rule with module level, the
apicid_core_width() temporarily combines the core and module levels
together.
At present, we don't expose modu
Am 14.02.2023 um 21:52 hat Paolo Bonzini geschrieben:
> Il mar 14 feb 2023, 18:26 Kevin Wolf ha scritto:
>
> > Am 14.02.2023 um 15:03 hat Paolo Bonzini geschrieben:
> > > In the case of Python the issue is not the interpreter per se, though
> > > there are a couple new feature in Python 3.7 that
On 2023/2/9 14:24, Deepak Gupta wrote:
This patch implements instruction encodings for zisslpcfi instructions.
Additionally this patch implements zimops encodings as well. If Zisslpcfi
is supported by CPU but not enabled then all Zisslpcfi instructions
default to Zimops instuction behavior i.e.
On 14/2/23 18:18, Cédric Le Goater wrote:
Hello,
This series starts with a first set of patches fixing I2C slave mode
in the Aspeed I2C controller, a test device and its associated test in
avocado.
Follow some cleanups which allow the use of block devices instead of
drives. So that, instead of
On 15/2/23 09:47, Marcin Nowakowski wrote:
SWM32 should store a sequence of 32-bit words from the GPRs, but it was
incorrectly coded to store 16-bit words only. As a result, an LWM32 that
usually follows would restore invalid register values.
Fixes: 7dd547e5ab ("target/mips: Use cpu_*_mmuidx_r
Am 14.02.2023 um 19:35 hat John Snow geschrieben:
> On Thu, Feb 9, 2023 at 7:31 PM John Snow wrote:
> >
> > Howdy, this series increases our minimum python version to 3.7.
> >
> > CI: https://gitlab.com/jsnow/qemu/-/pipelines/771780626
> > (All green!)
> > GL: https://gitlab.com/jsnow/qemu/-/c
Am 14.02.23 um 19:21 schrieb John Snow:
> On Thu, Feb 2, 2023 at 7:08 AM Fiona Ebner wrote:
>>
>> Hi,
>> over the years we've got 1-2 dozen reports[0] about suddenly
>> missing/corrupted MBR/partition tables. The issue seems to be very rare
>> and there was no success in trying to reproduce it yet
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
For function comments in this file, keep the comment style consistent
with other places.
Signed-off-by: Zhao Liu
nit：Better to move this cleanup patch to top of the series.
---
include/hw/i386/topology.h | 33 +
On 14/2/23 18:18, Cédric Le Goater wrote:
From: Klaus Jensen
Add an example I2C device to demonstrate how a slave may master the bus
and send data asynchronously to another slave.
What a rebellion...
The device will echo whatever it is sent to the device identified by the
first byte receive
On 14/2/23 18:18, Cédric Le Goater wrote:
It's cleaner and removes the curious '+ 1' required to skip the DMA
IRQ line of the controller.
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed.c | 2 +-
hw/ssi/aspeed_smc.c | 5 +
2 files changed, 2 insertions(+), 5 deletions(-)
Reviewe
On 2/14/23 19:10, Richard Henderson wrote:
On 2/13/23 06:13, Pierrick Bouvier wrote:
When compiling for windows-arm64 using clang-15, it reports a sometimes
uninitialized variable. This seems to be a false positive, as a default
case guards switch expressions, preventing to return an uninitializ
On Mon, Feb 06 2023, Eric Auger wrote:
> Hi,
>
> On 2/3/23 14:44, Cornelia Huck wrote:
>> @@ -517,6 +583,13 @@ static void test_query_cpu_model_expansion_kvm(const
>> void *data)
>> assert_set_feature(qts, "host", "pmu", false);
>> assert_set_feature(qts, "host", "pmu", true);
On 14/2/23 18:18, Cédric Le Goater wrote:
The default boot of the Aspeed SoCs is address 0x0. For this reason,
the FMC flash device contents are remapped by HW on the first 256MB of
the address space. In QEMU, this is currently done in the machine init
with the setup of a region alias.
Move this
Hi Zhao,
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhuocheng Ding
Add the module level parsing support for APIC ID.
With this support, now the conversion between X86CPUTopoIDs,
X86CPUTopoInfo and APIC ID is completed.
IIUC, contents in patch 6-8 and 10 are all about "Introduce the module-level
C
On 2/15/23 11:55, Philippe Mathieu-Daudé wrote:
On 14/2/23 18:18, Cédric Le Goater wrote:
From: Klaus Jensen
Add an example I2C device to demonstrate how a slave may master the bus
and send data asynchronously to another slave.
What a rebellion...
The device will echo whatever it is sent t
John Snow writes:
> With the two major JSON-ish type hierarchies clarified for distinct
> purposes; QAPIExpression for parsed expressions and JSONValue for
> introspection data, remove this FIXME as no longer an action item.
>
> A third JSON-y data type, _ExprValue, is not meant to represent JSON
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhuocheng Ding
After i386 supports module level, it's time to add the test for module
level's parsing.
Signed-off-by: Zhuocheng Ding
Co-developed-by: Zhao Liu
Signed-off-by: Zhao Liu
---
tests/unit/test-x86-apicid.c | 19 +++
1 file c
On Wed, Feb 15, 2023 at 3:26 AM Daniel Henrique Barboza
wrote:
>
> We're going to do changes that requires accessing the RISCVCPUConfig
> struct from the RISCVCPU, having access only to a CPURISCVState 'env'
> pointer. Add a helper to make the code easier to read.
>
> Reviewed-by: Weiwei Li
> Sig
On Wed, Feb 15, 2023 at 3:26 AM Daniel Henrique Barboza
wrote:
>
> The attribute is no longer used since we can retrieve all the enabled
> features in the hart by using cpu->cfg instead.
>
> Remove env->feature, riscv_feature() and riscv_set_feature(). We also
> need to bump vmstate_riscv_cpu vers
On Wed, Feb 15, 2023 at 3:27 AM Daniel Henrique Barboza
wrote:
>
> RISCV_FEATURE_MMU is set whether cpu->cfg.mmu is set, so let's just use
> the flag directly instead.
>
> With this change the enum is also removed. It is worth noticing that
> this enum, and all the RISCV_FEATURES_* that were conta
On Wed, Feb 15, 2023 at 3:25 AM Daniel Henrique Barboza
wrote:
>
> Read cpu_ptr->cfg.mmu directly. As a bonus, use cpu_ptr in
> riscv_isa_string().
>
> Reviewed-by: Weiwei Li
> Signed-off-by: Daniel Henrique Barboza
> ---
> hw/riscv/virt.c | 7 ---
> 1 file changed, 4 insertions(+), 3 delet
On Wed, Feb 15, 2023 at 3:26 AM Daniel Henrique Barboza
wrote:
>
> The masking done using env->misa_ext_mask already filters any extension
> that QEMU doesn't support. If the hart supports the extension then QEMU
> supports it as well.
>
> If the masking done by env->misa_ext_mask is somehow letti
On Wed, Feb 15, 2023 at 3:25 AM Daniel Henrique Barboza
wrote:
>
> RISCV_FEATURE_PMP is being set via riscv_set_feature() by mirroring the
> cpu->cfg.pmp flag. Use the flag instead.
>
> Reviewed-by: Weiwei Li
> Signed-off-by: Daniel Henrique Barboza
> ---
> target/riscv/cpu.c| 4
>
On Wed, Feb 15, 2023 at 3:25 AM Daniel Henrique Barboza
wrote:
>
> RISCV_FEATURE_DEBUG will always follow the value defined by
> cpu->cfg.debug flag. Read the flag instead.
>
> Reviewed-by: Weiwei Li
> Signed-off-by: Daniel Henrique Barboza
> ---
> target/riscv/cpu.c| 6 +-
> target
On Wed, Feb 15, 2023 at 3:25 AM Daniel Henrique Barboza
wrote:
>
> RISCV_FEATURE_EPMP is always set to the same value as the cpu->cfg.epmp
> flag. Use the flag directly.
>
> Reviewed-by: Weiwei Li
> Signed-off-by: Daniel Henrique Barboza
> ---
> target/riscv/cpu.c | 10 +++---
> target/risc
On Wed, Feb 15, 2023 at 3:24 AM Daniel Henrique Barboza
wrote:
>
> Instead of silently ignoring the EPMP setting if there is no PMP
> available, error out informing the user that EPMP depends on PMP
> support:
>
> $ ./qemu-system-riscv64 -cpu rv64,pmp=false,x-epmp=true
> qemu-system-riscv64: Inval
On Wed, Feb 15, 2023 at 09:51:02AM +0100, Dorinda Bassey wrote:
> This commit adds a new audiodev backend to allow QEMU to use Pipewire as both
> an audio sink and source. This backend is available on most systems.
>
> Added Pipewire entry points for QEMU Pipewire audio backend
> Added wrappers f
Only atapi.c requires the SCSI constants. No need to include
it in all files including "hw/ide/internal.h".
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/atapi.c| 1 +
include/hw/ide/internal.h | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ide/atapi.c b/hw
Following docs/devel/style.rst guidelines, rename MMIOIDEState
as IdeMmioState.
Having the structure name and its typedef named equally,
we can manually convert from the old DECLARE_INSTANCE_CHECKER()
macro to the more recent OBJECT_DECLARE_SIMPLE_TYPE().
Note, due to that name mismatch, this mac
Mostly trivial cleanups in preparation of a v2 of
"hw/ide: Untangle ISA/PCI abuses of ide_init_ioport()":
https://lore.kernel.org/qemu-devel/20230208000743.79415-1-phi...@linaro.org/
Bernhard Beschow (1):
hw/ide/pci: Unexport bmdma_active_if()
John Snow (1):
MAINTAINERS: Mark IDE and Floppy a
"hw/ide.h" is a mixed bag of lost IDE declarations.
Extract mmio_ide_init_drives() and the TYPE_MMIO_IDE QOM
declarations to a new "hw/ide/mmio.h" header.
Document the SysBus interface.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/mmio.c | 5 +
hw/sh4/r2d.c | 2 +-
i
"hw/ide.h" is a mixed bag of lost IDE declarations.
Extract isa_ide_init() and the TYPE_ISA_IDE QOM declarations
to a new "hw/ide/isa.h" header.
Rename ISAIDEState::isairq as 'irqnum' to emphasize this is
not a qemu_irq object but the number (index) of an ISA IRQ.
Signed-off-by: Philippe Mathieu
From: John Snow
I have not been able to give these devices the love they need for a
while now. Update the maintainers file to reflect the truth of the
matter.
Signed-off-by: John Snow
Message-Id: <20230206182544.77-1-js...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS
The intermediate ISAIDEState::irq variable just add noise, remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/isa.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/hw/ide/isa.c b/hw/ide/isa.c
index 5c3e83a0fc..ad47e0899e 100644
--- a/hw/ide/isa.c
+++ b/hw/ide/isa.
ide_set_irq() operates on a IDEBus; rename it as
ide_bus_set_irq() to emphasize its first argument
is a IDEBus.
Mechanical change using:
$ sed -i -e 's/ide_set_irq/ide_bus_set_irq/g' \
$(git grep -l ide_set_irq)
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/atapi.c| 12
ide_register_restart_cb() operates on a IDEBus; rename it as
ide_bus_register_restart_cb() to emphasize its first argument
is a IDEBus.
Mechanical change using:
$ sed -i -e 's/ide_register_restart_cb/ide_bus_register_restart_cb/g' \
$(git grep -l ide_register_restart_cb)
Signed-off-by: Phi
Only include "hw/irq.h" where appropriate.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/ahci.c | 1 +
hw/ide/core.c | 8
hw/ide/ich.c | 1 +
hw/ide/macio.c| 1 +
hw/ide/microdrive.c | 1 +
hw/ide/pci.c | 1 +
hw/mis
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/piix.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index 2f71376b93..6354ae740b 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -28,14 +28,9 @@
*/
#include "qemu/osdep.h"
-#include
ide_exec_cmd() operates on a IDEBus; rename it as
ide_bus_exec_cmd() to emphasize its first argument
is a IDEBus.
Mechanical change using:
$ sed -i -e 's/ide_exec_cmd/ide_bus_exec_cmd/g' \
$(git grep -wl ide_exec_cmd)
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/ahci.c
ide_create_drive() operates on a IDEBus; rename it as
ide_bus_create_drive() to emphasize its first argument
is a IDEBus.
Mechanical change using:
$ sed -i -e 's/ide_create_drive/ide_bus_create_drive/g' \
$(git grep -wl ide_create_drive)
Signed-off-by: Philippe Mathieu-Daudé
---
hw/a
From: Bernhard Beschow
The function is only used inside ide/pci.c, so doesn't need to be exported.
Signed-off-by: Bernhard Beschow
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/pci.c | 6 ++
include/hw/ide/pci.h | 6 --
2 files changed, 6 insertions(+), 6 deletions(-)
diff
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/ioport.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/hw/ide/ioport.c b/hw/ide/ioport.c
index e6caa537fa..e2ecc6230c 100644
--- a/hw/ide/ioport.c
+++ b/hw/ide/ioport.c
@@ -25,16 +25,6 @@
#include "qemu/osdep.h"
#include "hw/is
idebus_active_if() operates on a IDEBus; rename it as
ide_bus_active_if() to emphasize its first argument
is a IDEBus.
Mechanical change using:
$ sed -i -e 's/idebus_active_if/ide_bus_active_if/g' \
$(git grep -l idebus_active_if)
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/core
ide_init2() initializes a IDEBus, and set its output IRQ.
To emphasize this, rename it as ide_bus_init_output_irq().
Mechanical change using:
$ sed -i -e 's/ide_init2/ide_bus_init_output_irq/g' \
$(git grep -l ide_init2)
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/ahci.c
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/piix.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index 6354ae740b..f10bdf39ff 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -121,7 +121,7 @@ static void piix_ide_reset(Devi
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/piix.c | 37 ++---
1 file changed, 18 insertions(+), 19 deletions(-)
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index f10bdf39ff..41d60921e3 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -121,7 +121,7 @@ static
On 2/14/23 18:44, Vladimir Sementsov-Ogievskiy wrote:
On 03.02.23 12:18, Alexander Ivanov wrote:
data_end field in BDRVParallelsState is set to the biggest offset
present
in BAT. If this offset is outside of the image, any further write will
create the cluster at this offset and/or the image wi
Missed in commit d7458e7754 ("hw/ide/internal: Remove unused
DMARestartFunc typedef") which removed the single use of RunState.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/ide/internal.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/hw/ide/internal.h b/include/hw/ide/intern
The IDEBus structure has PortioList fields, so we need its
declarations from "exec/ioport.h". "hw/isa/isa.h" is not required.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/ide/internal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/ide/internal.h b/includ
On Tue, Feb 14, 2023 at 09:52:44PM +0100, Paolo Bonzini wrote:
> Il mar 14 feb 2023, 18:26 Kevin Wolf ha scritto:
>
> > Am 14.02.2023 um 15:03 hat Paolo Bonzini geschrieben:
> > > In the case of Python the issue is not the interpreter per se, though
> > > there are a couple new feature in Python
On 15.02.23 12:08, Juan Quintela wrote:
Vladimir Sementsov-Ogievskiy wrote:
On 08.02.23 16:57, Juan Quintela wrote:
So remove last assignation of res_compatible.
I hoped for some description when asked to split it out :)
Signed-off-by: Juan Quintela
---
migration/ram.c | 2 +-
1 file
On 15.02.23 14:29, Denis V. Lunev wrote:
On 2/14/23 18:44, Vladimir Sementsov-Ogievskiy wrote:
On 03.02.23 12:18, Alexander Ivanov wrote:
data_end field in BDRVParallelsState is set to the biggest offset present
in BAT. If this offset is outside of the image, any further write will
create the c
Am 14.02.2023 um 18:16 hat Stefano Garzarella geschrieben:
> bdrv_append() is called with bs_top AioContext held, but
> bdrv_attach_child_noperm() could change the AioContext of bs_top.
>
> bdrv_replace_node_noperm() calls bdrv_drained_begin() starting from
> commit 2398747128 ("block: Don't poll
Juan Quintela writes:
> Markus Armbruster wrote:
>> Juan Quintela writes:
>>
>>> We used to synchronize all channels at the end of each RAM section
>>> sent. That is not needed, so preparing to only synchronize once every
>>> full round in latests patches.
>>>
>>> Notice that we initialize the
This is a ping to the patch below.
https://patchew.org/QEMU/ty0pr0101mb4285923fbe9ad97ce832d95ba4...@ty0pr0101mb4285.apcprd01.prod.exchangelabs.com/
Before this commit, when GDB attached an OS working on QEMU, order of FPU
stack registers printed by GDB command 'info float' was wrong. There was a
John Snow writes:
> On Tue, Feb 14, 2023, 11:49 AM John Snow wrote:
>
>>
>>
>> On Mon, Feb 13, 2023, 8:20 AM Markus Armbruster wrote:
>>
>>> *** BLURB HERE ***
>>>
>>
>> 🤫
Uh, thank you for following my written instructions literally, and...
>>> Markus Armbruster (2):
>>> docs/devel/qapi-co
Hi Zhao,
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
Currently, by default, the cache topology is encoded as:
1. i/d cache is shared in one core.
2. L2 cache is shared in one core.
3. L3 cache is shared in one die.
This default general setting has caused a misunderstanding, that is, the
ca
On Mon, Feb 13, 2023 at 08:10:29PM +0530, Sunil V L wrote:
> ACPI needs OEM_ID and OEM_TABLE_ID for the machine. Add these fields
> in the RISCVVirtState structure and initialize with default values.
>
> Signed-off-by: Sunil V L
> Reviewed-by: Bin Meng
> Acked-by: Alistair Francis
> ---
> hw/r
On Mon, Feb 13, 2023 at 08:10:30PM +0530, Sunil V L wrote:
> ACPI is enabled by default. Add a switch to turn off
> for testing and debug purposes.
>
> Signed-off-by: Sunil V L
> ---
> hw/riscv/virt.c | 35 +++
> include/hw/riscv/virt.h | 2 ++
> 2 files
On Mon, Feb 13, 2023 at 08:10:31PM +0530, Sunil V L wrote:
> memmap needs to be exported outside of virt.c so that
> modules like acpi can use it. Hence, add a pointer field
> in RiscVVirtState structure and initialize it with the
> memorymap.
>
> Signed-off-by: Sunil V L
> Reviewed-by: Bin Meng
On 15/2/23 12:09, Cédric Le Goater wrote:
On 2/15/23 11:55, Philippe Mathieu-Daudé wrote:
On 14/2/23 18:18, Cédric Le Goater wrote:
From: Klaus Jensen
Add an example I2C device to demonstrate how a slave may master the bus
and send data asynchronously to another slave.
What a rebellion...
On Fri, Feb 10, 2023 at 07:27:41PM +0100, Paolo Bonzini wrote:
> On 2/10/23 18:15, Peter Maydell wrote:
> There are four possibilities:
>
> * we change the support policy and stop supporting CentOS 8 and SLE 15, not
> a good idea since a lot of people have not migrated to CentOS 9 yet.
>
> * we k
在 2023/2/13 17:36, Zhao Liu 写道:
From: Zhao Liu
>From AMD's APM, NumSharingCache (CPUID[0x801D].EAX[bits 25:14])
means [1]:
The number of logical processors sharing this cache is the value of
this field incremented by 1. To determine which logical processors are
sharing a cache, determine a
Cédric Le Goater writes:
> On 2/15/23 07:38, Markus Armbruster wrote:
>> Cédric Le Goater writes:
>>
>>> Hello,
>>>
>>> This series starts with a first set of patches fixing I2C slave mode
>>> in the Aspeed I2C controller, a test device and its associated test in
>>> avocado.
>>>
>>> Follow som
Queued, thanks.
Paolo
We are facing the issues that some test logs in the gitlab CI are
too big (and thus cut off). The rtl8139-test is one of the few qtests
that prints many lines of output by default when running with V=1, so
it contributes to this problem. Almost all other qtests are silent
with V=1 and only print de
Avihai Horon wrote:
> Currently, if IOMMU of a VFIO container doesn't support dirty page
> tracking, migration is blocked. This is because a DMA-able VFIO device
> can dirty RAM pages without updating QEMU about it, thus breaking the
> migration.
>
> However, this doesn't mean that migration can't
Avihai Horon wrote:
> Currently VFIO migration doesn't implement some kind of intermediate
> quiescent state in which P2P DMAs are quiesced before stopping or
> running the device. This can cause problems in multi-device migration
> where the devices are doing P2P DMAs, since the devices are not s
On Wed, Feb 15, 2023 at 01:41:22PM +0100, Thomas Huth wrote:
> We are facing the issues that some test logs in the gitlab CI are
> too big (and thus cut off). The rtl8139-test is one of the few qtests
> that prints many lines of output by default when running with V=1, so
> it contributes to this p
On 2/14/23 17:44, Peter Maydell wrote:
On Mon, 13 Feb 2023 at 20:50, Pierrick Bouvier
wrote:
mrs instruction fails as an illegal instruction.
For now, no cache information is retrieved for this platform.
It could be specialized later, using Windows API.
Unless I'm misreading the code, there'
Am 14.02.2023 um 19:28 hat Vladimir Sementsov-Ogievskiy geschrieben:
> I have to admit this is out of my scope now. Still feel free to Cc me
> directly if my help is needed :)
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
Thanks, applied to the block branch.
Kevin
Am 09.02.2023 um 16:45 hat Emanuele Giuseppe Esposito geschrieben:
> When calling bdrv_getlength() in handle_aiocb_write_zeroes(), the
> function creates a new coroutine and then waits that it finishes using
> AIO_WAIT_WHILE.
> The problem is that this function could also run in a worker thread,
>
On Mon, Feb 13, 2023 at 08:10:32PM +0530, Sunil V L wrote:
> Add few basic ACPI tables and DSDT with few devices in a
> new file virt-acpi-build.c.
>
> These are mostly leveraged from arm64.
>
> Signed-off-by: Sunil V L
> ---
> hw/riscv/virt-acpi-build.c | 285 ++
Avihai Horon wrote:
> Implement the basic mandatory part of VFIO migration protocol v2.
> This includes all functionality that is necessary to support
> VFIO_MIGRATION_STOP_COPY part of the v2 protocol.
>
> The two protocols, v1 and v2, will co-exist and in the following patches
> v1 protocol code
Avihai Horon wrote:
> Now that v2 protocol implementation has been added, remove the
> deprecated v1 implementation.
>
> Signed-off-by: Avihai Horon
> Reviewed-by: Cédric Le Goater
Reviewed-by: Juan Quintela
Yes, yes, yes O:-)
Avihai Horon wrote:
> Sort the migration section of VFIO trace events file alphabetically
> and move two misplaced traces to common.c section.
>
> Signed-off-by: Avihai Horon
> Reviewed-by: Cédric Le Goater
Reviewed-by: Juan Quintela
On Mon, Feb 13, 2023 at 08:10:33PM +0530, Sunil V L wrote:
> Add Multiple APIC Description Table (MADT) with the
> INTC structure for each cpu.
>
> Signed-off-by: Sunil V L
> Acked-by: Alistair Francis
> ---
> hw/riscv/virt-acpi-build.c | 37 +
> 1 file chang
Kevin Wolf writes:
> Am 13.01.2023 um 08:30 hat Markus Armbruster geschrieben:
>> Drive-by comment...
>>
>> Kevin Wolf writes:
>>
>> > This series addresses the problem described in these bug reports:
>> > https://gitlab.com/qemu-project/qemu/-/issues/1330
>> > https://bugzilla.redhat.com/show
On Fri, 2023-02-10 at 13:48 +, Paul Durrant wrote:
>
> > +static int allocate_port(XenEvtchnState *s, uint32_t vcpu,
> > uint16_t type,
> > + uint16_t val, evtchn_port_t *port)
> > +{
> > + evtchn_port_t p = 1;
> > +
> > + for (p = 1; valid_port(p); p++) {
> > +
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