Add properties for Zve64d,Zvfh,Zvfhmin extension
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 7128438d8e..54c6875617 100644
--- a/target/riscv/cpu.h
+++ b/target/
From: Thomas Huth
Just because a NIC model is compiled into the QEMU binary does not
necessary mean that it can be used with each and every machine.
So let's rather talk about "available" models instead of "supported"
models, just to avoid confusion.
Reviewed-by: Claudio Fontana
Signed-off-by:
On 14/2/23 12:49, Markus Armbruster wrote:
Daniel P. Berrangé writes:
On Tue, Feb 14, 2023 at 10:25:22AM +0100, Peter Krempa wrote:
On Tue, Feb 14, 2023 at 09:54:22 +0100, Markus Armbruster wrote:
Daniel P. Berrangé writes:
On Mon, Feb 13, 2023 at 05:01:01PM +0300, Vladimir Sementsov-Ogie
From: Fabiano Rosas
Check that virtio-scsi-pci is present in the QEMU build before running
the tests.
Signed-off-by: Fabiano Rosas
Reviewed-by: Thomas Huth
Message-Id: <20230208194700.11035-12-faro...@suse.de>
Signed-off-by: Thomas Huth
---
tests/qemu-iotests/186 | 1 +
1 file changed, 1 ins
From: Qiang Liu
Check fifos before poping data from and pushing data into it.
Fixes: 98e5d7a2b726 ("hw/net/can: Introduce Xilinx ZynqMP CAN controller")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1425
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1427
Reported-by: Qiang Li
From: Sittisak Sinprem
---
hw/nvram/eeprom_at24c.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c
index 2d4d8b952f..693212b661 100644
--- a/hw/nvram/eeprom_at24c.c
+++ b/hw/nvram/eeprom_at24c.c
@@ -87,7 +87,7 @@ uint8
From: Sittisak Sinprem
Device 24C64 the size is 64 kilobits
Device 24C02 the size is 2 kilobits
---
hw/arm/aspeed.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 55f114ef72..8e6a1579e4 100644
--- a/h
This series includes 2 patches
1. Improve at24c to support 1-byte address EEPROM such as 24c01 and
24c02.
2. correct the EEPROM size for aspeed/fuji platform.
ref: https://gitlab.com/qemu-project/qemu/-/issues/1485
Sittisak Sinprem (2):
hw/at24c : modify at24c to support 1 byte address mode
as
On 2/14/23 10:40, weiwei wrote:
On 2023/2/14 21:21, Daniel Henrique Barboza wrote:
On 2/14/23 05:38, Weiwei Li wrote:
Add dependence chain:
* V => Zve64d => Zve64f => Zve32f => F
* V => Zve64d => D
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.c | 21 ++
From: Peter Maydell
The npcm7xx_pwm-test produces a lot of output at V=1, which
means that on our CI tests the log files exceed the gitlab
500KB limit. Suppress the messages about exactly what is
being tested unless at V=2 and above.
This follows the pattern we use with qom-test.
Signed-off-by:
On 2023/2/14 09:09, Bin Meng wrote:
At present seed CSR is not reported in the CSR XML hence gdb cannot
access it.
Fix it by addding a debugger check in its predicate() routine.
typo: adding
Otherwise, Reviewed-by: Weiwei Li
Regards,
Weiwei Li
Signed-off-by: Bin Meng
---
target/ris
On Mon, Feb 13, 2023 at 02:33:22PM +0100, Philippe Mathieu-Daudé wrote:
> Date: Mon, 13 Feb 2023 14:33:22 +0100
> From: Philippe Mathieu-Daudé
> Subject: Re: [RFC 41/52] machine: Introduce core_type() hook
>
> On 13/2/23 10:50, Zhao Liu wrote:
> > From: Zhao Liu
> >
> > Since supported core typ
The Q35 PCI host already has a "bypass-iommu" property. However, the
host initializes this property itself by accessing global machine state,
thereby assuming it to be a PC machine. Avoid this by having board code
set this property.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_q35.c | 2 ++
h
On Feb 14 17:34, Major Saheb wrote:
> Thanks Peter for the reply. I tried to connect gdb to qemu and able to
> break 'vtd_iova_to_slpte()', I dumped the following with both Ubuntu
> 20.04 base image container which is the success case and Ubuntu 22.04
> base image container which is failure case
>
At present the envcfg CSRs predicate() routines are generic one like
smode(), hmode. The configuration check is done in the read / write
routine. Create a new predicate routine to cover such check, so that
gdbstub can correctly report its existence.
Signed-off-by: Bin Meng
---
target/riscv/csr
On Tue, Feb 14, 2023 at 09:13:28AM +0530, Sunil V L wrote:
> On Mon, Feb 13, 2023 at 03:48:04PM -0300, Daniel Henrique Barboza wrote:
> > Sunil,
> >
> > This patch is a bit confusing to me. You're using functions that doesn't
> > exist
> > in the code base yet (build_madt and build_rhct) because
Hello,
Adding Peter since he contributed the fuji machine,
On 2/14/23 10:06, ~ssinprem wrote:
From: Sittisak Sinprem
Device 24C64 the size is 64 kilobits
Device 24C02 the size is 2 kilobits
Could you please specify the size in bytes ?
You will need to add a Signed-off-by tag.
Thanks,
C.
On Tue, 14 Feb 2023 at 06:11, Jason Wang wrote:
>
> The following changes since commit f670b3eec7f5d1ed8c4573ef244e7b8c6b32001b:
>
> Merge tag 'migration-20230213-pull-request' of
> https://gitlab.com/juan.quintela/qemu into staging (2023-02-13 11:54:05 +)
>
> are available in the git repos
On 2/10/23 07:20, ~ssinprem wrote:
From: Sittisak Sinprem
You will need to add a Signed-off-by tag
Thanks,
C.
---
hw/nvram/eeprom_at24c.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c
index 2d4d8b952f..693
Am 02.02.23 um 12:34 schrieb Kevin Wolf:
> Am 02.02.2023 um 11:19 hat Fiona Ebner geschrieben:
>> Am 31.01.23 um 19:18 schrieb Denis V. Lunev:
>>> Frankly speaking I would say that this switch could be considered
>>> NOT QEMU job and we should just send a notification (event) for the
>>> completion
On Tue, 14 Feb 2023 at 14:29, Peter Maydell wrote:
>
> On Tue, 14 Feb 2023 at 06:11, Jason Wang wrote:
> >
> > The following changes since commit f670b3eec7f5d1ed8c4573ef244e7b8c6b32001b:
> >
> > Merge tag 'migration-20230213-pull-request' of
> > https://gitlab.com/juan.quintela/qemu into stag
Hi Daniel,
On Tue, Feb 14, 2023 at 3:20 AM Daniel Henrique Barboza
wrote:
>
> Bin,
>
>
> I received only patches 1-11. I don't see the remaining patches in patchwork:
>
>
> https://patchwork.kernel.org/project/qemu-devel/list/?series=721372
>
>
> or in the qemu-devel archives:
>
>
> https://lists
Follow what kernel's full_exception() is doing.
Reviewed-by: Richard Henderson
Signed-off-by: Ilya Leoshkevich
---
linux-user/microblaze/cpu_loop.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_loop.c
On Mon, Feb 13, 2023 at 02:35:24PM +0100, Philippe Mathieu-Daudé wrote:
> Date: Mon, 13 Feb 2023 14:35:24 +0100
> From: Philippe Mathieu-Daudé
> Subject: Re: [RFC 41/52] machine: Introduce core_type() hook
>
> On 13/2/23 10:50, Zhao Liu wrote:
> > From: Zhao Liu
> >
> > Since supported core typ
On Feb 14 14:05, Klaus Jensen wrote:
> On Feb 14 17:34, Major Saheb wrote:
> > Thanks Peter for the reply. I tried to connect gdb to qemu and able to
> > break 'vtd_iova_to_slpte()', I dumped the following with both Ubuntu
> > 20.04 base image container which is the success case and Ubuntu 22.04
>
On 14/2/23 15:10, Thomas Huth wrote:
"note_size" can be smaller than sizeof(note), so unconditionally calling
memset(notep, 0, sizeof(note)) could cause a memory corruption here in
case notep has been allocated dynamically, thus let's use note_size as
length argument for memset() instead.
Corre
On 2023/2/14 22:27, Bin Meng wrote:
At present the envcfg CSRs predicate() routines are generic one like
smode(), hmode. The configuration check is done in the read / write
routine. Create a new predicate routine to cover such check, so that
gdbstub can correctly report its existence.
Signed-o
On 2/14/23 15:10, Thomas Huth wrote:
"note_size" can be smaller than sizeof(note), so unconditionally calling
memset(notep, 0, sizeof(note)) could cause a memory corruption here in
case notep has been allocated dynamically, thus let's use note_size as
length argument for memset() instead.
Fixes:
On 09.02.23 21:10, Juan Quintela wrote:
Vladimir Sementsov-Ogievskiy wrote:
On 08.02.23 16:57, Juan Quintela wrote:
So remove last assignation of res_compatible.
I hoped for some description when asked to split it out :)
Signed-off-by: Juan Quintela
---
migration/ram.c | 2 +-
1 file
On 08.02.23 16:57, Juan Quintela wrote:
{
-uint64_t pend_pre, pend_compat, pend_post;
+uint64_t pend_pre, pend_post;
bool in_postcopy = s->state == MIGRATION_STATUS_POSTCOPY_ACTIVE;
-qemu_savevm_state_pending_estimate(&pend_pre, &pend_compat, &pend_post);
-uint64_t pen
On 2023/2/11 19:50, Daniel Henrique Barboza wrote:
On 2/10/23 23:43, weiwei wrote:
On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
At this moment, and apparently since ever, we have no way of enabling
RISCV_FEATURE_MISA. This means that all the code from write_misa(), all
the nuts and b
On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
This enum is no longer used after write_misa() started reading the value
from cpu->cfg.misa_w.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Weiwei Li r
Regards,
Weiwei Li
---
target/riscv/cpu.h | 1 -
1 file changed, 1 deletio
On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
We're going to do changes that requires accessing the RISCVCPUConfig
struct from the RISCVCPU, having access only to a CPURISCVState 'env'
pointer. Add a helper to make the code easier to read.
Signed-off-by: Daniel Henrique Barboza
Reviewe
On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
RISCV_FEATURE_DEBUG will always follow the value defined by
cpu->cfg.debug flag. Read the flag instead.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Weiwei Li
Regards,
Weiwei Li
---
target/riscv/cpu.c| 6 +-
targe
On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
Instead of silently ignoring the EPMP setting if there is no PMP
available, error out informing the user that EPMP depends on PMP
support:
$ ./qemu-system-riscv64 -cpu rv64,pmp=false,x-epmp=true
qemu-system-riscv64: Invalid configuration: EPMP
We do run tests on some cross builds. Provide a template to ensure we
export the testlog to the build artefacts and report the test results
via the junit.
Signed-off-by: Alex Bennée
Reported-by: Peter Maydell
---
.gitlab-ci.d/crossbuild-template.yml | 11 +++
.gitlab-ci.d/crossbuilds.ym
On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
RISCV_FEATURE_EPMP is always set to the same value as the cpu->cfg.epmp
flag. Use the flag directly.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Weiwei Li
Regards,
Weiwei Li
---
target/riscv/cpu.c | 10 +++---
target/ris
On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
RISCV_FEATURE_PMP is being set via riscv_set_feature() by mirroring the
cpu->cfg.pmp flag. Use the flag instead.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Weiwei Li
Regards,
Weiwei Li
---
target/riscv/cpu.c| 4
On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
Read cpu_ptr->cfg.mmu directly. As a bonus, use cpu_ptr in
riscv_isa_string().
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/virt.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv
On Tue, Feb 14, 2023 at 3:06 PM Kevin Wolf wrote:
>
> Am 14.02.2023 um 13:22 hat Stefano Garzarella geschrieben:
> > On Tue, Feb 14, 2023 at 12:56 PM Kevin Wolf wrote:
> > >
> > > Am 14.02.2023 um 11:51 hat Stefano Garzarella geschrieben:
> > > > bdrv_append() is called with bs_top AioContext hel
On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
RISCV_FEATURE_MMU is set whether cpu->cfg.mmu is set, so let's just use
the flag directly instead.
With this change the enum is also removed. It is worth noticing that
this enum, and all the RISCV_FEATURES_* that were contained in it,
predates
On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
The attribute is no longer used since we can retrieve all the enabled
features in the hart by using cpu->cfg instead.
Remove env->feature, riscv_feature() and riscv_set_feature(). We also
need to bump vmstate_riscv_cpu version_id and minimal_v
On 08.02.23 16:57, Juan Quintela wrote:
Once that res_compatible is removed, they don't make sense anymore.
Signed-off-by: Juan Quintela
---
include/migration/register.h | 18 --
migration/savevm.h | 8
hw/s390x/s390-stattrib.c | 7 +++
hw
On Tue, 14 Feb 2023 at 09:40, Mostafa Saleh wrote:
>
> GBPA register can be used to globally abort all
> transactions.
>
> It is described in the SMMU manual in "6.3.14 SMMU_GBPA".
> ABORT reset value is IMPLEMENTATION DEFINED, it is chosen to
> be zero(Do not abort incoming transactions).
>
> Oth
On 14 February 2023 10:59:12 CET, Paul Durrant wrote:
>On 01/02/2023 14:31, David Woodhouse wrote:
>> From: David Woodhouse
>>
>> Signed-off-by: David Woodhouse
>> ---
>> hw/i386/kvm/xen_gnttab.c | 31
>> hw/i386/kvm/xen_gnttab.h | 5
>> target/i386/kvm/xen-e
On 13 February 2023 16:31:57 CET, Paul Durrant wrote:
>On 01/02/2023 14:31, David Woodhouse wrote:
>> From: David Woodhouse
>>
>> Signed-off-by: David Woodhouse
>> ---
>> hw/i386/kvm/xen_gnttab.c | 74 ++-
>> hw/i386/kvm/xen_overlay.c | 2 +-
>> hw/i
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
Xen has eight frames at 0xfeff8000 for this; we only really need two for
now and KVM puts the identity map at 0xfeffc000, so limit ourselves to
four.
Signed-off-by: David Woodhouse
---
include/sysemu/kvm_xen.h | 8
On 14 February 2023 11:10:05 CET, Paul Durrant wrote:
>On 01/02/2023 14:31, David Woodhouse wrote:
>> From: Joao Martins
>>
>> Introduce support for one shot and periodic mode of Xen PV timers,
>> whereby timer interrupts come through a special virq event channel
>> with deadlines being set t
On Sat, Feb 04, 2023 at 11:29:41PM -0500, Alexander Bulekov wrote:
> Hello,
> This series removes fork-based fuzzing.
> How does fork-based fuzzing work?
> * A single parent process initializes QEMU
> * We identify the devices we wish to fuzz (fuzzer-dependent)
> * Use QTest to PCI enumerate the
On 14/02/2023 15:35, David Woodhouse wrote:
On 13 February 2023 16:31:57 CET, Paul Durrant wrote:
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_gnttab.c | 74 ++-
hw/i386/kvm/x
On 14 February 2023 16:40:11 CET, Paul Durrant wrote:
>On 14/02/2023 15:35, David Woodhouse wrote:
>>
>>
>> On 13 February 2023 16:31:57 CET, Paul Durrant wrote:
>>> On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
Signed-off-by: David Woodhouse
---
>>
Vladimir Sementsov-Ogievskiy wrote:
> On 09.02.23 21:10, Juan Quintela wrote:
>> Vladimir Sementsov-Ogievskiy wrote:
>>> On 08.02.23 16:57, Juan Quintela wrote:
So remove last assignation of res_compatible.
>>
>
>
> I think, that the order of logic and documentation changing since introduci
On 01/02/2023 14:31, David Woodhouse wrote:
From: Joao Martins
Which is used to fetch xenstore PFN and port to be used
by the guest. This is preallocated by the toolstack when
guest will just read those and use it straight away.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
On 14 February 2023 16:47:13 CET, Paul Durrant wrote:
>On 01/02/2023 14:31, David Woodhouse wrote:
>> From: Joao Martins
>>
>> Which is used to fetch xenstore PFN and port to be used
>> by the guest. This is preallocated by the toolstack when
>> guest will just read those and use it straight
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
The provides the QEMU side of interdomain event channels, allowing events
to be sent to/from the guest.
The API mirrors libxenevtchn, and in time both this and the real Xen one
will be available through ops structures so that th
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
Just the basic shell, with the event channel hookup. It only dumps the
buffer for now; a real ring implmentation will come in a subsequent patch.
Signed-off-by: David Woodhouse
---
hw/i386/kvm/meson.build| 1 +
hw/i386
On 02.02.23 18:23, Kevin Wolf wrote:
Am 02.02.2023 um 14:35 hat Denis V. Lunev geschrieben:
On 2/2/23 14:27, Fiona Ebner wrote:
Am 02.02.23 um 12:34 schrieb Kevin Wolf:
Am 02.02.2023 um 11:19 hat Fiona Ebner geschrieben:
Am 31.01.23 um 19:18 schrieb Denis V. Lunev:
Frankly speaking I would s
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
Extract requests, return ENOSYS to all of them. This is enough to allow
older Linux guests to boot, as they need *something* back but it doesn't
matter much what.
In the first instance we're likely to wire this up over a UNIX so
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
It isn't strictly mandatory but Linux guests at least will only map
their grant tables over the dummy BAR that it provides, and don't have
sufficient wit to map them in any other unused part of their guest
address space. So inclu
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
Just hook up the basic hypercalls to stubs in xen_evtchn.c for now.
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 25
hw/i386/kvm/xen_evtchn.h | 11
target/i386/kvm/xen-compat.h | 19
-Original Message-
From: qemu-s390x-bounces+jadon.mcdowell=optum@nongnu.org
On Behalf Of Vladimir
Sementsov-Ogievskiy
Sent: Tuesday, February 14, 2023 9:27 AM
To: Juan Quintela ; qemu-devel@nongnu.org
Cc: Ilya Leoshkevich ; qemu-bl...@nongnu.org; Alex
Williamson ; Fam Zheng ; Eric
Hi
I want to enter a discussion about changing the default of the style
guide.
There are several reasons for that:
- they exist since C99 (i.e. all supported compilers support them)
- they eliminate the posibility of an unitialized variable.
- (at least for me), declaring the index inside the for
On Mon, Feb 13, 2023 at 7:46 PM Philippe Mathieu-Daudé
wrote:
> Extract code common to multi_2x_serial_pci_class_initfn() and
> multi_4x_serial_pci_class_initfn() to multi_serial_class_initfn().
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/char/serial-pci-multi.c | 22 +-
On 14/2/23 16:38, Stefan Hajnoczi wrote:
On Sat, Feb 04, 2023 at 11:29:41PM -0500, Alexander Bulekov wrote:
Hello,
This series removes fork-based fuzzing.
How does fork-based fuzzing work?
* A single parent process initializes QEMU
* We identify the devices we wish to fuzz (fuzzer-dependent)
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
This wires up the basic infrastructure but the actual interrupts aren't
there yet, so don't advertise it to the guest.
Signed-off-by: David Woodhouse
---
hw/i386/kvm/trace-events | 4 +
hw/i386/kvm/trace.h | 1 +
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
If I advertise XENFEAT_hvm_pirqs then a guest now boots successfully as
long as I tell it 'pci=nomsi'.
[root@localhost ~]# cat /proc/interrupts
CPU0
0: 52 IO-APIC 2-edge timer
1: 16 xe
On Tue, 7 Feb 2023 at 17:51, Peter Maydell wrote:
>
> On Tue, 7 Feb 2023 at 17:37, ~dreiss-meta wrote:
> >
> > New in v4: Moved arm_v7m_mrs_control out of the `#ifdef
> > CONFIG_USER_ONLY` block, unbreaking the user-only build. The downside
> > is that this function is now taking up space in the
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
The way that Xen handles MSI PIRQs is kind of awful.
There is a special MSI message which targets a PIRQ. The vector in the
low bits of data must be zero. The low 8 bits of the PIRQ# are in the
destination ID field, the extended
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
The default number of PIRQs is set to 256 to avoid issues with 32-bit MSI
devices. Allow it to be increased if the user desires.
Signed-off-by: David Woodhouse
---
accel/kvm/kvm-all.c | 1 +
hw/i386/kvm/xen_evtchn.c
Philippe Mathieu-Daudé writes:
> On 14/2/23 13:17, Markus Armbruster wrote:
>> Philippe Mathieu-Daudé writes:
>>
>>> On 14/2/23 12:49, Markus Armbruster wrote:
Daniel P. Berrangé writes:
>>
>> [...]
>>
> What's the documented way to construct a QOM path, given only an ID as
> i
On 02.02.23 16:27, Fiona Ebner wrote:
Am 02.02.23 um 12:34 schrieb Kevin Wolf:
Am 02.02.2023 um 11:19 hat Fiona Ebner geschrieben:
Am 31.01.23 um 19:18 schrieb Denis V. Lunev:
Frankly speaking I would say that this switch could be considered
NOT QEMU job and we should just send a notification
On 01/02/2023 14:31, David Woodhouse wrote:
From: David Woodhouse
Signed-off-by: David Woodhouse
---
docs/system/i386/xen.rst| 76 +
docs/system/target-i386.rst | 1 +
2 files changed, 77 insertions(+)
create mode 100644 docs/system/i386/xen.rst
Daniel P. Berrangé writes:
> On Tue, Feb 14, 2023 at 05:36:32PM +0400, Marc-André Lureau wrote:
>> Hi
>>
>> On Tue, Feb 14, 2023 at 5:34 PM Markus Armbruster wrote:
>> >
>> > marcandre.lur...@redhat.com writes:
>> >
>> > > From: Marc-André Lureau
>> > >
>> > > As per comment, presumably to avo
Daniel P. Berrangé writes:
> On Tue, Feb 14, 2023 at 12:57:28PM +0100, Markus Armbruster wrote:
>> Daniel P. Berrangé writes:
>>
>> > On Tue, Feb 14, 2023 at 09:54:22AM +0100, Markus Armbruster wrote:
>> >> Daniel P. Berrangé writes:
>> >>
>> >> > On Mon, Feb 13, 2023 at 05:01:01PM +0300, Vla
This function is not used outside gdbstub.c.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 1 -
target/arm/gdbstub.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7bc97fece9..b2c49b3605 100644
--- a/target/arm/cpu.h
From: David Reiss
Allow the function to be used outside of m_helper.c.
Rename with an "arm_" prefix.
Signed-off-by: David Reiss
[rth: Split out of a larger patch]
Signed-off-by: Richard Henderson
---
target/arm/internals.h | 3 +++
target/arm/m_helper.c | 6 +++---
2 files changed, 6 inserti
Keep the logic for pauth within pauth_helper.c, and expose
a helper function for use with the gdbstub pac extension.
Signed-off-by: Richard Henderson
---
target/arm/internals.h| 10 ++
target/arm/pauth_helper.c | 26 ++
2 files changed, 32 insertions(+), 4 del
Signed-off-by: Richard Henderson
---
target/arm/gdbstub64.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 8d174ff6e0..02a0256c5c 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -283,6 +283,7 @@ in
This patch adds support for the asynchronous teardown for reboot for
protected VMs.
When attempting to tear down a protected VM, try to use the new
asynchronous interface first. If that fails, fall back to the classic
synchronous one.
The asynchronous interface involves invoking the new
KVM_PV_AS
Make the form of the function names between fp and sve the same:
- arm_gdb_*_svereg -> aarch64_gdb_*_sve_reg.
- aarch64_fpu_gdb_*_reg -> aarch64_gdb_*_fpu_reg.
Signed-off-by: Richard Henderson
---
target/arm/internals.h | 8
target/arm/gdbstub.c | 9 +
target/arm/gdbstub64
The function is only used for aarch64, so move it to the
file that has the other aarch64 gdbstub stuff. Move the
declaration to internals.h.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 6 ---
target/arm/internals.h | 1 +
target/arm/gdbstub.c | 120 --
Define svep based on the size of the predicates,
not the primary vector registers.
Signed-off-by: Richard Henderson
---
target/arm/gdbstub64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 02a0256c5c..ec61211949 100644
-
From: David Reiss
Allow the function to be used outside of m_helper.c.
Move to be outside of ifndef CONFIG_USER_ONLY block.
Rename from get_v7m_sp_ptr.
Signed-off-by: David Reiss
[rth: Split out of a larger patch]
Signed-off-by: Richard Henderson
---
target/arm/internals.h | 10 +
target/
Order suf[] by the log8 of the width.
Use ARRAY_SIZE instead of hard-coding 128.
This changes the order of the union definitions,
but retains the order of the union-of-union members.
Signed-off-by: Richard Henderson
---
target/arm/gdbstub64.c | 10 ++
1 file changed, 6 insertions(+), 4
From: David Reiss
Follows a fairly similar pattern to the existing special register
debug support. Only reading is implemented, but it should be
possible to implement writes.
Signed-off-by: David Reiss
[rth: Split out from two other patches;
Use an enumeration to locally number the registers.
This will make the function usable between SVE and SME.
Signed-off-by: Richard Henderson
---
target/arm/gdbstub64.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index ec61211949..166cb288cd 1006
Rather than increment base_reg and num, compute num
from the change to base_reg at the end. Clean up some
nearby comments.
Signed-off-by: Richard Henderson
---
target/arm/gdbstub64.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/target/arm/gdbs
Update kvm.h Linux header with these commits:
8c516b25d6e9 ("KVM: s390: pv: add KVM_CAP_S390_PROTECTED_ASYNC_DISABLE")
fb491d5500a7 ("KVM: s390: pv: asynchronous destroy for reboot")
Signed-off-by: Claudio Imbrenda
---
linux-headers/linux/kvm.h | 3 +++
1 file changed, 3 insertions(+)
diff --g
This is my pauth enhancements from last year, the corresponding gdb
patches for which are nearing merge. If lore and patchew are to be
believed, I never posted this to the list, only pushed a branch so
that issue #1105 could see it.
Since the cleanups there conflict with the recent m-profile gdbs
Create a subroutine for creating the union of unions
of the various type sizes that a vector may contain.
Signed-off-by: Richard Henderson
---
target/arm/gdbstub64.c | 83 +++---
1 file changed, 45 insertions(+), 38 deletions(-)
diff --git a/target/arm/gdbstu
The first patch is just a minimal header update to compile the second
patch; it can be safely discarded once the Linux headers are updated to
6.2.
The second patch adds support for asynchronous teardown of protected
guests when rebooting. The existing guest is prepared for asynchronous
teardown, t
On 2/14/23 06:30, Richard Henderson wrote:
+for (i = 0; i < ret; i++) {
+if (arm_feature(env, m_systemreg_def[i].feature)) {
+g_string_append_printf(s,
+"\n",
+m_systemreg_def[i].name, base_reg + i);
+}
+}
+
+if (arm_feature(
The extension is primarily defined by the Linux kernel NT_ARM_PAC_MASK
ptrace register set.
The original gdb feature consists of two masks, data and code, which are
used to mask out the authentication code within a pointer. Following
discussion with Luis Machado, add two more masks in order to su
On Wed, Feb 08, 2023 at 04:12:27PM -0500, Michael S. Tsirkin wrote:
> This reverts commit eac7a7791bb6d719233deed750034042318ffd56.
>
> Fixes: eac7a7791b ("x86: don't let decompressed kernel image clobber
> setup_data")
> Signed-off-by: Michael S. Tsirkin
> ---
> include/hw/i386/microvm.h | 5
On Wed, Feb 08, 2023 at 04:12:31PM -0500, Michael S. Tsirkin wrote:
> This reverts commit 14b29fea742034186403914b4d013d0e83f19e78.
>
> Signed-off-by: Michael S. Tsirkin
> Fixes: 14b29fea74 ("x86: do not re-randomize RNG seed on snapshot load")
> ---
> hw/i386/x86.c | 2 +-
> 1 file changed, 1 i
On Wed, Feb 08, 2023 at 04:12:37PM -0500, Michael S. Tsirkin wrote:
> This reverts commit cc63374a5a7c240b7d3be734ef589dabbefc7527.
>
> Fixes: cc63374a5a ("x86: re-initialize RNG seed when selecting kernel")
> Signed-off-by: Michael S. Tsirkin
> ---
> hw/i386/x86.c | 5 +
> 1 file changed, 1
On Wed, Feb 08, 2023 at 04:12:42PM -0500, Michael S. Tsirkin wrote:
> This reverts commit 763a2828bf313ed55878b09759dc435355035f2e.
>
> Fixes: 763a2828bf ("x86: reinitialize RNG seed on system reboot")
> Signed-off-by: Michael S. Tsirkin
> ---
> hw/i386/x86.c | 7 ---
> 1 file changed, 7 del
On Wed, Feb 08, 2023 at 04:12:46PM -0500, Michael S. Tsirkin wrote:
> This reverts commit eebb38a5633a77f5fa79d6486d5b2fcf8fbe3c07.
>
> Fixes: eebb38a563 ("x86: use typedef for SetupData struct")
> Signed-off-by: Michael S. Tsirkin
> ---
> hw/i386/x86.c | 14 +++---
> 1 file changed, 7 i
On Wed, Feb 08, 2023 at 04:12:51PM -0500, Michael S. Tsirkin wrote:
> This reverts commit e935b735085dfa61d8e6d276b6f9e7687796a3c7.
>
> Fixes: e935b73508 ("x86: return modified setup_data only if read as memory,
> not as file")
> Signed-off-by: Michael S. Tsirkin
> ---
> include/hw/nvram/fw_cfg
On Mon, 13 Feb 2023 at 20:50, Pierrick Bouvier
wrote:
>
> mrs instruction fails as an illegal instruction.
> For now, no cache information is retrieved for this platform.
> It could be specialized later, using Windows API.
Unless I'm misreading the code, there's a sys_cache_info()
implementation
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