Re: [QEMU][PATCH v5 04/10] xen-hvm: reorganize xen-hvm and move common function to xen-hvm-common

On 31/01/2023 22:51, Vikram Garhwal wrote: From: Stefano Stabellini This patch does following: 1. creates arch_handle_ioreq() and arch_xen_set_memory(). This is done in preparation for moving most of xen-hvm code to an arch-neutral location, move the x86-specific portion of xen_set_me

Re: [QEMU][PATCH v5 05/10] include/hw/xen/xen_common: return error from xen_create_ioreq_server

On 31/01/2023 22:51, Vikram Garhwal wrote: From: Stefano Stabellini This is done to prepare for enabling xenpv support for ARM architecture. On ARM it is possible to have a functioning xenpv machine with only the PV backends and no IOREQ server. If the IOREQ server creation fails, continue to t

Re: [PATCH v2 0/6] Resolve TYPE_PIIX3_XEN_DEVICE

Am 24. Januar 2023 17:07:30 UTC schrieb Bernhard Beschow : > > >Am 24. Januar 2023 16:11:47 UTC schrieb Anthony PERARD >: >>On Wed, Jan 18, 2023 at 05:13:03AM -0500, Michael S. Tsirkin wrote: >>> On Wed, Jan 04, 2023 at 03:44:31PM +0100, Bernhard Beschow wrote: >>> > This series first renders T

Re: [QEMU][PATCH v5 06/10] hw/xen/xen-hvm-common: skip ioreq creation on ioreq registration failure

On 31/01/2023 22:51, Vikram Garhwal wrote: From: Stefano Stabellini On ARM it is possible to have a functioning xenpv machine with only the PV backends and no IOREQ server. If the IOREQ server creation fails continue to the PV backends initialization. Also, moved the IOREQ registration and map

Re: [QEMU][PATCH v5 07/10] hw/xen/xen-hvm-common: Use g_new and error_report

On 31/01/2023 22:51, Vikram Garhwal wrote: Replace g_malloc with g_new and perror with error_report. Signed-off-by: Vikram Garhwal Reviewed-by: Stefano Stabellini --- hw/xen/xen-hvm-common.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) Reviewed-by: Paul Durrant

Re: [QEMU][PATCH v5 09/10] hw/arm: introduce xenpvh machine

On 31/01/2023 22:51, Vikram Garhwal wrote: Add a new machine xenpvh which creates a IOREQ server to register/connect with Xen Hypervisor. Is this really the right way? Is it not possible to do the Xen initialization (including ioreq server registration) off the back of the accelerator init (

Re: [PATCH v6 05/36] tcg: Add TCG_CALL_{RET,ARG}_BY_REF

Richard Henderson writes: > These will be used by some hosts, both 32 and 64-bit, to pass and > return i128. Not yet used, because allocation is not yet enabled. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v6 13/36] tcg: Add temp allocation for TCGv_i128

Richard Henderson writes: > This enables allocation of i128. The type is not yet > usable, as we have not yet added data movement ops. > > Reviewed-by: Philippe Mathieu-Daudé > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

[PULL 1/1] m68k: fix 'bkpt' instruction in softmmu mode

In linux-user mode, 'bkpt' generates an EXP_DEBUG exception to allow QEMU gdb server to intercept and manage the operation with an external debugger. In softmmu mode, the instruction must generate an illegal instruction exception as it is on real hardware to be managed by the kernel. Buglink: htt

[PULL 0/1] M68k next patches

-next-pull-request for you to fetch changes up to c1fc91b82545a2b8ab73f81e5b7b6b0fec292ea1: m68k: fix 'bkpt' instruction in softmmu mode (2023-02-01 10:18:21 +0100) ---- m68k pull request 20230201 fix 'bkpt

Re: [PATCH v6 15/36] tcg: Add guest load/store primitives for TCGv_i128

Richard Henderson writes: > These are not yet considering atomicity of the 16-byte value; > this is a direct replacement for the current target code which > uses a pair of 8-byte operations. > > Signed-off-by: Richard Henderson > --- > include/exec/cpu_ldst.h | 10 +++ > include/tcg/tcg-op.h

[RFC PATCH v2 0/3] hw/cxl: Poison get, inject, clear

RFC mostly because we already have 4 CXL QEMU series waiting for review ahead of this and I don't want to distract too much from those. I posted an RFC of part of this series a long time back [1]. It's been more or less entirely rewriten since then and gained support for mailbox based injection an

[RFC PATCH v2 3/3] hw/cxl: Add clear poison mailbox command support.

Current implementation is very simple so many of the corner cases do not exist (e.g. fragmenting larger poison list entries) Signed-off-by: Jonathan Cameron --- hw/cxl/cxl-mailbox-utils.c | 77 + hw/mem/cxl_type3.c | 36 + include/hw/

Re: [PATCH v6 17/36] tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32, 64}

Richard Henderson writes: > Normally this is automatically handled by the CF_PARALLEL checks > with in tcg_gen_atomic_cmpxchg_i{32,64}, but x86 has a special > case of !PREFIX_LOCK where it always wants the non-atomic version. > > Split these out so that x86 does not have to roll its own. > > S

[RFC PATCH v2 2/3] hw/cxl: Add poison injection via the mailbox.

Very simple implementation to allow testing of corresponding kernel code. Note that for now we track each 64 byte section independently. Whilst a valid implementation choice, it may make sense to fuse entries so as to prove out more complex corners of the kernel code. Signed-off-by: Jonathan Came

RE: [PATCH v3 3/9] igb: add ICR_RXDW

> -Original Message- > From: Akihiko Odaki > Sent: Wednesday, 1 February 2023 05:36 > To: Sriram Yagnaraman > Cc: qemu-devel@nongnu.org; Jason Wang ; Dmitry > Fleytman ; Michael S . Tsirkin > ; Marcel Apfelbaum > Subject: Re: [PATCH v3 3/9] igb: add ICR_RXDW > > On 2023/01/31 18:42, Sri

Re: [PATCH 9/9] Updated the FSF address in tests/qemu-iotests/022

Khadija Kamran writes: > Signed-off-by: Khadija Kamran Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v6 16/36] tcg: Add tcg_gen_{non}atomic_cmpxchg_i128

Richard Henderson writes: > This will allow targets to avoid rolling their own. > > Reviewed-by: Philippe Mathieu-Daudé > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 5/9] Updated the FSF address in file include/hw/arm/raspi_platform.h

Khadija Kamran writes: > Signed-off-by: Khadija Kamran Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 3/9] Updated the FSF address in file hw/scsi/viosrp.h

Khadija Kamran writes: > Signed-off-by: Khadija Kamran > --- > The Free Software Foundation moved to a new address and this file referred to > their old location. > The address should be updated and replaced to a pointer to > > This will resolve the issue #3

Re: [PATCH 1/9] Updated the FSF address in file hw/sh4/sh7750_regs.h

Khadija Kamran writes: > Signed-off-by: Khadija Kamran > --- > The Free Software Foundation moved to a new address and this file referred to > their old location. > The address should be updated and replaced to a pointer to > > This will resolve the issue #379

Re: [PATCH 7/9] Updated the FSF address in file util/uri.c

Khadija Kamran writes: > Signed-off-by: Khadija Kamran Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 4/9] Updated the FSF address in file include/qemu/uri.h

Khadija Kamran writes: > Signed-off-by: Khadija Kamran Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

[RFC PATCH v2 1/3] hw/cxl: QMP based poison injection support

Inject poison using qmp command cxl-inject-poison to add an entry to the poison list. For now, the poison is not returned CXL.mem reads, but only via the mailbox command Get Poison List. See CXL rev 3.0, sec 8.2.9.8.4.1 Get Poison list (Opcode 4300h) Kernel patches to use this interface here: ht

Re: [PATCH v6 35/36] target/i386: Inline cmpxchg8b

Richard Henderson writes: > Use tcg_gen_atomic_cmpxchg_i64 for the atomic case, > and tcg_gen_nonatomic_cmpxchg_i64 otherwise. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 6/9] Updated the FSF address in file tests/unit/rcutorture.c

Khadija Kamran writes: > Signed-off-by: Khadija Kamran Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: Emulating device configuration / max_virtqueue_pairs in vhost-vdpa and vhost-user

On Wed, Feb 01, 2023 at 08:49:30AM +0100, Eugenio Perez Martin wrote: > On Wed, Feb 1, 2023 at 4:29 AM Jason Wang wrote: > > > > On Wed, Feb 1, 2023 at 3:11 AM Eugenio Perez Martin > > wrote: > > > > > > On Tue, Jan 31, 2023 at 8:10 PM Eugenio Perez Martin > > > wrote: > > > > > > > > Hi, > > >

RE: [PATCH v3 8/9] igb: respect VT_CTL ignore MAC field

> -Original Message- > From: Akihiko Odaki > Sent: Wednesday, 1 February 2023 05:58 > To: Sriram Yagnaraman > Cc: qemu-devel@nongnu.org; Jason Wang ; Dmitry > Fleytman ; Michael S . Tsirkin > ; Marcel Apfelbaum > Subject: Re: [PATCH v3 8/9] igb: respect VT_CTL ignore MAC field > > On

Re: [PATCH 8/9] Updated the FSF address in tests/unit/test-rcu-list.c

Khadija Kamran writes: > Signed-off-by: Khadija Kamran Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: Emulating device configuration / max_virtqueue_pairs in vhost-vdpa and vhost-user

On Wed, Feb 01, 2023 at 11:29:35AM +0800, Jason Wang wrote: > On Wed, Feb 1, 2023 at 3:11 AM Eugenio Perez Martin > wrote: > > > > On Tue, Jan 31, 2023 at 8:10 PM Eugenio Perez Martin > > wrote: > > > > > > Hi, > > > > > > The current approach of offering an emulated CVQ to the guest and map > >

Re: Expose support for HyperV features via QMP

On 31/01/23 8:17 pm, manish.mishra wrote: Hi Everyone, I hope everyone is doing great. We wanted to check why we do not expose support for HyperV features in Qemu similar to what we do for normal CPU features via query-cpu-defs or cpu-model-expansion QMP commands. This support is required fo

Re: Emulating device configuration / max_virtqueue_pairs in vhost-vdpa and vhost-user

Thanks Eugenio for working on this. On 1/31/23 20:10, Eugenio Perez Martin wrote: Hi, The current approach of offering an emulated CVQ to the guest and map the commands to vhost-user is not scaling well: * Some devices already offer it, so the transformation is redundant. * There is no support

[PATCH v4 9/9] igb: respect VMVIR and VMOLR for VLAN

Add support for stripping/inserting VLAN for VFs. Had to move CSUM calculation back into the for loop, since packet data is pulled inside the loop based on strip VLAN decision for every VF. net_rx_pkt_fix_l4_csum should be extended to accept a buffer instead for igb. Work for a future patch. Sig

[PATCH v4 4/9] igb: implement VFRE and VFTE registers

Also introduce: - Checks for RXDCTL/TXDCTL queue enable bits - IGB_NUM_VM_POOLS enum (Sec 1.5: Table 1-7) Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 36 hw/net/igb_core.h | 1 + hw/net/igb_regs.h | 3 +++ 3 files changed, 32 insertions(+), 8 d

[PATCH v4 5/9] igb: check oversized packets for VMDq

Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 41 - 1 file changed, 36 insertions(+), 5 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index c44b30b6d1..cda81a54bf 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -912,1

[PATCH v4 8/9] igb: respect VT_CTL ignore MAC field

Also trace out a warning if replication mode is disabled, since we only support replication mode enabled. Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 9 + hw/net/trace-events | 2 ++ 2 files changed, 11 insertions(+) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c inde

[PATCH v4 1/9] MAINTAINERS: Add Sriram Yagnaraman as a igb reviewer

I would like to review and be informed on changes to igb device Signed-off-by: Sriram Yagnaraman --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index ece23b2b15..7d0e84ce37 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2224,6 +2224,7 @@ F: tests/qt

[PATCH v4 0/9] igb: merge changes from <20221229190817.25500-1-sriram.yagnara...@est.tech>

Based-on: <20230201042615.34706-1-akihiko.od...@daynix.com> ([PATCH v7 0/9] Introduce igb) Rebased on latest changes from Akihiko, and merged changes from my original patchset: https://lists.gnu.org/archive/html/qemu-devel/2022-12/msg04670.html Changes since v3: - Fix comments - Rebased on latest

[PATCH v4 7/9] igb: implement VF Tx and Rx stats

Please note that loopback counters for VM to VM traffic is not implemented yet: VFGOTLBC, VFGPTLBC, VFGORLBC and VFGPRLBC. Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 26 ++ 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/hw/net/igb_core.c b/hw

[PATCH v4 6/9] igb: respect E1000_VMOLR_RSSE

RSS for VFs is only enabled if VMOLR[n].RSSE is set. Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index cda81a54bf..c0b20287f2 100644 --- a/hw/net/igb_core.c +++ b/hw/net/i

Re: Emulating device configuration / max_virtqueue_pairs in vhost-vdpa and vhost-user

On Wed, Feb 01, 2023 at 12:14:18PM +0100, Maxime Coquelin wrote: > Thanks Eugenio for working on this. > > On 1/31/23 20:10, Eugenio Perez Martin wrote: > > Hi, > > > > The current approach of offering an emulated CVQ to the guest and map > > the commands to vhost-user is not scaling well: > > *

Re: Emulating device configuration / max_virtqueue_pairs in vhost-vdpa and vhost-user

On Wed, Feb 1, 2023 at 12:14 PM Maxime Coquelin wrote: > > Thanks Eugenio for working on this. > > On 1/31/23 20:10, Eugenio Perez Martin wrote: > > Hi, > > > > The current approach of offering an emulated CVQ to the guest and map > > the commands to vhost-user is not scaling well: > > * Some devi

Re: [PATCH] tests/tcg/s390x: Use -nostdlib for softmmu tests

On 31/1/23 19:20, Ilya Leoshkevich wrote: The code currently uses -nostartfiles, but this does not prevent linking with libc. On Fedora there is no cross-libc, so the linking step fails. Fix by using the more comprehensive -nostdlib (that's also what probe_target_compiler() checks for as well).

Re: Emulating device configuration / max_virtqueue_pairs in vhost-vdpa and vhost-user

On Wed, Feb 1, 2023 at 12:20 PM Michael S. Tsirkin wrote: > > On Wed, Feb 01, 2023 at 12:14:18PM +0100, Maxime Coquelin wrote: > > Thanks Eugenio for working on this. > > > > On 1/31/23 20:10, Eugenio Perez Martin wrote: > > > Hi, > > > > > > The current approach of offering an emulated CVQ to the

Re: [PATCH v5 01/14] Hexagon (target/hexagon) Add overrides for jumpr31 instructions

Add overrides for SL2_jumpr31Unconditional SL2_jumpr31_t Predicated true (old value) SL2_jumpr31_f Predicated false (old value) SL2_jumpr31_tnew Predicated true (new value) SL2_jumpr31_fnew Predicated false (new value) Signed-o

Re: [PATCH v5 02/14] Hexagon (target/hexagon) Add overrides for callr

+static void gen_callr(DisasContext *ctx, TCGv new_pc) +{ +TCGv next_PC = +tcg_constant_tl(ctx->pkt->pc + ctx->pkt->encod_pkt_size_in_bytes); Could we not use ctx->next_PC here? +gen_log_reg_write(HEX_REG_LR, next_PC); +gen_write_new_pc_addr(ctx, new_pc, TCG_COND_ALWAYS, NULL

Re: [RFC PATCH v2 1/3] hw/cxl: QMP based poison injection support

Jonathan Cameron via writes: > Inject poison using qmp command cxl-inject-poison to add an entry to the > poison list. > > For now, the poison is not returned CXL.mem reads, but only via the > mailbox command Get Poison List. > > See CXL rev 3.0, sec 8.2.9.8.4.1 Get Poison list (Opcode 4300h) > >

[PATCH] hw/usb/hcd-ohci: Fix typo

Signed-off-by: Philippe Mathieu-Daudé --- hw/usb/hcd-ohci.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 9d68036d23..bd8b9d50e5 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -58,7 +58,7 @@ struct ohci_hcca

Re: [PATCH 1/9] Updated the FSF address in file hw/sh4/sh7750_regs.h

On 1/2/23 08:39, Khadija Kamran wrote: [*] Signed-off-by: Khadija Kamran --- The Free Software Foundation moved to a new address and this file referred to their old location. The address should be updated and replaced to a pointer to This will resolve the issu

Re: [PATCH 08/25] hw/arm/boot: Export write_bootloader for Aspeed machines

On 1/2/23 08:58, Cédric Le Goater wrote: On 2/1/23 06:45, Joel Stanley wrote: On Thu, 19 Jan 2023 at 12:37, Cédric Le Goater wrote: AST2600 Aspeed machines have an home made boot loader for secondaries. To improve support, export the internal ARM boot loader and use it instead. I didn't qui

Re: [PATCH v5 03/14] Hexagon (target/hexagon) Add overrides for endloop1/endloop01

+ +static void gen_endloop01(DisasContext *ctx) +{ +TCGv lpcfg = tcg_temp_local_new(); Move label declarations here per coding style + +GET_USR_FIELD(USR_LPCFG, lpcfg); + +/* + *if (lpcfg == 1) { + *hex_new_pred_value[3] = 0xff; + *hex_pred_written

Re: [PATCH v5 04/20] scripts/clean-includes: Improve --git commit message

Juan Quintela writes: > Markus Armbruster wrote: >> The script drops #include "qemu/osdep.h" from headers. Mention it in >> the commit message it uses for --git. >> >> Signed-off-by: Markus Armbruster >> --- >> scripts/clean-includes | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-

Re: [PATCH v3 8/9] igb: respect VT_CTL ignore MAC field

On 2023/02/01 19:29, Sriram Yagnaraman wrote: -Original Message- From: Akihiko Odaki Sent: Wednesday, 1 February 2023 05:58 To: Sriram Yagnaraman Cc: qemu-devel@nongnu.org; Jason Wang ; Dmitry Fleytman ; Michael S . Tsirkin ; Marcel Apfelbaum Subject: Re: [PATCH v3 8/9] igb: respect

Re: [PATCH v5 04/14] Hexagon (target/hexagon) Add overrides for dealloc-return instructions

These instructions perform a deallocframe+return (jumpr r31) Add overrides for L4_return SL2_return L4_return_t L4_return_f L4_return_tnew_pt L4_return_fnew_pt L4_return_tnew_pnt L4_return_fnew_pnt SL2_return_t SL2_return_f SL2_return_tnew

RE: [PATCH v4 00/16] hw/9pfs: Add 9pfs support for Windows

> From: Marc-André Lureau > Sent: Tuesday, January 31, 2023 23:07 > To: Daniel P. Berrangé > Cc: Meng, Bin ; Greg Kurz ; Christian > Schoenebeck ; qemu-devel@nongnu.org; Shi, Guohuai > ; Laurent > Vivier ; Paolo > Bonzini ; Philippe Mathieu-Daudé ; > Thomas Huth > Subject: Re: [PATCH v4 0

Re: [PATCH v3 06/11] tests/qtest/migration-test: Reduce 'cmd_source' string scope

Thomas Huth wrote: > On 30/01/2023 05.44, Juan Quintela wrote: >> Philippe Mathieu-Daudé wrote: >>> Reviewed-by: Richard Henderson >>> Signed-off-by: Philippe Mathieu-Daudé >> Reviewed-by: Juan Quintela >> I am assuming that you will pull this patches through tests tree, >> not >> migration tr

Re: [PATCH 1/4] cpus: Make {start,end}_exclusive() recursive

On Wed, 2023-02-01 at 01:46 +0100, Ilya Leoshkevich wrote: > Currently dying to one of the core_dump_signal()s deadlocks, because > dump_core_and_abort() calls start_exclusive() two times: first via > stop_all_tasks(), and then via preexit_cleanup() -> > qemu_plugin_user_exit(). > > There are a nu

Re: [PATCH v4 4/9] igb: implement VFRE and VFTE registers

On 2023/02/01 20:17, Sriram Yagnaraman wrote: Also introduce: - Checks for RXDCTL/TXDCTL queue enable bits - IGB_NUM_VM_POOLS enum (Sec 1.5: Table 1-7) It may be better to have RXDCTL.ENABLE check in igb_can_receive(). Signed-off-by: Sriram Yagnaraman --- hw/net/igb_core.c | 36 ++

Re: [PATCH v5 04/20] scripts/clean-includes: Improve --git commit message

Markus Armbruster wrote: > Juan Quintela writes: > >> Markus Armbruster wrote: >>> The script drops #include "qemu/osdep.h" from headers. Mention it in >>> the commit message it uses for --git. >>> >>> Signed-off-by: Markus Armbruster >>> --- >>> scripts/clean-includes | 4 ++-- >>> 1 file ch

[PATCH v15 01/11] s390x/cpu topology: adding s390 specificities to CPU topology

S390 adds two new SMP levels, drawers and books to the CPU topology. The S390 CPU have specific toplogy features like dedication and polarity to give to the guest indications on the host vCPUs scheduling and help the guest take the best decisions on the scheduling of threads on the vCPUs. Let us p

Re: [PATCH v9 2/5] riscv: Change type of valid_vm_1_10_[32|64] to bool

Reviewed-by: Frank Chang On Tue, Jan 31, 2023 at 10:29 PM Alexandre Ghiti wrote: > This array is actually used as a boolean so swap its current char type > to a boolean and at the same time, change the type of validate_vm to > bool since it returns valid_vm_1_10_[32|64]. > > Suggested-by: Andre

[PATCH v15 00/11] s390x: CPU Topology

Hi, Two important changes in this series: - The ordering of the Topology List Entries, TLE, is done just before building the System information Buffer, SYSIB, during the interception of STSI. The adventage of this is to do the ordering only if it is needed whatever the reason for a change

[PATCH v15 11/11] docs/s390x/cpu topology: document s390x cpu topology

Add some basic examples for the definition of cpu topology in s390x. Signed-off-by: Pierre Morel --- docs/system/s390x/cpu-topology.rst | 294 + docs/system/target-s390x.rst | 1 + 2 files changed, 295 insertions(+) create mode 100644 docs/system/s390x/cpu-to

[PATCH v15 08/11] qapi/s390x/cpu topology: x-set-cpu-topology monitor command

The modification of the CPU attributes are done through a monitor command. It allows to move the core inside the topology tree to optimise the cache usage in the case the host's hypervisor previously moved the CPU. The same command allows to modify the CPU attributes modifiers like polarization e

[PATCH v15 04/11] s390x/sclp: reporting the maximum nested topology entries

The maximum nested topology entries is used by the guest to know how many nested topology are available on the machine. Let change the MNEST value from 2 to 4 in the SCLP READ INFO structure now that we support books and drawers. Signed-off-by: Pierre Morel Reviewed-by: Nina Schoetterl-Glausch

[PATCH v15 07/11] target/s390x/cpu topology: activating CPU topology

The KVM capability KVM_CAP_S390_CPU_TOPOLOGY is used to activate the S390_FEAT_CONFIGURATION_TOPOLOGY feature and the topology facility in the host CPU model for the guest in the case the topology is available in QEMU and in KVM. The feature is disabled by default and fenced for SE (secure executi

[PATCH v15 03/11] target/s390x/cpu topology: handle STSI(15) and build the SYSIB

On interception of STSI(15.1.x) the System Information Block (SYSIB) is built from the list of pre-ordered topology entries. Signed-off-by: Pierre Morel --- include/hw/s390x/cpu-topology.h | 22 +++ include/hw/s390x/sclp.h | 1 + target/s390x/cpu.h | 72 +++ hw/s390x

[PATCH v15 09/11] machine: adding s390 topology to query-cpu-fast

S390x provides two more topology containers above the sockets, books and drawers. Let's add these CPU attributes to the QAPI command query-cpu-fast. Signed-off-by: Pierre Morel --- qapi/machine.json | 13 ++--- hw/core/machine-qmp-cmds.c | 2 ++ 2 files changed, 12 insertions(

[PATCH v15 02/11] s390x/cpu topology: add topology entries on CPU hotplug

The topology information are attributes of the CPU and are specified during the CPU device creation. On hot plug we: - calculate the default values for the topology for drawers, books and sockets in the case they are not specified. - verify the CPU attributes - check that we have still room on t

[PATCH v15 06/11] s390x/cpu topology: interception of PTF instruction

When the host supports the CPU topology facility, the PTF instruction with function code 2 is interpreted by the SIE, provided that the userland hypervizor activates the interpretation by using the KVM_CAP_S390_CPU_TOPOLOGY KVM extension. The PTF instructions with function code 0 and 1 are interce

Re: [PATCH v9 5/5] riscv: Correctly set the device-tree entry 'mmu-type'

Reviewed-by: Frank Chang On Tue, Jan 31, 2023 at 10:36 PM Alexandre Ghiti wrote: > The 'mmu-type' should reflect what the hardware is capable of so use the > new satp_mode field in RISCVCPUConfig to do that. > > Signed-off-by: Alexandre Ghiti > Reviewed-by: Andrew Jones > Reviewed-by: Alistai

[PATCH v15 05/11] s390x/cpu topology: resetting the Topology-Change-Report

During a subsystem reset the Topology-Change-Report is cleared by the machine. Let's ask KVM to clear the Modified Topology Change Report (MTCR) bit of the SCA in the case of a subsystem reset. Signed-off-by: Pierre Morel --- include/hw/s390x/cpu-topology.h | 1 + target/s390x/cpu.h

[PATCH v15 10/11] qapi/s390x/cpu topology: CPU_POLARITY_CHANGE qapi event

When the guest asks to change the polarity this change is forwarded to the admin using QAPI. The admin is supposed to take according decisions concerning CPU provisioning. Signed-off-by: Pierre Morel --- qapi/machine-target.json | 30 ++ hw/s390x/cpu-topology.c | 2

Re: [PULL v3 00/38] Block layer patches

On Tue, 24 Jan 2023 at 17:45, Kevin Wolf wrote: > > The following changes since commit 13356edb87506c148b163b8c7eb0695647d00c2a: > > Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into > staging (2023-01-24 09:45:33 +) > > are available in the Git repository at: > > ht

Re: [PATCH v6 32/36] target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSG

On Mon, 2023-01-30 at 11:48 -1000, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > Cc: David Hildenbrand > Cc: Ilya Leoshkevich > --- > target/s390x/helper.h| 2 -- > target/s390x/tcg/insn-data.h.inc | 2 +- > target/s390x/tcg/mem_helper.c| 52 -

Re: [PATCH] hw/usb/hcd-ohci: Fix typo

On Wed, 1 Feb 2023, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé I've submitted a series to clean this device up a bit which changed these comments to remove the extre space from the end. Maybe this patch should be rebased on that series so I don't have to rebase ir as

[PATCH] tests/tcg/s390x: Add cdsg.c

Add a simple test to prevent regressions. Signed-off-by: Ilya Leoshkevich --- tests/tcg/s390x/Makefile.target | 4 ++ tests/tcg/s390x/cdsg.c | 93 + 2 files changed, 97 insertions(+) create mode 100644 tests/tcg/s390x/cdsg.c diff --git a/tests/tcg/s390

Re: [RFC PATCH v5 0/9] target/arm: Allow CONFIG_TCG=n builds

Fabiano Rosas writes: > This series makes the necessary changes to allow the use of > --disable-tcg for arm. > > Based on "target/arm: CONFIG_TCG=n part 1": > https://lore.kernel.org/r/20230118193518.26433-1-faro...@suse.de > > Since v4: > > - Used "max" as the default CPU for KVM-only builds. Th

Re: [PATCH v5 04/20] scripts/clean-includes: Improve --git commit message

Juan Quintela writes: > Markus Armbruster wrote: >> Juan Quintela writes: >> >>> Markus Armbruster wrote: The script drops #include "qemu/osdep.h" from headers. Mention it in the commit message it uses for --git. Signed-off-by: Markus Armbruster --- scripts/cle

Re: [PATCH v9 1/3] hw/riscv: clear kernel_entry higher bits from load_elf_ram_sym()

On 1/31/23 21:16, Alistair Francis wrote: On Fri, Jan 20, 2023 at 7:38 AM Daniel Henrique Barboza wrote: load_elf_ram_sym() will sign-extend 32 bit addresses. If a 32 bit QEMU guest happens to be running in a hypervisor that are using 64 bits to encode its address, kernel_entry can be padde

[PATCH 2/2] target/i386: add support for FB_CLEAR feature

As reported by the Intel's doc: "FB_CLEAR: The processor will overwrite fill buffer values as part of MD_CLEAR operations with the VERW instruction. On these processors, L1D_FLUSH does not overwrite fill buffer values." If this cpu feature is present in host, allow QEMU to choose whether to show i

[PATCH] x86: fix q35 kernel measurements broken due to rng seeding

The origin commit for rng seeding 67f7e426e5 ("hw/i386: pass RNG seed via setup_data entry") modifies the kernel image file to append a random seed. Obviously this makes the hash of the kernel file non-deterministic and so breaks both measured and some signed boots. The commit notes it's only for

[PATCH 0/2] target/i386: add support for cpu FLUSH_L1D feature and FB_CLEAR capability

QEMU should be able to show the guest the above feature/capability, otherwise we risk to have false vulnerability reports in the guest like in /sys/devices/system/cpu/vulnerabilities/mmio_stale_data because the mitigation is present only if the guest supports (FLUSH_L1D and MD_CLEAR) or FB_CLEAR.

[PATCH 1/2] target/i386: add support for FLUSH_L1D feature

As reported by Intel's doc: "L1D_FLUSH: Writeback and invalidate the L1 data cache" If this cpu feature is present in host, allow QEMU to choose whether to show it to the guest too. One disadvantage of not exposing it is that the guest will report a non existing vulnerability in /sys/devices/syste

[PATCH v2] x86: fix q35 kernel measurements broken due to rng seeding

The origin commit for rng seeding 67f7e426e5 ("hw/i386: pass RNG seed via setup_data entry") modifies the kernel image file to append a random seed.  Obviously this makes the hash of the kernel file non-deterministic and so breaks both measured and some signed boots. The commit notes it's only for

[PATCH 7/9] Updated the FSF address in file util/uri.c

Signed-off-by: Khadija Kamran --- The Free Software Foundation moved to a new address and this file referred to their old location. The address should be updated and replaced to a pointer to This will resolve the issue #379 in the QEMU source repository. util/

[PATCH 3/9] Updated the FSF address in file hw/scsi/viosrp.h

Signed-off-by: Khadija Kamran --- The Free Software Foundation moved to a new address and this file referred to their old location. The address should be updated and replaced to a pointer to This will resolve the issue #379 in the QEMU source repository. hw/sc

[PATCH 4/9] Updated the FSF address in file include/qemu/uri.h

Signed-off-by: Khadija Kamran --- The Free Software Foundation moved to a new address and this file referred to their old location. The address should be updated and replaced to a pointer to This will resolve the issue #379 in the QEMU source repository. inclu

[PATCH 8/9] Updated the FSF address in tests/unit/test-rcu-list.c

Signed-off-by: Khadija Kamran --- The Free Software Foundation moved to a new address and this file referred to their old location. The address should be updated and replaced to a pointer to This will resolve the issue #379 in the QEMU source repository. tests

[PATCH 5/9] Updated the FSF address in file include/hw/arm/raspi_platform.h

Signed-off-by: Khadija Kamran --- The Free Software Foundation moved to a new address and this file referred to their old location. The address should be updated and replaced to a pointer to This will resolve the issue #379 in the QEMU source repository. inclu

[PATCH 6/9] Updated the FSF address in file tests/unit/rcutorture.c

Signed-off-by: Khadija Kamran --- The Free Software Foundation moved to a new address and this file referred to their old location. The address should be updated and replaced to a pointer to This will resolve the issue #379 in the QEMU source repository. tests

Re: [PATCH 1/9] Updated the FSF address in file hw/sh4/sh7750_regs.h

Thank you for the feedback. I will keep the points in mind next time. On Wed, 1 Feb 2023, 3:24 pm Alex Bennée, wrote: > > Khadija Kamran writes: > > > Signed-off-by: Khadija Kamran > > --- > > The Free Software Foundation moved to a new address and this file > referred to their old location. >

[PATCH 2/9] Updated the FSF address in file contrib/gitdm/filetypes.txt

Signed-off-by: Khadija Kamran --- The Free Software Foundation moved to a new address and this file referred to their old location. The address should be updated and replaced to a pointer to This will resolve the issue #379 in the QEMU source repository. contr

[PATCH 1/9] Updated the FSF address in file hw/sh4/sh7750_regs.h

Signed-off-by: Khadija Kamran --- The Free Software Foundation moved to a new address and this file referred to their old location. The address should be updated and replaced to a pointer to This will resolve the issue #379 in the QEMU source repository hw/sh4/s

[PATCH 9/9] Updated the FSF address in tests/qemu-iotests/022

Signed-off-by: Khadija Kamran --- The Free Software Foundation moved to a new address and this file referred to their old location. The address should be updated and replaced to a pointer to This will resolve the issue #379 in the QEMU source repository. tests

Re: [PATCH] accel/tcg: Complete cpu initialization before registration

Hi Richard, Commit 4e4fa6c12d ("accel/tcg: Complete cpu initialization before registration") seems to cause a regression on one kvm unit test: FAIL debug-wp-migration (terminated on SIGSEGV) This can be reproduced with upstream kernel, qemu and kvm unit test. Seems the change in accel/tcg/trans

Re: [PATCH] vhost-user-fs: add capability to allow migration

Anton Kuchin wrote: > On 19/01/2023 18:02, Stefan Hajnoczi wrote: >> On Thu, 19 Jan 2023 at 10:29, Anton Kuchin >> wrote: >>> On 19/01/2023 16:30, Stefan Hajnoczi wrote: On Thu, 19 Jan 2023 at 07:43, Anton Kuchin wrote: > On 18/01/2023 17:52, Stefan Hajnoczi wrote: >> On Sun,

[PATCH v10 20/59] i386/xen: implement HYPERVISOR_vcpu_op

From: Joao Martins This is simply when guest tries to register a vcpu_info and since vcpu_info placement is optional in the minimum ABI therefore we can just fail with -ENOSYS Signed-off-by: Joao Martins Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- target/i386/kvm/xen-emu.c |

[PATCH v10 02/59] xen: add CONFIG_XEN_BUS and CONFIG_XEN_EMU options for Xen emulation

From: David Woodhouse The XEN_EMU option will cover core Xen support in target/, which exists only for x86 with KVM today but could theoretically also be implemented on Arm/Aarch64 and with TCG or other accelerators (if anyone wants to run the gauntlet of struct layout compatibility, errno mappin

[PATCH v10 03/59] xen: Add XEN_DISABLED mode and make it default

From: David Woodhouse Also set XEN_ATTACH mode in xen_init() to reflect the truth; not that anyone ever cared before. It was *only* ever checked in xen_init_pv() before. Suggested-by: Paolo Bonzini Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- accel/xen/xen-all.c | 2 ++ incl

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