From: Richard Henderson
Conversion to probe_access_full missed applying the page offset.
Fixes: b8967ddf ("target/arm: Use probe_access_full for MTE")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1416
Signed-off-by: Richard Henderson
Message-id: 20230114031213.2970349-1-richard.hende
From: Philippe Mathieu-Daudé
Trace bitbang state machine changes with trace events.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Corey Minyard
Message-id: 20230111085016.44551-5-phi...@linaro.org
Signed-off-by: Peter Maydell
---
hw/i2c/bitbang_i2c.c | 33 ++
From: Evgeny Iakovlev
The architecture does not define any functionality for the CLAIM tag bits.
So we will just keep the raw bits, as per spec.
Signed-off-by: Evgeny Iakovlev
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20230120155929.32384-2-eiakov...@linux.microsof
On 23.01.23 14:47, Daniel P. Berrangé wrote:
On Mon, Jan 23, 2023 at 04:30:03PM +0300, Daniil Tatianin wrote:
On 1/23/23 11:57 AM, David Hildenbrand wrote:
On 20.01.23 14:47, Daniil Tatianin wrote:
This series introduces new qemu_prealloc_mem_with_timeout() api,
which allows limiting the maxim
On Sun, 22 Jan 2023 at 11:18, Michael S. Tsirkin wrote:
>
> On Sun, Jan 22, 2023 at 06:09:40PM +0200, Anton Kuchin wrote:
> >
> > On 22/01/2023 16:46, Michael S. Tsirkin wrote:
> > > On Sun, Jan 22, 2023 at 02:36:04PM +0200, Anton Kuchin wrote:
> > > > > > This flag should be set when qemu don't n
On 23.01.23 14:30, Daniil Tatianin wrote:
On 1/23/23 11:57 AM, David Hildenbrand wrote:
On 20.01.23 14:47, Daniil Tatianin wrote:
This series introduces new qemu_prealloc_mem_with_timeout() api,
which allows limiting the maximum amount of time to be spent on memory
preallocation. It also adds p
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-id: 20230110082508.24038-4-phi...@linaro.org
Signed-off-by: Peter Maydell
---
include/hw/i2c/arm_sbcon_i2c.h | 3 +--
hw/arm/realview.c | 2 +-
hw/arm/versatilepb.c
On Mon, Jan 23, 2023 at 15:01:37 +0100, Markus Armbruster wrote:
> Peter Krempa writes:
>
> > After recent header file inclusion rework the build fails when the blkio
> > module is enabled:
> >
> > ../block/blkio.c: In function ‘blkio_detach_aio_context’:
> > ../block/blkio.c:321:24: error: impli
From: Richard Henderson
Signed-off-by: Richard Henderson
Reviewed-by: Fabiano Rosas
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20230112102436.1913-6-phi...@linaro.org
Message-Id: <20230112004322.161330-1-richard.hender...@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-
On 1/23/23 4:47 PM, Daniel P. Berrangé wrote:
On Mon, Jan 23, 2023 at 04:30:03PM +0300, Daniil Tatianin wrote:
On 1/23/23 11:57 AM, David Hildenbrand wrote:
On 20.01.23 14:47, Daniil Tatianin wrote:
This series introduces new qemu_prealloc_mem_with_timeout() api,
which allows limiting the maxi
On 12/22/22 01:37, Huang, Kai wrote:
>>> I argue that this page pinning (or page migration prevention) is not
>>> tied to where the page comes from, instead related to how the page will
>>> be used. Whether the page is restrictedmem backed or GUP() backed, once
>>> it's used by current version of T
From: Richard Henderson
This is a 64-bit register on AArch64, even if the high 44 bits
are RES0. Because this is defined as ARM_CP_STATE_BOTH, we are
asserting that the cpreg field is 64-bits.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1400
Signed-off-by: Richard Henderson
Message
On 23.01.23 15:14, Daniil Tatianin wrote:
On 1/23/23 4:47 PM, Daniel P. Berrangé wrote:
On Mon, Jan 23, 2023 at 04:30:03PM +0300, Daniil Tatianin wrote:
On 1/23/23 11:57 AM, David Hildenbrand wrote:
On 20.01.23 14:47, Daniil Tatianin wrote:
This series introduces new qemu_prealloc_mem_with_ti
On 05.01.23 13:45, David Hildenbrand wrote:
Playing with background snapshots in combination with hugetlb and
virtio-mem, I found two issues and some reasonable optimizations (skip
unprotecting when unregistering).
With virtio-mem (RamDiscardManager), we now won't be allocating unnecessary
page
On 17.01.23 12:22, David Hildenbrand wrote:
While playing with migration of virtio-mem with an ordinary file backing,
I realized that migration and prealloc doesn't currently work as expected
for virtio-mem. Further, Jing Qi reported that setup issues (insufficient
huge pages on the destination)
Hi Connie,
On 1/11/23 17:13, Cornelia Huck wrote:
> Acked-by: Thomas Huth
> Signed-off-by: Cornelia Huck
Maybe add some extra information about what tests are run. Also you
could add an example of test invocation so that any people interested in
can easily run those new tests?
> ---
> tests/qte
Peter Krempa writes:
> After recent header file inclusion rework the build fails when the blkio
> module is enabled:
>
> ../block/blkio.c: In function ‘blkio_detach_aio_context’:
> ../block/blkio.c:321:24: error: implicit declaration of function
> ‘bdrv_get_aio_context’; did you mean ‘qemu_get_a
Philippe Mathieu-Daudé writes:
> On 20/1/23 19:48, Fabiano Rosas wrote:
>> The migration tests are currently broken for an aarch64 host because
>> the tests pass no 'machine' and 'cpu' options on the QEMU command
>> line. Most other architectures define a default value in QEMU for
>> these option
On Mon, Jan 23, 2023 at 01:05:45PM +0100, Philippe Mathieu-Daudé wrote:
> On 23/1/23 12:11, Daniel P. Berrangé wrote:
> > On Mon, Jan 23, 2023 at 10:20:29AM +0100, Philippe Mathieu-Daudé wrote:
> > > On 23/1/23 09:39, Thomas Huth wrote:
> > > > From: Daniel P. Berrangé
> > > >
> > > > Way back in
On 1/20/2023 19:22, Peter Maydell wrote:
On Fri, 20 Jan 2023 at 15:54, Evgeny Iakovlev
wrote:
Previous change slightly modified the way we handle data writes when
FIFO is disabled. Previously we kept incrementing read_pos and were
storing data at that position, although we only have a
single-
On Tue, Jan 17, 2023 at 11:53:08AM +0100, Eugenio Pérez wrote:
> VHOST_BACKEND_F_IOTLB_ASID is the feature bit, not the bitmask. Since
> the device under test also provided VHOST_BACKEND_F_IOTLB_MSG_V2 and
> VHOST_BACKEND_F_IOTLB_BATCH, this went unnoticed.
>
> Fixes: c1a1008685 ("vdpa: always sta
From: Richard Henderson
Signed-off-by: Richard Henderson
Reviewed-by: Fabiano Rosas
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20230112102436.1913-2-phi...@linaro.org
Message-Id: <20230112004322.161330-1-richard.hender...@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-
On 1/23/2023 09:14, Philippe Mathieu-Daudé wrote:
On 20/1/23 16:54, Evgeny Iakovlev wrote:
UART should be enabled in general and have RX enabled specifically to be
able to receive data from peripheral device. Same goes for transmitting
data to peripheral device and a TXE flag.
Check if UART C
;
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20230123
>
> for you to fetch changes up to 3b07a936d3bfe97b07ddffcfbb532985a88033dd:
>
> target/arm: Look u
On Mon, Jan 23, 2023 at 03:03:45PM +0100, Vlastimil Babka wrote:
> On 12/22/22 01:37, Huang, Kai wrote:
> >>> I argue that this page pinning (or page migration prevention) is not
> >>> tied to where the page comes from, instead related to how the page will
> >>> be used. Whether the page is restric
On 23/1/23 15:43, Evgeny Iakovlev wrote:
On 1/23/2023 09:14, Philippe Mathieu-Daudé wrote:
On 20/1/23 16:54, Evgeny Iakovlev wrote:
UART should be enabled in general and have RX enabled specifically to be
able to receive data from peripheral device. Same goes for transmitting
data to periphera
On 23/1/23 15:37, Fabiano Rosas wrote:
Philippe Mathieu-Daudé writes:
On 20/1/23 19:48, Fabiano Rosas wrote:
The migration tests are currently broken for an aarch64 host because
the tests pass no 'machine' and 'cpu' options on the QEMU command
line. Most other architectures define a default v
On Thu, Dec 22, 2022 at 06:15:24PM +, Sean Christopherson wrote:
> On Wed, Dec 21, 2022, Chao Peng wrote:
> > On Tue, Dec 20, 2022 at 08:33:05AM +, Huang, Kai wrote:
> > > On Tue, 2022-12-20 at 15:22 +0800, Chao Peng wrote:
> > > > On Mon, Dec 19, 2022 at 08:48:10AM +, Huang, Kai wrote:
Am 23. Januar 2023 07:57:08 UTC schrieb "Philippe Mathieu-Daudé"
:
>Hi Bernhard,
>
>On 22/1/23 18:07, Bernhard Beschow wrote:
>> A MemoryRegion has an addr attribute which gets set to the same values
>> as the redundant io_addr attributes.
>>
>> Signed-off-by: Bernhard Beschow
>> ---
>> inc
Am 23. Januar 2023 09:25:51 UTC schrieb "Philippe Mathieu-Daudé"
:
>On 20/1/23 13:22, Bernhard Beschow wrote:
>> Am 13. Januar 2023 17:39:45 UTC schrieb Bernhard Beschow :
>>> Am 13. Januar 2023 08:46:53 UTC schrieb "Philippe Mathieu-Daudé"
>>> :
On 9/1/23 18:23, Bernhard Beschow wrote:
>
On 23/01/2023 16:09, Stefan Hajnoczi wrote:
On Sun, 22 Jan 2023 at 11:18, Michael S. Tsirkin wrote:
On Sun, Jan 22, 2023 at 06:09:40PM +0200, Anton Kuchin wrote:
On 22/01/2023 16:46, Michael S. Tsirkin wrote:
On Sun, Jan 22, 2023 at 02:36:04PM +0200, Anton Kuchin wrote:
This flag should be
On 1/23/2023 16:21, Philippe Mathieu-Daudé wrote:
On 23/1/23 15:43, Evgeny Iakovlev wrote:
On 1/23/2023 09:14, Philippe Mathieu-Daudé wrote:
On 20/1/23 16:54, Evgeny Iakovlev wrote:
UART should be enabled in general and have RX enabled specifically
to be
able to receive data from peripheral
On Mon, Jan 23, 2023 at 03:16:03PM +0100, David Hildenbrand wrote:
> On 23.01.23 15:14, Daniil Tatianin wrote:
> > On 1/23/23 4:47 PM, Daniel P. Berrangé wrote:
> > > On Mon, Jan 23, 2023 at 04:30:03PM +0300, Daniil Tatianin wrote:
> > > > On 1/23/23 11:57 AM, David Hildenbrand wrote:
> > > > > On
On 1/23/2023 16:59, Evgeny Iakovlev wrote:
On 1/23/2023 16:21, Philippe Mathieu-Daudé wrote:
On 23/1/23 15:43, Evgeny Iakovlev wrote:
On 1/23/2023 09:14, Philippe Mathieu-Daudé wrote:
On 20/1/23 16:54, Evgeny Iakovlev wrote:
UART should be enabled in general and have RX enabled specificall
On Fri, Jan 20, 2023 at 05:57:29PM +0400, Marc-André Lureau wrote:
> Hi Thomas
>
> On Fri, Jan 20, 2023 at 12:31 PM Thomas Huth wrote:
> >
> > On 19/01/2023 09.56, Marc-André Lureau wrote:
> > > Hi
> > >
> > > On Thu, Jan 19, 2023 at 12:31 PM Thomas Huth wrote:
> > >>
> > >>
> > >>Hi all,
>
PL011 currently lacks a reset method. Implement it.
Signed-off-by: Evgeny Iakovlev
Reviewed-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
---
hw/char/pl011.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.
PL011 can be in either of 2 modes depending guest config: FIFO and
single register. The last mode could be viewed as a 1-element-deep FIFO.
Current code open-codes a bunch of depth-dependent logic. Refactor FIFO
depth handling code to isolate calculating current FIFO depth.
One functional (albeit
UART should be enabled in general and have RX enabled specifically to be
able to receive data from peripheral device. Same goes for transmitting
data to peripheral device and a TXE flag.
Check if UART CR register has EN and RXE or TXE bits enabled before
trying to receive or transmit data.
Signed
On Mon, 23 Jan 2023 at 15:21, Philippe Mathieu-Daudé wrote:
> pl011_can_receive() returns the number of bytes that pl011_receive() can
> accept, pl011_can_transmit() returns a boolean.
>
> I was thinking of:
>
> -- >8 --
> diff --git a/hw/char/pl011.c b/hw/char/pl011.c
> index dd20b76609..ea5769a3
v4:
* Fixed post_load hook to be backwards-migratable
* Refactored some code in 5/5 as per review comments
v3:
* Introduced a post_load hook for PL011State migration for
backwards-compatibility due to some input state fragility.
* No longer touching irq lines in reset method
* Minor changes base
Current FIFO handling code does not reset RXFE/RXFF flags when guest
resets FIFO by writing to UARTLCR register, although internal FIFO state
is reset to 0 read count. Actual guest-visible flag update will happen
only on next data read or write attempt. As a result of that any guest
that expects RX
Previous change slightly modified the way we handle data writes when
FIFO is disabled. Previously we kept incrementing read_pos and were
storing data at that position, although we only have a
single-register-deep FIFO now. Then we changed it to always store data
at pos 0.
If guest disables FIFO an
Hi Philippe,
so I guess it's rejected. Any suggestions?
TIA Klaus
On Tue, 2023-01-17 at 08:04 +0100, Philippe Mathieu-Daudé wrote:
> Hi Klaus,
>
> On 16/1/23 16:46, Ripke, Klaus wrote:
> > Signed-off-by: Klaus Ripke
> >
> > hw/usb/dev-smartcard-reader.c:
> > Set some static values from ccid_p
On 23/1/23 17:23, Peter Maydell wrote:
On Mon, 23 Jan 2023 at 15:21, Philippe Mathieu-Daudé wrote:
pl011_can_receive() returns the number of bytes that pl011_receive() can
accept, pl011_can_transmit() returns a boolean.
I was thinking of:
-- >8 --
diff --git a/hw/char/pl011.c b/hw/char/pl011.
On 23/1/23 17:09, Evgeny Iakovlev wrote:
On 1/23/2023 16:59, Evgeny Iakovlev wrote:
On 1/23/2023 16:21, Philippe Mathieu-Daudé wrote:
On 23/1/23 15:43, Evgeny Iakovlev wrote:
On 1/23/2023 09:14, Philippe Mathieu-Daudé wrote:
On 20/1/23 16:54, Evgeny Iakovlev wrote:
UART should be enabled i
Philippe Mathieu-Daudé writes:
> On 23/1/23 15:37, Fabiano Rosas wrote:
>> Philippe Mathieu-Daudé writes:
>>
>>> On 20/1/23 19:48, Fabiano Rosas wrote:
The migration tests are currently broken for an aarch64 host because
the tests pass no 'machine' and 'cpu' options on the QEMU comman
Hi,
cross builds fail with this code. Please see details below.
Am 29.11.22 um 18:38 schrieb Andrey Drobyshev via:
This commit allows QGA to write to Windows event log using Win32 API's
ReportEvent() [1], much like syslog() under *nix guests.
In order to generate log message definitions we use
From: Marcel Apfelbaum
Do not mention ioh3420 in the "how to" doc.
The device still works and can be used by already
existing setups, but no need to be mentioned.
Suggested-by: Andrew Jones
Reviewed-by: Laszlo Ersek
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Daniel P. Berrangé
---
This
On Mon, Jan 23, 2023 at 12:17:10PM +, Jonathan Cameron wrote:
> Until now, testing using CXL has relied up always using two root ports
> below a host bridge, to work around a current assumption in the Linux
> kernel support that, in the single root port case, the implementation will
> use th
On Fri, Jan 20, 2023 at 02:41:05PM -0800, Dan Williams wrote:
>
> Which mode are you referring?
>
> The next steps for the kernel enabling relevant to this thread are:
>
> * ram region discovery (platform firmware or kexec established)
> * ram region creation
> * pmem region discovery (from labe
* Michael S. Tsirkin (m...@redhat.com) wrote:
> On Sun, Jan 22, 2023 at 06:09:40PM +0200, Anton Kuchin wrote:
> >
> > On 22/01/2023 16:46, Michael S. Tsirkin wrote:
> > > On Sun, Jan 22, 2023 at 02:36:04PM +0200, Anton Kuchin wrote:
> > > > > > This flag should be set when qemu don't need to worry
* Peter Xu (pet...@redhat.com) wrote:
> We do proper page size alignment for file backed mmap()s for ramblocks.
> Even if it's as simple as that, cache the value because it'll be used in
> multiple places.
>
> Since at it, drop size for file_ram_alloc() and just use max_length because
> that's alw
On Sun, 22 Jan 2023 18:07:47 +
Mark Cave-Ayland wrote:
> Did you see my comments re: OpenBIOS for the earlier version of this patch?
Thanks for your replies! Sorry, I missed that reply... To make sure that I
wouldn't miss any reply I subscribed to the mailing list, but that made many
mails to
Are you running the Linux guest on multiple cores? If yes, could you
check if the issue persists also when using a single core?
Thanks,
--
Francesco
Hi Stefan,
On 1/23/23 19:28, Stefan Weil wrote:
> Hi,
>
> cross builds fail with this code. Please see details below.
>
> Am 29.11.22 um 18:38 schrieb Andrey Drobyshev via:
>> This commit allows QGA to write to Windows event log using Win32 API's
>> ReportEvent() [1], much like syslog() under *n
* Peter Xu (pet...@redhat.com) wrote:
> This allows us to have RAM_READONLY to be set in ram_flags to show that
> this ramblock can only be read not write.
>
> We used to pass in readonly boolean along the way for allocating the
> ramblock, now let it be together with the rest ramblock flags.
>
>
On Mon, Jan 23, 2023 at 05:52:17PM +0200, Anton Kuchin wrote:
>
> On 23/01/2023 16:09, Stefan Hajnoczi wrote:
> > On Sun, 22 Jan 2023 at 11:18, Michael S. Tsirkin wrote:
> > > On Sun, Jan 22, 2023 at 06:09:40PM +0200, Anton Kuchin wrote:
> > > > On 22/01/2023 16:46, Michael S. Tsirkin wrote:
> >
On 23/01/2023 14.32, Fabiano Rosas wrote:
Thomas Huth writes:
On 20/01/2023 20.44, Fabiano Rosas wrote:
These leaks can be avoided:
759 bytes in 61 blocks are still reachable in loss record 56 of 60
at 0x4034744: malloc (in
/usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
On Mon, Jan 23, 2023 at 06:27:23PM +, Dr. David Alan Gilbert wrote:
> * Michael S. Tsirkin (m...@redhat.com) wrote:
> > On Sun, Jan 22, 2023 at 06:09:40PM +0200, Anton Kuchin wrote:
> > >
> > > On 22/01/2023 16:46, Michael S. Tsirkin wrote:
> > > > On Sun, Jan 22, 2023 at 02:36:04PM +0200, Ant
On Mon, Jan 23, 2023 at 01:39:27PM +0100, Peter Krempa wrote:
> After recent header file inclusion rework the build fails when the blkio
> module is enabled:
>
> ../block/blkio.c: In function ‘blkio_detach_aio_context’:
> ../block/blkio.c:321:24: error: implicit declaration of function
> ‘bdrv_ge
The following changes since commit 00b1faea41d283e931256aa78aa975a369ec3ae6:
Merge tag 'pull-target-arm-20230123' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-01-23
13:40:28 +)
are available in the Git repository at:
https://gitlab.com/stefanha/qem
From: Chao Gao
When we measure FIO read performance (cache=writethrough, bs=4k,
iodepth=64) in VMs, ~80K/s notifications (e.g., EPT_MISCONFIG) are observed
from guest to qemu.
It turns out those frequent notificatons are caused by interference from
worker threads. Worker threads queue bottom hal
virtio_blk_dma_restart_cb() is tricky because the BH must deal with
virtio_blk_data_plane_start()/virtio_blk_data_plane_stop() being called.
There are two issues with the code:
1. virtio_blk_realize() should use qdev_add_vm_change_state_handler()
instead of qemu_add_vm_change_state_handler().
From: Peter Krempa
After recent header file inclusion rework the build fails when the blkio
module is enabled:
../block/blkio.c: In function ‘blkio_detach_aio_context’:
../block/blkio.c:321:24: error: implicit declaration of function
‘bdrv_get_aio_context’; did you mean ‘qemu_get_aio_context’?
* 7.55.0 deprecates CURLINFO_CONTENT_LENGTH_DOWNLOAD in favour of a *_T
version, which returns curl_off_t instead of a double.
* 7.85.0 deprecates CURLOPT_PROTOCOLS and CURLOPT_REDIR_PROTOCOLS in
favour of *_STR variants, specifying the desired protocols via a
string.
Signed-off-by: Anton Jo
On Sat, 21 Jan 2023, Chuck Zmudzinski wrote:
> Intel specifies that the Intel IGD must occupy slot 2 on the PCI bus,
> as noted in docs/igd-assign.txt in the Qemu source code.
>
> Currently, when the xl toolstack is used to configure a Xen HVM guest with
> Intel IGD passthrough to the guest with t
Reviewed-by: Konstantin Kostiuk
On Mon, Jan 23, 2023 at 3:31 PM Kfir Manor wrote:
> Signed-off-by: Kfir Manor
> ---
> qga/commands-posix.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/qga/commands-posix.c b/qga/commands-posix.c
> index ebd33a643c..aab9d3bd50 1
From: Siddhi Katage
An old running QEMU will try to load modules with new build-id first,this
will fail as expected ,then QEMU will fallback to load the old modules that
matches its build-id from /var/run/qemu/ directory .
Make /var/run/qemu/ directory as first search path to load modules.
Fixes
Hi Stefan!
On 1/23/23 20:38, Andrey Drobyshev wrote:
Hi Stefan,
On 1/23/23 19:28, Stefan Weil wrote:
Hi,
cross builds fail with this code. Please see details below.
Am 29.11.22 um 18:38 schrieb Andrey Drobyshev via:
This commit allows QGA to write to Windows event log using Win32 API's
Repo
Am 23.01.23 um 20:38 schrieb Andrey Drobyshev:
Hi Stefan,
On 1/23/23 19:28, Stefan Weil wrote:
Hi,
cross builds fail with this code. Please see details below.
Am 29.11.22 um 18:38 schrieb Andrey Drobyshev via:
This commit allows QGA to write to Windows event log using Win32 API's
ReportEven
On Mon, Jan 23, 2023 at 02:49:39PM -0500, Stefan Hajnoczi wrote:
> The point of the migration blocker is to prevent breaking running
> guests. Situations where a migration completes but results in a broken
> guest are problematic for users (especially when they are not logged in
> to guests and abl
Thomas Huth writes:
> On 23/01/2023 14.32, Fabiano Rosas wrote:
>> Thomas Huth writes:
>>
>>> On 20/01/2023 20.44, Fabiano Rosas wrote:
These leaks can be avoided:
759 bytes in 61 blocks are still reachable in loss record 56 of 60
at 0x4034744: malloc (in
/usr
On 22/01/2023 21:48, BALATON Zoltan wrote:
On Sun, 22 Jan 2023, Mark Cave-Ayland wrote:
On 11/01/2023 00:36, BALATON Zoltan wrote:
On Tue, 10 Jan 2023, Mark Cave-Ayland wrote:
On 04/01/2023 21:59, BALATON Zoltan wrote:
The mac99 machine emulates different machines depending on machine
proper
w.
[1]: https://mirrors.edge.kernel.org/pub/tools/crosstool/
[2]:
https://github.com/ClangBuiltLinux/boot-utils/tree/1b837f3b0fca441e0cc694c9b587120e81299554/images/mips
Cheers,
Nathan
# bad: [00b1faea41d283e931256aa78aa975a369ec3ae6] Merge tag
'pull-target-arm-20230123' of https://git.lin
On Mon, Jan 23, 2023 at 04:00:50PM -0500, Michael S. Tsirkin wrote:
> On Mon, Jan 23, 2023 at 02:49:39PM -0500, Stefan Hajnoczi wrote:
> > The point of the migration blocker is to prevent breaking running
> > guests. Situations where a migration completes but results in a broken
> > guest are probl
On 22/01/2023 22:07, BALATON Zoltan wrote:
On Sun, 22 Jan 2023, Mark Cave-Ayland wrote:
On 12/01/2023 23:51, BALATON Zoltan wrote:
On Thu, 12 Jan 2023, Howard Spoelstra wrote:
On Wed, Jan 11, 2023 at 1:15 AM BALATON Zoltan wrote:
On Tue, 10 Jan 2023, Mark Cave-Ayland wrote:
On 04/01/2023 2
On 22/01/2023 22:16, BALATON Zoltan wrote:
The problem you are ultimately trying to solve though is that OpenBIOS is loading
the NDRV for all VGA PCI devices, so why not just fix drivers/vga.fs so that the
NDRV is loaded only for the QEMU VGA device?
So this patch neither adds new dependency
On Mon, Jan 23, 2023 at 4:40 PM Wilfred Mallawa
wrote:
>
> From: Wilfred Mallawa
>
> Updates the opentitan IRQs to match the latest supported commit of
> Opentitan from TockOS.
>
> OPENTITAN_SUPPORTED_SHA := 565e4af39760a123c59a184aa2f5812a961fde47
>
> Memory layout as per [1]
>
> [1]
> https://
On Sat, Dec 24, 2022 at 4:09 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the XTheadCmo ISA extension.
> To avoid interfering with standard extensions, decoder and translation
> are in its own xthead* specific files.
> Future patches should be able to e
On Sat, Dec 24, 2022 at 4:04 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the XTheadSync ISA extension.
> The patch uses the T-Head specific decoder and translation.
>
> The implementation introduces a helper to execute synchronization tasks:
> helper_t
On Sat, Dec 24, 2022 at 4:10 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the XTheadBa ISA extension.
> The patch uses the T-Head specific decoder and translation.
>
> Changes in v2:
> - Add ISA_EXT_DATA_ENTRY()
> - Split XtheadB* extension into individ
On Sat, Dec 24, 2022 at 4:02 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the XTheadBb ISA extension.
> The patch uses the T-Head specific decoder and translation.
>
> Changes in v2:
> - Add ISA_EXT_DATA_ENTRY()
> - Split XtheadB* extension into individ
On Sat, Dec 24, 2022 at 4:01 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the XTheadBs ISA extension.
> The patch uses the T-Head specific decoder and translation.
>
> Changes in v2:
> - Add ISA_EXT_DATA_ENTRY()
> - Split XtheadB* extension into individ
On Sat, Dec 24, 2022 at 4:08 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the XTheadCondMov ISA extension.
> The patch uses the T-Head specific decoder and translation.
>
> Changes in v2:
> - Add ISA_EXT_DATA_ENTRY()
> - Fix invalid use of register from
On Sat, Dec 24, 2022 at 4:04 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the T-Head MAC instructions.
> The patch uses the T-Head specific decoder and translation.
>
> Changes in v2:
> - Add ISA_EXT_DATA_ENTRY()
> - Use single decoder for XThead extens
On Mon, 2023-01-23 at 15:03 +0100, Vlastimil Babka wrote:
> On 12/22/22 01:37, Huang, Kai wrote:
> > > > I argue that this page pinning (or page migration prevention) is not
> > > > tied to where the page comes from, instead related to how the page will
> > > > be used. Whether the page is restrict
On Sat, Dec 24, 2022 at 4:01 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the T-Head MemPair instructions.
> The patch uses the T-Head specific decoder and translation.
>
> Changes in v2:
> - Add ISA_EXT_DATA_ENTRY()
> - Use single decoder for XThead ex
On Sat, Dec 24, 2022 at 4:04 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the T-Head MemIdx instructions.
> The patch uses the T-Head specific decoder and translation.
>
> Changes in v2:
> - Add ISA_EXT_DATA_ENTRY()
> - Use single decoder for XThead ext
On Mon, Jan 23, 2023 at 11:06 PM Mark Cave-Ayland <
mark.cave-ayl...@ilande.co.uk> wrote:
> On 22/01/2023 22:07, BALATON Zoltan wrote:
>
> > On Sun, 22 Jan 2023, Mark Cave-Ayland wrote:
> >> On 12/01/2023 23:51, BALATON Zoltan wrote:
> >>> On Thu, 12 Jan 2023, Howard Spoelstra wrote:
> On Wed
On Mon, Jan 23, 2023 at 4:40 PM Wilfred Mallawa
wrote:
>
> From: Wilfred Mallawa
>
> Updates the opentitan IRQs to match the latest supported commit of
> Opentitan from TockOS.
>
> OPENTITAN_SUPPORTED_SHA := 565e4af39760a123c59a184aa2f5812a961fde47
>
> Memory layout as per [1]
>
> [1]
> https://
On Mon, Jan 23, 2023, Huang, Kai wrote:
> On Mon, 2023-01-23 at 15:03 +0100, Vlastimil Babka wrote:
> > On 12/22/22 01:37, Huang, Kai wrote:
> > > > > I argue that this page pinning (or page migration prevention) is not
> > > > > tied to where the page comes from, instead related to how the page
>
On Sat, Dec 24, 2022 at 4:09 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the T-Head FMemIdx instructions.
> The patch uses the T-Head specific decoder and translation.
>
> Changes in v2:
> - Add ISA_EXT_DATA_ENTRY()
> - Use single decoder for XThead ex
On Sat, Dec 24, 2022 at 4:07 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> There are no differences for floating point instructions in priv version 1.11
> and 1.12. There is also no dependency for Zfh to priv version 1.12.
> Therefore allow Zfh to be enabled for priv version 1.11.
On Sat, Dec 24, 2022 at 4:09 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> The XThead* extensions are maintained by T-Head and VRULL.
> Adding a point of contact from both companies.
>
> Signed-off-by: LIU Zhiwei
> Signed-off-by: Christoph Müllner
Reviewed-by: Alistair Francis
On Sat, Dec 24, 2022 at 4:07 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds the T-Head C906 to the list of known CPUs.
> Selecting this CPUs will automatically enable the available
> ISA extensions of the CPUs (incl. vendor extensions).
>
> Co-developed-by: LIU Zhiwe
On Sat, Dec 24, 2022 at 4:07 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the XTheadFmv ISA extension.
> The patch uses the T-Head specific decoder and translation.
>
> Signed-off-by: LIU Zhiwei
> Signed-off-by: Christoph Müllner
Reviewed-by: Alistai
On Sat, Dec 24, 2022 at 4:04 AM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds support for the T-Head specific extended memory
> attributes. Similar like Svpbmt, this support does not have much effect
> as most behaviour is not modelled in QEMU.
>
> We also don't set an
On Mon, 2023-01-23 at 17:14 -0500, Jesse Taube wrote:
> > From: Alistair Francis
> >
> > If the CSRs and CSR instructions are disabled because the Zicsr
> > extension isn't enabled then we want to make sure we don't run any
> CSR
> > instructions in the boot ROM.
> >
> > This patches remove
On Mon, Jan 23, 2023 at 1:58 PM Alistair Francis
wrote:
>
> From: Alistair Francis
>
> If the CSRs and CSR instructions are disabled because the Zicsr
> extension isn't enabled then we want to make sure we don't run any CSR
> instructions in the boot ROM.
>
> This patches removes the CSR instruct
This is based on mainline, without any extra ARMv9-A dependencies
which are still under development. This is good enough to pass
all of the tests within
https://github.com/Huawei/Huawei_CCA_QEMU
With the exception of the final patch, all of the code below is my own.
The Huawei code was based
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