Am 06.01.23 um 08:49 schrieb Thomas Huth:
On 05/01/2023 22.42, Philippe Mathieu-Daudé wrote:
> That said, maybe it is time to deprecate the 32-bit
> hosts?
Certainly fine for me, but that's up to the Windows folks to decide.
Maybe you could just suggest a patch to start the discussion?
Tho
On 06/01/2023 09.15, Stefan Weil wrote:
Am 06.01.23 um 08:49 schrieb Thomas Huth:
On 05/01/2023 22.42, Philippe Mathieu-Daudé wrote:
> That said, maybe it is time to deprecate the 32-bit
> hosts?
Certainly fine for me, but that's up to the Windows folks to decide. Maybe
you could just sugges
From: Christian Borntraeger
Without a kernel or boot disk a QEMU on s390 will exit (usually with a
disabled wait state). This breaks the stream-under-throttle test case.
Do not exit qemu if on s390.
Signed-off-by: Christian Borntraeger
Message-Id: <20221207131452.8455-1-borntrae...@linux.ibm.co
From: Philippe Mathieu-Daudé
Protected Virtualization is irrelevant in user emulation.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20221217152454.96388-4-phi...@linaro.org>
Reviewed-by: Thomas Huth
Reviewed-by: Richard Henderson
Signed-off-by: Thomas Huth
---
target/s390x/cpu_feature
From: Philippe Mathieu-Daudé
Instead of having hardware device poking into memory
internal API, expose memory_region_access_valid().
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20221217152454.96388-2-phi...@linaro.org>
Reviewed-by: Eric Farman
Reviewed-by: Thomas Huth
Reviewed-by: Rich
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20221217152454.96388-6-phi...@linaro.org>
Reviewed-by: Thomas Huth
Reviewed-by: Richard Henderson
Signed-off-by: Thomas Huth
---
target/s390x/tcg/excp_helper.c | 8
1 file changed, 4 insertions(+), 4 del
From: Nikita Ivanov
There is a defined RETRY_ON_EINTR() macro in qemu/osdep.h
which handles the same while loop.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/415
Signed-off-by: Nikita Ivanov
Message-Id: <20221023090422.242617-3-niva...@cloudlinux.com>
Reviewed-by: Marc-André Lureau
From: Philippe Mathieu-Daudé
In user emulation, threads -- implemented as CPU -- are
created/destroyed, but never reset. There is no point in
allowing the user emulation access the sysemu/reset API.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20221220145625.26392-5-phi...@linaro.org>
Rev
The HPET setting has been turned into a machine property a while ago
already, so we should finally do the next step and deprecate the
legacy CLI option, too.
Message-Id: <20221229114913.260400-1-th...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Ján Tomko
Signed-off-by: Thomas Hu
From: Nikita Ivanov
Rename macro name to more transparent one and refactor
it to expression.
Signed-off-by: Nikita Ivanov
Message-Id: <20221023090422.242617-2-niva...@cloudlinux.com>
Reviewed-by: Marc-André Lureau
Reviewed-by: Bin Meng
Reviewed-by: Christian Schoenebeck
Signed-off-by: Thomas
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Message-Id: <20230103110814.3726795-6-marcandre.lur...@redhat.com>
Reviewed-by: Thomas Huth
Signed-off-by: Thomas Huth
---
tests/qtest/readconfig-test.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/qte
The qtests are not stable in the msys2-32bit job yet - especially
the test-hmp and the qom-test are failing randomly. Until this is
fixed, let's better disable the qtests here again to avoid failing
CI tests.
Message-Id: <20230105204819.26992-1-th...@redhat.com>
Signed-off-by: Thomas Huth
---
.g
Hi Peter!
The following changes since commit cb9c6a8e5ad6a1f0ce164d352e3102df46986e22:
.gitlab-ci.d/windows: Work-around timeout and OpenGL problems of the MSYS2
jobs (2023-01-04 18:58:33 +)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git tags/pull-request-20
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20221217152454.96388-5-phi...@linaro.org>
Reviewed-by: Thomas Huth
Reviewed-by: Richard Henderson
Signed-off-by: Thomas Huth
---
target/s390x/tcg/misc_helper.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/t
The new CPU model mostly inherits features from Icelake-Server, while
adding new features:
- AMX (Advance Matrix eXtensions)
- Bus Lock Debug Exception
and new instructions:
- AVX VNNI (Vector Neural Network Instruction):
- VPDPBUS: Multiply and Add Unsigned and Signed Bytes
- VPDPBUSDS:
docs/system/target-mips.rst and configs/targets/mips* are not covered
in our MAINTAINERS file yet, so let's add them now.
Message-Id: <20221212171252.194864-1-th...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
Some features use multiple CPUID bits to form a value to be used, e.g.,
CPUID(0x1E,0):EBX[23:08] is regarded as the tmul_maxn value for AMX.
Introduce a new struct "MultiBitFeatureInfo" to hold the information for
those features and create a corresponding member in struct FeatureWordInfo,
so that t
Parameter "uint32_t bit" is not used in function feature_word_description(),
so remove it.
Signed-off-by: Lei Wang
---
target/i386/cpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index b6d1247e5e..883098bc5a 100644
--- a/target/
This series aims to add a new CPU model SapphireRapids, and tries to
address the problem stated in
https://lore.kernel.org/all/20220812055751.14553-1-lei4.w...@intel.com/T/#mcf67dbd1ad37c65d7988c36a2b267be9afd2fb30,
so that named CPU model can define its own AMX values, and QEMU won't
pass the wron
From: Philippe Mathieu-Daudé
On non-x86_64 host, if KVM is not available we get:
Traceback (most recent call last):
File "tests/vm/basevm.py", line 634, in main
vm = vmcls(args, config=config)
File "tests/vm/basevm.py", line 104, in __init__
mem = max(4, args.jobs)
TypeEr
CPUID leaf 0x1D and 0x1E enumerate tile and TMUL information for AMX.
Introduce FeatureWord FEAT_1D_1_EAX, FEAT_1D_1_EBX, FEAT_1D_1_ECX and
FEAT_1E_0_EBX. Thus these features of AMX can be expanded when
"-cpu host/max" and can be configured in named CPU model.
Signed-off-by: Lei Wang
---
target
From: Alessandro Di Federico
Note: `Makefile` relies on modification dates in the source tree to
detect changes to `meson_options.txt`. However, git does not track
those. Therefore, the following was necessary to regenerate
`meson-buildoptions.sh`:
touch meson_options.txt
cd "$BUILD_DIR"
On Fri, Jan 06, 2023 at 08:56:33AM +0100, Alexandre Ghiti wrote:
> On Fri, Dec 16, 2022 at 2:03 PM Alexandre Ghiti
> wrote:
...
> @Andrew: Please let me know when you have some cycles to review this,
I'll try to get to this yet today. Thanks for the ping.
drew
Some feature words, e.g., feature words in AMX-related CPUID leaf 0x1D and
0x1E are not bit-wise but multiple bits represents one value. Handle this
situation when the values specified are not the same as which are reported
by KVM. The handling includes:
- The responsibility of masking bits and g
The file seems to contain perfectly valid rst syntax already, so
rename it to .rst and wire it up in the index.
Message-Id: <20221213101806.46640-1-th...@redhat.com>
Signed-off-by: Thomas Huth
---
docs/interop/index.rst | 1 +
...tate-Pseudo-encoding.txt
The AMX-related CPUID value, i.e., CPUID(0x1D,1):EAX, CPUID(0x1D,1):EBX,
CPUID(0x1D,1):ECX and CPUID(0x1E,0):EBX are hard-coded to Sapphire Rapids
without considering future platforms.
Replace these hard-coded values with env->features[], so QEMU can pass the
right value to KVM.
Signed-off-by: Le
On 6/1/23 09:19, Thomas Huth wrote:
On 06/01/2023 09.15, Stefan Weil wrote:
Am 06.01.23 um 08:49 schrieb Thomas Huth:
On 05/01/2023 22.42, Philippe Mathieu-Daudé wrote:
> That said, maybe it is time to deprecate the 32-bit
> hosts?
Certainly fine for me, but that's up to the Windows folks to
On Fri, Jan 6, 2023 at 3:35 AM Thomas Huth wrote:
>
> On 05/01/2023 09.34, Thomas Huth wrote:
> > On 04/01/2023 23.01, Peter Maydell wrote:
> >> On Wed, 4 Jan 2023 at 12:36, Thomas Huth wrote:
> >>>
> >>> The windows jobs (especially the 32-bit job) recently started to
> >>> hit the timeout limit
On Thu, Jan 05, 2023 at 11:23:01AM +, Jarkko Sakkinen wrote:
> On Fri, Dec 02, 2022 at 02:13:41PM +0800, Chao Peng wrote:
> > In memory encryption usage, guest memory may be encrypted with special
> > key and can be accessed only by the guest itself. We call such memory
> > private memory. It's
On Fri, Jan 6, 2023 at 3:39 PM Philippe Mathieu-Daudé wrote:
>
> On 5/1/23 22:19, Evgeny Iakovlev wrote:
> > Windows open(2) implementations opens files in text mode by default and
> > needs a Windows-only O_BINARY flag to open files as binary. Qemu already
>
> s/Qemu/QEMU/
>
> > knows about that
On Tue, Jan 3, 2023 at 6:40 PM Thomas Huth wrote:
>
> On 16/12/2022 17.23, Philippe Mathieu-Daudé wrote:
> > On 16/12/22 15:55, Peter Maydell wrote:
> >> The msys2-32bit job currently seems to run into the 70 minute CI timeout
> >> quite frequently. This successful pass took 61 minutes:
> >> https
Windows open(2) implementation opens files in text mode by default and
needs a Windows-only O_BINARY flag to open files as binary. QEMU already
knows about that flag in osdep and it is defined to 0 on non-Windows,
so we can just add it to the host_flags for better compatibility.
Signed-off-by: Evg
On 1/6/2023 10:48, Bin Meng wrote:
On Fri, Jan 6, 2023 at 3:39 PM Philippe Mathieu-Daudé wrote:
On 5/1/23 22:19, Evgeny Iakovlev wrote:
Windows open(2) implementations opens files in text mode by default and
needs a Windows-only O_BINARY flag to open files as binary. Qemu already
s/Qemu/QEM
John Snow writes:
> On Mon, Dec 19, 2022 at 2:45 PM Alex Bennée wrote:
>>
>>
>> Thomas Huth writes:
>>
>> > Many users forget to remove the suggestions from the bug template
>> > when creating a new issue. So when searching for strings like "s390x"
>> > or "Windows", you get a lot of unrelate
On 1/6/2023 10:48, Bin Meng wrote:
On Fri, Jan 6, 2023 at 3:39 PM Philippe Mathieu-Daudé wrote:
On 5/1/23 22:19, Evgeny Iakovlev wrote:
Windows open(2) implementations opens files in text mode by default and
needs a Windows-only O_BINARY flag to open files as binary. Qemu already
s/Qemu/QEM
On Dec 12 12:44, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Guenter reports that hw/nvme is broken on riscv64[1] and big endian
> platforms[2].
>
> This is a regression since 7.1, so this does not warrent an rc5 for 7.2.
> I'm sure Guenter can carry this patch in his tree, and maybe we can get
Aaron Lindsay writes:
> Emilio,
>
> On Dec 18 00:24, Emilio Cota wrote:
>> On Tue, Nov 29, 2022 at 15:37:51 -0500, Aaron Lindsay wrote:
>> (snip)
>> > > Does this hint that there are cases where reset cpu->plugin_mem_cbs to
>> > > NULL is
>> > > getting optimized away, but not the code to set
On Tue, Jan 03, 2023 at 05:58:01PM -0500, Chuck Zmudzinski wrote:
> Hello Anthony and Paul,
Hi Chuck,
> I am requesting your feedback to Alex Williamson's suggestion that this
> problem with assigning the correct slot address to the igd on xen should
> be fixed in libxl instead of in qemu.
>
> I
Am 06.01.23 um 09:19 schrieb Thomas Huth:
On 06/01/2023 09.15, Stefan Weil wrote:
Download numbers from yesterday for my latest Windows installers:
qemu-w32-setup-20221230.exe - 243
qemu-w64-setup-20221230.exe - 6540
On Wednesday the ratio was 288 : 3516.
As expected the 64-bit variant is
mv64361_pcihost_map_irq() is a reimplementation of
pci_swizzle_map_irq_fn(). Resolve this redundancy.
Signed-off-by: Bernhard Beschow
---
Testing done:
* `qemu-system-ppc -machine pegasos2 \
-rtc base=localtime \
-device ati-vga,guest_hwcursor=true,romfile=""
On 6/1/23 12:39, Bernhard Beschow wrote:
mv64361_pcihost_map_irq() is a reimplementation of
pci_swizzle_map_irq_fn(). Resolve this redundancy.
Signed-off-by: Bernhard Beschow
---
Testing done:
* `qemu-system-ppc -machine pegasos2 \
-rtc base=localtime \
-
Am 4. Januar 2023 15:35:33 UTC schrieb "Philippe Mathieu-Daudé"
:
>+Markus/Thomas
>
>On 4/1/23 15:44, Bernhard Beschow wrote:
>> During the last patches, TYPE_PIIX3_XEN_DEVICE turned into a clone of
>> TYPE_PIIX3_DEVICE. Remove this redundancy.
>>
>> Signed-off-by: Bernhard Beschow
>> ---
>>
I'm seeing an intermittent hang on the s390 CI runner in the
bios-tables-test test. It looks like we've deadlocked because:
* the TPM device is waiting for data on its socket that never arrives,
and it's holding the iothread lock
* QEMU is therefore not making forward progress;
in particul
On Thu, 5 Jan 2023 at 16:44, Peter Maydell wrote:
>
> Some arm patches; my to-review queue is by no means empty, but
> this is a big enough set of patches to be getting on with...
>
> -- PMM
>
> The following changes since commit cb9c6a8e5ad6a1f0ce164d352e3102df46986e22:
>
> .gitlab-ci.d/windows
On 6/1/23 12:57, Bernhard Beschow wrote:
Am 4. Januar 2023 15:35:33 UTC schrieb "Philippe Mathieu-Daudé"
:
+Markus/Thomas
On 4/1/23 15:44, Bernhard Beschow wrote:
During the last patches, TYPE_PIIX3_XEN_DEVICE turned into a clone of
TYPE_PIIX3_DEVICE. Remove this redundancy.
Signed-off-by:
On Sun, Jan 01, 2023 at 06:52:03PM -0500, Chuck Zmudzinski wrote:
> Intel specifies that the Intel IGD must occupy slot 2 on the PCI bus,
> as noted in docs/igd-assign.txt in the Qemu source code.
>
> Currently, when the xl toolstack is used to configure a Xen HVM guest with
> Intel IGD passthroug
Hi Mostafan jean,
On 1/4/23 13:29, Jean-Philippe Brucker wrote:
> Hi Mostafa,
>
> On Mon, Dec 19, 2022 at 12:57:20PM +, Mostafa Saleh wrote:
>> GBPA register can be used to globally abort all
>> transactions.
>>
>> Only UPDATE and ABORT bits are considered in this patch.
> That's fair, althoug
We were using quite and old runner on our machines and running into
issues with stalling jobs. Gitlab in the meantime now reliably provide
the latest packaged versions of the runner under a stable URL. This
update:
- creates a per-arch subdir for builds
- switches from binary tarballs to deb p
On Thu, 5 Jan 2023 at 17:38, Taylor Simpson wrote:
>
> The following changes since commit cb9c6a8e5ad6a1f0ce164d352e3102df46986e22:
>
> .gitlab-ci.d/windows: Work-around timeout and OpenGL problems of the MSYS2
> jobs (2023-01-04 18:58:33 +)
>
> are available in the Git repository at:
>
>
On Fri, 30 Dec 2022 at 14:57, Felipe Balbi wrote:
>
> Hi,
>
> The following patches pass checkpatch.pl and have been tested against
> 55745005e90a.
>
> Felipe Balbi (2):
> hw/arm/stm32f405: correctly describe the memory layout
> hw/arm: Add Olimex H405
Applied to target-arm.next, thanks.
-
Alex Bennée writes:
> We were using quite and old runner on our machines and running into
> issues with stalling jobs. Gitlab in the meantime now reliably provide
> the latest packaged versions of the runner under a stable URL. This
> update:
>
> - creates a per-arch subdir for builds
> - s
Evgeny Iakovlev writes:
> Windows open(2) implementation opens files in text mode by default and
> needs a Windows-only O_BINARY flag to open files as binary. QEMU already
> knows about that flag in osdep and it is defined to 0 on non-Windows,
> so we can just add it to the host_flags for bette
Keith Packard writes:
> 'lock_user' allocates a host buffer to shadow a target buffer,
> 'unlock_user' copies that host buffer back to the target and frees the
> host memory. If the completion function uses the target buffer, it
> must be called after unlock_user to ensure the data are present.
On 1/6/23 07:10, Peter Maydell wrote:
I'm seeing an intermittent hang on the s390 CI runner in the
Is this a new hang or has this been occurring for a while? I am asking because
the test case is not new.
Stefan
On 1/6/23 5:52 AM, Anthony PERARD wrote:
> On Tue, Jan 03, 2023 at 05:58:01PM -0500, Chuck Zmudzinski wrote:
>> Hello Anthony and Paul,
>
> Hi Chuck,
>
>> I am requesting your feedback to Alex Williamson's suggestion that this
>> problem with assigning the correct slot address to the igd on xen s
On Sun, Jan 01, 2023 at 06:52:03PM -0500, Chuck Zmudzinski wrote:
> Intel specifies that the Intel IGD must occupy slot 2 on the PCI bus,
> as noted in docs/igd-assign.txt in the Qemu source code.
>
> Currently, when the xl toolstack is used to configure a Xen HVM guest with
> Intel IGD passthroug
On Fri, 6 Jan 2023 at 13:53, Stefan Berger wrote:
>
>
>
> On 1/6/23 07:10, Peter Maydell wrote:
> > I'm seeing an intermittent hang on the s390 CI runner in the
> Is this a new hang or has this been occurring for a while? I am asking
> because the test case is not new.
It's intermittent, so no i
On 1/6/23 9:03 AM, Anthony PERARD wrote:
> On Sun, Jan 01, 2023 at 06:52:03PM -0500, Chuck Zmudzinski wrote:
>> Intel specifies that the Intel IGD must occupy slot 2 on the PCI bus,
>> as noted in docs/igd-assign.txt in the Qemu source code.
>>
>> Currently, when the xl toolstack is used to config
On Fri, 6 Jan 2023 at 10:21, Evgeny Iakovlev
wrote:
>
> Windows open(2) implementation opens files in text mode by default and
> needs a Windows-only O_BINARY flag to open files as binary. QEMU already
> knows about that flag in osdep and it is defined to 0 on non-Windows,
> so we can just add it
Hi,
it seems this patch breaks vhost-user with DPDK.
See https://bugzilla.redhat.com/show_bug.cgi?id=2155173
it seems QEMU doesn't receive the expected commands sequence:
Received unexpected msg type. Expected 22 received 40
Fail to update device iotlb
Received unexpected msg type. Expected 40
From: Anthony PERARD
With "clang 6.0.0-1ubuntu2" on Ubuntu Bionic, the test with build
fine, but clang still suggest braces around the zero initializer in a
few places, where there is a subobject. Expand test to include a sub
struct which doesn't build on clang 6.0.0-1ubuntu2, and give:
confi
On 1/6/23 9:10 AM, Chuck Zmudzinski wrote:
> On 1/6/23 9:03 AM, Anthony PERARD wrote:
>> On Sun, Jan 01, 2023 at 06:52:03PM -0500, Chuck Zmudzinski wrote:
>>> Intel specifies that the Intel IGD must occupy slot 2 on the PCI bus,
>>> as noted in docs/igd-assign.txt in the Qemu source code.
>>>
>>>
Hi QEMU,
I am trying to use the -O function to convert a file format to vmdk, but
get the below response. Please could you help?
Bens-iMac:~ ben$ qemu-img -O output_fmt vmdk
/Users/ben/Documents/Windows11_InsiderPreview_Client_ARM64_en-us_22598.VHDX
~/Desktop/Install/Windows11ARM.vmdk
qemu-img:
On Fri, Jan 06, 2023 at 09:10:55AM -0500, Chuck Zmudzinski wrote:
> Well, our messages almost collided! I just proposed a v7 that adds
> a check to prevent the extra processing for cases when machine is
> not xenfv and the slot does not need to be cleared because it was
> never reserved. The propos
On 1/6/23 9:31 AM, Chuck Zmudzinski wrote:
> On 1/6/23 9:10 AM, Chuck Zmudzinski wrote:
>> On 1/6/23 9:03 AM, Anthony PERARD wrote:
>>> On Sun, Jan 01, 2023 at 06:52:03PM -0500, Chuck Zmudzinski wrote:
Intel specifies that the Intel IGD must occupy slot 2 on the PCI bus,
as noted in docs/
On 1/6/23 07:10, Peter Maydell wrote:
I'm seeing an intermittent hang on the s390 CI runner in the
bios-tables-test test. It looks like we've deadlocked because:
* the TPM device is waiting for data on its socket that never arrives,
and it's holding the iothread lock
* QEMU is therefo
We were using quite and old runner on our machines and running into
issues with stalling jobs. Gitlab in the meantime now reliably provide
the latest packaged versions of the runner under a stable URL. This
update:
- creates a per-arch subdir for builds
- switches from binary tarballs to deb p
On Thu, 5 Jan 2023 at 21:53, Michael S. Tsirkin wrote:
>
> On Thu, Jan 05, 2023 at 09:04:37PM +, Peter Maydell wrote:
> > On Thu, 5 Jan 2023 at 16:32, Michael S. Tsirkin wrote:
> > >
> > > On Thu, Jan 05, 2023 at 04:56:39AM -0500, Michael S. Tsirkin wrote:
> > > > On Thu, Jan 05, 2023 at 04:1
On Fri, 6 Jan 2023, Bernhard Beschow wrote:
mv64361_pcihost_map_irq() is a reimplementation of
pci_swizzle_map_irq_fn(). Resolve this redundancy.
Signed-off-by: Bernhard Beschow
Reviewed-by: BALATON Zoltan
---
Testing done:
* `qemu-system-ppc -machine pegasos2 \
-rtc base
On Fri, 6 Jan 2023 at 15:16, Stefan Berger wrote:
>
>
>
> On 1/6/23 07:10, Peter Maydell wrote:
> > I'm seeing an intermittent hang on the s390 CI runner in the
> > bios-tables-test test. It looks like we've deadlocked because:
> >
> > * the TPM device is waiting for data on its socket that neve
Peter Maydell writes:
> On Fri, 6 Jan 2023 at 10:21, Evgeny Iakovlev
> wrote:
>>
>> Windows open(2) implementation opens files in text mode by default and
>> needs a Windows-only O_BINARY flag to open files as binary. QEMU already
>> knows about that flag in osdep and it is defined to 0 on non
On Mon, 2 Jan 2023 at 17:52, Cédric Le Goater wrote:
>
> Cortex A7 CPUs with an FPU implementing VFPv4 without NEON support
> have 16 64-bit FPU registers and not 32 registers. Let users set the
> number of VFP registers with a CPU property.
>
> The primary use case of this property is for the Cor
On 1/6/23 10:39, Peter Maydell wrote:
On Fri, 6 Jan 2023 at 15:16, Stefan Berger wrote:
On 1/6/23 07:10, Peter Maydell wrote:
I'm seeing an intermittent hang on the s390 CI runner in the
bios-tables-test test. It looks like we've deadlocked because:
Thread 3 (Thread 0x3ff8dafe900 (
On Mon, 26 Dec 2022 at 22:03, Strahinja Jankovic
wrote:
>
> This patch series adds missing Allwinner A10 modules needed for
> successful SPL boot:
> - Clock controller module
> - DRAM controller
> - I2C0 controller (added also for Allwinner H3 since it is the same)
> - AXP-209 connected to I2C0 bu
On Wed, 4 Jan 2023 at 19:01, Richard Henderson
wrote:
>
> Don't dereference CPUTLBEntryFull until we verify that
> the page is valid. Move the other user-only info field
> updates after the valid check to match.
>
> Cc: qemu-sta...@nongnu.org
> Resolves: https://gitlab.com/qemu-project/qemu/-/iss
On Fri, 6 Jan 2023 at 15:44, Alex Bennée wrote:
> Peter Maydell writes:
> > The semihosting API, at least for Arm, has a modeflags string so the
> > guest can say whether it wants to open O_BINARY or not:
> > https://github.com/ARM-software/abi-aa/blob/main/semihosting/semihosting.rst#sys-open-0x
On Mon, Dec 12, 2022 at 11:22:50AM +0100, Alexandre Ghiti wrote:
> RISC-V specifies multiple sizes for addressable memory and Linux probes for
> the machine's support at startup via the satp CSR register (done in
> csr.c:validate_vm).
>
> As per the specification, sv64 must support sv57, which in
On Mon, 19 Dec 2022 at 22:08, Alexander Graf wrote:
>
> We currently only support GICv2 emulation. To also support GICv3, we will
> need to pass a few system registers into their respective handler functions.
>
> This patch adds support for HVF to call into the TCG callbacks for GICv3
> system reg
Am 04.01.23 um 13:35 schrieb Thomas Huth:
The windows jobs (especially the 32-bit job) recently started to
hit the timeout limit. Bump it a little bit to ease the situation
(80 minutes is quite long already - OTOH, these jobs do not have to
wait for a job from the container stage to finish, so th
Current FIFO handling code does not reset RXFE/RXFF flags when guest
resets FIFO by writing to UARTLCR register, although internal FIFO state
is reset to 0 read count. Actual flag update will happen only on next
read or write to UART. As a result of that any guest that expects RXFE
flag to be set (
Evgeny Iakovlev (2):
hw/char/pl011: better handling of FIFO flags on LCR reset
hw/char/pl011: check if UART is enabled before RX or TX operation
hw/char/pl011.c | 51 ++---
include/hw/char/pl011.h | 5 +++-
2 files changed, 41 insertions(+), 15 del
UART should be enabled in general and have RX enabled specifically to be
able to receive data from peripheral device. Same goes for transmitting
data to peripheral device and a TXE flag.
Check if UART CR register has EN and RXE or TXE bits enabled before
trying to receive or transmit data.
Signed
On Wed, 2023-01-04 at 15:44 +0100, Bernhard Beschow wrote:
> + if (xen_enabled()) {
Could this perhaps be if (xen_mode != XEN_DISABLED) once we merge the
Xen-on-KVM series?
smime.p7s
Description: S/MIME cryptographic signature
On 1/6/23 12:35 PM, David Woodhouse wrote:
> On Wed, 2023-01-04 at 15:44 +0100, Bernhard Beschow wrote:
>> + if (xen_enabled()) {
>
> Could this perhaps be if (xen_mode != XEN_DISABLED) once we merge the
> Xen-on-KVM series?
I am not an expert and just on here as a user/tester, but I think
On Wed, 4 Jan 2023 at 22:04, Philippe Mathieu-Daudé wrote:
>
> Paving the road toward heterogeneous QEMU, the limitations of
> having a single machine sysbus become more apparent.
>
> The sysbus_mmio_map() API forces the caller to map a sysbus
> device to an address on the system bus (system bus h
Ilya Leoshkevich writes:
> Add ability to dump /tmp/perf-.map and jit-.dump.
> The first one allows the perf tool to map samples to each individual
> translation block. The second one adds the ability to resolve symbol
> names, line numbers and inspect JITed code.
>
> Example of use:
>
> pe
On Thu, 29 Dec 2022 13:03:34 +0200
Avihai Horon wrote:
> From: Juan Quintela
IMHO, there should always be a commit log description. Why is this a
simplification? What does it allow us to do? Nothing later obviously
depends on this, why is it part of this series? Thanks,
Alex
> Signed-off-
Since I applied this twice already to my local trees, let me ping for Ted
to make sure it's not lost..
On Mon, Dec 05, 2022 at 08:07:12PM +0800, Ted Chen wrote:
> It's convenient to dump HVA and RW/RO status of a ramblock in "info ramblock"
> for debug purpose.
>
> Before:
> Offset
On Tue, 3 Jan 2023 11:13:21 +
"Dr. David Alan Gilbert" wrote:
> * Avihai Horon (avih...@nvidia.com) wrote:
> > As part of its error flow, vfio_vmstate_change() accesses
> > MigrationState->to_dst_file without any checks. This can cause a NULL
> > pointer dereference if the error flow is taken
On 1/6/2023 17:28, Peter Maydell wrote:
On Fri, 6 Jan 2023 at 15:44, Alex Bennée wrote:
Peter Maydell writes:
The semihosting API, at least for Arm, has a modeflags string so the
guest can say whether it wants to open O_BINARY or not:
https://github.com/ARM-software/abi-aa/blob/main/semihos
On 1/6/23 12:46 PM, Chuck Zmudzinski wrote:
> On 1/6/23 12:35 PM, David Woodhouse wrote:
>> On Wed, 2023-01-04 at 15:44 +0100, Bernhard Beschow wrote:
>>> + if (xen_enabled()) {
>>
>> Could this perhaps be if (xen_mode != XEN_DISABLED) once we merge the
>> Xen-on-KVM series?
>
> I am not a
On 1/5/23 05:07, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
Convert the TYPE_PCI_BONITO class to use 3-phase reset.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/bonito.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
Reviewed-by: Richard Henderson
On 1/5/23 05:07, Philippe Mathieu-Daudé wrote:
To make it easier to differentiate between the Host Bridge
object and its PCI function #0, rename bonito_pcihost* as
bonito_host*.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/bonito.c | 12 ++--
1 file changed, 6 insertions(+),
On Thu, Jan 5, 2023 at 8:50 PM Dongdong Zhang
wrote:
>
> Hi John,
>
> Could you help me relay these fixes?
> If I submit a pull request, I will go through company's internal review
> process again.
No problem at all. My apologies for the delay.
Staged for QEMU, with additional fix spotted by Ma
On 1/5/23 05:07, Philippe Mathieu-Daudé wrote:
To make it easier to differentiate between the Host Bridge
object and its PCI function #0, rename bonito* as bonito_pci*.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/bonito.c | 16
1 file changed, 8 insertions(+), 8 del
On 1/5/23 05:07, Philippe Mathieu-Daudé wrote:
A QOM object shouldn't poke at another object internals.
Here the PCI host bridge instantiates its PCI function #0
and sets a reference to itself (so the function can access
the bridge fields).
Pass this reference with object_property_add_const_lin
On 1/5/23 05:07, Philippe Mathieu-Daudé wrote:
The PCI function #0 is an integral part of the PCI bridge,
instantiate it internally during the bridge creation.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/bonito.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
di
On Fri, 6 Jan 2023 at 18:22, Evgeny Iakovlev
wrote:
>
>
> On 1/6/2023 17:28, Peter Maydell wrote:
> > On Fri, 6 Jan 2023 at 15:44, Alex Bennée wrote:
> >> Peter Maydell writes:
> > I think the theory when the semihosting API was originally designed
> > decades ago was basically "when the guest d
On 1/6/23 7:25 AM, Philippe Mathieu-Daudé wrote:
> On 6/1/23 12:57, Bernhard Beschow wrote:
>>
>>
>> Am 4. Januar 2023 15:35:33 UTC schrieb "Philippe Mathieu-Daudé"
>> :
>>> +Markus/Thomas
>>>
>>> On 4/1/23 15:44, Bernhard Beschow wrote:
During the last patches, TYPE_PIIX3_XEN_DEVICE turned
On Tue, 3 Jan 2023 at 18:27, Richard Henderson
wrote:
> The specific problem I'm trying to solve is the location and
> representation of the coprocessor register hash table for ARM cpus,
> but in the process affects how cpu initialization might be done for
> all targets.
>
> At present, each cpu (
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