On 1/3/2023 8:38 AM, Bernhard Beschow wrote:
>
>
> On Tue, Jan 3, 2023 at 2:17 PM Philippe Mathieu-Daudé
> wrote:
>
> Hi Chuck,
>
> On 3/1/23 04:15, Chuck Zmudzinski wrote:
> > On 1/2/23 4:34 PM, Bernhard Beschow wrote:
> >> This series first renders TYPE_PIIX3_XEN_DEVICE redundan
On 03/01/2023 18.47, Alex Bennée wrote:
Peter Maydell writes:
On Fri, 23 Dec 2022 at 17:21, Alex Bennée wrote:
The following changes since commit 222059a0fccf4af3be776fe35a5ea2d6a68f9a0b:
Merge tag 'pull-ppc-20221221' of https://gitlab.com/danielhb/qemu
into staging (2022-12-21 18:08:0
> -Original Message-
> From: Taylor Simpson
> Sent: Mittwoch, 21. Dezember 2022 21:06
> To: Marco Liebel ; Marco Liebel (QUIC)
> ; qemu-devel@nongnu.org
> Cc: Brian Cain
> Subject: RE: [PATCH v2] Hexagon (target/hexagon) implement mutability
> mask for GPRs
>
>
>
> > -Original Mess
On 1/3/23 18:33, Peter Maydell wrote:
On Thu, 22 Dec 2022 at 21:56, Philippe Mathieu-Daudé wrote:
ARM CPUs fetch instructions in little-endian.
smpboot[] encoded instructions are written in little-endian.
This is fine on little-endian host, but on big-endian ones
the smpboot[] array ends swap
On 03/01/2023 08:47, Thomas Huth wrote:
We want to get rid of the "#ifdef TARGET_I386" statements in the mc146818
code, so we need a different way to decide whether the slew tick policy
is available or not. Introduce a new property "slew-tick-policy-available"
which can be set by the machines th
The modern ACPI CPU hotplug interface was introduced in the following
series (aa1dd39ca307..679dd1a957df), released in v2.7.0:
1 abd49bc2ed2f docs: update ACPI CPU hotplug spec with new protocol
2 16bcab97eb9f pc: piix4/ich9: add 'cpu-hotplug-legacy' property
3 5e1b5d93887b acpi: cpuhp: a
On 21/12/2022 23.39, Alistair Francis wrote:
From: Alistair Francis
The following changes since commit 222059a0fccf4af3be776fe35a5ea2d6a68f9a0b:
Merge tag 'pull-ppc-20221221' of https://gitlab.com/danielhb/qemu into
staging (2022-12-21 18:08:09 +)
are available in the Git repository a
On Wed, 4 Jan 2023 at 10:01, Laszlo Ersek wrote:
>
> The modern ACPI CPU hotplug interface was introduced in the following
> series (aa1dd39ca307..679dd1a957df), released in v2.7.0:
>
> 1 abd49bc2ed2f docs: update ACPI CPU hotplug spec with new protocol
> 2 16bcab97eb9f pc: piix4/ich9: add '
On 4/1/23 10:01, Laszlo Ersek wrote:
The modern ACPI CPU hotplug interface was introduced in the following
series (aa1dd39ca307..679dd1a957df), released in v2.7.0:
1 abd49bc2ed2f docs: update ACPI CPU hotplug spec with new protocol
2 16bcab97eb9f pc: piix4/ich9: add 'cpu-hotplug-legacy'
Hi Alistair,
On 21/12/22 23:39, Alistair Francis wrote:
From: Wilfred Mallawa
use the `FIELD32_1CLEAR` macro to implement register
`rw1c` functionality to `ibex_spi`.
This change was tested by running the `SPI_HOST` from TockOS.
Signed-off-by: Wilfred Mallawa
Reviewed-by: Alistair Francis
On 02/11/2022 21.30, Nikita Ivanov wrote:
Hi!
Is there any update on this? I haven't received any comments.
Sorry, seems like this fell through the cracks since it was not quite clear
which maintainer should pick it up. I'll take the patches for my next pull
request.
Thomas
On Sun, Oct 2
On 12/12/2022 11.13, Christian Borntraeger wrote:
Am 07.12.22 um 14:14 schrieb Christian Borntraeger:
Without a kernel or boot disk a QEMU on s390 will exit (usually with a
disabled wait state). This breaks the stream-under-throttle test case.
Do not exit qemu if on s390.
Signed-off-by: Chris
(Adding Gerd.)
On 1/4/23 08:23, Philippe Mathieu-Daudé wrote:
> Hi Laszlo,
>
> Happy new year!
Happy new year! :) Sorry for not responding earlier, I was busy writing
& testing the patch.
[...]
>> However, what I *really* don't understand is why this commit
>> (5d971f9e672507210e77d020d89e0e891
On 1/4/23 10:33, Ard Biesheuvel wrote:
> On Wed, 4 Jan 2023 at 10:01, Laszlo Ersek wrote:
>>
>> The modern ACPI CPU hotplug interface was introduced in the following
>> series (aa1dd39ca307..679dd1a957df), released in v2.7.0:
>>
>> 1 abd49bc2ed2f docs: update ACPI CPU hotplug spec with new prot
On 1/4/23 10:34, Philippe Mathieu-Daudé wrote:
> On 4/1/23 10:01, Laszlo Ersek wrote:
>> The modern ACPI CPU hotplug interface was introduced in the following
>> series (aa1dd39ca307..679dd1a957df), released in v2.7.0:
>>
>> 1 abd49bc2ed2f docs: update ACPI CPU hotplug spec with new protocol
>>
On Wed, 4 Jan 2023 10:01:38 +0100
Laszlo Ersek wrote:
> The modern ACPI CPU hotplug interface was introduced in the following
> series (aa1dd39ca307..679dd1a957df), released in v2.7.0:
>
> 1 abd49bc2ed2f docs: update ACPI CPU hotplug spec with new protocol
> 2 16bcab97eb9f pc: piix4/ich9:
On Wed, 4 Jan 2023 10:34:09 +0100
Philippe Mathieu-Daudé wrote:
> On 4/1/23 10:01, Laszlo Ersek wrote:
[...]
> > diff --git a/hw/acpi/cpu_hotplug.c b/hw/acpi/cpu_hotplug.c
> > index 53654f863830..ff14c3f4106f 100644
> > --- a/hw/acpi/cpu_hotplug.c
> > +++ b/hw/acpi/cpu_hotplug.c
> > @@ -52,6 +52,
Hi Everyone,
I was just checking if it was not missed in holidays and was received. :)
Thanks
Manish Mishra
On 21/12/22 12:14 am, manish.mishra wrote:
Current logic assumes that channel connections on the destination side are
always established in the same order as the source and the first on
* David Woodhouse (dw...@infradead.org) wrote:
> From: David Woodhouse
>
> The provides the QEMU side of interdomain event channels, allowing events
> to be sent to/from the guest.
>
> The API mirrors libxenevtchn, and in time both this and the real Xen one
> will be available through ops struct
In downstream RHEL builds, we do not have "blkverify" enabled, so
iotest 262 is currently failing there. Thus let's list "blkverify"
as required item so that the test properly gets skipped instead if
"blkverify" is missing.
Signed-off-by: Thomas Huth
---
tests/qemu-iotests/262 | 3 ++-
1 file ch
"quorum" is required by iotest 312 - if it is not compiled into the
QEMU binary, the test fails. Thus list "quorum" as required driver
so that the test gets skipped in case it is not available.
Signed-off-by: Thomas Huth
---
tests/qemu-iotests/312 | 1 +
1 file changed, 1 insertion(+)
diff --gi
Hello,
Here is a little series improving error reporting of protected VMs.
Thanks,
C.
Cédric Le Goater (5):
confidential guest support: Introduce a 'check' class handler
s390x/pv: Implement CGS check handler
s390x/pv: Check for support on the host
s390x/pv: Introduce a s390_pv_check() h
From: Cédric Le Goater
If a secure kernel is started in a non-protected VM, the OS will hang
during boot without giving a proper error message to the user.
Perform the checks on Confidential Guest support at runtime with an
helper called from the service call switching the guest to protected
mod
From: Cédric Le Goater
Support for protected VMs should have been enabled on the host with
the kernel parameter 'prot_virt=1'. If the hardware supports the
feature, it is reflected under sysfs.
Signed-off-by: Cédric Le Goater
---
hw/s390x/pv.c | 23 ++-
1 file changed, 22 i
From: Cédric Le Goater
Signed-off-by: Cédric Le Goater
---
hw/s390x/pv.c | 14 +-
target/s390x/diag.c | 7 ---
2 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/hw/s390x/pv.c b/hw/s390x/pv.c
index 96c0728ec9..4e1f991d98 100644
--- a/hw/s390x/pv.c
+++ b/hw/s3
From: Cédric Le Goater
Some machines have specific requirements to activate confidential
guest support. Add a class handler to the confidential guest support
interface to let the arch implementation perform extra checks.
Cc: Eduardo Habkost
Cc: Marcel Apfelbaum
Cc: "Philippe Mathieu-Daudé"
Cc
From: Cédric Le Goater
When a protected VM is started with the maximum number of CPUs (248),
the service call providing information on the CPUs requires more
buffer space than allocated and QEMU disgracefully aborts :
LOADPARM=[]
Using virtio-blk.
Using SCSI scheme.
* David Woodhouse (dw...@infradead.org) wrote:
> From: David Woodhouse
>
> The provides the QEMU side of interdomain event channels, allowing events
> to be sent to/from the guest.
>
> The API mirrors libxenevtchn, and in time both this and the real Xen one
> will be available through ops struct
* David Woodhouse (dw...@infradead.org) wrote:
> From: David Woodhouse
>
> The hookup to event channel is a bit of a special case hack right now; as
> we make this work for real PV driver back ends, that will be implemented
> for the general case of Dom0 ports binding to DomU.
>
> Signed-off-by:
On 1/4/23 11:35, Igor Mammedov wrote:
> On Wed, 4 Jan 2023 10:01:38 +0100
> Laszlo Ersek wrote:
>
>> The modern ACPI CPU hotplug interface was introduced in the following
>> series (aa1dd39ca307..679dd1a957df), released in v2.7.0:
>>
>> 1 abd49bc2ed2f docs: update ACPI CPU hotplug spec with n
Am 4. Januar 2023 08:18:59 UTC schrieb Chuck Zmudzinski :
>On 1/3/2023 8:38 AM, Bernhard Beschow wrote:
>>
>>
>> On Tue, Jan 3, 2023 at 2:17 PM Philippe Mathieu-Daudé
>> wrote:
>>
>> Hi Chuck,
>>
>> On 3/1/23 04:15, Chuck Zmudzinski wrote:
>> > On 1/2/23 4:34 PM, Bernhard Beschow w
On 4/1/23 12:46, Thomas Huth wrote:
"quorum" is required by iotest 312 - if it is not compiled into the
QEMU binary, the test fails. Thus list "quorum" as required driver
so that the test gets skipped in case it is not available.
Signed-off-by: Thomas Huth
---
tests/qemu-iotests/312 | 1 +
1
On 4/1/23 12:28, Thomas Huth wrote:
In downstream RHEL builds, we do not have "blkverify" enabled, so
iotest 262 is currently failing there. Thus let's list "blkverify"
as required item so that the test properly gets skipped instead if
"blkverify" is missing.
Signed-off-by: Thomas Huth
---
te
On 4/1/23 11:38, Igor Mammedov wrote:
On Wed, 4 Jan 2023 10:34:09 +0100
Philippe Mathieu-Daudé wrote:
On 4/1/23 10:01, Laszlo Ersek wrote:
[...]
diff --git a/hw/acpi/cpu_hotplug.c b/hw/acpi/cpu_hotplug.c
index 53654f863830..ff14c3f4106f 100644
--- a/hw/acpi/cpu_hotplug.c
+++ b/hw/acpi/cpu_ho
Hi Mostafa,
On Mon, Dec 19, 2022 at 12:57:20PM +, Mostafa Saleh wrote:
> GBPA register can be used to globally abort all
> transactions.
>
> Only UPDATE and ABORT bits are considered in this patch.
That's fair, although it effectively implements all bits since
smmuv3_translate() ignores memo
On Thu, Dec 22, 2022 at 8:40 AM Alistair Francis
wrote:
>
> From: Wilfred Mallawa
>
> use the `FIELD32_1CLEAR` macro to implement register
> `rw1c` functionality to `ibex_spi`.
>
> This change was tested by running the `SPI_HOST` from TockOS.
>
> Signed-off-by: Wilfred Mallawa
> Reviewed-by: Ali
On Wed, Jan 04, 2023 at 10:01:38AM +0100, Laszlo Ersek wrote:
> The modern ACPI CPU hotplug interface was introduced in the following
> series (aa1dd39ca307..679dd1a957df), released in v2.7.0:
>
> 1 abd49bc2ed2f docs: update ACPI CPU hotplug spec with new protocol
> 2 16bcab97eb9f pc: piix4/
The windows jobs (especially the 32-bit job) recently started to
hit the timeout limit. Bump it a little bit to ease the situation
(80 minutes is quite long already - OTOH, these jobs do not have to
wait for a job from the container stage to finish, so this should
still be OK).
Additionally, some
From: Ben Dooks
Add support for Microchip MCP25625 SPI based CAN controller which is
very similar to the MCP2515 (and covered by the same Linux driver).
This can be added to any machine with SPI support in the machine
model file.
Example for using this when configured into a machine:
-
On 4/1/23 13:35, Thomas Huth wrote:
The windows jobs (especially the 32-bit job) recently started to
hit the timeout limit. Bump it a little bit to ease the situation
(80 minutes is quite long already - OTOH, these jobs do not have to
wait for a job from the container stage to finish, so this sho
* David Woodhouse (dw...@infradead.org) wrote:
> From: Joao Martins
>
> Specifically add listing, injection of event channels.
These are all for debug only aren't they?
Even so, see docs/devel/writing-monitor-commands.rst, people like
commands to be built around qmp if possible now; there's a t
Hello! Script "configure" uses "pkg-config" directly (at line 2420), which
always takes GLIB_VERSION from host system. In case of cross-compilation, it
should use "$pkg_config", to take GLIB_VERSION of cross-compiled glib (as it is
used earlier at line 1476).So, the line:echo "GLIB_VERSION=$(pkg
On 1/4/2023 7:13 AM, Bernhard Beschow wrote:
> Am 4. Januar 2023 08:18:59 UTC schrieb Chuck Zmudzinski :
> >On 1/3/2023 8:38 AM, Bernhard Beschow wrote:
> >>
> >>
> >> On Tue, Jan 3, 2023 at 2:17 PM Philippe Mathieu-Daudé
> >> wrote:
> >>
> >> Hi Chuck,
> >>
> >> On 3/1/23 04:15, Chuck Zm
On 04/01/2023 12:22, Ben Dooks wrote:
From: Ben Dooks
Add support for Microchip MCP25625 SPI based CAN controller which is
very similar to the MCP2515 (and covered by the same Linux driver).
This can be added to any machine with SPI support in the machine
model file.
Example for using this wh
Currently we only emit trace events for existing PCI functions.
In order to ease debugging PCI enumeration process, also emit
for unexisting functions:
$ qemu-system-foo -trace pci_cfg_\*
...
pci_cfg_read empty 00:0a.4 @0x0 -> 0x
pci_cfg_read empty 00:0a.5 @0x0 -> 0x
pci_
While working on endianness consolidation I figured
a long-standing bug in the GT64120 while accessing
PCI config/data registers from the CPU bus (via the
ISD).
While the debugging was painful, the fix is quite
easy: simply use the endianness MemoryRegionOps
provided by the abstract PCI_HOST_BRIDGE
Single registers access in ISD can produce multiple changes
in the address spaces. To reduce computational effort,
accumulate these as a single memory transaction.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/gt64xxx_pci.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/mips/
No need to refresh the ASCII bar when a LED is toggled
(and vice versa).
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/malta.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index c0a2e0ab04..e9424150aa 100644
--- a/hw/mips
The FPGA LEDs/ASCII display is mostly used by the bootloader
to show very low-level debug info. QEMU connects its output
to a character device backend, which is not very practical
to correlate with ASM instruction executed, interrupts or
MMIO accesses. Also, the display discard the previous states.
GT64120's PCI endianness swapping works on little-endian hosts,
but doesn't on big-endian ones. Instead of complicating how
CFGADDR/CFGDATA registers deal with endianness, use the existing
MemoryRegionOps from hw/pci/pci_host.c. Doing so also reduce the
access to internal PCI_HOST_BRIDGE fields.
M
Add quick tests booting YAMON:
$ avocado --show=app,console run -t machine:malta
tests/avocado/machine_mips_malta.py
(1/2)
tests/avocado/machine_mips_malta.py:MaltaMachine.test_mipsel_malta_yamon:
console: YAMON ROM Monitor, Revision 02.22.
console: Copyright (c) 1999-2007 MIPS Technolo
This series is taken from my MacOS branch and fixes setting the FPSR quotient
byte for the fmod and frem instructions which was causing the MacOS _Pack5
SANE trancendentals implementation to return incorrect values for sin() and
cos().
The first 2 patches update make_quotient() to take separate si
The FPSR quotient byte should be set to the value of the quotient and not the
result. Manually calculate the quotient in the frem helper in round to nearest
even mode (note this is different from the quotient calculated internally for
fmod), and use it to set the quotient byte accordingly.
Signed-
The FPSR quotient byte should be set to the value of the quotient and not the
result. Switch from using floatx80_mod() to floatx80_modrem() which returns
the quotient as a uint64_t which can be used for the quotient byte.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laurent Vivier
---
target/m6
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c
index fdc4937e29..0932c464fd 100644
--- a/target/m68k/fpu_helper.
This enables the quotient parameter to be changed from int32_t to uint32_t and
also allows the extra sign logic in make_quotient() to be removed.
Signed-off-by: Mark Cave-Ayland
---
target/m68k/fpu_helper.c | 23 +--
1 file changed, 13 insertions(+), 10 deletions(-)
diff --g
On 2/1/23 01:03, Bernhard Beschow wrote:
Am 31. Dezember 2022 13:44:00 UTC schrieb "Philippe Mathieu-Daudé"
:
On 31/12/22 10:53, Bernhard Beschow wrote:
Am 21. November 2022 15:34:05 UTC schrieb Bernhard Beschow :
Am 27. Oktober 2022 20:47:19 UTC schrieb "Philippe Mathieu-Daudé"
:
Lin
On 4/1/23 14:39, Philippe Mathieu-Daudé wrote:
Add quick tests booting YAMON:
$ avocado --show=app,console run -t machine:malta
tests/avocado/machine_mips_malta.py
(1/2)
tests/avocado/machine_mips_malta.py:MaltaMachine.test_mipsel_malta_yamon:
console: YAMON ROM Monitor, Revision 02.
Chuang Xu writes:
> add rcu_read_locked() to detect holding of rcu lock.
>
> Signed-off-by: Chuang Xu
> ---
> include/qemu/rcu.h | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/qemu/rcu.h b/include/qemu/rcu.h
> index b063c6fde8..42cbd0080f 100644
> --- a/include/qemu/r
On 4 January 2023 11:22:03 GMT, "Dr. David Alan Gilbert"
wrote:
>* David Woodhouse (dw...@infradead.org) wrote:
>> From: David Woodhouse
>>
>> The provides the QEMU side of interdomain event channels, allowing events
>> to be sent to/from the guest.
>>
>> The API mirrors libxenevtchn, and i
On 4 January 2023 12:01:54 GMT, "Dr. David Alan Gilbert"
wrote:
>* David Woodhouse (dw...@infradead.org) wrote:
>> From: David Woodhouse
>>
>> The hookup to event channel is a bit of a special case hack right now; as
>> we make this work for real PV driver back ends, that will be implemented
On 03/01/2023 15.46, Laurent Vivier wrote:
On 1/3/23 15:08, Thomas Huth wrote:
On 03/01/2023 12.00, Laurent Vivier wrote:
Signed-off-by: Laurent Vivier
Acked-by: Michael S. Tsirkin
---
Notes:
v4:
- rework EXPECT_STATE()
- use g_dir_make_tmp()
v3:
- Add "-M none"
On 21/12/22 17:59, Bernhard Beschow wrote:
Having a proxy PIC allows for ISA PICs to be created and wired up in
southbridges. This is especially useful for PIIX3 for two reasons:
First, the southbridge doesn't need to care about the virtualization
technology used (KVM, TCG, Xen) due to in-IRQs (w
On 03/01/2023 12.00, Laurent Vivier wrote:
Signed-off-by: Laurent Vivier
Acked-by: Michael S. Tsirkin
---
Notes:
v4:
- rework EXPECT_STATE()
- use g_dir_make_tmp()
v3:
- Add "-M none" to avoid error:
"No machine specified, and there is no default"
On Mon, Jan 02, 2023 at 11:41:13AM +0100, Alessandro Di Federico wrote:
> Note: `Makefile` relies on modification dates in the source tree to
> detect changes to `meson_options.txt`. However, git does not track
> those. Therefore, the following was necessary to regenerate
> `meson-buildoptions.sh`:
On Thu, Dec 22, 2022 at 11:39:54PM -0800, Christoph Hellwig wrote:
> Please don't do this. OCP is acting as a counter standard to the
> proper NVMe standard here and should in absolutely no way be supported
> by open source projects that needs to stick to the actual standards.
>
> Please work wit
This series first renders TYPE_PIIX3_XEN_DEVICE redundant and finally removes
it. The motivation is to 1/ decouple PIIX from Xen and 2/ to make Xen in the PC
machine agnostic to the precise southbridge being used. 2/ will become
particularily interesting once PIIX4 becomes usable in the PC machine,
The previous patch unified handling of piix_write_config() accross all
PIIX device models which allows for assigning k->config_write once in the
base class.
Signed-off-by: Bernhard Beschow
---
hw/isa/piix.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/hw/isa/piix.c b/hw
xen_piix3_set_irq() isn't PIIX specific: PIIX is a single PCI device
while xen_piix3_set_irq() maps multiple PCI devices to their respective
IRQs, which is board-specific. Rename xen_piix3_set_irq() to communicate
this.
Also rename XEN_PIIX_NUM_PIRQS to XEN_IOAPIC_NUM_PIRQS since the Xen's
IOAPIC
This is a preparational patch for the next one to make the following
more obvious:
First, pci_bus_irqs() is now called twice in case of Xen where the
second call overrides the pci_set_irq_fn with the Xen variant.
Second, pci_bus_set_route_irq_fn() is now also called in Xen mode.
Signed-off-by: B
During the last patches, TYPE_PIIX3_XEN_DEVICE turned into a clone of
TYPE_PIIX3_DEVICE. Remove this redundancy.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 4 +---
hw/isa/piix.c | 20
include/hw/southbridge/piix.h | 1 -
3 files cha
Subscribe to pci_bus_fire_intx_routing_notifier() instead which allows for
having a common piix_write_config() for all PIIX device models.
While at it, move the subscription into machine code in order to resolve
TYPE_PIIX3_XEN_DEVICE.
In a possible future followup, pci_bus_fire_intx_routing_notif
xen_intx_set_irq() doesn't depend on PIIX state. In order to resolve
TYPE_PIIX3_XEN_DEVICE and in order to make Xen agnostic about the
precise south bridge being used, set up Xen's PCI IRQ handling of PIIX3
in the board.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 12
hw
On Mon, Jan 2, 2023 at 1:19 PM wrote:
>
> From: Carlos Santos
>
> There are situatuions in which the keyboard maps are not necessary (e.g.
> when building only tools or linux-user emulator). Add an option to avoid
> installing them, as already possible to do with firmware blobs.
>
> Signed-off-by
On Wed, 4 Jan 2023 at 09:20, Thomas Huth wrote:
>
> On 21/12/2022 23.39, Alistair Francis wrote:
> > From: Alistair Francis
> >
> > The following changes since commit 222059a0fccf4af3be776fe35a5ea2d6a68f9a0b:
> >
> >Merge tag 'pull-ppc-20221221' of https://gitlab.com/danielhb/qemu into
> > s
Hi
On Wed, Jan 4, 2023 at 4:36 PM Thomas Huth wrote:
>
> The windows jobs (especially the 32-bit job) recently started to
> hit the timeout limit. Bump it a little bit to ease the situation
> (80 minutes is quite long already - OTOH, these jobs do not have to
> wait for a job from the container s
On Wed, Jan 04, 2023 at 12:15:20PM +0800, Jason Wang wrote:
> On Wed, Jan 4, 2023 at 1:30 AM Peter Xu wrote:
> >
> > On Mon, Dec 26, 2022 at 12:09:52PM +0800, Jason Wang wrote:
> > > On Sat, Dec 24, 2022 at 12:26 AM Peter Xu wrote:
> > > >
> > > > On Fri, Dec 23, 2022 at 03:48:01PM +0800, Jason W
On 4/1/23 15:49, Carlos Santos wrote:
On Mon, Jan 2, 2023 at 1:19 PM wrote:
From: Carlos Santos
There are situatuions in which the keyboard maps are not necessary (e.g.
when building only tools or linux-user emulator). Add an option to avoid
installing them, as already possible to do with fi
On 4/1/23 15:44, Bernhard Beschow wrote:
xen_piix3_set_irq() isn't PIIX specific: PIIX is a single PCI device
while xen_piix3_set_irq() maps multiple PCI devices to their respective
IRQs, which is board-specific. Rename xen_piix3_set_irq() to communicate
this.
Also rename XEN_PIIX_NUM_PIRQS to X
On 4/1/23 15:44, Bernhard Beschow wrote:
xen_intx_set_irq() doesn't depend on PIIX state. In order to resolve
TYPE_PIIX3_XEN_DEVICE and in order to make Xen agnostic about the
precise south bridge being used, set up Xen's PCI IRQ handling of PIIX3
in the board.
Signed-off-by: Bernhard Beschow
-
On 4/1/23 15:44, Bernhard Beschow wrote:
The previous patch unified handling of piix_write_config() accross all
PIIX device models which allows for assigning k->config_write once in the
base class.
Signed-off-by: Bernhard Beschow
---
hw/isa/piix.c | 4 +---
1 file changed, 1 insertion(+), 3
+Markus/Thomas
On 4/1/23 15:44, Bernhard Beschow wrote:
During the last patches, TYPE_PIIX3_XEN_DEVICE turned into a clone of
TYPE_PIIX3_DEVICE. Remove this redundancy.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 4 +---
hw/isa/piix.c | 20 --
On 4/1/23 15:38, Thomas Huth wrote:
On 03/01/2023 12.00, Laurent Vivier wrote:
Signed-off-by: Laurent Vivier
Acked-by: Michael S. Tsirkin
---
Notes:
v4:
- rework EXPECT_STATE()
- use g_dir_make_tmp()
v3:
- Add "-M none" to avoid error:
"No machine specified
Am 4. Januar 2023 14:37:29 UTC schrieb "Philippe Mathieu-Daudé"
:
>On 21/12/22 17:59, Bernhard Beschow wrote:
>> Having a proxy PIC allows for ISA PICs to be created and wired up in
>> southbridges. This is especially useful for PIIX3 for two reasons:
>> First, the southbridge doesn't need to c
Le 04/01/2023 à 14:45, Mark Cave-Ayland a écrit :
This enables the quotient parameter to be changed from int32_t to uint32_t and
also allows the extra sign logic in make_quotient() to be removed.
Signed-off-by: Mark Cave-Ayland
---
target/m68k/fpu_helper.c | 23 +--
1 fil
This is below memleak detected when to quit the qemu-system-x86_64 (with
vhost-scsi-pci).
(qemu) quit
=
==15568==ERROR: LeakSanitizer: detected memory leaks
Direct leak of 40 byte(s) in 1 object(s) allocated from:
#0 0x7f00aec57
Am 4. Januar 2023 13:11:16 UTC schrieb Chuck Zmudzinski :
>On 1/4/2023 7:13 AM, Bernhard Beschow wrote:
>> Am 4. Januar 2023 08:18:59 UTC schrieb Chuck Zmudzinski :
>> >On 1/3/2023 8:38 AM, Bernhard Beschow wrote:
>> >>
>> >>
>> >> On Tue, Jan 3, 2023 at 2:17 PM Philippe Mathieu-Daudé
>> >> wr
* Markus Armbruster (arm...@redhat.com) wrote:
> Keys are int. HMP sendkey assigns them from the value strtoul(),
> silently truncating values greater than INT_MAX. Fix to reject them.
>
> While there, use qemu_strtoul() instead of strtoul() so checkpatch.pl
> won't complain.
Last time through
On 4/1/23 17:01, Bernhard Beschow wrote:
Am 4. Januar 2023 14:37:29 UTC schrieb "Philippe Mathieu-Daudé"
:
On 21/12/22 17:59, Bernhard Beschow wrote:
Having a proxy PIC allows for ISA PICs to be created and wired up in
southbridges. This is especially useful for PIIX3 for two reasons:
First, t
On 1/4/23 9:44 AM, Bernhard Beschow wrote:
> During the last patches, TYPE_PIIX3_XEN_DEVICE turned into a clone of
> TYPE_PIIX3_DEVICE. Remove this redundancy.
>
> Signed-off-by: Bernhard Beschow
> ---
> hw/i386/pc_piix.c | 4 +---
> hw/isa/piix.c | 20 --
On Fri, 23 Dec 2022 at 11:12, Christian Schoenebeck
wrote:
>
> The following changes since commit 222059a0fccf4af3be776fe35a5ea2d6a68f9a0b:
>
> Merge tag 'pull-ppc-20221221' of https://gitlab.com/danielhb/qemu into
> staging (2022-12-21 18:08:09 +)
>
> are available in the Git repository at
On Wed, Jan 4, 2023 at 12:15 PM Philippe Mathieu-Daudé
wrote:
>
> On 4/1/23 15:49, Carlos Santos wrote:
> > On Mon, Jan 2, 2023 at 1:19 PM wrote:
> >>
> >> From: Carlos Santos
> >>
> >> There are situatuions in which the keyboard maps are not necessary (e.g.
> >> when building only tools or linu
On 1/4/23 11:12 AM, Bernhard Beschow wrote:
>
>
> Am 4. Januar 2023 13:11:16 UTC schrieb Chuck Zmudzinski :
>>On 1/4/2023 7:13 AM, Bernhard Beschow wrote:
>>> Am 4. Januar 2023 08:18:59 UTC schrieb Chuck Zmudzinski :
>>> >On 1/3/2023 8:38 AM, Bernhard Beschow wrote:
>>> >>
>>> >>
>>> >> On Tue, J
On 04/01/2023 16:35, Philippe Mathieu-Daudé wrote:
On 4/1/23 17:01, Bernhard Beschow wrote:
Am 4. Januar 2023 14:37:29 UTC schrieb "Philippe Mathieu-Daudé"
:
On 21/12/22 17:59, Bernhard Beschow wrote:
Having a proxy PIC allows for ISA PICs to be created and wired up in
southbridges. This is
ptw.c:S1_ptw_translate
After migrating to v7.2.0, an issue was found where we were not getting the
correct virtual address from a load insn. Reading the address used in the load
insn from the debugger resulted in the execution of the insn getting the
correct value but simply stepping over the
On Thu, Dec 22, 2022 at 12:02:10PM +0100, David Hildenbrand wrote:
> Migrating device state before we start iterating is currently impossible.
> Introduce and use qemu_savevm_state_start_precopy(), and use
> a new special migration priority -- MIG_PRI_POST_SETUP -- to decide whether
> state will be
On 1/4/23 05:45, Mark Cave-Ayland wrote:
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
Reviewed-by: Richard Henderson
r~
On 1/4/23 05:45, Mark Cave-Ayland wrote:
This enables the quotient parameter to be changed from int32_t to uint32_t and
also allows the extra sign logic in make_quotient() to be removed.
Signed-off-by: Mark Cave-Ayland
---
target/m68k/fpu_helper.c | 23 +--
1 file changed,
On 1/4/23 10:35 AM, Philippe Mathieu-Daudé wrote:
> +Markus/Thomas
>
> On 4/1/23 15:44, Bernhard Beschow wrote:
>> During the last patches, TYPE_PIIX3_XEN_DEVICE turned into a clone of
>> TYPE_PIIX3_DEVICE. Remove this redundancy.
>>
>> Signed-off-by: Bernhard Beschow
>> ---
>> hw/i386/pc_piix
On 1/4/23 05:45, Mark Cave-Ayland wrote:
The FPSR quotient byte should be set to the value of the quotient and not the
result. Switch from using floatx80_mod() to floatx80_modrem() which returns
the quotient as a uint64_t which can be used for the quotient byte.
Signed-off-by: Mark Cave-Ayland
R
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