On 29/12/22 21:52, Peter Delevoryas wrote:
On Thu, Dec 29, 2022 at 04:23:22PM +0100, Philippe Mathieu-Daudé wrote:
Since I don't have access to the datasheet, the relevant
values were found in:
https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi
Before on Zephyr:
Hi lists,
(Re-sending as plain text.)
We are in the process of using an external tool (CRIU) to checkpoint/restore a
KVM-enabled virtual machine. Initially we target the hypervisor kvmtool but the
extension, if done well, should allow to checkpoint any hypervisor: like Qemu
or firecracker.
CR
> -Original Message-
> From: Jason Wang
> Sent: Friday, 30 December 2022 04:45
> To: Sriram Yagnaraman
> Cc: qemu-devel@nongnu.org; Dmitry Fleytman
> ; Michael S . Tsirkin ;
> Marcel Apfelbaum
> Subject: Re: [PATCH 0/5] hw/net/igb: emulated network device with SR-IOV
>
> On Fri, Dec 30,
On Fri, Dec 30, 2022 at 2:21 AM Daniel Henrique Barboza
wrote:
>
> riscv_load_kernel() and riscv_load_initrd() works under the assumption
> that 'kernel_filename' and 'filename' are not NULL.
We should do the same in riscv_load_firmware()
>
> This is currently the case since all callers of both
Am 28.12.22 um 14:52 schrieb Christian Schoenebeck:
On Monday, December 26, 2022 4:08:37 PM CET Volker Rümelin wrote:
Am 21.12.22 um 12:03 schrieb Christian Schoenebeck:
On Sunday, December 18, 2022 6:15:38 PM CET Volker Rümelin wrote:
The currently used default playback settings in the ALSA a
On Fri, Dec 30, 2022 at 2:47 AM Daniel Henrique Barboza
wrote:
>
> The microchip_icicle_kit, sifive_u, spike and virt boards are now doing
> the same steps when '-kernel' is used:
>
> - execute load_kernel()
> - load init_rd()
> - write kernel_cmdline in the fdt
>
> Let's fold everything inside ri
This patch adds irq number property for loongarch msi interrupt
controller, and remove hard coding irq number macro.
Signed-off-by: Tianrui Zhao
---
hw/intc/loongarch_pch_msi.c | 33 ++---
hw/loongarch/virt.c | 13 +++-
include/hw/intc/loon
This series add irq number property for loongarch pch_msi
and pch_pic interrupt controller.
Changes for v4:
(1) Change the default irq number of pch pic to 32.
(2) Change the default irq number of pch msi to 224(256 - 32).
(3) Move the 'PCH_PIC_IRQ_NUM' macro to pci-host/ls7a.h
and add prefix
Change the default irq number of pch pic to 32, so that the irq
number of pch msi is 224(256 - 32), and move the 'PCH_PIC_IRQ_NUM'
macro to pci-host/ls7a.h and add prefix 'VIRT' on it to keep standard
format.
Signed-off-by: Tianrui Zhao
---
hw/intc/loongarch_pch_pic.c | 3 ++-
hw/loongar
With loongarch 7A1000 manual, irq number supported can be set
in PCH_PIC_INT_ID_HI register. This patch adds irq number property
for loongarch_pch_pic, so that virt machine can set different
irq number when pch_pic intc is added.
Signed-off-by: Tianrui Zhao
---
hw/intc/loongarch_pch_pic.c
Missing review: #3
Since v1:
- Fixed typo (Peter)
- Link HACE with sram insted of secsram
- Split patch #2 in 2, reworded it
- Cover more WDT registers (new patch)
---
Trying to fix some bugs triggered running Zephyr.
Still 2 bugs:
1/
uart:~$ sensor get SYSCLK
[00:00:23.592,000] os: * USA
Avoid confusing two different things:
- the WDT I/O region size ('iosize')
- at which offset the SoC map the WDT ('offset')
While it is often the same, we can map smaller region sizes
at larger offsets.
Here we are interested in the I/O region size, so rename as
'iosize'.
Reviewed-by: Peter Delev
Add more Aspeed watchdog registers from [*].
Since guests can righteously access them, log the access at
'unimplemented' level instead of 'guest-errors'.
[*]
https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/drivers/watchdog/wdt_aspeed.c#L31
Signed-off-by: Philippe Mathieu-Daudé
---
hw/
Since I don't have access to the datasheet, the relevant
values were found in:
https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi
Reviewed-by: Peter Delevoryas
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/aspeed_ast10x0.c | 16
1 file change
When booting the Zephyr demo in [1] we get:
aspeed.io: unimplemented device write (size 4, offset 0x185128, value
0x030f1ff1) <--
aspeed.io: unimplemented device write (size 4, offset 0x18512c, value
0x03f1)
This corresponds to this Zephyr code [2]:
static int aspeed_wdt_init(const s
Based on booting Zephyr demo from [1] running QEMU with
'-d unimp' and checking missing devices in [2].
[1] https://github.com/AspeedTech-BMC/zephyr/releases/tag/v00.01.07
[2]
https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi
Signed-off-by: Philippe Mathieu-Daud
Since I don't have access to the datasheet, the relevant
values were found in:
https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi
Before on Zephyr:
uart:~$ hash test
sha256_test
tv[0]:hash_final error
sha384_test
tv[0]:hash_final error
sha512_test
tv
IEC binary prefixes ease code review: the unit is explicit.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Delevoryas
---
hw/arm/aspeed_ast10x0.c | 3 ++-
hw/arm/aspeed_ast2600.c | 3 ++-
hw/arm/aspeed_soc.c | 4 ++--
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/
Some SRAM appears to be used by the Secure Boot unit and
crypto accelerators. Name it 'secure sram'.
Note, the SRAM base address was already present but unused
(the 'SBC' index is used for the MMIO peripheral).
Interestingly using CFLAGS=-Winitializer-overrides reports:
../hw/arm/aspeed_ast10x
This SoC uses a Cortex-M4F. QEMU only implements a M4,
which is good enough. Add a TODO note in case the M4F
is added.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Delevoryas
---
hw/arm/aspeed_ast10x0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/aspee
address_space_map() can fail:
uart:~$ hash test
sha256_test
tv[0]:
Segmentation fault: 11
Thread 3 "qemu-system-arm" received signal SIGSEGV, Segmentation fault.
gen_acc_mode_iov (req_len=0x718b7778, id=,
iov=0x718b7780, s=0x56ce0bd0)
at ../hw/misc/aspeed_hace.c:171
Add a very quick test that runs some commands in a Zephyr shell:
$ tests/venv/bin/avocado --show=app,console run -t os:zephyr tests/avocado
(2/2)
tests/avocado/machine_aspeed.py:AST1030Machine.test_ast1030_zephyros_1_07:
console: *** Booting Zephyr OS build v00.01.07 ***
console: ast1030
On 12/30/22 06:05, Bin Meng wrote:
On Fri, Dec 30, 2022 at 2:47 AM Daniel Henrique Barboza
wrote:
The microchip_icicle_kit, sifive_u, spike and virt boards are now doing
the same steps when '-kernel' is used:
- execute load_kernel()
- load init_rd()
- write kernel_cmdline in the fdt
Let's
From: David Woodhouse
The guest is permitted to specify an arbitrary domain/bus/device/function
and INTX pin from which the callback IRQ shall appear to have come.
In QEMU we can only easily do this for devices that actually exist, and
even that requires us "knowing" that it's a PCMachine in ord
From: David Woodhouse
Also set XEN_ATTACH mode in xen_init() to reflect the truth; not that
anyone ever cared before. It was *only* ever checked in xen_init_pv()
before.
Suggested-by: Paolo Bonzini
Signed-off-by: David Woodhouse
Reviewed-by: Paul Durrant
---
accel/xen/xen-all.c | 2 ++
incl
From: Joao Martins
Specifically XENMEM_add_to_physmap with space XENMAPSPACE_shared_info to
allow the guest to set its shared_info page.
Signed-off-by: Joao Martins
[dwmw2: Use the xen_overlay device, add compat support]
Signed-off-by: David Woodhouse
---
target/i386/kvm/trace-events | 1 +
From: Joao Martins
This is simply when guest tries to register a vcpu_info
and since vcpu_info placement is optional in the minimum ABI
therefore we can just fail with -ENOSYS
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c | 25 +++
From: Joao Martins
Which is used to fetch xenstore PFN and port to be used
by the guest. This is preallocated by the toolstack when
guest will just read those and use it straight away.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c | 39 ++
From: David Woodhouse
This finally comes with a mechanism for actually injecting events into
the guest vCPU, with all the atomic-test-and-set that's involved in
setting the bit in the shinfo, then the index in the vcpu_info, and
injecting either the lapic vector as MSI, or letting KVM inject the
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 180 ++
hw/i386/kvm/xen_evtchn.h | 2 +
target/i386/kvm/xen-emu.c | 12 +++
3 files changed, 194 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c b/hw/i386/kvm/xen_ev
From: Joao Martins
The only thing we need to handle on KVM side is to change the
pfn from R/W to R/O.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
hw/i386/xen/meson.build| 5 -
hw/i386/xen/xen_platform.c | 39 +-
2 files changed,
From: Ankur Arora
This is the hook for adding the HVM_PARAM_CALLBACK_IRQ parameter in a
subsequent commit.
Signed-off-by: Ankur Arora
Signed-off-by: Joao Martins
[dwmw2: Split out from another commit]
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c | 33 +
From: Joao Martins
Such that PCI passthrough devices work for Xen emulated guests.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
Reviewed-by: Paul Durrant
---
hw/i386/xen/xen_platform.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/hw/i3
From: David Woodhouse
The hookup to event channel is a bit of a special case hack right now; as
we make this work for real PV driver back ends, that will be implemented
for the general case of Dom0 ports binding to DomU.
Signed-off-by: David Woodhouse
---
hw/i386/kvm/meson.build| 1 +
hw
From: David Woodhouse
Extract requests, return ENOSYS to all of them. This is enough to allow
older Linux guests to boot, as they need *something* back but it doesn't
matter much what.
In the first instance we're likely to wire this up over a UNIX socket to
an actual xenstored implementation, bu
From: David Woodhouse
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-compat.h | 24 +
target/i386/kvm/xen-emu.c| 69
2 files changed, 93 insertions(+)
diff --git a/target/i386/kvm/xen-compat.h b/target/i386/kvm/xen-compat.h
index 0b7
From: Joao Martins
It allows to shutdown itself via hypercall with any of the 3 reasons:
1) self-reboot
2) shutdown
3) crash
Implementing SCHEDOP_shutdown sub op let us handle crashes gracefully rather
than leading to triple faults if it remains unimplemented.
In addition, the SHUTDOWN_so
From: David Woodhouse
There are (at least) three different vCPU ID number spaces. One is the
internal KVM vCPU index, based purely on which vCPU was chronologically
created in the kernel first. If userspace threads are all spawned and
create their KVM vCPUs in essentially random order, then the K
From: Joao Martins
Allow guest to setup the vcpu runstates which is used as
steal clock.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
target/i386/cpu.h | 1 +
target/i386/kvm/xen-emu.c | 57 +++
target/i386/machine.c | 1 +
3
Round 5, in which it gains a XenStore implementation. This just returns
ENOSYS to every request for now, but that's enough to let older Linux
guests boot, and let the XTF tests run.
As noted, I'd like to hook that up to a real xenstored via the UNIX
socket and an XS_SU command to let that connecti
From: Joao Martins
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
Reviewed-by: Paul Durrant
---
hw/xen/xen-legacy-backend.c | 40 +
include/hw/xen/xen-legacy-backend.h | 3 +++
2 files changed, 32 insertions(+), 11 deletions(-)
diff --git a/hw
From: David Woodhouse
This just initializes the basic Xen support in KVM for now. Only permitted
on TYPE_PC_MACHINE because that's where the sysbus devices for Xen heap
overlay, event channel, grant tables and other stuff will exist. There's
no point having the basic hypercall support if nothing
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 32
hw/i386/kvm/xen_evtchn.h | 2 ++
target/i386/kvm/xen-emu.c | 15 +++
3 files changed, 49 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c b/hw/i386/kvm/xen
From: Joao Martins
This is when guest queries for support for HVMOP_pagetable_dying.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/target/i386/kvm/xen-emu.c b/target/i386/kvm/xen-
From: David Woodhouse
The kvm_xen_inject_vcpu_callback_vector() function will either deliver
the per-vCPU local APIC vector (as an MSI), or just kick the vCPU out
of the kernel to trigger KVM's automatic delivery of the global vector.
Support for asserting the GSI/PCI_INTX callbacks will come lat
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 29 +
hw/i386/kvm/xen_evtchn.h | 3 +++
target/i386/kvm/xen-emu.c | 17 +
3 files changed, 49 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c b/hw/i386/kvm/xen
From: David Woodhouse
This adds the basic structure for maintaining the port table and reporting
the status of ports therein.
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 106 ++
hw/i386/kvm/xen_evtchn.h | 3 ++
target/i386/kvm/xen-emu.c
From: David Woodhouse
The GSI callback (and later PCI_INTX) is a level triggered interrupt. It
is asserted when an event channel is delivered to vCPU0, and is supposed
to be cleared when the vcpu_info->evtchn_upcall_pending field for vCPU0
is cleared again.
Thankfully, Xen does *not* assert the
From: Joao Martins
Handle the hypercall to set a per vcpu info, and also wire up the default
vcpu_info in the shared_info page for the first 32 vCPUs.
To avoid deadlock within KVM a vCPU thread must set its *own* vcpu_info
rather than it being set from the context in which the hypercall is
invok
From: Joao Martins
In order to support Linux vdso in Xen.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
target/i386/cpu.h | 1 +
target/i386/kvm/xen-emu.c | 100 +-
target/i386/machine.c | 1 +
3 files changed, 90 insertions
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 40 +++
hw/i386/kvm/xen_evtchn.h | 2 ++
target/i386/kvm/xen-emu.c | 12
3 files changed, 54 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c b/hw/i386/kvm
From: David Woodhouse
The XEN_EMU option will cover core Xen support in target/, which exists
only for x86 with KVM today but could theoretically also be implemented
on Arm/Aarch64 and with TCG or other accelerators. It will also cover
the support for architecture-independent grant table and even
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_gnttab.c | 31
hw/i386/kvm/xen_gnttab.h | 5
target/i386/kvm/xen-emu.c | 60 +++
3 files changed, 96 insertions(+)
diff --git a/hw/i386/kvm/xen_gnttab.c b/h
From: David Woodhouse
They both do the same thing and just call sched_yield. This is enough to
stop the Linux guest panicking when running on a host kernel which doesn't
intercept SCHEDOP_poll and lets it reach userspace.
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c | 12 ++
From: Joao Martins
Introduce support for one shot and periodic mode of Xen PV timers,
whereby timer interrupts come through a special virq event channel
with deadlines being set through:
1) set_timer_op hypercall (only oneshot)
2) vcpu_op hypercall for {set,stop}_{singleshot,periodic}_timer
hype
From: David Woodhouse
Signed-off-by: David Woodhouse
---
accel/kvm/kvm-all.c | 1 +
include/sysemu/kvm_int.h | 1 +
include/sysemu/kvm_xen.h | 1 +
target/i386/kvm/kvm.c | 34 ++
target/i386/kvm/xen-emu.c | 6 ++
5 files changed, 43 insertions
From: David Woodhouse
The provides the QEMU side of interdomain event channels, allowing events
to be sent to/from the guest.
The API mirrors libxenevtchn, and in time both this and the real Xen one
will be available through ops structures so that the PV backend drivers
can use the correct one a
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_gnttab.c | 19 +++
hw/i386/kvm/xen_gnttab.h | 2 ++
target/i386/kvm/xen-emu.c | 16 +++-
3 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/hw/i386/kvm/xen_gnttab.c b/hw/i386/kvm/
From: David Woodhouse
Add the array of virq ports to each vCPU so that we can deliver timers,
debug ports, etc. Global virqs are allocated against vCPU 0 initially,
but can be migrated to other vCPUs (when we implement that).
The kernel needs to know about VIRQ_TIMER in order to accelerate timer
From: Joao Martins
This means handling the new exit reason for Xen but still
crashing on purpose. As we implement each of the hypercalls
we will then return the right return code.
Signed-off-by: Joao Martins
[dwmw2: Add CPL to hypercall tracing, disallow hypercalls from CPL > 0]
Signed-off-by:
From: Joao Martins
Introduce support for emulating CPUID for Xen HVM guests. It doesn't make
sense to advertise the KVM leaves to a Xen guest, so do Xen unconditionally
when the xen-version machine property is set.
Signed-off-by: Joao Martins
[dwmw2: Obtain xen_version from KVM property, make i
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_gnttab.c | 83 ++-
hw/i386/kvm/xen_overlay.c | 2 +-
hw/i386/kvm/xen_overlay.h | 2 +
3 files changed, 85 insertions(+), 2 deletions(-)
diff --git a/hw/i386/kvm/xen_gnttab.c b/hw/i38
From: Joao Martins
This is just meant to serve as an example on how we can implement
hypercalls. xen_version specifically since Qemu does all kind of
feature controllability. So handling that here seems appropriate.
Signed-off-by: Joao Martins
[dwmw2: Implement kvm_gva_rw() safely]
Signed-off-b
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/meson.build | 1 +
hw/i386/kvm/xen_gnttab.c | 110 ++
hw/i386/kvm/xen_gnttab.h | 18 +++
hw/i386/pc.c | 2 +
target/i386/kvm/xen-emu.c | 3 ++
5 files changed, 13
On Fri, Dec 30, 2022 at 8:04 PM Daniel Henrique Barboza
wrote:
>
>
>
> On 12/30/22 06:05, Bin Meng wrote:
> > On Fri, Dec 30, 2022 at 2:47 AM Daniel Henrique Barboza
> > wrote:
> >> The microchip_icicle_kit, sifive_u, spike and virt boards are now doing
> >> the same steps when '-kernel' is used:
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 69 +++
hw/i386/kvm/xen_evtchn.h | 2 ++
target/i386/kvm/xen-emu.c | 15 +
3 files changed, 86 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c b/hw/i386/kvm/xe
From: David Woodhouse
Include basic support for setting HVM_PARAM_CALLBACK_IRQ to the global
vector method HVM_PARAM_CALLBACK_TYPE_VECTOR, which is handled in-kernel
by raising the vector whenever the vCPU's vcpu_info->evtchn_upcall_pending
flag is set.
Signed-off-by: David Woodhouse
---
hw/i3
On 30/12/22 10:59, Tianrui Zhao wrote:
This patch adds irq number property for loongarch msi interrupt
controller, and remove hard coding irq number macro.
Signed-off-by: Tianrui Zhao
---
hw/intc/loongarch_pch_msi.c | 33 ++---
hw/loongarch/virt.c
From: Joao Martins
Additionally set XEN_INTERFACE_VERSION to most recent in order to
exercise the "new" event_channel_op.
Signed-off-by: Joao Martins
[dwmw2: Ditch event_channel_op_compat which was never available to HVM guests]
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c | 2
From: Ankur Arora
The HVMOP_set_evtchn_upcall_vector hypercall sets the per-vCPU upcall
vector, to be delivered to the local APIC just like an MSI (with an EOI).
This takes precedence over the system-wide delivery method set by the
HVMOP_set_param hypercall with HVM_PARAM_CALLBACK_IRQ. It's used
From: David Woodhouse
Xen will "latch" the guest's 32-bit or 64-bit ("long mode") setting when
the guest writes the MSR to fill in the hypercall page, or when the guest
sets the event channel callback in HVM_PARAM_CALLBACK_IRQ.
KVM handles the former and sets the kernel's long_mode flag accordin
On 30/12/22 10:59, Tianrui Zhao wrote:
With loongarch 7A1000 manual, irq number supported can be set
in PCH_PIC_INT_ID_HI register. This patch adds irq number property
for loongarch_pch_pic, so that virt machine can set different
irq number when pch_pic intc is added.
Signed-off-by: Tianrui Zhao
From: David Woodhouse
It calls an internal close_port() helper which will also be used from
EVTCHNOP_reset and will actually do the work to disconnect/unbind a port
once any of that is actually implemented in the first place.
That in turn calls a free_port() internal function which will be in
er
On 30/12/22 12:34, Philippe Mathieu-Daudé wrote:
When booting the Zephyr demo in [1] we get:
aspeed.io: unimplemented device write (size 4, offset 0x185128, value
0x030f1ff1) <--
aspeed.io: unimplemented device write (size 4, offset 0x18512c, value
0x03f1)
This corresponds to this Z
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 78 +++
hw/i386/kvm/xen_evtchn.h | 2 +
target/i386/kvm/xen-emu.c | 16
3 files changed, 96 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c b/hw/i386/kvm/xen_
From: David Woodhouse
Xen has eight frames at 0xfeff8000 for this; we only really need two for
now and KVM puts the identity map at 0xfeffc000, so limit ourselves to
four.
Signed-off-by: David Woodhouse
---
include/sysemu/kvm_xen.h | 8
target/i386/kvm/xen-emu.c | 15 +++
From: Joao Martins
Specifically add listing, injection of event channels.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
hmp-commands.hx | 29 ++
hw/i386/kvm/xen_evtchn.c | 83
hw/i386/kvm/xen_evtchn.h | 3 ++
moni
From: David Woodhouse
For the shared info page and for grant tables, Xen shares its own pages
from the "Xen heap" to the guest. The guest requests that a given page
from a certain address space (XENMAPSPACE_shared_info, etc.) be mapped
to a given GPA using the XENMEM_add_to_physmap hypercall.
To
From: David Woodhouse
The xen_overlay device (and later similar devices for event channels and
grant tables) need to be instantiated. Do this from a kvm_type method on
the PC machine derivatives, since KVM is only way to support Xen emulation
for now.
Signed-off-by: David Woodhouse
---
hw/i386
On 29/12/22 12:49, Thomas Huth wrote:
The HPET setting has been turned into a machine property a while ago
already, so we should finally do the next step and deprecate the
legacy CLI option, too.
Signed-off-by: Thomas Huth
---
v2:
- Rebased to current version from master branch / adjusted v
On 30/12/22 10:59, Tianrui Zhao wrote:
Change the default irq number of pch pic to 32, so that the irq
number of pch msi is 224(256 - 32), and move the 'PCH_PIC_IRQ_NUM'
macro to pci-host/ls7a.h and add prefix 'VIRT' on it to keep standard
format.
Signed-off-by: Tianrui Zhao
---
hw/intc/loong
On 30/12/22 09:58, Bin Meng wrote:
On Fri, Dec 30, 2022 at 2:21 AM Daniel Henrique Barboza
wrote:
riscv_load_kernel() and riscv_load_initrd() works under the assumption
that 'kernel_filename' and 'filename' are not NULL.
We should do the same in riscv_load_firmware()
Can be done on top IMH
On 29/12/22 19:11, Daniel Henrique Barboza wrote:
This test is used to do a quick sanity check to ensure that we're able
to run the existing QEMU FW image.
'sifive_u', 'spike' and 'virt' riscv64 machines, and 'sifive_u' and
'virt' 32 bit machines are able to run the default RISCV64_BIOS_BIN |
RI
On 29/12/22 19:11, Daniel Henrique Barboza wrote:
riscv_load_initrd() returns the initrd end addr while also writing a
'start' var to mark the addr start. These informations are being used
just to write the initrd FDT node. Every existing caller of
riscv_load_initrd() is writing the FDT in the sa
On 29/12/22 19:11, Daniel Henrique Barboza wrote:
The sifive_u, spike and virt machines are writing the 'bootargs' FDT
node during their respective create_fdt().
Given that bootargs is written only when '-append' is used, and this
option is only allowed with the '-kernel' option, which in turn i
On 30/12/22 01:02, Richard Henderson wrote:
As in page_get_flags, we need to try again with the mmap
lock held if we fail a page lookup.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/user-exec.c | 41 ++---
1 file chan
On Thursday, December 29, 2022 7:03:54 AM CET Shi, Guohuai wrote:
>
> > -Original Message-
> > From: Christian Schoenebeck
> > Sent: Wednesday, December 28, 2022 19:51
> > To: Greg Kurz ; qemu-devel@nongnu.org
> > Cc: Meng, Bin ; Shi, Guohuai
> >
> > Subject: Re: [PATCH v3 07/17] hw/9pfs
On Thursday, December 29, 2022 1:31:09 PM CET Philippe Mathieu-Daudé wrote:
> On 27/12/22 17:15, Christian Schoenebeck wrote:
> > While mouse is grabbed, window title contains a hint for the user what
> > keyboard keys to press to release the mouse. Make that hint text a bit
> > more user friendly
On Friday, December 30, 2022 10:01:47 AM CET Volker Rümelin wrote:
> Am 28.12.22 um 14:52 schrieb Christian Schoenebeck:
> > On Monday, December 26, 2022 4:08:37 PM CET Volker Rümelin wrote:
> >> Am 21.12.22 um 12:03 schrieb Christian Schoenebeck:
> >>> On Sunday, December 18, 2022 6:15:38 PM CET V
Hi,
QEMU 7.2.0 when run on 32-bit x86 architecture fails with:
i586$ qemu-system-i386 -enable-kvm
qemu-system-i386: Could not install MSR_CORE_THREAD_COUNT handler: Success
i586$ qemu-system-x86_64 -enable-kvm
qemu-system-x86_64: Could not install MSR_CORE_THREAD_COUNT handler: Success
M
From: "dengp...@chinatelecom.cn"
Memory free should be done in vdagent_disconnect using
qemu_input_handler_unregister, replace qemu_input_handler_deactivate
with that.
Signed-off-by: dengp...@chinatelecom.cn
Signed-off-by: liuy...@chinatelecom.cn
---
ui/vdagent.c | 2 +-
1 file changed, 1 ins
From: "dengp...@chinatelecom.cn"
To support live migration, we made the following 2 modifications:
1. save the caps field of VDAgentChardev.
2. register vdagent to qemu-clipboard after
vm device state being reloaded during live migration.
Signed-off-by: dengp...@chinatelecom.cn
Signed-off-by
From: "dengp...@chinatelecom.cn"
Abstract vdagent registry logic into
vdagent_register_to_qemu_clipboard.
Note that trace log of vdagent_recv_caps also be added.
Signed-off-by: dengp...@chinatelecom.cn
Signed-off-by: liuy...@chinatelecom.cn
---
ui/trace-events | 1 +
ui/vdagent.c| 20 ++
From: "dengp...@chinatelecom.cn"
1. after live migration, copy/paste with vnc is not working. this is because:
1). vd->caps is not saved; this will leads wrong clipboard type is prased in
vdagent_clipboard_recv_grab;
2). vdagent isn`t register to qemu-clipboard; this will leads vdagent cannot
s
From: "dengp...@chinatelecom.cn"
Now that migration already be supported, so remove the blocker.
Signed-off-by: dengp...@chinatelecom.cn
Signed-off-by: liuy...@chinatelecom.cn
---
ui/vdagent.c | 12
1 file changed, 12 deletions(-)
diff --git a/ui/vdagent.c b/ui/vdagent.c
index 1
Olimex makes a series of low-cost STM32 boards. This commit introduces
the minimum setup to support SMT32-H405. See [1] for details
[1] https://www.olimex.com/Products/ARM/ST/STM32-H405/
Signed-off-by: Felipe Balbi
---
Changes since v1:
- Add a note in stm32.rst
- Initialize def
STM32F405 has 128K of SRAM and another 64K of CCM (Core-coupled
Memory) at a different base address. Correctly describe the memory
layout to give existing FW images a chance to run unmodified.
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Felipe Balbi
---
Cha
Hi,
The following patches pass checkpatch.pl and have been tested against
55745005e90a.
Felipe Balbi (2):
hw/arm/stm32f405: correctly describe the memory layout
hw/arm: Add Olimex H405
MAINTAINERS | 6 +++
configs/devices/arm-softmmu/default.mak | 1 +
docs/sys
From: James Bottomley
The requested feedback was to convert the tpmdev handler to being json
based, which requires rethreading all the backends. The good news is
this reduced quite a bit of code (especially as I converted it to
error_fatal handling as well, which removes the return status
thread
From: James Bottomley
Instead of processing the tpmdev options using the old qemu options,
convert to the new visitor format which also allows the passing of
json on the command line.
Signed-off-by: James Bottomley
---
v4: add TpmConfiOptions
---
backends/tpm/tpm_emulator.c| 24 -
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