[PATCH v3 19/34] tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind

2022-12-01 Thread Richard Henderson
Prepare to replace a bunch of separate ifdefs with a consistent way to describe the ABI of a function call. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/tcg-internal.h | 15 +++ 1 file changed, 15 insertions(+) diff --git a/tcg/tcg-internal.h b/tcg/t

[PATCH v3 33/34] tcg/aarch64: Merge tcg_out_callr into tcg_out_call

2022-12-01 Thread Richard Henderson
There is only one use, and BLR is perhaps even more self-documentary than CALLR. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 344b63e20

[PATCH v3 11/34] accel/tcg: Set cflags_next_tb in cpu_common_initfn

2022-12-01 Thread Richard Henderson
While we initialize this value in cpu_common_reset, that isn't called during startup, so set it as well in init. This fixes -singlestep versus the very first TB. Fixes: 04f5b647ed07 ("accel/tcg: Handle -singlestep in curr_cflags") Signed-off-by: Richard Henderson --- hw/core/cpu-common.c | 1 +

[PATCH v3 12/34] target/sparc: Avoid TCGV_{LOW,HIGH}

2022-12-01 Thread Richard Henderson
Use the official extend/extract functions instead of routines that will shortly be internal to tcg. Cc: Mark Cave-Ayland Signed-off-by: Richard Henderson --- target/sparc/translate.c | 21 - 1 file changed, 4 insertions(+), 17 deletions(-) diff --git a/target/sparc/translat

[PATCH v3 29/34] tcg: Reorg function calls

2022-12-01 Thread Richard Henderson
Pre-compute the function call layout for each helper at startup. Drop TCG_CALL_DUMMY_ARG, as we no longer need to leave gaps in the op->args[] array. This allows several places to stop checking for NULL TCGTemp, to which TCG_CALL_DUMMY_ARG mapped. For tcg_gen_callN, loop over the arguments once.

[PATCH v10 1/9] mm: Introduce memfd_restricted system call to create restricted user memory

2022-12-01 Thread Chao Peng
From: "Kirill A. Shutemov" Introduce 'memfd_restricted' system call with the ability to create memory areas that are restricted from userspace access through ordinary MMU operations (e.g. read/write/mmap). The memory content is expected to be used through the new in-kernel interface by a third ke

[PATCH v10 0/9] KVM: mm: fd-based approach for supporting KVM

2022-12-01 Thread Chao Peng
This patch series implements KVM guest private memory for confidential computing scenarios like Intel TDX[1]. If a TDX host accesses TDX-protected guest memory, machine check can happen which can further crash the running host system, this is terrible for multi-tenant configurations. The host acces

[PATCH v10 4/9] KVM: Add KVM_EXIT_MEMORY_FAULT exit

2022-12-01 Thread Chao Peng
This new KVM exit allows userspace to handle memory-related errors. It indicates an error happens in KVM at guest memory range [gpa, gpa+size). The flags includes additional information for userspace to handle the error. Currently bit 0 is defined as 'private memory' where '1' indicates error happe

[PATCH v10 5/9] KVM: Use gfn instead of hva for mmu_notifier_retry

2022-12-01 Thread Chao Peng
Currently in mmu_notifier invalidate path, hva range is recorded and then checked against by mmu_notifier_retry_hva() in the page fault handling path. However, for the to be introduced private memory, a page fault may not have a hva associated, checking gfn(gpa) makes more sense. For existing hva

[PATCH v10 8/9] KVM: Handle page fault for private memory

2022-12-01 Thread Chao Peng
A KVM_MEM_PRIVATE memslot can include both fd-based private memory and hva-based shared memory. Architecture code (like TDX code) can tell whether the on-going fault is private or not. This patch adds a 'is_private' field to kvm_page_fault to indicate this and architecture code is expected to set i

[PATCH v10 6/9] KVM: Unmap existing mappings when change the memory attributes

2022-12-01 Thread Chao Peng
Unmap the existing guest mappings when memory attribute is changed between shared and private. This is needed because shared pages and private pages are from different backends, unmapping existing ones gives a chance for page fault handler to re-populate the mappings according to the new attribute.

[PATCH v10 3/9] KVM: Extend the memslot to support fd-based private memory

2022-12-01 Thread Chao Peng
In memory encryption usage, guest memory may be encrypted with special key and can be accessed only by the guest itself. We call such memory private memory. It's valueless and sometimes can cause problem to allow userspace to access guest private memory. This new KVM memslot extension allows guest

[PATCH v10 9/9] KVM: Enable and expose KVM_MEM_PRIVATE

2022-12-01 Thread Chao Peng
Register/unregister private memslot to fd-based memory backing store restrictedmem and implement the callbacks for restrictedmem_notifier: - invalidate_start()/invalidate_end() to zap the existing memory mappings in the KVM page table. - error() to request KVM_REQ_MEMORY_MCE and later exit

[PATCH v10 7/9] KVM: Update lpage info when private/shared memory are mixed

2022-12-01 Thread Chao Peng
A large page with mixed private/shared subpages can't be mapped as large page since its sub private/shared pages are from different memory backends and may also treated by architecture differently. When private/shared memory are mixed in a large page, the current lpage_info is not sufficient to dec

[PATCH v10 2/9] KVM: Introduce per-page memory attributes

2022-12-01 Thread Chao Peng
In confidential computing usages, whether a page is private or shared is necessary information for KVM to perform operations like page fault handling, page zapping etc. There are other potential use cases for per-page memory attributes, e.g. to make memory read-only (or no-exec, or exec-only, etc.)

[PATCH v3 10/13] tcg/s390x: Generalize movcond implementation

2022-12-01 Thread Richard Henderson
Generalize movcond to support pre-computed conditions, and the same set of arguments at all times. This will be assumed by a following patch, which needs to reuse tgen_movcond_int. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 3 +- tcg/s390x/tcg-target.c.inc | 78 +

[PATCH v3 12/13] tcg/s390x: Use tgen_movcond_int in tgen_clz

2022-12-01 Thread Richard Henderson
Reuse code from movcond to conditionally copy a2 to dest, based on the condition codes produced by FLOGR. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.c.inc | 26 +++--- 2 files changed, 12 insertions(+), 15 deletions(-)

[PATCH v3 11/13] tcg/s390x: Support SELGR instruction in movcond

2022-12-01 Thread Richard Henderson
The new select instruction provides two separate register inputs, whereas the old load-on-condition instruction overlaps one of the register inputs with the destination. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 21 + 1 file changed, 21 insertions(+)

[PATCH v3 01/13] tcg/s390x: Use register pair allocation for div and mulu2

2022-12-01 Thread Richard Henderson
Previously we hard-coded R2 and R3. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 4 ++-- tcg/s390x/tcg-target-con-str.h | 8 +-- tcg/s390x/tcg-target.c.inc | 43 +- 3 files changed, 35 insertions(+), 20 deletions(-) diff --git a

[PATCH v3 05/13] tcg/s390x: Distinguish RIE formats

2022-12-01 Thread Richard Henderson
There are multiple variations, with different fields. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 47 +- 1 file changed, 26 insertions(+), 21 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index a489b33

[PATCH v3 00/13] tcg/s390x: misc patches

2022-12-01 Thread Richard Henderson
Based-on: 20221202053958.223890-1-richard.hender...@linaro.org ("[PATCH for-8.0 v3 00/34] tcg misc patches") This contains two patches that exercise the register pair patches within the "tcg misc patches" patch set. Then a couple of misc cleanups, then support for the MIE2, MIE3, and POPCOUNT fea

[PATCH v3 13/13] tcg/s390x: Implement ctpop operation

2022-12-01 Thread Richard Henderson
There is an older form that produces per-byte results, and a newer form that produces per-register results, and a vector form that produces per-element results. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.h | 5 ++-- tcg/s390x/tcg-target.c.inc | 51

[PATCH v3 07/13] tcg/s390x: Support MIE2 MGRK instruction

2022-12-01 Thread Richard Henderson
The MIE2 facility adds a 3-operand signed 64x64->128 multiply. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.h | 2 +- tcg/s390x/tcg-target.c.inc | 8 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/tcg/s390x/t

[PATCH v3 08/13] tcg/s390x: Support MIE3 logical operations

2022-12-01 Thread Richard Henderson
This is andc, orc, nand, nor, eqv. We can use nor for implementing not. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.h | 25 + tcg/s390x/tcg-target.c.inc | 100 + 3 files changed, 114 insert

Re: [PATCH 3/9] ui: Drop disabled code for SPICE_CHANNEL_WEBDAV

2022-12-01 Thread Markus Armbruster
Daniel P. Berrangé writes: > On Thu, Dec 01, 2022 at 04:49:25PM +0100, Markus Armbruster wrote: >> Daniel P. Berrangé writes: >> >> > On Thu, Dec 01, 2022 at 01:39:13PM +0100, Markus Armbruster wrote: [...] >> >> Would you like me to bump spice-server as well? To which version? >> > >> > Yes

[PATCH v3 09/13] tcg/s390x: Create tgen_cmp2 to simplify movcond

2022-12-01 Thread Richard Henderson
Return both regular and inverted condition codes from tgen_cmp2. This lets us choose after the fact which comparision we want. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 25 + 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/tcg/s390x/

[PATCH v3 04/13] tcg/s390x: Distinguish RRF-a and RRF-c formats

2022-12-01 Thread Richard Henderson
One has 3 register arguments; the other has 2 plus an m3 field. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 57 +- 1 file changed, 32 insertions(+), 25 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc ind

Re: [PATCH v3 1/3] accel: introduce accelerator blocker API

2022-12-01 Thread Robert Hoo
On Fri, 2022-11-11 at 10:47 -0500, Emanuele Giuseppe Esposito wrote: > This API allows the accelerators to prevent vcpus from issuing > new ioctls while execting a critical section marked with the > accel_ioctl_inhibit_begin/end functions. > > Note that all functions submitting ioctls must mark wh

Re: [PATCH v9 1/8] mm: Introduce memfd_restricted system call to create restricted user memory

2022-12-01 Thread Chao Peng
On Thu, Dec 01, 2022 at 06:16:46PM -0800, Vishal Annapurve wrote: > On Tue, Oct 25, 2022 at 8:18 AM Chao Peng wrote: > > ... > > +} > > + > > +SYSCALL_DEFINE1(memfd_restricted, unsigned int, flags) > > +{ > > Looking at the underlying shmem implementation, there seems to be no > way to enable tra

Re: [PATCH v3 2/3] KVM: keep track of running ioctls

2022-12-01 Thread Robert Hoo
On Fri, 2022-11-11 at 10:47 -0500, Emanuele Giuseppe Esposito wrote: > Using the new accel-blocker API, mark where ioctls are being called > in KVM. Next, we will implement the critical section that will take > care of performing memslots modifications atomically, therefore > preventing any new ioc

[PATCH v3 06/13] tcg/s390x: Support MIE2 multiply single instructions

2022-12-01 Thread Richard Henderson
The MIE2 facility adds 3-operand versions of multiply. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 1 + tcg/s390x/tcg-target.h | 1 + tcg/s390x/tcg-target.c.inc | 34 -- 3 files changed, 26 insertions(+), 10 deletions(-) di

[PATCH v3 03/13] tcg/s390x: Use LARL+AGHI for odd addresses

2022-12-01 Thread Richard Henderson
Add one instead of dropping odd addresses to the constant pool. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 8a4bec0a28..34de5c5ebe

[PATCH v3 02/13] tcg/s390x: Remove TCG_REG_TB

2022-12-01 Thread Richard Henderson
This reverts 829e1376d940 ("tcg/s390: Introduce TCG_REG_TB"), and several follow-up patches. The primary motivation is to reduce the less-tested code paths, pre-z10. Secondarily, this allows the unconditional use of TCG_TARGET_HAS_direct_jump, which might be more important for performance than an

Re: [QEMU][PATCH v2 01/11] hw/i386/xen/: move xen-mapcache.c to hw/xen/

2022-12-01 Thread Philippe Mathieu-Daudé
On 2/12/22 03:59, Vikram Garhwal wrote: xen-mapcache.c contains common functions which can be used for enabling Xen on aarch64 with IOREQ handling. Moving it out from hw/i386/xen to hw/xen to make it accessible for both aarch64 and x86. Signed-off-by: Vikram Garhwal Signed-off-by: Stefano Stabe

Re: [QEMU][PATCH v2 05/11] include/hw/xen/xen_common: return error from xen_create_ioreq_server

2022-12-01 Thread Philippe Mathieu-Daudé
Hi Stefano and Vikram, On 2/12/22 03:59, Vikram Garhwal wrote: From: Stefano Stabellini This is done to prepare for enabling xenpv support for ARM architecture. On ARM it is possible to have a functioning xenpv machine with only the PV backends and no IOREQ server. If the IOREQ server creation

Re: [QEMU][PATCH v2 07/11] hw/xen/xen-hvm-common: Use g_new and error_setg_errno

2022-12-01 Thread Philippe Mathieu-Daudé
On 2/12/22 03:59, Vikram Garhwal wrote: Replace g_malloc with g_new and perror with error_setg_errno. Signed-off-by: Vikram Garhwal --- hw/xen/xen-hvm-common.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) @@ -717,7 +717,7 @@ void destroy_hvm_domain(bool reboot)

Re: [QEMU][PATCH v2 10/11] hw/arm: introduce xenpv machine

2022-12-01 Thread Philippe Mathieu-Daudé
On 2/12/22 04:00, Vikram Garhwal wrote: Add a new machine xenpv which creates a IOREQ server to register/connect with Xen Hypervisor. Optional: When CONFIG_TPM is enabled, it also creates a tpm-tis-device, adds a TPM emulator and connects to swtpm running on host machine via chardev socket and s

Re: [PATCH v3 04/34] tcg: Cleanup trailing whitespace

2022-12-01 Thread Philippe Mathieu-Daudé
On 2/12/22 06:39, Richard Henderson wrote: Remove whitespace at end of line, plus one place this also highlights some missing braces. Signed-off-by: Richard Henderson --- tcg/tcg.c| 33 + tcg/ppc/tcg-target.c.inc | 2 +- 2 files changed, 18 i

Re: [PATCH v2 for-8.0] target/s390x/tcg: Fix and improve the SACF instruction

2022-12-01 Thread Thomas Huth
On 01/12/2022 21.51, Richard Henderson wrote: On 12/1/22 10:44, Thomas Huth wrote: The SET ADDRESS SPACE CONTROL FAST instruction is not privileged, it can be used from problem space, too. Just the switching to the home address space is privileged and should still generate a privilege exception.

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