Prepare to replace a bunch of separate ifdefs with a
consistent way to describe the ABI of a function call.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tcg-internal.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/tcg/tcg-internal.h b/tcg/t
There is only one use, and BLR is perhaps even more
self-documentary than CALLR.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.c.inc | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 344b63e20
While we initialize this value in cpu_common_reset, that
isn't called during startup, so set it as well in init.
This fixes -singlestep versus the very first TB.
Fixes: 04f5b647ed07 ("accel/tcg: Handle -singlestep in curr_cflags")
Signed-off-by: Richard Henderson
---
hw/core/cpu-common.c | 1 +
Use the official extend/extract functions instead of routines
that will shortly be internal to tcg.
Cc: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target/sparc/translate.c | 21 -
1 file changed, 4 insertions(+), 17 deletions(-)
diff --git a/target/sparc/translat
Pre-compute the function call layout for each helper at startup.
Drop TCG_CALL_DUMMY_ARG, as we no longer need to leave gaps
in the op->args[] array. This allows several places to stop
checking for NULL TCGTemp, to which TCG_CALL_DUMMY_ARG mapped.
For tcg_gen_callN, loop over the arguments once.
From: "Kirill A. Shutemov"
Introduce 'memfd_restricted' system call with the ability to create
memory areas that are restricted from userspace access through ordinary
MMU operations (e.g. read/write/mmap). The memory content is expected to
be used through the new in-kernel interface by a third ke
This patch series implements KVM guest private memory for confidential
computing scenarios like Intel TDX[1]. If a TDX host accesses
TDX-protected guest memory, machine check can happen which can further
crash the running host system, this is terrible for multi-tenant
configurations. The host acces
This new KVM exit allows userspace to handle memory-related errors. It
indicates an error happens in KVM at guest memory range [gpa, gpa+size).
The flags includes additional information for userspace to handle the
error. Currently bit 0 is defined as 'private memory' where '1'
indicates error happe
Currently in mmu_notifier invalidate path, hva range is recorded and
then checked against by mmu_notifier_retry_hva() in the page fault
handling path. However, for the to be introduced private memory, a page
fault may not have a hva associated, checking gfn(gpa) makes more sense.
For existing hva
A KVM_MEM_PRIVATE memslot can include both fd-based private memory and
hva-based shared memory. Architecture code (like TDX code) can tell
whether the on-going fault is private or not. This patch adds a
'is_private' field to kvm_page_fault to indicate this and architecture
code is expected to set i
Unmap the existing guest mappings when memory attribute is changed
between shared and private. This is needed because shared pages and
private pages are from different backends, unmapping existing ones
gives a chance for page fault handler to re-populate the mappings
according to the new attribute.
In memory encryption usage, guest memory may be encrypted with special
key and can be accessed only by the guest itself. We call such memory
private memory. It's valueless and sometimes can cause problem to allow
userspace to access guest private memory. This new KVM memslot extension
allows guest
Register/unregister private memslot to fd-based memory backing store
restrictedmem and implement the callbacks for restrictedmem_notifier:
- invalidate_start()/invalidate_end() to zap the existing memory
mappings in the KVM page table.
- error() to request KVM_REQ_MEMORY_MCE and later exit
A large page with mixed private/shared subpages can't be mapped as large
page since its sub private/shared pages are from different memory
backends and may also treated by architecture differently. When
private/shared memory are mixed in a large page, the current lpage_info
is not sufficient to dec
In confidential computing usages, whether a page is private or shared is
necessary information for KVM to perform operations like page fault
handling, page zapping etc. There are other potential use cases for
per-page memory attributes, e.g. to make memory read-only (or no-exec,
or exec-only, etc.)
Generalize movcond to support pre-computed conditions, and the same
set of arguments at all times. This will be assumed by a following
patch, which needs to reuse tgen_movcond_int.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target-con-set.h | 3 +-
tcg/s390x/tcg-target.c.inc | 78 +
Reuse code from movcond to conditionally copy a2 to dest,
based on the condition codes produced by FLOGR.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target-con-set.h | 1 +
tcg/s390x/tcg-target.c.inc | 26 +++---
2 files changed, 12 insertions(+), 15 deletions(-)
The new select instruction provides two separate register inputs,
whereas the old load-on-condition instruction overlaps one of the
register inputs with the destination.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target.c.inc | 21 +
1 file changed, 21 insertions(+)
Previously we hard-coded R2 and R3.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target-con-set.h | 4 ++--
tcg/s390x/tcg-target-con-str.h | 8 +--
tcg/s390x/tcg-target.c.inc | 43 +-
3 files changed, 35 insertions(+), 20 deletions(-)
diff --git a
There are multiple variations, with different fields.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target.c.inc | 47 +-
1 file changed, 26 insertions(+), 21 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index a489b33
Based-on: 20221202053958.223890-1-richard.hender...@linaro.org
("[PATCH for-8.0 v3 00/34] tcg misc patches")
This contains two patches that exercise the register pair patches
within the "tcg misc patches" patch set. Then a couple of misc
cleanups, then support for the MIE2, MIE3, and POPCOUNT fea
There is an older form that produces per-byte results,
and a newer form that produces per-register results,
and a vector form that produces per-element results.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target.h | 5 ++--
tcg/s390x/tcg-target.c.inc | 51
The MIE2 facility adds a 3-operand signed 64x64->128 multiply.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target-con-set.h | 1 +
tcg/s390x/tcg-target.h | 2 +-
tcg/s390x/tcg-target.c.inc | 8
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/tcg/s390x/t
This is andc, orc, nand, nor, eqv.
We can use nor for implementing not.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target-con-set.h | 1 +
tcg/s390x/tcg-target.h | 25 +
tcg/s390x/tcg-target.c.inc | 100 +
3 files changed, 114 insert
Daniel P. Berrangé writes:
> On Thu, Dec 01, 2022 at 04:49:25PM +0100, Markus Armbruster wrote:
>> Daniel P. Berrangé writes:
>>
>> > On Thu, Dec 01, 2022 at 01:39:13PM +0100, Markus Armbruster wrote:
[...]
>> >> Would you like me to bump spice-server as well? To which version?
>> >
>> > Yes
Return both regular and inverted condition codes from tgen_cmp2.
This lets us choose after the fact which comparision we want.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target.c.inc | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/tcg/s390x/
One has 3 register arguments; the other has 2 plus an m3 field.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target.c.inc | 57 +-
1 file changed, 32 insertions(+), 25 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
ind
On Fri, 2022-11-11 at 10:47 -0500, Emanuele Giuseppe Esposito wrote:
> This API allows the accelerators to prevent vcpus from issuing
> new ioctls while execting a critical section marked with the
> accel_ioctl_inhibit_begin/end functions.
>
> Note that all functions submitting ioctls must mark wh
On Thu, Dec 01, 2022 at 06:16:46PM -0800, Vishal Annapurve wrote:
> On Tue, Oct 25, 2022 at 8:18 AM Chao Peng wrote:
> >
...
> > +}
> > +
> > +SYSCALL_DEFINE1(memfd_restricted, unsigned int, flags)
> > +{
>
> Looking at the underlying shmem implementation, there seems to be no
> way to enable tra
On Fri, 2022-11-11 at 10:47 -0500, Emanuele Giuseppe Esposito wrote:
> Using the new accel-blocker API, mark where ioctls are being called
> in KVM. Next, we will implement the critical section that will take
> care of performing memslots modifications atomically, therefore
> preventing any new ioc
The MIE2 facility adds 3-operand versions of multiply.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target-con-set.h | 1 +
tcg/s390x/tcg-target.h | 1 +
tcg/s390x/tcg-target.c.inc | 34 --
3 files changed, 26 insertions(+), 10 deletions(-)
di
Add one instead of dropping odd addresses to the constant pool.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target.c.inc | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 8a4bec0a28..34de5c5ebe
This reverts 829e1376d940 ("tcg/s390: Introduce TCG_REG_TB"), and
several follow-up patches. The primary motivation is to reduce the
less-tested code paths, pre-z10. Secondarily, this allows the
unconditional use of TCG_TARGET_HAS_direct_jump, which might be more
important for performance than an
On 2/12/22 03:59, Vikram Garhwal wrote:
xen-mapcache.c contains common functions which can be used for enabling Xen on
aarch64 with IOREQ handling. Moving it out from hw/i386/xen to hw/xen to make it
accessible for both aarch64 and x86.
Signed-off-by: Vikram Garhwal
Signed-off-by: Stefano Stabe
Hi Stefano and Vikram,
On 2/12/22 03:59, Vikram Garhwal wrote:
From: Stefano Stabellini
This is done to prepare for enabling xenpv support for ARM architecture.
On ARM it is possible to have a functioning xenpv machine with only the
PV backends and no IOREQ server. If the IOREQ server creation
On 2/12/22 03:59, Vikram Garhwal wrote:
Replace g_malloc with g_new and perror with error_setg_errno.
Signed-off-by: Vikram Garhwal
---
hw/xen/xen-hvm-common.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
@@ -717,7 +717,7 @@ void destroy_hvm_domain(bool reboot)
On 2/12/22 04:00, Vikram Garhwal wrote:
Add a new machine xenpv which creates a IOREQ server to register/connect with
Xen Hypervisor.
Optional: When CONFIG_TPM is enabled, it also creates a tpm-tis-device, adds a
TPM emulator and connects to swtpm running on host machine via chardev socket
and s
On 2/12/22 06:39, Richard Henderson wrote:
Remove whitespace at end of line, plus one place this also
highlights some missing braces.
Signed-off-by: Richard Henderson
---
tcg/tcg.c| 33 +
tcg/ppc/tcg-target.c.inc | 2 +-
2 files changed, 18 i
On 01/12/2022 21.51, Richard Henderson wrote:
On 12/1/22 10:44, Thomas Huth wrote:
The SET ADDRESS SPACE CONTROL FAST instruction is not privileged, it can be
used from problem space, too. Just the switching to the home address space
is privileged and should still generate a privilege exception.
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