On 17/11/2022 19:24, Jason Gunthorpe wrote:
On Thu, Nov 17, 2022 at 07:07:10PM +0200, Avihai Horon wrote:
+}
+
+if (mig_state->data_fd != -1) {
+if (migration->data_fd != -1) {
+/*
+ * This can happen if the device is asynchronously reset and
+
On 17/11/2022 19:38, Alex Williamson wrote:
External email: Use caution opening links or attachments
On Thu, 17 Nov 2022 19:07:10 +0200
Avihai Horon wrote:
On 16/11/2022 20:29, Alex Williamson wrote:
On Thu, 3 Nov 2022 18:16:15 +0200
Avihai Horon wrote:
diff --git a/hw/vfio/migration.c b
On 17/11/2022 20:18, Alex Williamson wrote:
External email: Use caution opening links or attachments
On Thu, 17 Nov 2022 19:11:47 +0200
Avihai Horon wrote:
On 16/11/2022 20:36, Alex Williamson wrote:
External email: Use caution opening links or attachments
On Thu, 3 Nov 2022 18:16:17 +0
v4: split to multiple commits
add support for more than just luks-any in layered encryption
nit fixes
v3: further nit fixes suggested by @idryomov
v2: nit fixes suggested by @idryomov
Or Ozeri (3):
block/rbd: encryption nit fixes
block/rbd: Add luks-any encryption opening option
blo
Starting from ceph Reef, RBD has built-in support for layered encryption,
where each ancestor image (in a cloned image setting) can be possibly
encrypted using a unique passphrase.
A new function, rbd_encryption_load2, was added to librbd API.
This new function supports an array of passphrases (vi
Add const modifier to passphrases,
and remove redundant stack variable passphrase_len.
Signed-off-by: Or Ozeri
---
block/rbd.c | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/block/rbd.c b/block/rbd.c
index f826410f40..e575105e6d 100644
--- a/block/
Ceph RBD encryption API required specifying the encryption format
for loading encryption. The supported formats were LUKS (v1) and LUKS2.
Starting from Reef release, RBD also supports loading with "luks-any" format,
which works for both versions of LUKS.
This commit extends the qemu rbd driver AP
Skip getting PCI info from disks type USB and give them an empty PCI address
instead.
Signed-off-by: Kfir Manor
---
qga/commands-win32.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/qga/commands-win32.c b/qga/commands-win32.c
index a645480496..14c43b3de5 1006
guest-get-fsinfo won't query storage devices of bus-type USB
(https://bugzilla.redhat.com/show_bug.cgi?id=2090333).
Bug, get_pci_info function returns an error after not finding any storage port
device info on the USB disk parent device (because of USB abstraction).
Fix, skip getting PCI info (
Refactoring code to avoid duplication of creating an empty PCI address code.
Signed-off-by: Kfir Manor
---
qga/commands-win32.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/qga/commands-win32.c b/qga/commands-win32.c
index ec9f55b453..a645480496 10064
pci_map_irq_fn's in general seem to be board-specific, and PIIX4's
pci_slot_get_pirq() in particular seems very Malta-specific. So move the
latter to malta.c to 1/ keep the board logic in one place and 2/ avoid
PIIX4 to make assumptions about its board.
Signed-off-by: Bernhard Beschow
---
hw/isa
pci_bus_irqs() coupled together the assignment of pci_set_irq_fn and
pci_map_irq_fn to a PCI bus. This coupling gets in the way when the
pci_map_irq_fn is board-specific while the pci_set_irq_fn is device-
specific.
For example, both of QEMU's PIIX south bridge models have different
pci_map_irq_fn
v1:
===
During my PIIX consolidation work [1] I've noticed that both PIIX models have
quite different pci_slot_get_pirq() implementations. These functions seem to
map PCI INTx pins to input pins of a programmable interrupt router which is
AFAIU board-specific. IOW, board-specific assumptions are b
pci_map_irq_fn's in general seem to be board-specific. So move PIIX3's
pci_slot_get_pirq() to board code to not have PIIX3 make assuptions
about its board.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 16
hw/isa/piix3.c| 13 -
2 files changed, 16 inser
La 18.11.2022 21:11, Peter Maydell a scris:
On Fri, 18 Nov 2022 at 17:37, Mihai Carabas wrote:
Use the base_memmap to build the SMBIOS 19 table which provides the address
mapping for a Physical Memory Array (from spec [1] chapter 7.20).
This was present on i386 from commit c97294ec1b9e36887e11
On 16/11/2022 19:39, BALATON Zoltan wrote:
On Wed, 16 Nov 2022, Igor Mammedov wrote:
Code has not been used practically since its inception (2004)
f2aa58c6f4a20 UniNorth PCI bridge support
or maybe even earlier, but it was consuming contributors time
as QEMU was being rewritten.
Drop it for n
On Fri, Nov 18, 2022 at 7:22 PM Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair Francis
Alistair
> ---
> Cc: Alistair Francis
> Cc: Bin Meng
> Cc: qemu-ri...@nongnu.org
> ---
> target/riscv/cpu_helper.c | 10 +-
> 1 file changed, 1 insertion(+),
On 11/18/22 05:30, Alex Bennée wrote:
Richard Henderson writes:
Create a wrapper for locking/unlocking the iothread lock.
Signed-off-by: Richard Henderson
---
Cc: Paolo Bonzini (maintainer:Main loop)
You might want to review Paolo's comments from:
Subject: [RFC PATCH] main-loop: intr
On Sun, Oct 16, 2022 at 11:09 PM Mayuresh Chitale
wrote:
>
> If smstateen is implemented and sstateen0.fcsr is clear then the floating
> point
> operations must return illegal instruction exception or virtual instruction
> trap, if relevant.
>
> Signed-off-by: Mayuresh Chitale
> Reviewed-by: Wei
On Fri, Nov 18, 2022 at 12:26 AM Alexandre Ghiti wrote:
>
> RISC-V specifies multiple sizes for addressable memory and Linux probes for
> the machine's support at startup via the satp CSR register (done in
> csr.c:validate_vm).
>
> As per the specification, sv64 must support sv57, which in turn mu
On Sun, Nov 13, 2022 at 7:52 PM Atish Patra wrote:
>
> The imsic DT binding[1] has changed and no longer require an ipi-id.
> The latest IMSIC driver dynamically allocates ipi id if slow-ipi
> is not defined.
>
> Get rid of the unused dt property which may lead to confusion.
>
> [1]
> https://lor
On Sun, Nov 13, 2022 at 7:52 PM Atish Patra wrote:
>
> The imsic DT binding[1] has changed and no longer require an ipi-id.
> The latest IMSIC driver dynamically allocates ipi id if slow-ipi
> is not defined.
>
> Get rid of the unused dt property which may lead to confusion.
>
> [1]
> https://lor
On Fri, Nov 18, 2022 at 10:45 PM Weiwei Li wrote:
>
> Add properties for Zca,Zcb,Zcf,Zcd,Zcmp,Zcmt extension
> Add check for these properties
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
> Cc: Alistair Francis
> Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
Ali
Hi Alistair,
On Tue, Nov 8, 2022 at 6:27 PM Anup Patel wrote:
>
> This series mainly includes fixes discovered while developing nested
> virtualization running on QEMU.
>
> These patches can also be found in the riscv_nested_fixes_v2 branch at:
> https://github.com/avpatel/qemu.git
>
> Changes si
On Fri, Nov 18, 2022 at 10:49 PM Longpeng(Mike) wrote:
>
> From: Longpeng
>
> This allows the vhost device to batch the setup of all its host notifiers.
> This significantly reduces the device starting time, e.g. the vhost-vDPA
> generic device [1] start time reduce from 376ms to 9.1ms for a VM w
On Fri, Nov 18, 2022 at 12:56 AM Stefan Hajnoczi wrote:
>
> There are two Tx Descriptor formats called mode 0 and mode 1. The mode
> is determined by the Large Send bit.
>
> CP_TX_IPCS (bit 18) is defined in mode 1 but the code checks the bit
> unconditionally. In mode 0 bit 18 is part of the Larg
On Fri, Nov 18, 2022 at 12:56 AM Stefan Hajnoczi wrote:
>
> The device turns the Tx Descriptor into a Tx Status descriptor after
> fully reading the descriptor. This involves clearing Tx Own (bit 31) to
> indicate that the driver has ownership of the descriptor again as well
> as several other bit
On Fri, Nov 18, 2022 at 12:56 AM Stefan Hajnoczi wrote:
>
> The Large-Send Task Offload Tx Descriptor (9.2.1 Transmit) has a
> Large-Send MSS value where the driver specifies the MSS. See the
> datasheet here:
> http://realtek.info/pdf/rtl8139cp.pdf
>
> The code ignores this value and uses a hardc
Introduces a (new) throttling scheme where QEMU defines a limit on the dirty
rate of each vcpu of the VM. This limit is enfored on the vcpus in small
intervals (dirty quota intervals) by allowing the vcpus to dirty only as many
pages in these intervals as to maintain a dirty rate below the set limi
This patchset is the QEMU-side implementation of a (new) dirty "quota"
based throttling algorithm that selectively throttles vCPUs based on their
individual contribution to overall memory dirtying and also dynamically
adapts the throttle based on the available network bandwidth.
Overview
-
On Sun, Nov 20, 2022 at 1:19 AM Michael S. Tsirkin wrote:
>
> On Fri, Nov 18, 2022 at 03:32:56PM +0100, Stefano Garzarella wrote:
> > Hi,
> > starting from this commit 69e1c14aa2 ("virtio: core: vq reset feature
> > negotation support"), vhost-user-vsock and vhost-vsock fails while
> > setting the
Hi
On Sun, Nov 20, 2022 at 6:09 PM Kfir Manor wrote:
>
> guest-get-fsinfo won't query storage devices of bus-type USB
> (https://bugzilla.redhat.com/show_bug.cgi?id=2090333).
>
> Bug, get_pci_info function returns an error after not finding any storage
> port device info on the USB disk parent
On 19/11/2022 8:28 pm, Dongli Zhang wrote:
This patchset is to fix two svm pmu virtualization bugs.
1. The 1st bug is that "-cpu,-pmu" cannot disable svm pmu virtualization.
To use "-cpu EPYC" or "-cpu host,-pmu" cannot disable the pmu
virtualization. There is still below at the VM linux side .
On Mon, Nov 21, 2022 at 02:17:02PM +0800, Jason Wang wrote:
> On Sun, Nov 20, 2022 at 1:19 AM Michael S. Tsirkin wrote:
> >
> > On Fri, Nov 18, 2022 at 03:32:56PM +0100, Stefano Garzarella wrote:
> > > Hi,
> > > starting from this commit 69e1c14aa2 ("virtio: core: vq reset feature
> > > negotation
On Fri, Nov 18, 2022 at 10:44 PM Weiwei Li wrote:
>
> Modify the check for C extension to Zca (C implies Zca)
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
> Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/insn_trans/trans_rvi.c.inc
On Fri, Nov 18, 2022 at 10:44 PM Weiwei Li wrote:
>
> Separate c_flw/c_fsw from flw/fsw to add check for Zcf extension
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
> Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/insn16.decode
Ping.
On 10/11/2022 15:36, Avihai Horon wrote:
On 08/11/2022 19:52, Vladimir Sementsov-Ogievskiy wrote:
External email: Use caution opening links or attachments
On 11/3/22 19:16, Avihai Horon wrote:
From: Juan Quintela
It was only used for RAM, and in that case, it means that this amount
On Fri, Nov 18, 2022 at 10:40 PM Weiwei Li wrote:
>
> Separate c_fld/c_fsd from fld/fsd to add additional check for
> c.fld{sp}/c.fsd{sp} which is useful for zcmp/zcmt to reuse
> their encodings
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
> Reviewed-by: Richard Henderson
Review
Ping.
On 10/11/2022 15:38, Avihai Horon wrote:
On 08/11/2022 20:36, Vladimir Sementsov-Ogievskiy wrote:
External email: Use caution opening links or attachments
On 11/3/22 19:16, Avihai Horon wrote:
From: Juan Quintela
And it appears that what is wrong is the code. During bulk stage we
ne
On Sat, 19 Nov 2022 12:22:13 -0500
"Michael S. Tsirkin" wrote:
> On Fri, Nov 18, 2022 at 03:55:17PM +0100, Igor Mammedov wrote:
> > On Fri, 18 Nov 2022 14:08:36 +0100
> > Igor Mammedov wrote:
> >
> > > On Thu, 17 Nov 2022 22:51:46 +0100
> > > Volker Rümelin wrote:
> > [...]
> > > > since
On Tue, Nov 8, 2022 at 11:09 PM Anup Patel wrote:
>
> We should call decode_save_opc() for all relevant instructions which
> can potentially generate a virtual instruction fault or a guest page
> fault because generating transformed instruction upon guest page fault
> expects opcode to be availabl
On Sat, 19 Nov 2022 09:49:39 +0100
Volker Rümelin wrote:
> Am 18.11.22 um 15:55 schrieb Igor Mammedov:
> > On Fri, 18 Nov 2022 14:08:36 +0100
> > Igor Mammedov wrote:
> >
> >> On Thu, 17 Nov 2022 22:51:46 +0100
> >> Volker Rümelin wrote:
> > [...]
> >>> since this patch SeaBIOS no longer
From: Marc-André Lureau
The following changes since commit a082fab9d259473a9d5d53307cf83b1223301181:
Merge tag 'pull-ppc-20221117' of https://gitlab.com/danielhb/qemu into
staging (2022-11-17 12:39:38 -0500)
are available in the Git repository at:
https://gitlab.com/marcandre.lureau/qemu.
From: Bin Meng
At present when pressing Ctrl+C from a guest running on QEMU Windows
with a multiplexed monitor, e.g.: -serial mon:stdio, QEMU executable
just exits. This behavior is inconsistent with the Linux version.
Such behavior is caused by unconditionally setting the input mode
ENABLE_PROC
Hi Like,
On 11/20/22 22:42, Like Xu wrote:
> On 19/11/2022 8:28 pm, Dongli Zhang wrote:
>> This patchset is to fix two svm pmu virtualization bugs.
>>
>> 1. The 1st bug is that "-cpu,-pmu" cannot disable svm pmu virtualization.
>>
>> To use "-cpu EPYC" or "-cpu host,-pmu" cannot disable the pmu
>>
On Sun, 20 Nov 2022 22:08:54 +
Mark Cave-Ayland wrote:
> On 16/11/2022 19:39, BALATON Zoltan wrote:
>
> > On Wed, 16 Nov 2022, Igor Mammedov wrote:
> >
> >> Code has not been used practically since its inception (2004)
> >> f2aa58c6f4a20 UniNorth PCI bridge support
> >> or maybe even ear
On Mon, Nov 21, 2022 at 08:23:15AM +0100, Igor Mammedov wrote:
> On Sat, 19 Nov 2022 12:22:13 -0500
> "Michael S. Tsirkin" wrote:
>
> > On Fri, Nov 18, 2022 at 03:55:17PM +0100, Igor Mammedov wrote:
> > > On Fri, 18 Nov 2022 14:08:36 +0100
> > > Igor Mammedov wrote:
> > >
> > > > On Thu, 17 N
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